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Remove kernel/arch/{amd64,i386,x86} tests These files were merged with kernel/t_ptrace_wait* This removes MD test files. Sponsored by <The NetBSD Foundation>
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Add kernel/arch/x86 ATF tests for CPU Debug Registers for amd64 and i386 This moves kernel/arch/amd64 tests, the ones to be shared between amd64 and i386, into kernel/arch/x86. This covers all Debug Register tests. kernel/arch/amd64 is reduced to regs1 kernel/arch/i386 is reduced to regs1 kernel/arch/x86 tests: - dbregs_print - dbregs_preserve_dr0 - dbregs_preserve_dr1 - dbregs_preserve_dr2 - dbregs_preserve_dr3 - dbregs_preserve_dr0_yield - dbregs_preserve_dr1_yield - dbregs_preserve_dr2_yield - dbregs_preserve_dr3_yield - dbregs_preserve_dr0_continued - dbregs_preserve_dr1_continued - dbregs_preserve_dr2_continued - dbregs_preserve_dr3_continued - dbregs_dr0_trap_variable_writeonly_byte - dbregs_dr1_trap_variable_writeonly_byte - dbregs_dr2_trap_variable_writeonly_byte - dbregs_dr3_trap_variable_writeonly_byte - dbregs_dr0_trap_variable_writeonly_2bytes - dbregs_dr1_trap_variable_writeonly_2bytes - dbregs_dr2_trap_variable_writeonly_2bytes - dbregs_dr3_trap_variable_writeonly_2bytes - dbregs_dr0_trap_variable_writeonly_4bytes - dbregs_dr1_trap_variable_writeonly_4bytes - dbregs_dr2_trap_variable_writeonly_4bytes - dbregs_dr3_trap_variable_writeonly_4bytes - dbregs_dr0_trap_variable_readwrite_write_byte - dbregs_dr1_trap_variable_readwrite_write_byte - dbregs_dr2_trap_variable_readwrite_write_byte - dbregs_dr3_trap_variable_readwrite_write_byte - dbregs_dr0_trap_variable_readwrite_write_2bytes - dbregs_dr1_trap_variable_readwrite_write_2bytes - dbregs_dr2_trap_variable_readwrite_write_2bytes - dbregs_dr3_trap_variable_readwrite_write_2bytes - dbregs_dr0_trap_variable_readwrite_write_4bytes - dbregs_dr1_trap_variable_readwrite_write_4bytes - dbregs_dr2_trap_variable_readwrite_write_4bytes - dbregs_dr3_trap_variable_readwrite_write_4bytes - dbregs_dr0_trap_variable_readwrite_read_byte - dbregs_dr1_trap_variable_readwrite_read_byte - dbregs_dr2_trap_variable_readwrite_read_byte - dbregs_dr3_trap_variable_readwrite_read_byte - dbregs_dr0_trap_variable_readwrite_read_2bytes - dbregs_dr1_trap_variable_readwrite_read_2bytes - dbregs_dr2_trap_variable_readwrite_read_2bytes - dbregs_dr3_trap_variable_readwrite_read_2bytes - dbregs_dr0_trap_variable_readwrite_read_4bytes - dbregs_dr1_trap_variable_readwrite_read_4bytes - dbregs_dr2_trap_variable_readwrite_read_4bytes - dbregs_dr3_trap_variable_readwrite_read_4bytes - dbregs_dr0_trap_code - dbregs_dr1_trap_code - dbregs_dr2_trap_code - dbregs_dr3_trap_code - dbregs_dr0_dont_inherit_lwp - dbregs_dr1_dont_inherit_lwp - dbregs_dr2_dont_inherit_lwp - dbregs_dr3_dont_inherit_lwp - dbregs_dr6_dont_inherit_lwp - dbregs_dr7_dont_inherit_lwp - dbregs_dr0_dont_inherit_execve - dbregs_dr1_dont_inherit_execve - dbregs_dr2_dont_inherit_execve - dbregs_dr3_dont_inherit_execve - dbregs_dr6_dont_inherit_execve - dbregs_dr7_dont_inherit_execve Sponsored by <The NetBSD Foundation>
Add new tests dbregs_dr*_dont_inherit_execve in arch/amd64 Added tests: - dbregs_dr0_dont_inherit_execve - dbregs_dr1_dont_inherit_execve - dbregs_dr2_dont_inherit_execve - dbregs_dr3_dont_inherit_execve - dbregs_dr6_dont_inherit_execve - dbregs_dr7_dont_inherit_execve Debug Registers must no be inherited after exec() call. Sponsored by <The NetBSD Foundation>
Protect dbregs_dr*_dont_inherit_lwp in arch/amd64 with HAVE_DBREGS The code for debug registers isn't in HEAD and it might break the build. Sponsored by <The NetBSD Foundation>
Add new tests dbregs_dr[67]_dont_inherit_lwp in arch/amd64 New tests: - dbregs_dr6_dont_inherit_lwp - dbregs_dr7_dont_inherit_lwp Debug Registers are set always per-LWP and they are never inherited. If a user wants to reuse them, there is need to set trap on thread creation (PTRACE_LWP_CREATE) and set them from a debugger on newly created LWP. Sponsored by <The NetBSD Foundation>
Fix more issues with compat to i386 in arch/amd64 tests for Debug Registers Stop compating the number of available registers with 16, it's amd64 specific. i386 ships with 8 Debug Registers. Sponsored by <The NetBSD Foundation>
Add new tests dbregs_dr*_dont_inherit_lwp and improve i386 compat Add new tests: - dbregs_dr0_dont_inherit_lwp - dbregs_dr1_dont_inherit_lwp - dbregs_dr2_dont_inherit_lwp - dbregs_dr3_dont_inherit_lwp Fix memcmp(3) usage when comparing registers. Comparing with len is incorrect as it should be len*sizeof(register) or just sizeof(registers). Don't check for 16 Debug Registers, it's amd64 specific and not portable to i386. Don't compare registers before and after triggering a trap, it's a bug that was hidden by incorrect usage of memcmp(3). Sponsored by <The NetBSD Foundation>
Add new tests dbregs_dr[0123]_trap_code in arch/amd64 Add new tests: - dbregs_dr0_trap_code - dbregs_dr1_trap_code - dbregs_dr2_trap_code - dbregs_dr3_trap_code This is the final set of tests for trap types that are supposed to be supported by all amd64 CPUs. Traps for code (instruction) execution must be set to 1 byte, otherwise they are undefined. x86 code traps must point to the first byte of an instruction. Sponsored by <The NetBSD Foundation>
Add new tests dbregs_dr*_trap_variable_readwrite_read_*byte* in arch/amd64 Add new tests: - dbregs_dr0_trap_variable_readwrite_read_byte - dbregs_dr1_trap_variable_readwrite_read_byte - dbregs_dr2_trap_variable_readwrite_read_byte - dbregs_dr3_trap_variable_readwrite_read_byte - dbregs_dr0_trap_variable_readwrite_read_2bytes - dbregs_dr1_trap_variable_readwrite_read_2bytes - dbregs_dr2_trap_variable_readwrite_read_2bytes - dbregs_dr3_trap_variable_readwrite_read_2bytes - dbregs_dr0_trap_variable_readwrite_read_4bytes - dbregs_dr1_trap_variable_readwrite_read_4bytes - dbregs_dr2_trap_variable_readwrite_read_4bytes - dbregs_dr3_trap_variable_readwrite_read_4bytes Sponsored by <The NetBSD Foundation>
Add new tests dbregs_dr*_trap_variable_readwrite_write_*byte* in arch/amd64 Add new tests: - dbregs_dr0_trap_variable_readwrite_write_byte - dbregs_dr1_trap_variable_readwrite_write_byte - dbregs_dr2_trap_variable_readwrite_write_byte - dbregs_dr3_trap_variable_readwrite_write_byte - dbregs_dr0_trap_variable_readwrite_write_2bytes - dbregs_dr1_trap_variable_readwrite_write_2bytes - dbregs_dr2_trap_variable_readwrite_write_2bytes - dbregs_dr3_trap_variable_readwrite_write_2bytes - dbregs_dr0_trap_variable_readwrite_write_4bytes - dbregs_dr1_trap_variable_readwrite_write_4bytes - dbregs_dr2_trap_variable_readwrite_write_4bytes - dbregs_dr3_trap_variable_readwrite_write_4bytes Sponsored by <The NetBSD Foundation>
Extend dbregs_dr*_trap_variable tests to 1-2-4 byte traps in arch/amd64 Replace the following tests: - dbregs_dr0_trap_variable - dbregs_dr1_trap_variable - dbregs_dr2_trap_variable - dbregs_dr3_trap_variable With new ones: - dbregs_dr0_trap_variable_writeonly_byte - dbregs_dr1_trap_variable_writeonly_byte - dbregs_dr2_trap_variable_writeonly_byte - dbregs_dr3_trap_variable_writeonly_byte - dbregs_dr0_trap_variable_writeonly_2bytes - dbregs_dr1_trap_variable_writeonly_2bytes - dbregs_dr2_trap_variable_writeonly_2bytes - dbregs_dr3_trap_variable_writeonly_2bytes - dbregs_dr0_trap_variable_writeonly_4bytes - dbregs_dr1_trap_variable_writeonly_4bytes - dbregs_dr2_trap_variable_writeonly_4bytes - dbregs_dr3_trap_variable_writeonly_4bytes All tests pass with my local implementation of debug registers. Once the interface will be verified, I will prepare it for commit to HEAD. Sponsored by <The NetBSD Foundation>
Add checks for si_code in dbregs_dr[0123]_trap_variable in ATF arch/amd64 Validate that debug register traps generate appropriate SIGTRAP signal with TRAP_DBREG property in si_code. Sponsored by <The NetBSD Foundation>
Synchronize struct dbreg with FreeBSD - rename field member .dbregs to .dr Currently this code is disabled in HEAD and the dbreg struct has to be committed first in order to be used. Before enabling it I'm working on reducing needless differences with FreeBSD and Linux. Sponsored by <The NetBSD Foundation>
Fix dbregs_dr[0123]_trap_variable in arch/amd64/t_ptrace_wait* Add missing PT_CONTINUE between two wait(2)-like calls. Sponsored by <The NetBSD Foundation>
Switch back arch/amd64/t_ptrace_wait.c to r1.6 and restore original DBREGS This is preparation to replace watchpoint API to dbregs. Sponsored by <The NetBSD Foundation>
Use siginfo_t to validate tests/kernel/arch/amd64/t_ptrace_wait* This change makes sure that the fired expected watchpoint with expected property. It's done with PT_GET_SIGINFO and checking SIGTRAP codes. Sponsored by <The NetBSD Foundation>
Refactor ptrace_watchpoint structure to allow extensions Add new field pw_type in the ptrace_watchpoint structure. amd64 and i386 offer the current set of watchpoints as PTRACE_PW_TYPE_DBREGS. On other archs than x86, there are readily available different types of hardware assisted watchpoints like for code-only or data-only registers on ARM. Also in future there is an option to implement MMU-based watchpoints and future per-port or per-cpu extensions. Next step is to alter this interface on x86 to generate SIGTRAP with si_code TRAP_HWWTRAP with additional information on occurred event: - which watchpoint fired, - additional watchpoint-type specific information, like on amd64 with PTRACE_PW_TYPE_DBREGS.: * only watchpoint fired * watchpoint fired and single step occurred Adjust ATF tests for the pw_type change. Sponsored by <The NetBSD Foundation>
Don't play with "../.." in includes for h_macros.h; deal with it centrally. Minor fixes.
Sync with HEAD. (Note that most of these changes are simply $NetBSD$ tag issues.)
file t_ptrace_wait.c was added on branch pgoyette-localcount on 2017-01-07 08:56:54 +0000
Add ATF tests for hardware assisted watchpoints on amd64 Addedd tests: - watchpoint_count - watchpoint_read - watchpoint_write_unmodified - watchpoint_trap_code[0123] - watchpoint_trap_data_write[0123] - watchpoint_trap_data_rw[0123] These code will be reused later for i386 and moved to a common place like tests/kernel/arch/x86. These tests are x86 specific only. The same API but different private ptrace_watchpoint MD part has to be used on other ports. All tests pass on amd64. Sponsored by <The NetBSD Foundation>
Remove dbregs* in arch/amd64/t_ptrace_wait* CPU Debug Registers won't be exposed as is to userland. Hardware Watchpoints will be exported to userland dedicated interface through the ptrace(2) interface. Sponsored by <The NetBSD Foundation>
Add regs1 in arch/amd64/t_ptrace_wait* regs1: Call PT_GETREGS and iterate over General Purpose registers Sponsored by <The NetBSD Foundation>
Stop using atf_utils_fork() in tests/kernel/arch/amd64/t_ptrace_wait.c Switch from: child = atf_utils_fork(); to: ATF_REQUIRE((child = fork()) != -1); Prefer the latter as working as intended and not outputing to files with danger to overwrite files' content after each fork in test-suite. Discussed with Christos Zoulas. Sponsored by <The NetBSD Foundation>
Add dbregs_dr[0123]_trap_variable in arch/amd64/t_ptrace_wait* Add new preliminary tests for testing that CPU Debug Registers can be used to trap on a variable (write operation). dbregs_dr0_trap_variable: Verify that setting trap with DR0 triggers SIGTRAP dbregs_dr1_trap_variable: Verify that setting trap with DR1 triggers SIGTRAP dbregs_dr2_trap_variable: Verify that setting trap with DR2 triggers SIGTRAP dbregs_dr3_trap_variable: Verify that setting trap with DR3 triggers SIGTRAP Sponsored by <The NetBSD Foundation>
Define new tests for CPU Debug Registers in t_ptrace_wait{,3,4,6,id,pid} Rename dbregs1 to dbregs_print Rename dbregs[2345] to dbregs_preserve_dr[0123] Add new tests dbregs_preserve_dr[0123]_yield. dbregs_preserve_dr0_yield: Verify that setting DR0 is preserved across ptrace(2) calls with scheduler yield dbregs_preserve_dr1_yield: Verify that setting DR1 is preserved across ptrace(2) calls with scheduler yield dbregs_preserve_dr2_yield: Verify that setting DR2 is preserved across ptrace(2) calls with scheduler yield dbregs_preserve_dr3_yield: Verify that setting DR3 is preserved across ptrace(2) calls with scheduler yield Add new tests dbregs_preserve_dr[0123]_continued. dbregs_preserve_dr0_continued: Verify that setting DR0 is preserved across ptrace(2) calls and with continued child dbregs_preserve_dr1_continued: Verify that setting DR1 is preserved across ptrace(2) calls and with continued child dbregs_preserve_dr2_continued: Verify that setting DR2 is preserved across ptrace(2) calls and with continued child dbregs_preserve_dr3_continued: Verify that setting DR3 is preserved across ptrace(2) calls and with continued child Use more meaningful names for these tests as they are MD specific and testing precise functionality. Also there will be a growing number of tests in this category and prefixing everything with plain dbregs and trailing with a number cannot be verbose. Sponsored by <The NetBSD Foundation>
Add new tests dbregs[2345] in MD arch/amd64/ t_ptrace_wait{,3,4,6,id,pid} dbregs2: Verify that setting DR0 is preserved across ptrace(2) calls dbregs3: Verify that setting DR1 is preserved across ptrace(2) calls dbregs4: Verify that setting DR2 is preserved across ptrace(2) calls dbregs5: Verify that setting DR3 is preserved across ptrace(2) calls These tests are deliberately fine-grained as they are expected to penetrate precisely each functional aspect of CPU Debug Registers on amd64 one after another. These tests (and MI ones) might be generated or merged with helper functions, however in order to copy-and-paste them out of a test-suite and quickly port to other platform (in order to compare results) it's useful to keep them as stand-alone as they are. Code from these tests might be shared with other ports in future, for the same reason keep them currently as they are. Sponsored by <The NetBSD Foundation>
Refactor location of amd64-specific ATF tests to new dir kernel/arch/amd64 Rename - tests/kernel/t_ptrace_amd64_wait.c to - tests/kernel/arch/amd64/t_ptrace_wait.c and adapt appropriate files accordingly. New directory will be used for more amd64-specific tests, verifying the MD parts of the kernel. Remove old entries from distrib/sets/lists as they were added a while ago. Sponsored by <The NetBSD Foundation>