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CVS log for src/sys/sys/pcu.h

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Default branch: MAIN
Current tag: MAIN


Revision 1.10 / (download) - annotate - [select for diffs], Wed Dec 26 18:30:22 2012 UTC (4 months, 3 weeks ago) by matt
Branch: MAIN
CVS Tags: yamt-pagecache-base8, tls-maxphys-nbase, tls-maxphys-base, khorben-n900, agc-symver-base, agc-symver, HEAD
Changes since 1.9: +17 -9 lines
Diff to previous 1.9 (colored)

Add support for kernel-based code to use a PCU.  (for memory to memory
copies or in_cksum or ...)

Revision 1.9 / (download) - annotate - [select for diffs], Wed Apr 18 13:42:11 2012 UTC (12 months, 4 weeks ago) by yamt
Branch: MAIN
CVS Tags: yamt-pagecache-base7, yamt-pagecache-base6, yamt-pagecache-base5, jmcneill-usbmp-base9, jmcneill-usbmp-base10
Branch point for: tls-maxphys
Changes since 1.8: +15 -1 lines
Diff to previous 1.8 (colored)

comment

Revision 1.8 / (download) - annotate - [select for diffs], Mon Jun 6 22:04:34 2011 UTC (23 months, 1 week ago) by matt
Branch: MAIN
CVS Tags: yamt-pagecache-base4, yamt-pagecache-base3, yamt-pagecache-base2, yamt-pagecache-base, rmind-uvmplock-nbase, rmind-uvmplock-base, netbsd-6-base, netbsd-6-1-RELEASE, netbsd-6-1-RC4, netbsd-6-1-RC3, netbsd-6-1-RC2, netbsd-6-1-RC1, netbsd-6-0-RELEASE, netbsd-6-0-RC2, netbsd-6-0-RC1, netbsd-6-0-2-RELEASE, netbsd-6-0-1-RELEASE, netbsd-6-0, netbsd-6, matt-nb6-plus-nbase, matt-nb6-plus-base, matt-nb6-plus, jmcneill-usbmp-pre-base2, jmcneill-usbmp-base8, jmcneill-usbmp-base7, jmcneill-usbmp-base6, jmcneill-usbmp-base5, jmcneill-usbmp-base4, jmcneill-usbmp-base3, jmcneill-usbmp-base2, jmcneill-usbmp-base, jmcneill-audiomp3-base, jmcneill-audiomp3
Branch point for: yamt-pagecache, jmcneill-usbmp
Changes since 1.7: +5 -1 lines
Diff to previous 1.7 (colored)

Add some more MI hook points for PCU.  Discard the PCU state at lwp_exit and
at exec time.  Before forking, save the PCU state so that cpu_lwp_fork
doesn't have.  Remove MD code which did that before.

Revision 1.7 / (download) - annotate - [select for diffs], Mon May 2 08:26:32 2011 UTC (2 years ago) by martin
Branch: MAIN
CVS Tags: cherry-xenmp-base
Branch point for: jruoho-x86intr, cherry-xenmp
Changes since 1.6: +5 -1 lines
Diff to previous 1.6 (colored)

Make it self-contained (add missing stdbool.h include when used for libkvm)

Revision 1.6 / (download) - annotate - [select for diffs], Mon May 2 02:28:57 2011 UTC (2 years ago) by rmind
Branch: MAIN
Changes since 1.5: +2 -2 lines
Diff to previous 1.5 (colored)

Limit sys/pcu.h inclusion within _KERNEL scope, plus _KMEMUSER.

Revision 1.5 / (download) - annotate - [select for diffs], Mon May 2 00:29:53 2011 UTC (2 years ago) by rmind
Branch: MAIN
Changes since 1.4: +14 -5 lines
Diff to previous 1.4 (colored)

Extend PCU:
- Add pcu_ops_t::pcu_state_release() operation for PCU_RELEASE case.
- Add pcu_switchpoint() to perform release operation on context switch.
- Sprinkle const, misc.  Also, sync MIPS with changes.

Per discussions with matt@.

Revision 1.4 / (download) - annotate - [select for diffs], Sat Feb 19 20:19:54 2011 UTC (2 years, 2 months ago) by matt
Branch: MAIN
CVS Tags: bouyer-quota2-nbase
Branch point for: rmind-uvmplock, bouyer-quota2
Changes since 1.3: +3 -3 lines
Diff to previous 1.3 (colored)

Default PCU_UNIT_COUNT to 0.  If 0, don't compile the contents of subr_pcu.c
and don't include the pcu related members into struct lwp.

Revision 1.3 / (download) - annotate - [select for diffs], Thu Feb 17 19:58:34 2011 UTC (2 years, 2 months ago) by rmind
Branch: MAIN
Changes since 1.2: +5 -5 lines
Diff to previous 1.2 (colored)

Fix sys/pcu.h build breakage.

Revision 1.2 / (download) - annotate - [select for diffs], Thu Feb 17 18:44:54 2011 UTC (2 years, 2 months ago) by matt
Branch: MAIN
Changes since 1.1: +2 -2 lines
Diff to previous 1.1 (colored)

Add a bool to pcu_state_save which indicates whether the PCU is going to be
released after the save is done.

Revision 1.1 / (download) - annotate - [select for diffs], Thu Feb 17 18:32:29 2011 UTC (2 years, 2 months ago) by rmind
Branch: MAIN

Add PCU (Per-CPU Unit) - an interface to manage synchronization of any
per CPU context tied with an LWP.  Main use - lazy FPU handling on SMP.

Requested by matt@, will be used on mips64.  Note: implementation will
be improved to use IPIs before adopting on x86.  OK ad@.

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