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CVS log for src/sys/netinet/tcp_vtw.c

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Default branch: MAIN
Current tag: MAIN


Revision 1.9 / (download) - annotate - [select for diffs], Fri Apr 13 15:37:12 2012 UTC (13 months, 1 week ago) by yamt
Branch: MAIN
CVS Tags: yamt-pagecache-base8, yamt-pagecache-base7, yamt-pagecache-base6, yamt-pagecache-base5, yamt-pagecache-base4, tls-maxphys-nbase, tls-maxphys-base, tls-maxphys, khorben-n900, jmcneill-usbmp-base9, jmcneill-usbmp-base10, agc-symver-base, agc-symver, HEAD
Changes since 1.8: +49 -1 lines
Diff to previous 1.8 (colored)

add a big comment
(copy and paste from cvs log rev.1.1)

Revision 1.8 / (download) - annotate - [select for diffs], Sun Jul 17 20:54:53 2011 UTC (22 months ago) by joerg
Branch: MAIN
CVS Tags: yamt-pagecache-base3, yamt-pagecache-base2, yamt-pagecache-base, netbsd-6-base, netbsd-6-1-RELEASE, netbsd-6-1-RC4, netbsd-6-1-RC3, netbsd-6-1-RC2, netbsd-6-1-RC1, netbsd-6-1, netbsd-6-0-RELEASE, netbsd-6-0-RC2, netbsd-6-0-RC1, netbsd-6-0-2-RELEASE, netbsd-6-0-1-RELEASE, netbsd-6-0, netbsd-6, matt-nb6-plus-nbase, matt-nb6-plus-base, matt-nb6-plus, jmcneill-usbmp-pre-base2, jmcneill-usbmp-base8, jmcneill-usbmp-base7, jmcneill-usbmp-base6, jmcneill-usbmp-base5, jmcneill-usbmp-base4, jmcneill-usbmp-base3, jmcneill-usbmp-base2, jmcneill-usbmp-base, jmcneill-audiomp3-base, jmcneill-audiomp3
Branch point for: yamt-pagecache, jmcneill-usbmp
Changes since 1.7: +1 -2 lines
Diff to previous 1.7 (colored)

Retire varargs.h support. Move machine/stdarg.h logic into MI
sys/stdarg.h and expect compiler to provide proper builtins, defaulting
to the GCC interface. lint still has a special fallback.
Reduce abuse of _BSD_VA_LIST_ by defining __va_list by default and
derive va_list as required by standards.

Revision 1.7 / (download) - annotate - [select for diffs], Mon Jun 6 19:15:43 2011 UTC (23 months, 2 weeks ago) by dyoung
Branch: MAIN
CVS Tags: rmind-uvmplock-nbase, rmind-uvmplock-base
Changes since 1.6: +36 -2 lines
Diff to previous 1.6 (colored)

Don't allocate resources for vtw until/unless it is enabled.  This will
further help those machines where memory is in short supply.

TBD: release resources after vtw is disabled and all entries have
expired.

Revision 1.6 / (download) - annotate - [select for diffs], Fri Jun 3 20:01:00 2011 UTC (23 months, 2 weeks ago) by dyoung
Branch: MAIN
Branch point for: jruoho-x86intr
Changes since 1.5: +92 -82 lines
Diff to previous 1.5 (colored)

Don't sleep until memory becomes available.

Use kmem_zalloc() instead of kmem_alloc() + bzero().

During initialization, try to get all of the memory we need for the
vestigial time-wait structures before we set any of the structures up,
and if any single allocation fails, release all of the memory.

This should help low-memory hosts.  A much better fix postpones
allocating any memory until vtw is enabled through the sysctl.

Revision 1.5 / (download) - annotate - [select for diffs], Fri Jun 3 17:11:34 2011 UTC (23 months, 2 weeks ago) by dyoung
Branch: MAIN
Changes since 1.4: +17 -18 lines
Diff to previous 1.4 (colored)

Defer scheduling vtw_tick() and setting the vtw hooks until
vtw_control() is called.  In this way, vtw_tick() will be re-scheduled
repeatedly while vtw is in use.

Pay tcp_vtw_was_enabled no attention in vtw_earlyinit(), since it's
always going to be 0 during initialization.

Revision 1.4 / (download) - annotate - [select for diffs], Tue May 17 05:42:40 2011 UTC (2 years ago) by dholland
Branch: MAIN
CVS Tags: cherry-xenmp-base
Branch point for: rmind-uvmplock, cherry-xenmp
Changes since 1.3: +3 -3 lines
Diff to previous 1.3 (colored)

typo in comment

Revision 1.3 / (download) - annotate - [select for diffs], Wed May 11 15:08:59 2011 UTC (2 years ago) by drochner
Branch: MAIN
Changes since 1.2: +3 -3 lines
Diff to previous 1.2 (colored)

use getmicrouptime(9) rather than microtime(9) for TIME_WAIT duration
calculation, because this doesn't get confused by system time changes,
and uses less CPU cycles
reviewed by dyoung

Revision 1.2 / (download) - annotate - [select for diffs], Fri May 6 12:52:43 2011 UTC (2 years ago) by drochner
Branch: MAIN
Changes since 1.1: +1 -10 lines
Diff to previous 1.1 (colored)

remove an empty function

Revision 1.1 / (download) - annotate - [select for diffs], Tue May 3 18:28:45 2011 UTC (2 years ago) by dyoung
Branch: MAIN

Reduces the resources demanded by TCP sessions in TIME_WAIT-state using
methods called Vestigial Time-Wait (VTW) and Maximum Segment Lifetime
Truncation (MSLT).

MSLT and VTW were contributed by Coyote Point Systems, Inc.

Even after a TCP session enters the TIME_WAIT state, its corresponding
socket and protocol control blocks (PCBs) stick around until the TCP
Maximum Segment Lifetime (MSL) expires.  On a host whose workload
necessarily creates and closes down many TCP sockets, the sockets & PCBs
for TCP sessions in TIME_WAIT state amount to many megabytes of dead
weight in RAM.

Maximum Segment Lifetimes Truncation (MSLT) assigns each TCP session to
a class based on the nearness of the peer.  Corresponding to each class
is an MSL, and a session uses the MSL of its class.  The classes are
loopback (local host equals remote host), local (local host and remote
host are on the same link/subnet), and remote (local host and remote
host communicate via one or more gateways).  Classes corresponding to
nearer peers have lower MSLs by default: 2 seconds for loopback, 10
seconds for local, 60 seconds for remote.  Loopback and local sessions
expire more quickly when MSLT is used.

Vestigial Time-Wait (VTW) replaces a TIME_WAIT session's PCB/socket
dead weight with a compact representation of the session, called a
"vestigial PCB".  VTW data structures are designed to be very fast and
memory-efficient: for fast insertion and lookup of vestigial PCBs,
the PCBs are stored in a hash table that is designed to minimize the
number of cacheline visits per lookup/insertion.  The memory both
for vestigial PCBs and for elements of the PCB hashtable come from
fixed-size pools, and linked data structures exploit this to conserve
memory by representing references with a narrow index/offset from the
start of a pool instead of a pointer.  When space for new vestigial PCBs
runs out, VTW makes room by discarding old vestigial PCBs, oldest first.
VTW cooperates with MSLT.

It may help to think of VTW as a "FIN cache" by analogy to the SYN
cache.

A 2.8-GHz Pentium 4 running a test workload that creates TIME_WAIT
sessions as fast as it can is approximately 17% idle when VTW is active
versus 0% idle when VTW is inactive.  It has 103 megabytes more free RAM
when VTW is active (approximately 64k vestigial PCBs are created) than
when it is inactive.

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