Annotation of src/sys/external/gpl2/dts/dist/include/dt-bindings/memory/mt8173-larb-port.h, Revision 1.1.1.1.4.2
1.1.1.1.4.2! snj 1: /* $NetBSD: mt8173-larb-port.h,v 1.1.1.1 2017/06/15 20:14:23 jmcneill Exp $ */
! 2:
! 3: /*
! 4: * Copyright (c) 2015-2016 MediaTek Inc.
! 5: * Author: Yong Wu <yong.wu@mediatek.com>
! 6: *
! 7: * This program is free software; you can redistribute it and/or modify
! 8: * it under the terms of the GNU General Public License version 2 as
! 9: * published by the Free Software Foundation.
! 10: *
! 11: * This program is distributed in the hope that it will be useful,
! 12: * but WITHOUT ANY WARRANTY; without even the implied warranty of
! 13: * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
! 14: * GNU General Public License for more details.
! 15: */
! 16: #ifndef __DTS_IOMMU_PORT_MT8173_H
! 17: #define __DTS_IOMMU_PORT_MT8173_H
! 18:
! 19: #define MTK_M4U_ID(larb, port) (((larb) << 5) | (port))
! 20: /* Local arbiter ID */
! 21: #define MTK_M4U_TO_LARB(id) (((id) >> 5) & 0x7)
! 22: /* PortID within the local arbiter */
! 23: #define MTK_M4U_TO_PORT(id) ((id) & 0x1f)
! 24:
! 25: #define M4U_LARB0_ID 0
! 26: #define M4U_LARB1_ID 1
! 27: #define M4U_LARB2_ID 2
! 28: #define M4U_LARB3_ID 3
! 29: #define M4U_LARB4_ID 4
! 30: #define M4U_LARB5_ID 5
! 31:
! 32: /* larb0 */
! 33: #define M4U_PORT_DISP_OVL0 MTK_M4U_ID(M4U_LARB0_ID, 0)
! 34: #define M4U_PORT_DISP_RDMA0 MTK_M4U_ID(M4U_LARB0_ID, 1)
! 35: #define M4U_PORT_DISP_WDMA0 MTK_M4U_ID(M4U_LARB0_ID, 2)
! 36: #define M4U_PORT_DISP_OD_R MTK_M4U_ID(M4U_LARB0_ID, 3)
! 37: #define M4U_PORT_DISP_OD_W MTK_M4U_ID(M4U_LARB0_ID, 4)
! 38: #define M4U_PORT_MDP_RDMA0 MTK_M4U_ID(M4U_LARB0_ID, 5)
! 39: #define M4U_PORT_MDP_WDMA MTK_M4U_ID(M4U_LARB0_ID, 6)
! 40: #define M4U_PORT_MDP_WROT0 MTK_M4U_ID(M4U_LARB0_ID, 7)
! 41:
! 42: /* larb1 */
! 43: #define M4U_PORT_HW_VDEC_MC_EXT MTK_M4U_ID(M4U_LARB1_ID, 0)
! 44: #define M4U_PORT_HW_VDEC_PP_EXT MTK_M4U_ID(M4U_LARB1_ID, 1)
! 45: #define M4U_PORT_HW_VDEC_UFO_EXT MTK_M4U_ID(M4U_LARB1_ID, 2)
! 46: #define M4U_PORT_HW_VDEC_VLD_EXT MTK_M4U_ID(M4U_LARB1_ID, 3)
! 47: #define M4U_PORT_HW_VDEC_VLD2_EXT MTK_M4U_ID(M4U_LARB1_ID, 4)
! 48: #define M4U_PORT_HW_VDEC_AVC_MV_EXT MTK_M4U_ID(M4U_LARB1_ID, 5)
! 49: #define M4U_PORT_HW_VDEC_PRED_RD_EXT MTK_M4U_ID(M4U_LARB1_ID, 6)
! 50: #define M4U_PORT_HW_VDEC_PRED_WR_EXT MTK_M4U_ID(M4U_LARB1_ID, 7)
! 51: #define M4U_PORT_HW_VDEC_PPWRAP_EXT MTK_M4U_ID(M4U_LARB1_ID, 8)
! 52: #define M4U_PORT_HW_VDEC_TILE MTK_M4U_ID(M4U_LARB1_ID, 9)
! 53:
! 54: /* larb2 */
! 55: #define M4U_PORT_IMGO MTK_M4U_ID(M4U_LARB2_ID, 0)
! 56: #define M4U_PORT_RRZO MTK_M4U_ID(M4U_LARB2_ID, 1)
! 57: #define M4U_PORT_AAO MTK_M4U_ID(M4U_LARB2_ID, 2)
! 58: #define M4U_PORT_LCSO MTK_M4U_ID(M4U_LARB2_ID, 3)
! 59: #define M4U_PORT_ESFKO MTK_M4U_ID(M4U_LARB2_ID, 4)
! 60: #define M4U_PORT_IMGO_D MTK_M4U_ID(M4U_LARB2_ID, 5)
! 61: #define M4U_PORT_LSCI MTK_M4U_ID(M4U_LARB2_ID, 6)
! 62: #define M4U_PORT_LSCI_D MTK_M4U_ID(M4U_LARB2_ID, 7)
! 63: #define M4U_PORT_BPCI MTK_M4U_ID(M4U_LARB2_ID, 8)
! 64: #define M4U_PORT_BPCI_D MTK_M4U_ID(M4U_LARB2_ID, 9)
! 65: #define M4U_PORT_UFDI MTK_M4U_ID(M4U_LARB2_ID, 10)
! 66: #define M4U_PORT_IMGI MTK_M4U_ID(M4U_LARB2_ID, 11)
! 67: #define M4U_PORT_IMG2O MTK_M4U_ID(M4U_LARB2_ID, 12)
! 68: #define M4U_PORT_IMG3O MTK_M4U_ID(M4U_LARB2_ID, 13)
! 69: #define M4U_PORT_VIPI MTK_M4U_ID(M4U_LARB2_ID, 14)
! 70: #define M4U_PORT_VIP2I MTK_M4U_ID(M4U_LARB2_ID, 15)
! 71: #define M4U_PORT_VIP3I MTK_M4U_ID(M4U_LARB2_ID, 16)
! 72: #define M4U_PORT_LCEI MTK_M4U_ID(M4U_LARB2_ID, 17)
! 73: #define M4U_PORT_RB MTK_M4U_ID(M4U_LARB2_ID, 18)
! 74: #define M4U_PORT_RP MTK_M4U_ID(M4U_LARB2_ID, 19)
! 75: #define M4U_PORT_WR MTK_M4U_ID(M4U_LARB2_ID, 20)
! 76:
! 77: /* larb3 */
! 78: #define M4U_PORT_VENC_RCPU MTK_M4U_ID(M4U_LARB3_ID, 0)
! 79: #define M4U_PORT_VENC_REC MTK_M4U_ID(M4U_LARB3_ID, 1)
! 80: #define M4U_PORT_VENC_BSDMA MTK_M4U_ID(M4U_LARB3_ID, 2)
! 81: #define M4U_PORT_VENC_SV_COMV MTK_M4U_ID(M4U_LARB3_ID, 3)
! 82: #define M4U_PORT_VENC_RD_COMV MTK_M4U_ID(M4U_LARB3_ID, 4)
! 83: #define M4U_PORT_JPGENC_RDMA MTK_M4U_ID(M4U_LARB3_ID, 5)
! 84: #define M4U_PORT_JPGENC_BSDMA MTK_M4U_ID(M4U_LARB3_ID, 6)
! 85: #define M4U_PORT_JPGDEC_WDMA MTK_M4U_ID(M4U_LARB3_ID, 7)
! 86: #define M4U_PORT_JPGDEC_BSDMA MTK_M4U_ID(M4U_LARB3_ID, 8)
! 87: #define M4U_PORT_VENC_CUR_LUMA MTK_M4U_ID(M4U_LARB3_ID, 9)
! 88: #define M4U_PORT_VENC_CUR_CHROMA MTK_M4U_ID(M4U_LARB3_ID, 10)
! 89: #define M4U_PORT_VENC_REF_LUMA MTK_M4U_ID(M4U_LARB3_ID, 11)
! 90: #define M4U_PORT_VENC_REF_CHROMA MTK_M4U_ID(M4U_LARB3_ID, 12)
! 91: #define M4U_PORT_VENC_NBM_RDMA MTK_M4U_ID(M4U_LARB3_ID, 13)
! 92: #define M4U_PORT_VENC_NBM_WDMA MTK_M4U_ID(M4U_LARB3_ID, 14)
! 93:
! 94: /* larb4 */
! 95: #define M4U_PORT_DISP_OVL1 MTK_M4U_ID(M4U_LARB4_ID, 0)
! 96: #define M4U_PORT_DISP_RDMA1 MTK_M4U_ID(M4U_LARB4_ID, 1)
! 97: #define M4U_PORT_DISP_RDMA2 MTK_M4U_ID(M4U_LARB4_ID, 2)
! 98: #define M4U_PORT_DISP_WDMA1 MTK_M4U_ID(M4U_LARB4_ID, 3)
! 99: #define M4U_PORT_MDP_RDMA1 MTK_M4U_ID(M4U_LARB4_ID, 4)
! 100: #define M4U_PORT_MDP_WROT1 MTK_M4U_ID(M4U_LARB4_ID, 5)
! 101:
! 102: /* larb5 */
! 103: #define M4U_PORT_VENC_RCPU_SET2 MTK_M4U_ID(M4U_LARB5_ID, 0)
! 104: #define M4U_PORT_VENC_REC_FRM_SET2 MTK_M4U_ID(M4U_LARB5_ID, 1)
! 105: #define M4U_PORT_VENC_REF_LUMA_SET2 MTK_M4U_ID(M4U_LARB5_ID, 2)
! 106: #define M4U_PORT_VENC_REC_CHROMA_SET2 MTK_M4U_ID(M4U_LARB5_ID, 3)
! 107: #define M4U_PORT_VENC_BSDMA_SET2 MTK_M4U_ID(M4U_LARB5_ID, 4)
! 108: #define M4U_PORT_VENC_CUR_LUMA_SET2 MTK_M4U_ID(M4U_LARB5_ID, 5)
! 109: #define M4U_PORT_VENC_CUR_CHROMA_SET2 MTK_M4U_ID(M4U_LARB5_ID, 6)
! 110: #define M4U_PORT_VENC_RD_COMA_SET2 MTK_M4U_ID(M4U_LARB5_ID, 7)
! 111: #define M4U_PORT_VENC_SV_COMA_SET2 MTK_M4U_ID(M4U_LARB5_ID, 8)
! 112:
! 113: #endif
CVSweb <webmaster@jp.NetBSD.org>
![[BACK]](/icons/back.gif){kind=icon}
Return to mt8173-larb-port.h CVS log ![[TXT]](/icons/text.gif){kind=icon}
![[DIR]](/icons/dir.gif){kind=icon}
Up to [cvs.NetBSD.org] / src / sys / external / gpl2 / dts / dist / include / dt-bindings / memory