Annotation of src/sys/external/gpl2/dts/dist/arch/arm64/boot/dts/rockchip/rk3399-firefly.dts, Revision 1.1.1.2
1.1 jmcneill 1: /*
2: * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd.
3: *
4: * This file is dual-licensed: you can use it either under the terms
5: * of the GPL or the X11 license, at your option. Note that this dual
6: * licensing only applies to this file, and not this project as a
7: * whole.
8: *
9: * a) This file is free software; you can redistribute it and/or
10: * modify it under the terms of the GNU General Public License as
11: * published by the Free Software Foundation; either version 2 of the
12: * License, or (at your option) any later version.
13: *
14: * This file is distributed in the hope that it will be useful,
15: * but WITHOUT ANY WARRANTY; without even the implied warranty of
16: * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17: * GNU General Public License for more details.
18: *
19: * Or, alternatively,
20: *
21: * b) Permission is hereby granted, free of charge, to any person
22: * obtaining a copy of this software and associated documentation
23: * files (the "Software"), to deal in the Software without
24: * restriction, including without limitation the rights to use,
25: * copy, modify, merge, publish, distribute, sublicense, and/or
26: * sell copies of the Software, and to permit persons to whom the
27: * Software is furnished to do so, subject to the following
28: * conditions:
29: *
30: * The above copyright notice and this permission notice shall be
31: * included in all copies or substantial portions of the Software.
32: *
33: * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
34: * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
35: * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
36: * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
37: * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
38: * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
39: * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
40: * OTHER DEALINGS IN THE SOFTWARE.
41: */
42:
43: /dts-v1/;
44: #include <dt-bindings/pwm/pwm.h>
45: #include "rk3399.dtsi"
46: #include "rk3399-opp.dtsi"
47:
48: / {
49: model = "Firefly-RK3399 Board";
50: compatible = "firefly,firefly-rk3399", "rockchip,rk3399";
51:
1.1.1.2 ! jmcneill 52: chosen {
! 53: stdout-path = "serial2:1500000n8";
! 54: };
! 55:
1.1 jmcneill 56: backlight: backlight {
57: compatible = "pwm-backlight";
58: enable-gpios = <&gpio1 RK_PB5 GPIO_ACTIVE_HIGH>;
59: pwms = <&pwm0 0 25000 0>;
60: brightness-levels = <
61: 0 1 2 3 4 5 6 7
62: 8 9 10 11 12 13 14 15
63: 16 17 18 19 20 21 22 23
64: 24 25 26 27 28 29 30 31
65: 32 33 34 35 36 37 38 39
66: 40 41 42 43 44 45 46 47
67: 48 49 50 51 52 53 54 55
68: 56 57 58 59 60 61 62 63
69: 64 65 66 67 68 69 70 71
70: 72 73 74 75 76 77 78 79
71: 80 81 82 83 84 85 86 87
72: 88 89 90 91 92 93 94 95
73: 96 97 98 99 100 101 102 103
74: 104 105 106 107 108 109 110 111
75: 112 113 114 115 116 117 118 119
76: 120 121 122 123 124 125 126 127
77: 128 129 130 131 132 133 134 135
78: 136 137 138 139 140 141 142 143
79: 144 145 146 147 148 149 150 151
80: 152 153 154 155 156 157 158 159
81: 160 161 162 163 164 165 166 167
82: 168 169 170 171 172 173 174 175
83: 176 177 178 179 180 181 182 183
84: 184 185 186 187 188 189 190 191
85: 192 193 194 195 196 197 198 199
86: 200 201 202 203 204 205 206 207
87: 208 209 210 211 212 213 214 215
88: 216 217 218 219 220 221 222 223
89: 224 225 226 227 228 229 230 231
90: 232 233 234 235 236 237 238 239
91: 240 241 242 243 244 245 246 247
92: 248 249 250 251 252 253 254 255>;
93: default-brightness-level = <200>;
94: };
95:
96: clkin_gmac: external-gmac-clock {
97: compatible = "fixed-clock";
98: clock-frequency = <125000000>;
99: clock-output-names = "clkin_gmac";
100: #clock-cells = <0>;
101: };
102:
103: dc_12v: dc-12v {
104: compatible = "regulator-fixed";
105: regulator-name = "dc_12v";
106: regulator-always-on;
107: regulator-boot-on;
108: regulator-min-microvolt = <12000000>;
109: regulator-max-microvolt = <12000000>;
110: };
111:
112: rt5640-sound {
113: compatible = "simple-audio-card";
114: simple-audio-card,name = "rockchip,rt5640-codec";
115: simple-audio-card,format = "i2s";
116: simple-audio-card,mclk-fs = <256>;
117: simple-audio-card,widgets =
118: "Microphone", "Mic Jack",
119: "Headphone", "Headphone Jack";
120: simple-audio-card,routing =
121: "Mic Jack", "MICBIAS1",
122: "IN1P", "Mic Jack",
123: "Headphone Jack", "HPOL",
124: "Headphone Jack", "HPOR";
125:
126: simple-audio-card,cpu {
127: sound-dai = <&i2s1>;
128: };
129:
130: simple-audio-card,codec {
131: sound-dai = <&rt5640>;
132: };
133: };
134:
135: sdio_pwrseq: sdio-pwrseq {
136: compatible = "mmc-pwrseq-simple";
137: clocks = <&rk808 1>;
138: clock-names = "ext_clock";
139: pinctrl-names = "default";
140: pinctrl-0 = <&wifi_enable_h>;
141:
142: /*
143: * On the module itself this is one of these (depending
144: * on the actual card populated):
145: * - SDIO_RESET_L_WL_REG_ON
146: * - PDN (power down when low)
147: */
148: reset-gpios = <&gpio0 RK_PB2 GPIO_ACTIVE_LOW>;
149: };
150:
151: /* switched by pmic_sleep */
152: vcc1v8_s3: vcca1v8_s3: vcc1v8-s3 {
153: compatible = "regulator-fixed";
154: regulator-name = "vcc1v8_s3";
155: regulator-always-on;
156: regulator-boot-on;
157: regulator-min-microvolt = <1800000>;
158: regulator-max-microvolt = <1800000>;
159: vin-supply = <&vcc_1v8>;
160: };
161:
162: vcc3v3_pcie: vcc3v3-pcie-regulator {
163: compatible = "regulator-fixed";
164: enable-active-high;
165: gpio = <&gpio1 RK_PC1 GPIO_ACTIVE_HIGH>;
166: pinctrl-names = "default";
167: pinctrl-0 = <&pcie_pwr_en>;
168: regulator-name = "vcc3v3_pcie";
169: regulator-always-on;
170: regulator-boot-on;
171: vin-supply = <&dc_12v>;
172: };
173:
174: vcc3v3_sys: vcc3v3-sys {
175: compatible = "regulator-fixed";
176: regulator-name = "vcc3v3_sys";
177: regulator-always-on;
178: regulator-boot-on;
179: regulator-min-microvolt = <3300000>;
180: regulator-max-microvolt = <3300000>;
181: vin-supply = <&vcc_sys>;
182: };
183:
184: /* Actually 3 regulators (host0, 1, 2) controlled by the same gpio */
185: vcc5v0_host: vcc5v0-host-regulator {
186: compatible = "regulator-fixed";
187: enable-active-high;
188: gpio = <&gpio1 RK_PA0 GPIO_ACTIVE_HIGH>;
189: pinctrl-names = "default";
190: pinctrl-0 = <&vcc5v0_host_en>;
191: regulator-name = "vcc5v0_host";
192: regulator-always-on;
193: vin-supply = <&vcc_sys>;
194: };
195:
196: vcc_sys: vcc-sys {
197: compatible = "regulator-fixed";
198: regulator-name = "vcc_sys";
199: regulator-always-on;
200: regulator-boot-on;
201: regulator-min-microvolt = <5000000>;
202: regulator-max-microvolt = <5000000>;
203: vin-supply = <&dc_12v>;
204: };
205:
206: vdd_log: vdd-log {
207: compatible = "pwm-regulator";
208: pwms = <&pwm2 0 25000 1>;
209: regulator-name = "vdd_log";
210: regulator-always-on;
211: regulator-boot-on;
212: regulator-min-microvolt = <800000>;
213: regulator-max-microvolt = <1400000>;
214: vin-supply = <&vcc_sys>;
215: };
216: };
217:
218: &cpu_l0 {
219: cpu-supply = <&vdd_cpu_l>;
220: };
221:
222: &cpu_l1 {
223: cpu-supply = <&vdd_cpu_l>;
224: };
225:
226: &cpu_l2 {
227: cpu-supply = <&vdd_cpu_l>;
228: };
229:
230: &cpu_l3 {
231: cpu-supply = <&vdd_cpu_l>;
232: };
233:
234: &cpu_b0 {
235: cpu-supply = <&vdd_cpu_b>;
236: };
237:
238: &cpu_b1 {
239: cpu-supply = <&vdd_cpu_b>;
240: };
241:
242: &emmc_phy {
243: status = "okay";
244: };
245:
246: &gmac {
247: assigned-clocks = <&cru SCLK_RMII_SRC>;
248: assigned-clock-parents = <&clkin_gmac>;
249: clock_in_out = "input";
250: phy-supply = <&vcc_lan>;
251: phy-mode = "rgmii";
252: pinctrl-names = "default";
253: pinctrl-0 = <&rgmii_pins>;
254: snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>;
255: snps,reset-active-low;
256: snps,reset-delays-us = <0 10000 50000>;
257: tx_delay = <0x28>;
258: rx_delay = <0x11>;
259: status = "okay";
260: };
261:
1.1.1.2 ! jmcneill 262: &hdmi {
! 263: ddc-i2c-bus = <&i2c3>;
! 264: pinctrl-names = "default";
! 265: pinctrl-0 = <&hdmi_cec>;
! 266: status = "okay";
! 267: };
! 268:
1.1 jmcneill 269: &i2c0 {
270: clock-frequency = <400000>;
271: i2c-scl-rising-time-ns = <168>;
272: i2c-scl-falling-time-ns = <4>;
273: status = "okay";
274:
275: rk808: pmic@1b {
276: compatible = "rockchip,rk808";
277: reg = <0x1b>;
278: interrupt-parent = <&gpio1>;
279: interrupts = <21 IRQ_TYPE_LEVEL_LOW>;
280: #clock-cells = <1>;
281: clock-output-names = "xin32k", "rk808-clkout2";
282: pinctrl-names = "default";
283: pinctrl-0 = <&pmic_int_l>;
284: rockchip,system-power-controller;
285: wakeup-source;
286:
287: vcc1-supply = <&vcc_sys>;
288: vcc2-supply = <&vcc_sys>;
289: vcc3-supply = <&vcc_sys>;
290: vcc4-supply = <&vcc_sys>;
291: vcc6-supply = <&vcc_sys>;
292: vcc7-supply = <&vcc_sys>;
293: vcc8-supply = <&vcc3v3_sys>;
294: vcc9-supply = <&vcc_sys>;
295: vcc10-supply = <&vcc_sys>;
296: vcc11-supply = <&vcc_sys>;
297: vcc12-supply = <&vcc3v3_sys>;
298: vddio-supply = <&vcc1v8_pmu>;
299:
300: regulators {
301: vdd_center: DCDC_REG1 {
302: regulator-name = "vdd_center";
303: regulator-always-on;
304: regulator-boot-on;
305: regulator-min-microvolt = <750000>;
306: regulator-max-microvolt = <1350000>;
307: regulator-ramp-delay = <6001>;
308: regulator-state-mem {
309: regulator-off-in-suspend;
310: };
311: };
312:
313: vdd_cpu_l: DCDC_REG2 {
314: regulator-name = "vdd_cpu_l";
315: regulator-always-on;
316: regulator-boot-on;
317: regulator-min-microvolt = <750000>;
318: regulator-max-microvolt = <1350000>;
319: regulator-ramp-delay = <6001>;
320: regulator-state-mem {
321: regulator-off-in-suspend;
322: };
323: };
324:
325: vcc_ddr: DCDC_REG3 {
326: regulator-name = "vcc_ddr";
327: regulator-always-on;
328: regulator-boot-on;
329: regulator-state-mem {
330: regulator-on-in-suspend;
331: };
332: };
333:
334: vcc_1v8: DCDC_REG4 {
335: regulator-name = "vcc_1v8";
336: regulator-always-on;
337: regulator-boot-on;
338: regulator-min-microvolt = <1800000>;
339: regulator-max-microvolt = <1800000>;
340: regulator-state-mem {
341: regulator-on-in-suspend;
342: regulator-suspend-microvolt = <1800000>;
343: };
344: };
345:
346: vcc1v8_dvp: LDO_REG1 {
347: regulator-name = "vcc1v8_dvp";
348: regulator-always-on;
349: regulator-boot-on;
350: regulator-min-microvolt = <1800000>;
351: regulator-max-microvolt = <1800000>;
352: regulator-state-mem {
353: regulator-off-in-suspend;
354: };
355: };
356:
357: vcc2v8_dvp: LDO_REG2 {
358: regulator-name = "vcc2v8_dvp";
359: regulator-always-on;
360: regulator-boot-on;
361: regulator-min-microvolt = <2800000>;
362: regulator-max-microvolt = <2800000>;
363: regulator-state-mem {
364: regulator-off-in-suspend;
365: };
366: };
367:
368: vcc1v8_pmu: LDO_REG3 {
369: regulator-name = "vcc1v8_pmu";
370: regulator-always-on;
371: regulator-boot-on;
372: regulator-min-microvolt = <1800000>;
373: regulator-max-microvolt = <1800000>;
374: regulator-state-mem {
375: regulator-on-in-suspend;
376: regulator-suspend-microvolt = <1800000>;
377: };
378: };
379:
380: vcc_sdio: LDO_REG4 {
381: regulator-name = "vcc_sdio";
382: regulator-always-on;
383: regulator-boot-on;
384: regulator-min-microvolt = <1800000>;
385: regulator-max-microvolt = <3000000>;
386: regulator-state-mem {
387: regulator-on-in-suspend;
388: regulator-suspend-microvolt = <3000000>;
389: };
390: };
391:
392: vcca3v0_codec: LDO_REG5 {
393: regulator-name = "vcca3v0_codec";
394: regulator-always-on;
395: regulator-boot-on;
396: regulator-min-microvolt = <3000000>;
397: regulator-max-microvolt = <3000000>;
398: regulator-state-mem {
399: regulator-off-in-suspend;
400: };
401: };
402:
403: vcc_1v5: LDO_REG6 {
404: regulator-name = "vcc_1v5";
405: regulator-always-on;
406: regulator-boot-on;
407: regulator-min-microvolt = <1500000>;
408: regulator-max-microvolt = <1500000>;
409: regulator-state-mem {
410: regulator-on-in-suspend;
411: regulator-suspend-microvolt = <1500000>;
412: };
413: };
414:
415: vcca1v8_codec: LDO_REG7 {
416: regulator-name = "vcca1v8_codec";
417: regulator-always-on;
418: regulator-boot-on;
419: regulator-min-microvolt = <1800000>;
420: regulator-max-microvolt = <1800000>;
421: regulator-state-mem {
422: regulator-off-in-suspend;
423: };
424: };
425:
426: vcc_3v0: LDO_REG8 {
427: regulator-name = "vcc_3v0";
428: regulator-always-on;
429: regulator-boot-on;
430: regulator-min-microvolt = <3000000>;
431: regulator-max-microvolt = <3000000>;
432: regulator-state-mem {
433: regulator-on-in-suspend;
434: regulator-suspend-microvolt = <3000000>;
435: };
436: };
437:
438: vcc3v3_s3: vcc_lan: SWITCH_REG1 {
439: regulator-name = "vcc3v3_s3";
440: regulator-always-on;
441: regulator-boot-on;
442: regulator-state-mem {
443: regulator-off-in-suspend;
444: };
445: };
446:
447: vcc3v3_s0: SWITCH_REG2 {
448: regulator-name = "vcc3v3_s0";
449: regulator-always-on;
450: regulator-boot-on;
451: regulator-state-mem {
452: regulator-off-in-suspend;
453: };
454: };
455: };
456: };
457:
458: vdd_cpu_b: regulator@40 {
459: compatible = "silergy,syr827";
460: reg = <0x40>;
461: fcs,suspend-voltage-selector = <0>;
462: regulator-name = "vdd_cpu_b";
463: regulator-min-microvolt = <712500>;
464: regulator-max-microvolt = <1500000>;
465: regulator-ramp-delay = <1000>;
466: regulator-always-on;
467: regulator-boot-on;
468: vin-supply = <&vcc_sys>;
469:
470: regulator-state-mem {
471: regulator-off-in-suspend;
472: };
473: };
474:
475: vdd_gpu: regulator@41 {
476: compatible = "silergy,syr828";
477: reg = <0x41>;
478: fcs,suspend-voltage-selector = <1>;
479: regulator-name = "vdd_gpu";
480: regulator-min-microvolt = <712500>;
481: regulator-max-microvolt = <1500000>;
482: regulator-ramp-delay = <1000>;
483: regulator-always-on;
484: regulator-boot-on;
485: vin-supply = <&vcc_sys>;
486:
487: regulator-state-mem {
488: regulator-off-in-suspend;
489: };
490: };
491: };
492:
493: &i2c1 {
494: i2c-scl-rising-time-ns = <300>;
495: i2c-scl-falling-time-ns = <15>;
496: status = "okay";
497:
498: rt5640: rt5640@1c {
499: compatible = "realtek,rt5640";
500: reg = <0x1c>;
501: clocks = <&cru SCLK_I2S_8CH_OUT>;
502: clock-names = "mclk";
503: realtek,in1-differential;
504: #sound-dai-cells = <0>;
505: pinctrl-names = "default";
506: pinctrl-0 = <&rt5640_hpcon>;
507: };
508: };
509:
510: &i2c3 {
511: i2c-scl-rising-time-ns = <450>;
512: i2c-scl-falling-time-ns = <15>;
513: status = "okay";
514: };
515:
516: &i2c4 {
517: i2c-scl-rising-time-ns = <600>;
518: i2c-scl-falling-time-ns = <20>;
519: status = "okay";
520:
521: accelerometer@68 {
522: compatible = "invensense,mpu6500";
523: reg = <0x68>;
524: interrupt-parent = <&gpio1>;
525: interrupts = <RK_PC6 IRQ_TYPE_EDGE_RISING>;
526: };
527: };
528:
529: &i2s0 {
530: rockchip,playback-channels = <8>;
531: rockchip,capture-channels = <8>;
532: #sound-dai-cells = <0>;
533: status = "okay";
534: };
535:
536: &i2s1 {
537: rockchip,playback-channels = <2>;
538: rockchip,capture-channels = <2>;
539: #sound-dai-cells = <0>;
540: status = "okay";
541: };
542:
543: &i2s2 {
544: #sound-dai-cells = <0>;
545: status = "okay";
546: };
547:
548: &io_domains {
549: status = "okay";
550:
551: bt656-supply = <&vcc1v8_dvp>;
552: audio-supply = <&vcca1v8_codec>;
553: sdmmc-supply = <&vcc_sdio>;
554: gpio1830-supply = <&vcc_3v0>;
555: };
556:
557: &pcie_phy {
558: status = "okay";
559: };
560:
561: &pcie0 {
562: ep-gpios = <&gpio4 RK_PD1 GPIO_ACTIVE_HIGH>;
563: num-lanes = <4>;
564: pinctrl-names = "default";
565: pinctrl-0 = <&pcie_clkreqn_cpm>;
566: status = "okay";
567: };
568:
569: &pmu_io_domains {
570: pmu1830-supply = <&vcc_3v0>;
571: status = "okay";
572: };
573:
574: &pinctrl {
575: buttons {
576: pwrbtn: pwrbtn {
577: rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>;
578: };
579: };
580:
581: lcd-panel {
582: lcd_panel_reset: lcd-panel-reset {
583: rockchip,pins = <4 RK_PD6 RK_FUNC_GPIO &pcfg_pull_up>;
584: };
585: };
586:
587: pcie {
588: pcie_pwr_en: pcie-pwr-en {
589: rockchip,pins = <1 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>;
590: };
591:
592: pcie_3g_drv: pcie-3g-drv {
593: rockchip,pins = <0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>;
594: };
595: };
596:
597: pmic {
598: vsel1_gpio: vsel1-gpio {
599: rockchip,pins = <1 RK_PC2 RK_FUNC_GPIO &pcfg_pull_down>;
600: };
601:
602: vsel2_gpio: vsel2-gpio {
603: rockchip,pins = <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_down>;
604: };
605: };
606:
607: sdio-pwrseq {
608: wifi_enable_h: wifi-enable-h {
609: rockchip,pins = <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>;
610: };
611: };
612:
613: rt5640 {
614: rt5640_hpcon: rt5640-hpcon {
615: rockchip,pins = <4 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>;
616: };
617: };
618:
619: pmic {
620: pmic_int_l: pmic-int-l {
621: rockchip,pins = <1 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>;
622: };
623: };
624:
625: usb2 {
626: vcc5v0_host_en: vcc5v0-host-en {
627: rockchip,pins = <1 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>;
628: };
629: };
630: };
631:
632: &pwm0 {
633: status = "okay";
634: };
635:
636: &pwm2 {
637: status = "okay";
638: };
639:
640: &saradc {
641: vref-supply = <&vcca1v8_s3>;
642: status = "okay";
643: };
644:
645: &sdmmc {
646: bus-width = <4>;
647: cap-mmc-highspeed;
648: cap-sd-highspeed;
649: cd-gpios = <&gpio0 7 GPIO_ACTIVE_LOW>;
650: disable-wp;
651: max-frequency = <150000000>;
652: pinctrl-names = "default";
653: pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_bus4>;
654: status = "okay";
655: };
656:
657: &sdhci {
658: bus-width = <8>;
659: mmc-hs400-1_8v;
660: mmc-hs400-enhanced-strobe;
661: non-removable;
662: status = "okay";
663: };
664:
665: &tsadc {
666: /* tshut mode 0:CRU 1:GPIO */
667: rockchip,hw-tshut-mode = <1>;
668: /* tshut polarity 0:LOW 1:HIGH */
669: rockchip,hw-tshut-polarity = <1>;
670: status = "okay";
671: };
672:
673: &u2phy0 {
674: status = "okay";
675:
676: u2phy0_otg: otg-port {
677: status = "okay";
678: };
679:
680: u2phy0_host: host-port {
681: phy-supply = <&vcc5v0_host>;
682: status = "okay";
683: };
684: };
685:
686: &u2phy1 {
687: status = "okay";
688:
689: u2phy1_otg: otg-port {
690: status = "okay";
691: };
692:
693: u2phy1_host: host-port {
694: phy-supply = <&vcc5v0_host>;
695: status = "okay";
696: };
697: };
698:
699: &uart0 {
700: pinctrl-names = "default";
701: pinctrl-0 = <&uart0_xfer &uart0_cts>;
702: status = "okay";
703: };
704:
705: &uart2 {
706: status = "okay";
707: };
708:
709: &usb_host0_ehci {
710: status = "okay";
711: };
712:
713: &usb_host0_ohci {
714: status = "okay";
715: };
716:
717: &usb_host1_ehci {
718: status = "okay";
719: };
720:
721: &usb_host1_ohci {
722: status = "okay";
723: };
724:
725: &usbdrd3_0 {
726: status = "okay";
727: };
728:
729: &usbdrd_dwc3_0 {
730: status = "okay";
731: dr_mode = "otg";
732: };
733:
734: &usbdrd3_1 {
735: status = "okay";
736: };
737:
738: &usbdrd_dwc3_1 {
739: status = "okay";
740: dr_mode = "host";
741: };
1.1.1.2 ! jmcneill 742:
! 743: &vopb {
! 744: status = "okay";
! 745: };
! 746:
! 747: &vopb_mmu {
! 748: status = "okay";
! 749: };
! 750:
! 751: &vopl {
! 752: status = "okay";
! 753: };
! 754:
! 755: &vopl_mmu {
! 756: status = "okay";
! 757: };
CVSweb <webmaster@jp.NetBSD.org>