Annotation of src/sys/external/gpl2/dts/dist/arch/arm64/boot/dts/rockchip/rk3399-evb.dts, Revision 1.1.1.1
1.1 jmcneill 1: /*
2: * Copyright (c) 2016 Fuzhou Rockchip Electronics Co., Ltd
3: *
4: * This file is dual-licensed: you can use it either under the terms
5: * of the GPL or the X11 license, at your option. Note that this dual
6: * licensing only applies to this file, and not this project as a
7: * whole.
8: *
9: * a) This file is free software; you can redistribute it and/or
10: * modify it under the terms of the GNU General Public License as
11: * published by the Free Software Foundation; either version 2 of the
12: * License, or (at your option) any later version.
13: *
14: * This file is distributed in the hope that it will be useful,
15: * but WITHOUT ANY WARRANTY; without even the implied warranty of
16: * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17: * GNU General Public License for more details.
18: *
19: * Or, alternatively,
20: *
21: * b) Permission is hereby granted, free of charge, to any person
22: * obtaining a copy of this software and associated documentation
23: * files (the "Software"), to deal in the Software without
24: * restriction, including without limitation the rights to use,
25: * copy, modify, merge, publish, distribute, sublicense, and/or
26: * sell copies of the Software, and to permit persons to whom the
27: * Software is furnished to do so, subject to the following
28: * conditions:
29: *
30: * The above copyright notice and this permission notice shall be
31: * included in all copies or substantial portions of the Software.
32: *
33: * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
34: * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
35: * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
36: * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
37: * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
38: * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
39: * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
40: * OTHER DEALINGS IN THE SOFTWARE.
41: */
42:
43: /dts-v1/;
44: #include <dt-bindings/pwm/pwm.h>
45: #include "rk3399.dtsi"
46:
47: / {
48: model = "Rockchip RK3399 Evaluation Board";
49: compatible = "rockchip,rk3399-evb", "rockchip,rk3399",
50: "google,rk3399evb-rev2";
51:
52: backlight: backlight {
53: compatible = "pwm-backlight";
54: brightness-levels = <
55: 0 1 2 3 4 5 6 7
56: 8 9 10 11 12 13 14 15
57: 16 17 18 19 20 21 22 23
58: 24 25 26 27 28 29 30 31
59: 32 33 34 35 36 37 38 39
60: 40 41 42 43 44 45 46 47
61: 48 49 50 51 52 53 54 55
62: 56 57 58 59 60 61 62 63
63: 64 65 66 67 68 69 70 71
64: 72 73 74 75 76 77 78 79
65: 80 81 82 83 84 85 86 87
66: 88 89 90 91 92 93 94 95
67: 96 97 98 99 100 101 102 103
68: 104 105 106 107 108 109 110 111
69: 112 113 114 115 116 117 118 119
70: 120 121 122 123 124 125 126 127
71: 128 129 130 131 132 133 134 135
72: 136 137 138 139 140 141 142 143
73: 144 145 146 147 148 149 150 151
74: 152 153 154 155 156 157 158 159
75: 160 161 162 163 164 165 166 167
76: 168 169 170 171 172 173 174 175
77: 176 177 178 179 180 181 182 183
78: 184 185 186 187 188 189 190 191
79: 192 193 194 195 196 197 198 199
80: 200 201 202 203 204 205 206 207
81: 208 209 210 211 212 213 214 215
82: 216 217 218 219 220 221 222 223
83: 224 225 226 227 228 229 230 231
84: 232 233 234 235 236 237 238 239
85: 240 241 242 243 244 245 246 247
86: 248 249 250 251 252 253 254 255>;
87: default-brightness-level = <200>;
88: enable-gpios = <&gpio1 RK_PB5 GPIO_ACTIVE_HIGH>;
89: pwms = <&pwm0 0 25000 0>;
90: };
91:
92: clkin_gmac: external-gmac-clock {
93: compatible = "fixed-clock";
94: clock-frequency = <125000000>;
95: clock-output-names = "clkin_gmac";
96: #clock-cells = <0>;
97: };
98:
99: vdd_center: vdd-center {
100: compatible = "pwm-regulator";
101: pwms = <&pwm3 0 25000 0>;
102: regulator-name = "vdd_center";
103: regulator-min-microvolt = <800000>;
104: regulator-max-microvolt = <1400000>;
105: regulator-always-on;
106: regulator-boot-on;
107: status = "okay";
108: };
109:
110: vcc3v3_sys: vcc3v3-sys {
111: compatible = "regulator-fixed";
112: regulator-name = "vcc3v3_sys";
113: regulator-always-on;
114: regulator-boot-on;
115: regulator-min-microvolt = <3300000>;
116: regulator-max-microvolt = <3300000>;
117: };
118:
119: vcc5v0_sys: vcc5v0-sys {
120: compatible = "regulator-fixed";
121: regulator-name = "vcc5v0_sys";
122: regulator-always-on;
123: regulator-boot-on;
124: regulator-min-microvolt = <5000000>;
125: regulator-max-microvolt = <5000000>;
126: };
127:
128: vcc5v0_host: vcc5v0-host-regulator {
129: compatible = "regulator-fixed";
130: enable-active-high;
131: gpio = <&gpio4 RK_PD1 GPIO_ACTIVE_HIGH>;
132: pinctrl-names = "default";
133: pinctrl-0 = <&vcc5v0_host_en>;
134: regulator-name = "vcc5v0_host";
135: vin-supply = <&vcc5v0_sys>;
136: };
137:
138: vcc_phy: vcc-phy-regulator {
139: compatible = "regulator-fixed";
140: regulator-name = "vcc_phy";
141: regulator-always-on;
142: regulator-boot-on;
143: };
144:
145: vcc_phy: vcc-phy-regulator {
146: compatible = "regulator-fixed";
147: regulator-name = "vcc_phy";
148: regulator-always-on;
149: regulator-boot-on;
150: };
151:
152: };
153:
154: &emmc_phy {
155: status = "okay";
156: };
157:
158: &gmac {
159: assigned-clocks = <&cru SCLK_RMII_SRC>;
160: assigned-clock-parents = <&clkin_gmac>;
161: clock_in_out = "input";
162: phy-supply = <&vcc_phy>;
163: phy-mode = "rgmii";
164: pinctrl-names = "default";
165: pinctrl-0 = <&rgmii_pins>;
166: snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>;
167: snps,reset-active-low;
168: snps,reset-delays-us = <0 10000 50000>;
169: tx_delay = <0x28>;
170: rx_delay = <0x11>;
171: status = "okay";
172: };
173:
174: &pwm0 {
175: status = "okay";
176: };
177:
178: &pwm2 {
179: status = "okay";
180: };
181:
182: &pwm3 {
183: status = "okay";
184: };
185:
186: &sdhci {
187: bus-width = <8>;
188: mmc-hs400-1_8v;
189: mmc-hs400-enhanced-strobe;
190: non-removable;
191: status = "okay";
192: };
193:
194: &pcie_phy {
195: status = "disabled";
196: };
197:
198: &pcie0 {
199: ep-gpios = <&gpio3 RK_PB5 GPIO_ACTIVE_HIGH>;
200: num-lanes = <4>;
201: pinctrl-names = "default";
202: pinctrl-0 = <&pcie_clkreqn>;
203: status = "disabled";
204: };
205:
206: &u2phy0 {
207: status = "okay";
208: };
209:
210: &u2phy0_host {
211: phy-supply = <&vcc5v0_host>;
212: status = "okay";
213: };
214:
215: &u2phy1 {
216: status = "okay";
217: };
218:
219: &u2phy1_host {
220: phy-supply = <&vcc5v0_host>;
221: status = "okay";
222: };
223:
224: &uart2 {
225: status = "okay";
226: };
227:
228: &usb_host0_ehci {
229: status = "okay";
230: };
231:
232: &usb_host0_ohci {
233: status = "okay";
234: };
235:
236: &usb_host1_ehci {
237: status = "okay";
238: };
239:
240: &usb_host1_ohci {
241: status = "okay";
242: };
243:
244: &pinctrl {
245: pmic {
246: pmic_int_l: pmic-int-l {
247: rockchip,pins =
248: <1 21 RK_FUNC_GPIO &pcfg_pull_up>;
249: };
250:
251: pmic_dvs2: pmic-dvs2 {
252: rockchip,pins =
253: <1 18 RK_FUNC_GPIO &pcfg_pull_down>;
254: };
255: };
256:
257: usb2 {
258: vcc5v0_host_en: vcc5v0-host-en {
259: rockchip,pins =
260: <4 25 RK_FUNC_GPIO &pcfg_pull_none>;
261: };
262: };
263: };
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