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1.1.1.2.4.1! pgoyette 1: // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
1.1 jmcneill 2: /*
3: * Copyright (c) 2015 Heiko Stuebner <heiko@sntech.de>
4: */
5:
6: /dts-v1/;
7: #include "rk3368.dtsi"
8: #include <dt-bindings/input/input.h>
9:
10: / {
11: model = "Rockchip R88";
12: compatible = "rockchip,r88", "rockchip,rk3368";
13:
14: chosen {
15: stdout-path = "serial2:115200n8";
16: };
17:
18: memory {
19: device_type = "memory";
20: reg = <0x0 0x0 0x0 0x40000000>;
21: };
22:
23: emmc_pwrseq: emmc-pwrseq {
24: compatible = "mmc-pwrseq-emmc";
25: pinctrl-0 = <&emmc_reset>;
26: pinctrl-names = "default";
27: reset-gpios = <&gpio2 RK_PA3 GPIO_ACTIVE_HIGH>;
28: };
29:
30: keys: gpio-keys {
31: compatible = "gpio-keys";
32: pinctrl-names = "default";
33: pinctrl-0 = <&pwr_key>;
34:
35: power {
36: wakeup-source;
37: gpios = <&gpio0 RK_PA2 GPIO_ACTIVE_LOW>;
38: label = "GPIO Power";
39: linux,code = <KEY_POWER>;
40: };
41: };
42:
43: leds: gpio-leds {
44: compatible = "gpio-leds";
45:
46: work {
47: gpios = <&gpio3 RK_PD5 GPIO_ACTIVE_HIGH>;
48: label = "r88:green:led";
49: pinctrl-names = "default";
50: pinctrl-0 = <&led_ctl>;
51: };
52: };
53:
54: ir: ir-receiver {
55: compatible = "gpio-ir-receiver";
56: gpios = <&gpio3 RK_PD6 GPIO_ACTIVE_LOW>;
57: pinctrl-names = "default";
58: pinctrl-0 = <&ir_int>;
59: };
60:
61: sdio_pwrseq: sdio-pwrseq {
62: compatible = "mmc-pwrseq-simple";
63: clocks = <&hym8563>;
64: clock-names = "ext_clock";
65: pinctrl-names = "default";
66: pinctrl-0 = <&bt_rst>, <&wifi_reg_on>;
67:
68: reset-gpios =
69: /* BT_RST_N */
70: <&gpio3 RK_PA5 GPIO_ACTIVE_LOW>,
71:
72: /* WL_REG_ON */
73: <&gpio3 RK_PA4 GPIO_ACTIVE_LOW>;
74: };
75:
76: vcc_18: vcc18-regulator {
77: compatible = "regulator-fixed";
78: regulator-name = "vcc_18";
79: regulator-min-microvolt = <1800000>;
80: regulator-max-microvolt = <1800000>;
81: regulator-always-on;
82: regulator-boot-on;
83: vin-supply = <&vcc_sys>;
84: };
85:
86: /* supplies both host and otg */
87: vcc_host: vcc-host-regulator {
88: compatible = "regulator-fixed";
89: enable-active-high;
90: gpio = <&gpio0 RK_PA4 GPIO_ACTIVE_HIGH>;
91: pinctrl-names = "default";
92: pinctrl-0 = <&host_vbus_drv>;
93: regulator-name = "vcc_host";
94: regulator-always-on;
95: regulator-boot-on;
96: vin-supply = <&vcc_sys>;
97: };
98:
99: vcc_io: vcc-io-regulator {
100: compatible = "regulator-fixed";
101: regulator-name = "vcc_io";
102: regulator-min-microvolt = <3300000>;
103: regulator-max-microvolt = <3300000>;
104: regulator-always-on;
105: regulator-boot-on;
106: vin-supply = <&vcc_sys>;
107: };
108:
109: vcc_lan: vcc-lan-regulator {
110: compatible = "regulator-fixed";
111: regulator-name = "vcc_lan";
112: regulator-min-microvolt = <3300000>;
113: regulator-max-microvolt = <3300000>;
114: regulator-always-on;
115: regulator-boot-on;
116: vin-supply = <&vcc_io>;
117: };
118:
119: vcc_sys: vcc-sys-regulator {
120: compatible = "regulator-fixed";
121: regulator-name = "vcc_sys";
122: regulator-min-microvolt = <5000000>;
123: regulator-max-microvolt = <5000000>;
124: regulator-always-on;
125: regulator-boot-on;
126: };
127:
128: vccio_wl: vccio-wl-regulator {
129: compatible = "regulator-fixed";
130: regulator-name = "vccio_wl";
131: regulator-min-microvolt = <3300000>;
132: regulator-max-microvolt = <3300000>;
133: regulator-always-on;
134: regulator-boot-on;
135: vin-supply = <&vcc_io>;
136: };
137:
138: vdd_10: vdd-10-regulator {
139: compatible = "regulator-fixed";
140: regulator-name = "vdd_10";
141: regulator-min-microvolt = <1000000>;
142: regulator-max-microvolt = <1000000>;
143: regulator-always-on;
144: regulator-boot-on;
145: vin-supply = <&vcc_sys>;
146: };
147: };
148:
149: &emmc {
150: bus-width = <8>;
151: cap-mmc-highspeed;
152: disable-wp;
153: mmc-pwrseq = <&emmc_pwrseq>;
154: non-removable;
155: pinctrl-names = "default";
156: pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_bus8>;
157: status = "okay";
158: };
159:
160: &gmac {
161: phy-supply = <&vcc_lan>;
162: phy-mode = "rmii";
163: clock_in_out = "output";
164: snps,reset-gpio = <&gpio3 RK_PB4 GPIO_ACTIVE_HIGH>;
165: snps,reset-active-low;
166: snps,reset-delays-us = <0 10000 1000000>;
167: pinctrl-names = "default";
168: pinctrl-0 = <&rmii_pins>;
169: tx_delay = <0x30>;
170: rx_delay = <0x10>;
171: status = "ok";
172: };
173:
174: &i2c0 {
175: status = "okay";
176:
177: vdd_cpu: syr827@40 {
178: compatible = "silergy,syr827";
179: reg = <0x40>;
180: fcs,suspend-voltage-selector = <1>;
181: regulator-name = "vdd_cpu";
182: regulator-enable-ramp-delay = <300>;
183: regulator-min-microvolt = <712500>;
184: regulator-max-microvolt = <1500000>;
185: regulator-ramp-delay = <8000>;
186: regulator-always-on;
187: regulator-boot-on;
188: vin-supply = <&vcc_sys>;
189: };
190:
191: hym8563: hym8563@51 {
192: compatible = "haoyu,hym8563";
193: reg = <0x51>;
194: #clock-cells = <0>;
195: clock-frequency = <32768>;
196: clock-output-names = "xin32k";
197: /* rtc_int is not connected */
198: };
199: };
200:
201: &io_domains {
202: status = "ok";
203:
204: audio-supply = <&vcc_io>;
205: gpio30-supply = <&vcc_io>;
206: gpio1830-supply = <&vcc_io>;
207: wifi-supply = <&vccio_wl>;
208: };
209:
210: &sdio0 {
211: assigned-clocks = <&cru SCLK_SDIO0>;
212: assigned-clock-parents = <&cru PLL_CPLL>;
213: bus-width = <4>;
214: cap-sd-highspeed;
215: cap-sdio-irq;
216: keep-power-in-suspend;
217: mmc-pwrseq = <&sdio_pwrseq>;
218: non-removable;
219: pinctrl-names = "default";
220: pinctrl-0 = <&sdio0_clk &sdio0_cmd &sdio0_bus4>;
221: vmmc-supply = <&vcc_io>;
222: vqmmc-supply = <&vccio_wl>;
223: status = "okay";
224: };
225:
226: &pinctrl {
227: pcfg_pull_none_drv_8ma: pcfg-pull-none-drv-8ma {
228: bias-disable;
229: drive-strength = <8>;
230: };
231:
232: pcfg_pull_up_drv_8ma: pcfg-pull-up-drv-8ma {
233: bias-pull-up;
234: drive-strength = <8>;
235: };
236:
237: emmc {
238: emmc_bus8: emmc-bus8 {
239: rockchip,pins = <1 18 RK_FUNC_2 &pcfg_pull_up_drv_8ma>,
240: <1 19 RK_FUNC_2 &pcfg_pull_up_drv_8ma>,
241: <1 20 RK_FUNC_2 &pcfg_pull_up_drv_8ma>,
242: <1 21 RK_FUNC_2 &pcfg_pull_up_drv_8ma>,
243: <1 22 RK_FUNC_2 &pcfg_pull_up_drv_8ma>,
244: <1 23 RK_FUNC_2 &pcfg_pull_up_drv_8ma>,
245: <1 24 RK_FUNC_2 &pcfg_pull_up_drv_8ma>,
246: <1 25 RK_FUNC_2 &pcfg_pull_up_drv_8ma>;
247: };
248:
249: emmc-clk {
250: rockchip,pins = <2 4 RK_FUNC_2 &pcfg_pull_none_drv_8ma>;
251: };
252:
253: emmc-cmd {
254: rockchip,pins = <1 26 RK_FUNC_2 &pcfg_pull_up_drv_8ma>;
255: };
256:
257: emmc_reset: emmc-reset {
258: rockchip,pins = <2 3 RK_FUNC_GPIO &pcfg_pull_none>;
259: };
260: };
261:
262: ir {
263: ir_int: ir-int {
264: rockchip,pins = <3 30 RK_FUNC_GPIO &pcfg_pull_up>;
265: };
266: };
267:
268: keys {
269: pwr_key: pwr-key {
270: rockchip,pins = <0 2 RK_FUNC_GPIO &pcfg_pull_up>;
271: };
272: };
273:
274: leds {
275: stby_pwren: stby-pwren {
276: rockchip,pins = <0 12 RK_FUNC_GPIO &pcfg_pull_none>;
277: };
278:
279: led_ctl: led-ctl {
280: rockchip,pins = <3 29 RK_FUNC_GPIO &pcfg_pull_none>;
281: };
282: };
283:
284: sdio {
285: wifi_reg_on: wifi-reg-on {
286: rockchip,pins = <3 4 RK_FUNC_GPIO &pcfg_pull_none>;
287: };
288:
289: bt_rst: bt-rst {
290: rockchip,pins = <3 5 RK_FUNC_GPIO &pcfg_pull_none>;
291: };
292: };
293:
294: usb {
295: host_vbus_drv: host-vbus-drv {
296: rockchip,pins = <0 4 RK_FUNC_GPIO &pcfg_pull_none>;
297: };
298: };
299: };
300:
301: &pmu_io_domains {
302: status = "okay";
303:
304: pmu-supply = <&vcc_io>;
305: vop-supply = <&vcc_io>;
306: };
307:
308: &saradc {
309: vref-supply = <&vcc_18>;
310: status = "okay";
311: };
312:
313: &tsadc {
314: rockchip,hw-tshut-mode = <0>; /* tshut mode 0:CRU 1:GPIO */
315: rockchip,hw-tshut-polarity = <0>; /* tshut polarity 0:LOW 1:HIGH */
316: status = "okay";
317: };
318:
319: &uart2 {
320: status = "okay";
321: };
322:
323: &usb_host0_ehci {
324: status = "okay";
325: };
326:
327: &usb_otg {
328: dr_mode = "host";
329: status = "okay";
330: };
331:
332: &wdt {
333: status = "okay";
334: };