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1.1 jmcneill 1: /* SPDX-License-Identifier: GPL-2.0 */
2: /*
1.1.1.2 jmcneill 3: * Device Tree Source for the R-Car E3 (R8A77990) SoC
1.1 jmcneill 4: *
1.1.1.3 ! jmcneill 5: * Copyright (C) 2018-2019 Renesas Electronics Corp.
1.1 jmcneill 6: */
7:
1.1.1.2 jmcneill 8: #include <dt-bindings/clock/r8a77990-cpg-mssr.h>
1.1 jmcneill 9: #include <dt-bindings/interrupt-controller/arm-gic.h>
1.1.1.2 jmcneill 10: #include <dt-bindings/power/r8a77990-sysc.h>
1.1 jmcneill 11:
12: / {
13: compatible = "renesas,r8a77990";
14: #address-cells = <2>;
15: #size-cells = <2>;
16:
1.1.1.2 jmcneill 17: aliases {
18: i2c0 = &i2c0;
19: i2c1 = &i2c1;
20: i2c2 = &i2c2;
21: i2c3 = &i2c3;
22: i2c4 = &i2c4;
23: i2c5 = &i2c5;
24: i2c6 = &i2c6;
25: i2c7 = &i2c7;
26: };
27:
1.1.1.3 ! jmcneill 28: /*
! 29: * The external audio clocks are configured as 0 Hz fixed frequency
! 30: * clocks by default.
! 31: * Boards that provide audio clocks should override them.
! 32: */
! 33: audio_clk_a: audio_clk_a {
! 34: compatible = "fixed-clock";
! 35: #clock-cells = <0>;
! 36: clock-frequency = <0>;
! 37: };
! 38:
! 39: audio_clk_b: audio_clk_b {
! 40: compatible = "fixed-clock";
! 41: #clock-cells = <0>;
! 42: clock-frequency = <0>;
! 43: };
! 44:
! 45: audio_clk_c: audio_clk_c {
! 46: compatible = "fixed-clock";
! 47: #clock-cells = <0>;
! 48: clock-frequency = <0>;
! 49: };
! 50:
! 51: /* External CAN clock - to be overridden by boards that provide it */
! 52: can_clk: can {
! 53: compatible = "fixed-clock";
! 54: #clock-cells = <0>;
! 55: clock-frequency = <0>;
! 56: };
! 57:
! 58: cluster1_opp: opp_table10 {
! 59: compatible = "operating-points-v2";
! 60: opp-shared;
! 61: opp-800000000 {
! 62: opp-hz = /bits/ 64 <800000000>;
! 63: opp-microvolt = <820000>;
! 64: clock-latency-ns = <300000>;
! 65: };
! 66: opp-1000000000 {
! 67: opp-hz = /bits/ 64 <1000000000>;
! 68: opp-microvolt = <820000>;
! 69: clock-latency-ns = <300000>;
! 70: };
! 71: opp-1200000000 {
! 72: opp-hz = /bits/ 64 <1200000000>;
! 73: opp-microvolt = <820000>;
! 74: clock-latency-ns = <300000>;
! 75: opp-suspend;
! 76: };
! 77: };
! 78:
1.1 jmcneill 79: cpus {
80: #address-cells = <1>;
81: #size-cells = <0>;
82:
83: a53_0: cpu@0 {
1.1.1.3 ! jmcneill 84: compatible = "arm,cortex-a53";
1.1.1.2 jmcneill 85: reg = <0>;
86: device_type = "cpu";
87: power-domains = <&sysc R8A77990_PD_CA53_CPU0>;
88: next-level-cache = <&L2_CA53>;
89: enable-method = "psci";
1.1.1.3 ! jmcneill 90: clocks =<&cpg CPG_CORE R8A77990_CLK_Z2>;
! 91: operating-points-v2 = <&cluster1_opp>;
1.1.1.2 jmcneill 92: };
93:
94: a53_1: cpu@1 {
1.1.1.3 ! jmcneill 95: compatible = "arm,cortex-a53";
1.1.1.2 jmcneill 96: reg = <1>;
1.1 jmcneill 97: device_type = "cpu";
1.1.1.2 jmcneill 98: power-domains = <&sysc R8A77990_PD_CA53_CPU1>;
1.1 jmcneill 99: next-level-cache = <&L2_CA53>;
100: enable-method = "psci";
1.1.1.3 ! jmcneill 101: clocks =<&cpg CPG_CORE R8A77990_CLK_Z2>;
! 102: operating-points-v2 = <&cluster1_opp>;
1.1 jmcneill 103: };
104:
105: L2_CA53: cache-controller-0 {
106: compatible = "cache";
1.1.1.2 jmcneill 107: power-domains = <&sysc R8A77990_PD_CA53_SCU>;
1.1 jmcneill 108: cache-unified;
109: cache-level = <2>;
110: };
111: };
112:
113: extal_clk: extal {
114: compatible = "fixed-clock";
115: #clock-cells = <0>;
116: /* This value must be overridden by the board */
117: clock-frequency = <0>;
118: };
119:
1.1.1.3 ! jmcneill 120: /* External PCIe clock - can be overridden by the board */
! 121: pcie_bus_clk: pcie_bus {
! 122: compatible = "fixed-clock";
! 123: #clock-cells = <0>;
! 124: clock-frequency = <0>;
! 125: };
! 126:
1.1 jmcneill 127: pmu_a53 {
128: compatible = "arm,cortex-a53-pmu";
1.1.1.2 jmcneill 129: interrupts-extended = <&gic GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>,
130: <&gic GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
131: interrupt-affinity = <&a53_0>, <&a53_1>;
1.1 jmcneill 132: };
133:
134: psci {
135: compatible = "arm,psci-1.0", "arm,psci-0.2";
136: method = "smc";
137: };
138:
1.1.1.2 jmcneill 139: /* External SCIF clock - to be overridden by boards that provide it */
140: scif_clk: scif {
141: compatible = "fixed-clock";
142: #clock-cells = <0>;
143: clock-frequency = <0>;
144: };
145:
1.1 jmcneill 146: soc: soc {
147: compatible = "simple-bus";
148: interrupt-parent = <&gic>;
149: #address-cells = <2>;
150: #size-cells = <2>;
151: ranges;
152:
1.1.1.2 jmcneill 153: rwdt: watchdog@e6020000 {
154: compatible = "renesas,r8a77990-wdt",
155: "renesas,rcar-gen3-wdt";
156: reg = <0 0xe6020000 0 0x0c>;
157: clocks = <&cpg CPG_MOD 402>;
158: power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
159: resets = <&cpg 402>;
160: status = "disabled";
161: };
162:
1.1 jmcneill 163: gpio0: gpio@e6050000 {
164: compatible = "renesas,gpio-r8a77990",
165: "renesas,rcar-gen3-gpio";
166: reg = <0 0xe6050000 0 0x50>;
167: interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
168: #gpio-cells = <2>;
169: gpio-controller;
170: gpio-ranges = <&pfc 0 0 18>;
171: #interrupt-cells = <2>;
172: interrupt-controller;
173: clocks = <&cpg CPG_MOD 912>;
1.1.1.2 jmcneill 174: power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1.1 jmcneill 175: resets = <&cpg 912>;
176: };
177:
178: gpio1: gpio@e6051000 {
179: compatible = "renesas,gpio-r8a77990",
180: "renesas,rcar-gen3-gpio";
181: reg = <0 0xe6051000 0 0x50>;
182: interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
183: #gpio-cells = <2>;
184: gpio-controller;
185: gpio-ranges = <&pfc 0 32 23>;
186: #interrupt-cells = <2>;
187: interrupt-controller;
188: clocks = <&cpg CPG_MOD 911>;
1.1.1.2 jmcneill 189: power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1.1 jmcneill 190: resets = <&cpg 911>;
191: };
192:
193: gpio2: gpio@e6052000 {
194: compatible = "renesas,gpio-r8a77990",
195: "renesas,rcar-gen3-gpio";
196: reg = <0 0xe6052000 0 0x50>;
197: interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
198: #gpio-cells = <2>;
199: gpio-controller;
200: gpio-ranges = <&pfc 0 64 26>;
201: #interrupt-cells = <2>;
202: interrupt-controller;
203: clocks = <&cpg CPG_MOD 910>;
1.1.1.2 jmcneill 204: power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1.1 jmcneill 205: resets = <&cpg 910>;
206: };
207:
208: gpio3: gpio@e6053000 {
209: compatible = "renesas,gpio-r8a77990",
210: "renesas,rcar-gen3-gpio";
211: reg = <0 0xe6053000 0 0x50>;
212: interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
213: #gpio-cells = <2>;
214: gpio-controller;
215: gpio-ranges = <&pfc 0 96 16>;
216: #interrupt-cells = <2>;
217: interrupt-controller;
218: clocks = <&cpg CPG_MOD 909>;
1.1.1.2 jmcneill 219: power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1.1 jmcneill 220: resets = <&cpg 909>;
221: };
222:
223: gpio4: gpio@e6054000 {
224: compatible = "renesas,gpio-r8a77990",
225: "renesas,rcar-gen3-gpio";
226: reg = <0 0xe6054000 0 0x50>;
227: interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
228: #gpio-cells = <2>;
229: gpio-controller;
230: gpio-ranges = <&pfc 0 128 11>;
231: #interrupt-cells = <2>;
232: interrupt-controller;
233: clocks = <&cpg CPG_MOD 908>;
1.1.1.2 jmcneill 234: power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1.1 jmcneill 235: resets = <&cpg 908>;
236: };
237:
238: gpio5: gpio@e6055000 {
239: compatible = "renesas,gpio-r8a77990",
240: "renesas,rcar-gen3-gpio";
241: reg = <0 0xe6055000 0 0x50>;
242: interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
243: #gpio-cells = <2>;
244: gpio-controller;
245: gpio-ranges = <&pfc 0 160 20>;
246: #interrupt-cells = <2>;
247: interrupt-controller;
248: clocks = <&cpg CPG_MOD 907>;
1.1.1.2 jmcneill 249: power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1.1 jmcneill 250: resets = <&cpg 907>;
251: };
252:
253: gpio6: gpio@e6055400 {
254: compatible = "renesas,gpio-r8a77990",
255: "renesas,rcar-gen3-gpio";
256: reg = <0 0xe6055400 0 0x50>;
257: interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
258: #gpio-cells = <2>;
259: gpio-controller;
260: gpio-ranges = <&pfc 0 192 18>;
261: #interrupt-cells = <2>;
262: interrupt-controller;
263: clocks = <&cpg CPG_MOD 906>;
1.1.1.2 jmcneill 264: power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1.1 jmcneill 265: resets = <&cpg 906>;
266: };
267:
1.1.1.3 ! jmcneill 268: pfc: pin-controller@e6060000 {
! 269: compatible = "renesas,pfc-r8a77990";
! 270: reg = <0 0xe6060000 0 0x508>;
! 271: };
! 272:
! 273: i2c_dvfs: i2c@e60b0000 {
! 274: #address-cells = <1>;
! 275: #size-cells = <0>;
! 276: compatible = "renesas,iic-r8a77990";
! 277: reg = <0 0xe60b0000 0 0x15>;
! 278: interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
! 279: clocks = <&cpg CPG_MOD 926>;
! 280: power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
! 281: resets = <&cpg 926>;
! 282: dmas = <&dmac0 0x11>, <&dmac0 0x10>;
! 283: dma-names = "tx", "rx";
! 284: status = "disabled";
! 285: };
! 286:
! 287: cpg: clock-controller@e6150000 {
! 288: compatible = "renesas,r8a77990-cpg-mssr";
! 289: reg = <0 0xe6150000 0 0x1000>;
! 290: clocks = <&extal_clk>;
! 291: clock-names = "extal";
! 292: #clock-cells = <2>;
! 293: #power-domain-cells = <0>;
! 294: #reset-cells = <1>;
! 295: };
! 296:
! 297: rst: reset-controller@e6160000 {
! 298: compatible = "renesas,r8a77990-rst";
! 299: reg = <0 0xe6160000 0 0x0200>;
! 300: };
! 301:
! 302: sysc: system-controller@e6180000 {
! 303: compatible = "renesas,r8a77990-sysc";
! 304: reg = <0 0xe6180000 0 0x0400>;
! 305: #power-domain-cells = <1>;
! 306: };
! 307:
! 308: thermal: thermal@e6190000 {
! 309: compatible = "renesas,thermal-r8a77990";
! 310: reg = <0 0xe6190000 0 0x10>, <0 0xe6190100 0 0x38>;
! 311: interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>,
! 312: <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>,
! 313: <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
! 314: clocks = <&cpg CPG_MOD 522>;
! 315: power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
! 316: resets = <&cpg 522>;
! 317: #thermal-sensor-cells = <0>;
! 318: };
! 319:
! 320: intc_ex: interrupt-controller@e61c0000 {
! 321: compatible = "renesas,intc-ex-r8a77990", "renesas,irqc";
! 322: #interrupt-cells = <2>;
! 323: interrupt-controller;
! 324: reg = <0 0xe61c0000 0 0x200>;
! 325: interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH
! 326: GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH
! 327: GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH
! 328: GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH
! 329: GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH
! 330: GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>;
! 331: clocks = <&cpg CPG_MOD 407>;
! 332: power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
! 333: resets = <&cpg 407>;
! 334: };
! 335:
1.1.1.2 jmcneill 336: i2c0: i2c@e6500000 {
337: #address-cells = <1>;
338: #size-cells = <0>;
339: compatible = "renesas,i2c-r8a77990",
340: "renesas,rcar-gen3-i2c";
341: reg = <0 0xe6500000 0 0x40>;
342: interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
343: clocks = <&cpg CPG_MOD 931>;
344: power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
345: resets = <&cpg 931>;
1.1.1.3 ! jmcneill 346: dmas = <&dmac1 0x91>, <&dmac1 0x90>,
! 347: <&dmac2 0x91>, <&dmac2 0x90>;
! 348: dma-names = "tx", "rx", "tx", "rx";
1.1.1.2 jmcneill 349: i2c-scl-internal-delay-ns = <110>;
350: status = "disabled";
351: };
352:
353: i2c1: i2c@e6508000 {
354: #address-cells = <1>;
355: #size-cells = <0>;
356: compatible = "renesas,i2c-r8a77990",
357: "renesas,rcar-gen3-i2c";
358: reg = <0 0xe6508000 0 0x40>;
359: interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
360: clocks = <&cpg CPG_MOD 930>;
361: power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
362: resets = <&cpg 930>;
1.1.1.3 ! jmcneill 363: dmas = <&dmac1 0x93>, <&dmac1 0x92>,
! 364: <&dmac2 0x93>, <&dmac2 0x92>;
! 365: dma-names = "tx", "rx", "tx", "rx";
1.1.1.2 jmcneill 366: i2c-scl-internal-delay-ns = <6>;
367: status = "disabled";
368: };
369:
370: i2c2: i2c@e6510000 {
371: #address-cells = <1>;
372: #size-cells = <0>;
373: compatible = "renesas,i2c-r8a77990",
374: "renesas,rcar-gen3-i2c";
375: reg = <0 0xe6510000 0 0x40>;
376: interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
377: clocks = <&cpg CPG_MOD 929>;
378: power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
379: resets = <&cpg 929>;
1.1.1.3 ! jmcneill 380: dmas = <&dmac1 0x95>, <&dmac1 0x94>,
! 381: <&dmac2 0x95>, <&dmac2 0x94>;
! 382: dma-names = "tx", "rx", "tx", "rx";
1.1.1.2 jmcneill 383: i2c-scl-internal-delay-ns = <6>;
384: status = "disabled";
385: };
386:
387: i2c3: i2c@e66d0000 {
388: #address-cells = <1>;
389: #size-cells = <0>;
390: compatible = "renesas,i2c-r8a77990",
391: "renesas,rcar-gen3-i2c";
392: reg = <0 0xe66d0000 0 0x40>;
393: interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
394: clocks = <&cpg CPG_MOD 928>;
395: power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
396: resets = <&cpg 928>;
1.1.1.3 ! jmcneill 397: dmas = <&dmac0 0x97>, <&dmac0 0x96>;
! 398: dma-names = "tx", "rx";
1.1.1.2 jmcneill 399: i2c-scl-internal-delay-ns = <110>;
400: status = "disabled";
401: };
402:
403: i2c4: i2c@e66d8000 {
404: #address-cells = <1>;
405: #size-cells = <0>;
406: compatible = "renesas,i2c-r8a77990",
407: "renesas,rcar-gen3-i2c";
408: reg = <0 0xe66d8000 0 0x40>;
409: interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
410: clocks = <&cpg CPG_MOD 927>;
411: power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
412: resets = <&cpg 927>;
1.1.1.3 ! jmcneill 413: dmas = <&dmac0 0x99>, <&dmac0 0x98>;
! 414: dma-names = "tx", "rx";
1.1.1.2 jmcneill 415: i2c-scl-internal-delay-ns = <6>;
416: status = "disabled";
417: };
418:
419: i2c5: i2c@e66e0000 {
420: #address-cells = <1>;
421: #size-cells = <0>;
422: compatible = "renesas,i2c-r8a77990",
423: "renesas,rcar-gen3-i2c";
424: reg = <0 0xe66e0000 0 0x40>;
425: interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
426: clocks = <&cpg CPG_MOD 919>;
427: power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
428: resets = <&cpg 919>;
1.1.1.3 ! jmcneill 429: dmas = <&dmac0 0x9b>, <&dmac0 0x9a>;
! 430: dma-names = "tx", "rx";
1.1.1.2 jmcneill 431: i2c-scl-internal-delay-ns = <6>;
432: status = "disabled";
433: };
434:
435: i2c6: i2c@e66e8000 {
436: #address-cells = <1>;
437: #size-cells = <0>;
438: compatible = "renesas,i2c-r8a77990",
439: "renesas,rcar-gen3-i2c";
440: reg = <0 0xe66e8000 0 0x40>;
441: interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
442: clocks = <&cpg CPG_MOD 918>;
443: power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
444: resets = <&cpg 918>;
1.1.1.3 ! jmcneill 445: dmas = <&dmac0 0x9d>, <&dmac0 0x9c>;
! 446: dma-names = "tx", "rx";
1.1.1.2 jmcneill 447: i2c-scl-internal-delay-ns = <6>;
448: status = "disabled";
449: };
450:
451: i2c7: i2c@e6690000 {
452: #address-cells = <1>;
453: #size-cells = <0>;
454: compatible = "renesas,i2c-r8a77990",
455: "renesas,rcar-gen3-i2c";
456: reg = <0 0xe6690000 0 0x40>;
457: interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
458: clocks = <&cpg CPG_MOD 1003>;
459: power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
460: resets = <&cpg 1003>;
461: i2c-scl-internal-delay-ns = <6>;
462: status = "disabled";
463: };
464:
1.1.1.3 ! jmcneill 465: hscif0: serial@e6540000 {
! 466: compatible = "renesas,hscif-r8a77990",
! 467: "renesas,rcar-gen3-hscif",
! 468: "renesas,hscif";
! 469: reg = <0 0xe6540000 0 0x60>;
! 470: interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
! 471: clocks = <&cpg CPG_MOD 520>,
! 472: <&cpg CPG_CORE R8A77990_CLK_S3D1C>,
! 473: <&scif_clk>;
! 474: clock-names = "fck", "brg_int", "scif_clk";
! 475: dmas = <&dmac1 0x31>, <&dmac1 0x30>,
! 476: <&dmac2 0x31>, <&dmac2 0x30>;
! 477: dma-names = "tx", "rx", "tx", "rx";
! 478: power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
! 479: resets = <&cpg 520>;
! 480: status = "disabled";
1.1 jmcneill 481: };
482:
1.1.1.3 ! jmcneill 483: hscif1: serial@e6550000 {
! 484: compatible = "renesas,hscif-r8a77990",
! 485: "renesas,rcar-gen3-hscif",
! 486: "renesas,hscif";
! 487: reg = <0 0xe6550000 0 0x60>;
! 488: interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
! 489: clocks = <&cpg CPG_MOD 519>,
! 490: <&cpg CPG_CORE R8A77990_CLK_S3D1C>,
! 491: <&scif_clk>;
! 492: clock-names = "fck", "brg_int", "scif_clk";
! 493: dmas = <&dmac1 0x33>, <&dmac1 0x32>,
! 494: <&dmac2 0x33>, <&dmac2 0x32>;
! 495: dma-names = "tx", "rx", "tx", "rx";
! 496: power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
! 497: resets = <&cpg 519>;
! 498: status = "disabled";
1.1 jmcneill 499: };
500:
1.1.1.3 ! jmcneill 501: hscif2: serial@e6560000 {
! 502: compatible = "renesas,hscif-r8a77990",
! 503: "renesas,rcar-gen3-hscif",
! 504: "renesas,hscif";
! 505: reg = <0 0xe6560000 0 0x60>;
! 506: interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
! 507: clocks = <&cpg CPG_MOD 518>,
! 508: <&cpg CPG_CORE R8A77990_CLK_S3D1C>,
! 509: <&scif_clk>;
! 510: clock-names = "fck", "brg_int", "scif_clk";
! 511: dmas = <&dmac1 0x35>, <&dmac1 0x34>,
! 512: <&dmac2 0x35>, <&dmac2 0x34>;
! 513: dma-names = "tx", "rx", "tx", "rx";
! 514: power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
! 515: resets = <&cpg 518>;
! 516: status = "disabled";
1.1 jmcneill 517: };
518:
1.1.1.3 ! jmcneill 519: hscif3: serial@e66a0000 {
! 520: compatible = "renesas,hscif-r8a77990",
! 521: "renesas,rcar-gen3-hscif",
! 522: "renesas,hscif";
! 523: reg = <0 0xe66a0000 0 0x60>;
! 524: interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
! 525: clocks = <&cpg CPG_MOD 517>,
! 526: <&cpg CPG_CORE R8A77990_CLK_S3D1C>,
! 527: <&scif_clk>;
! 528: clock-names = "fck", "brg_int", "scif_clk";
! 529: dmas = <&dmac0 0x37>, <&dmac0 0x36>;
! 530: dma-names = "tx", "rx";
! 531: power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
! 532: resets = <&cpg 517>;
! 533: status = "disabled";
! 534: };
! 535:
! 536: hscif4: serial@e66b0000 {
! 537: compatible = "renesas,hscif-r8a77990",
! 538: "renesas,rcar-gen3-hscif",
! 539: "renesas,hscif";
! 540: reg = <0 0xe66b0000 0 0x60>;
! 541: interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>;
! 542: clocks = <&cpg CPG_MOD 516>,
! 543: <&cpg CPG_CORE R8A77990_CLK_S3D1C>,
! 544: <&scif_clk>;
! 545: clock-names = "fck", "brg_int", "scif_clk";
! 546: dmas = <&dmac0 0x39>, <&dmac0 0x38>;
! 547: dma-names = "tx", "rx";
! 548: power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
! 549: resets = <&cpg 516>;
! 550: status = "disabled";
! 551: };
! 552:
! 553: hsusb: usb@e6590000 {
! 554: compatible = "renesas,usbhs-r8a77990",
! 555: "renesas,rcar-gen3-usbhs";
! 556: reg = <0 0xe6590000 0 0x200>;
! 557: interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
! 558: clocks = <&cpg CPG_MOD 704>, <&cpg CPG_MOD 703>;
! 559: dmas = <&usb_dmac0 0>, <&usb_dmac0 1>,
! 560: <&usb_dmac1 0>, <&usb_dmac1 1>;
! 561: dma-names = "ch0", "ch1", "ch2", "ch3";
! 562: renesas,buswait = <11>;
! 563: phys = <&usb2_phy0>;
! 564: phy-names = "usb";
! 565: power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
! 566: resets = <&cpg 704>, <&cpg 703>;
! 567: status = "disabled";
! 568: };
! 569:
! 570: usb_dmac0: dma-controller@e65a0000 {
! 571: compatible = "renesas,r8a77990-usb-dmac",
! 572: "renesas,usb-dmac";
! 573: reg = <0 0xe65a0000 0 0x100>;
! 574: interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH
! 575: GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
! 576: interrupt-names = "ch0", "ch1";
! 577: clocks = <&cpg CPG_MOD 330>;
! 578: power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
! 579: resets = <&cpg 330>;
! 580: #dma-cells = <1>;
! 581: dma-channels = <2>;
! 582: };
! 583:
! 584: usb_dmac1: dma-controller@e65b0000 {
! 585: compatible = "renesas,r8a77990-usb-dmac",
! 586: "renesas,usb-dmac";
! 587: reg = <0 0xe65b0000 0 0x100>;
! 588: interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH
! 589: GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
! 590: interrupt-names = "ch0", "ch1";
! 591: clocks = <&cpg CPG_MOD 331>;
! 592: power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
! 593: resets = <&cpg 331>;
! 594: #dma-cells = <1>;
! 595: dma-channels = <2>;
1.1 jmcneill 596: };
597:
1.1.1.2 jmcneill 598: dmac0: dma-controller@e6700000 {
599: compatible = "renesas,dmac-r8a77990",
600: "renesas,rcar-dmac";
601: reg = <0 0xe6700000 0 0x10000>;
602: interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH
603: GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH
604: GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH
605: GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH
606: GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH
607: GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH
608: GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH
609: GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH
610: GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH
611: GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH
612: GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH
613: GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH
614: GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH
615: GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH
616: GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH
617: GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH
618: GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>;
619: interrupt-names = "error",
620: "ch0", "ch1", "ch2", "ch3",
621: "ch4", "ch5", "ch6", "ch7",
622: "ch8", "ch9", "ch10", "ch11",
623: "ch12", "ch13", "ch14", "ch15";
624: clocks = <&cpg CPG_MOD 219>;
625: clock-names = "fck";
626: power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
627: resets = <&cpg 219>;
628: #dma-cells = <1>;
629: dma-channels = <16>;
630: iommus = <&ipmmu_ds0 0>, <&ipmmu_ds0 1>,
631: <&ipmmu_ds0 2>, <&ipmmu_ds0 3>,
632: <&ipmmu_ds0 4>, <&ipmmu_ds0 5>,
633: <&ipmmu_ds0 6>, <&ipmmu_ds0 7>,
634: <&ipmmu_ds0 8>, <&ipmmu_ds0 9>,
635: <&ipmmu_ds0 10>, <&ipmmu_ds0 11>,
636: <&ipmmu_ds0 12>, <&ipmmu_ds0 13>,
637: <&ipmmu_ds0 14>, <&ipmmu_ds0 15>;
638: };
639:
640: dmac1: dma-controller@e7300000 {
641: compatible = "renesas,dmac-r8a77990",
642: "renesas,rcar-dmac";
643: reg = <0 0xe7300000 0 0x10000>;
644: interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
645: GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
646: GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
647: GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
648: GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
649: GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
650: GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
651: GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
652: GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH
653: GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
654: GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
655: GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
656: GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
657: GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
658: GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
659: GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH
660: GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>;
661: interrupt-names = "error",
662: "ch0", "ch1", "ch2", "ch3",
663: "ch4", "ch5", "ch6", "ch7",
664: "ch8", "ch9", "ch10", "ch11",
665: "ch12", "ch13", "ch14", "ch15";
666: clocks = <&cpg CPG_MOD 218>;
667: clock-names = "fck";
668: power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
669: resets = <&cpg 218>;
670: #dma-cells = <1>;
671: dma-channels = <16>;
672: iommus = <&ipmmu_ds1 0>, <&ipmmu_ds1 1>,
673: <&ipmmu_ds1 2>, <&ipmmu_ds1 3>,
674: <&ipmmu_ds1 4>, <&ipmmu_ds1 5>,
675: <&ipmmu_ds1 6>, <&ipmmu_ds1 7>,
676: <&ipmmu_ds1 8>, <&ipmmu_ds1 9>,
677: <&ipmmu_ds1 10>, <&ipmmu_ds1 11>,
678: <&ipmmu_ds1 12>, <&ipmmu_ds1 13>,
679: <&ipmmu_ds1 14>, <&ipmmu_ds1 15>;
680: };
681:
682: dmac2: dma-controller@e7310000 {
683: compatible = "renesas,dmac-r8a77990",
684: "renesas,rcar-dmac";
685: reg = <0 0xe7310000 0 0x10000>;
686: interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH
687: GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH
688: GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH
689: GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH
690: GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH
691: GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH
692: GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH
693: GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH
694: GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH
695: GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH
696: GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH
697: GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH
698: GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH
699: GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH
700: GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH
701: GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH
702: GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>;
703: interrupt-names = "error",
704: "ch0", "ch1", "ch2", "ch3",
705: "ch4", "ch5", "ch6", "ch7",
706: "ch8", "ch9", "ch10", "ch11",
707: "ch12", "ch13", "ch14", "ch15";
708: clocks = <&cpg CPG_MOD 217>;
709: clock-names = "fck";
710: power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
711: resets = <&cpg 217>;
712: #dma-cells = <1>;
713: dma-channels = <16>;
714: iommus = <&ipmmu_ds1 16>, <&ipmmu_ds1 17>,
715: <&ipmmu_ds1 18>, <&ipmmu_ds1 19>,
716: <&ipmmu_ds1 20>, <&ipmmu_ds1 21>,
717: <&ipmmu_ds1 22>, <&ipmmu_ds1 23>,
718: <&ipmmu_ds1 24>, <&ipmmu_ds1 25>,
719: <&ipmmu_ds1 26>, <&ipmmu_ds1 27>,
720: <&ipmmu_ds1 28>, <&ipmmu_ds1 29>,
721: <&ipmmu_ds1 30>, <&ipmmu_ds1 31>;
722: };
723:
724: ipmmu_ds0: mmu@e6740000 {
725: compatible = "renesas,ipmmu-r8a77990";
726: reg = <0 0xe6740000 0 0x1000>;
727: renesas,ipmmu-main = <&ipmmu_mm 0>;
728: power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
729: #iommu-cells = <1>;
730: };
731:
732: ipmmu_ds1: mmu@e7740000 {
733: compatible = "renesas,ipmmu-r8a77990";
734: reg = <0 0xe7740000 0 0x1000>;
735: renesas,ipmmu-main = <&ipmmu_mm 1>;
736: power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
737: #iommu-cells = <1>;
738: };
739:
740: ipmmu_hc: mmu@e6570000 {
741: compatible = "renesas,ipmmu-r8a77990";
742: reg = <0 0xe6570000 0 0x1000>;
743: renesas,ipmmu-main = <&ipmmu_mm 2>;
744: power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
745: #iommu-cells = <1>;
746: };
747:
748: ipmmu_mm: mmu@e67b0000 {
749: compatible = "renesas,ipmmu-r8a77990";
750: reg = <0 0xe67b0000 0 0x1000>;
751: interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>,
752: <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>;
753: power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
754: #iommu-cells = <1>;
755: };
756:
757: ipmmu_mp: mmu@ec670000 {
758: compatible = "renesas,ipmmu-r8a77990";
759: reg = <0 0xec670000 0 0x1000>;
760: renesas,ipmmu-main = <&ipmmu_mm 4>;
761: power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
762: #iommu-cells = <1>;
763: };
764:
765: ipmmu_pv0: mmu@fd800000 {
766: compatible = "renesas,ipmmu-r8a77990";
767: reg = <0 0xfd800000 0 0x1000>;
768: renesas,ipmmu-main = <&ipmmu_mm 6>;
769: power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
770: #iommu-cells = <1>;
771: };
772:
773: ipmmu_rt: mmu@ffc80000 {
774: compatible = "renesas,ipmmu-r8a77990";
775: reg = <0 0xffc80000 0 0x1000>;
776: renesas,ipmmu-main = <&ipmmu_mm 10>;
777: power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
778: #iommu-cells = <1>;
779: };
780:
781: ipmmu_vc0: mmu@fe6b0000 {
782: compatible = "renesas,ipmmu-r8a77990";
783: reg = <0 0xfe6b0000 0 0x1000>;
784: renesas,ipmmu-main = <&ipmmu_mm 12>;
785: power-domains = <&sysc R8A77990_PD_A3VC>;
786: #iommu-cells = <1>;
787: };
788:
789: ipmmu_vi0: mmu@febd0000 {
790: compatible = "renesas,ipmmu-r8a77990";
791: reg = <0 0xfebd0000 0 0x1000>;
792: renesas,ipmmu-main = <&ipmmu_mm 14>;
793: power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
794: #iommu-cells = <1>;
795: };
796:
797: ipmmu_vp0: mmu@fe990000 {
798: compatible = "renesas,ipmmu-r8a77990";
799: reg = <0 0xfe990000 0 0x1000>;
800: renesas,ipmmu-main = <&ipmmu_mm 16>;
801: power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
802: #iommu-cells = <1>;
803: };
804:
1.1 jmcneill 805: avb: ethernet@e6800000 {
806: compatible = "renesas,etheravb-r8a77990",
807: "renesas,etheravb-rcar-gen3";
1.1.1.2 jmcneill 808: reg = <0 0xe6800000 0 0x800>;
1.1 jmcneill 809: interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
810: <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
811: <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
812: <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
813: <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
814: <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
815: <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>,
816: <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>,
817: <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>,
818: <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>,
819: <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
820: <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>,
821: <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>,
822: <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>,
823: <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
824: <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
825: <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
826: <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
827: <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
828: <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
829: <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
830: <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>,
831: <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>,
832: <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>,
833: <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
834: interrupt-names = "ch0", "ch1", "ch2", "ch3",
835: "ch4", "ch5", "ch6", "ch7",
836: "ch8", "ch9", "ch10", "ch11",
837: "ch12", "ch13", "ch14", "ch15",
838: "ch16", "ch17", "ch18", "ch19",
839: "ch20", "ch21", "ch22", "ch23",
840: "ch24";
841: clocks = <&cpg CPG_MOD 812>;
1.1.1.2 jmcneill 842: power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1.1 jmcneill 843: resets = <&cpg 812>;
844: phy-mode = "rgmii";
1.1.1.3 ! jmcneill 845: iommus = <&ipmmu_ds0 16>;
1.1 jmcneill 846: #address-cells = <1>;
847: #size-cells = <0>;
848: status = "disabled";
849: };
850:
1.1.1.3 ! jmcneill 851: can0: can@e6c30000 {
! 852: compatible = "renesas,can-r8a77990",
! 853: "renesas,rcar-gen3-can";
! 854: reg = <0 0xe6c30000 0 0x1000>;
! 855: interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
! 856: clocks = <&cpg CPG_MOD 916>,
! 857: <&cpg CPG_CORE R8A77990_CLK_CANFD>,
! 858: <&can_clk>;
! 859: clock-names = "clkp1", "clkp2", "can_clk";
! 860: assigned-clocks = <&cpg CPG_CORE R8A77990_CLK_CANFD>;
! 861: assigned-clock-rates = <40000000>;
! 862: power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
! 863: resets = <&cpg 916>;
! 864: status = "disabled";
! 865: };
! 866:
! 867: can1: can@e6c38000 {
! 868: compatible = "renesas,can-r8a77990",
! 869: "renesas,rcar-gen3-can";
! 870: reg = <0 0xe6c38000 0 0x1000>;
! 871: interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
! 872: clocks = <&cpg CPG_MOD 915>,
! 873: <&cpg CPG_CORE R8A77990_CLK_CANFD>,
! 874: <&can_clk>;
! 875: clock-names = "clkp1", "clkp2", "can_clk";
! 876: assigned-clocks = <&cpg CPG_CORE R8A77990_CLK_CANFD>;
! 877: assigned-clock-rates = <40000000>;
! 878: power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
! 879: resets = <&cpg 915>;
! 880: status = "disabled";
! 881: };
! 882:
! 883: canfd: can@e66c0000 {
! 884: compatible = "renesas,r8a77990-canfd",
! 885: "renesas,rcar-gen3-canfd";
! 886: reg = <0 0xe66c0000 0 0x8000>;
! 887: interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,
! 888: <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
! 889: clocks = <&cpg CPG_MOD 914>,
! 890: <&cpg CPG_CORE R8A77990_CLK_CANFD>,
! 891: <&can_clk>;
! 892: clock-names = "fck", "canfd", "can_clk";
! 893: assigned-clocks = <&cpg CPG_CORE R8A77990_CLK_CANFD>;
! 894: assigned-clock-rates = <40000000>;
! 895: power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
! 896: resets = <&cpg 914>;
! 897: status = "disabled";
! 898:
! 899: channel0 {
! 900: status = "disabled";
! 901: };
! 902:
! 903: channel1 {
! 904: status = "disabled";
! 905: };
! 906: };
! 907:
1.1.1.2 jmcneill 908: pwm0: pwm@e6e30000 {
909: compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar";
910: reg = <0 0xe6e30000 0 0x8>;
911: clocks = <&cpg CPG_MOD 523>;
912: power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
913: resets = <&cpg 523>;
914: #pwm-cells = <2>;
915: status = "disabled";
916: };
917:
918: pwm1: pwm@e6e31000 {
919: compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar";
920: reg = <0 0xe6e31000 0 0x8>;
921: clocks = <&cpg CPG_MOD 523>;
922: power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
923: resets = <&cpg 523>;
924: #pwm-cells = <2>;
925: status = "disabled";
926: };
927:
928: pwm2: pwm@e6e32000 {
929: compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar";
930: reg = <0 0xe6e32000 0 0x8>;
931: clocks = <&cpg CPG_MOD 523>;
932: power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
933: resets = <&cpg 523>;
934: #pwm-cells = <2>;
935: status = "disabled";
936: };
937:
938: pwm3: pwm@e6e33000 {
939: compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar";
940: reg = <0 0xe6e33000 0 0x8>;
941: clocks = <&cpg CPG_MOD 523>;
942: power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
943: resets = <&cpg 523>;
944: #pwm-cells = <2>;
945: status = "disabled";
946: };
947:
948: pwm4: pwm@e6e34000 {
949: compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar";
950: reg = <0 0xe6e34000 0 0x8>;
951: clocks = <&cpg CPG_MOD 523>;
952: power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
953: resets = <&cpg 523>;
954: #pwm-cells = <2>;
955: status = "disabled";
956: };
957:
958: pwm5: pwm@e6e35000 {
959: compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar";
960: reg = <0 0xe6e35000 0 0x8>;
961: clocks = <&cpg CPG_MOD 523>;
962: power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
963: resets = <&cpg 523>;
964: #pwm-cells = <2>;
965: status = "disabled";
966: };
967:
968: pwm6: pwm@e6e36000 {
969: compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar";
970: reg = <0 0xe6e36000 0 0x8>;
971: clocks = <&cpg CPG_MOD 523>;
972: power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
973: resets = <&cpg 523>;
974: #pwm-cells = <2>;
975: status = "disabled";
976: };
977:
1.1.1.3 ! jmcneill 978: scif0: serial@e6e60000 {
! 979: compatible = "renesas,scif-r8a77990",
! 980: "renesas,rcar-gen3-scif", "renesas,scif";
! 981: reg = <0 0xe6e60000 0 64>;
! 982: interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
! 983: clocks = <&cpg CPG_MOD 207>,
! 984: <&cpg CPG_CORE R8A77990_CLK_S3D1C>,
! 985: <&scif_clk>;
! 986: clock-names = "fck", "brg_int", "scif_clk";
! 987: dmas = <&dmac1 0x51>, <&dmac1 0x50>,
! 988: <&dmac2 0x51>, <&dmac2 0x50>;
! 989: dma-names = "tx", "rx", "tx", "rx";
! 990: power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
! 991: resets = <&cpg 207>;
! 992: status = "disabled";
! 993: };
! 994:
! 995: scif1: serial@e6e68000 {
! 996: compatible = "renesas,scif-r8a77990",
! 997: "renesas,rcar-gen3-scif", "renesas,scif";
! 998: reg = <0 0xe6e68000 0 64>;
! 999: interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
! 1000: clocks = <&cpg CPG_MOD 206>,
! 1001: <&cpg CPG_CORE R8A77990_CLK_S3D1C>,
! 1002: <&scif_clk>;
! 1003: clock-names = "fck", "brg_int", "scif_clk";
! 1004: dmas = <&dmac1 0x53>, <&dmac1 0x52>,
! 1005: <&dmac2 0x53>, <&dmac2 0x52>;
! 1006: dma-names = "tx", "rx", "tx", "rx";
! 1007: power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
! 1008: resets = <&cpg 206>;
! 1009: status = "disabled";
! 1010: };
! 1011:
1.1 jmcneill 1012: scif2: serial@e6e88000 {
1013: compatible = "renesas,scif-r8a77990",
1014: "renesas,rcar-gen3-scif", "renesas,scif";
1015: reg = <0 0xe6e88000 0 64>;
1016: interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
1.1.1.2 jmcneill 1017: clocks = <&cpg CPG_MOD 310>,
1018: <&cpg CPG_CORE R8A77990_CLK_S3D1C>,
1019: <&scif_clk>;
1020: clock-names = "fck", "brg_int", "scif_clk";
1.1.1.3 ! jmcneill 1021: dmas = <&dmac1 0x13>, <&dmac1 0x12>,
! 1022: <&dmac2 0x13>, <&dmac2 0x12>;
! 1023: dma-names = "tx", "rx", "tx", "rx";
1.1.1.2 jmcneill 1024: power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1.1 jmcneill 1025: resets = <&cpg 310>;
1026: status = "disabled";
1027: };
1028:
1.1.1.3 ! jmcneill 1029: scif3: serial@e6c50000 {
! 1030: compatible = "renesas,scif-r8a77990",
! 1031: "renesas,rcar-gen3-scif", "renesas,scif";
! 1032: reg = <0 0xe6c50000 0 64>;
! 1033: interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
! 1034: clocks = <&cpg CPG_MOD 204>,
! 1035: <&cpg CPG_CORE R8A77990_CLK_S3D1C>,
! 1036: <&scif_clk>;
! 1037: clock-names = "fck", "brg_int", "scif_clk";
! 1038: dmas = <&dmac0 0x57>, <&dmac0 0x56>;
! 1039: dma-names = "tx", "rx";
! 1040: power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
! 1041: resets = <&cpg 204>;
! 1042: status = "disabled";
! 1043: };
! 1044:
! 1045: scif4: serial@e6c40000 {
! 1046: compatible = "renesas,scif-r8a77990",
! 1047: "renesas,rcar-gen3-scif", "renesas,scif";
! 1048: reg = <0 0xe6c40000 0 64>;
! 1049: interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
! 1050: clocks = <&cpg CPG_MOD 203>,
! 1051: <&cpg CPG_CORE R8A77990_CLK_S3D1C>,
! 1052: <&scif_clk>;
! 1053: clock-names = "fck", "brg_int", "scif_clk";
! 1054: dmas = <&dmac0 0x59>, <&dmac0 0x58>;
! 1055: dma-names = "tx", "rx";
! 1056: power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
! 1057: resets = <&cpg 203>;
! 1058: status = "disabled";
! 1059: };
! 1060:
! 1061: scif5: serial@e6f30000 {
! 1062: compatible = "renesas,scif-r8a77990",
! 1063: "renesas,rcar-gen3-scif", "renesas,scif";
! 1064: reg = <0 0xe6f30000 0 64>;
! 1065: interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
! 1066: clocks = <&cpg CPG_MOD 202>,
! 1067: <&cpg CPG_CORE R8A77990_CLK_S3D1C>,
! 1068: <&scif_clk>;
! 1069: clock-names = "fck", "brg_int", "scif_clk";
! 1070: dmas = <&dmac0 0x5b>, <&dmac0 0x5a>;
! 1071: dma-names = "tx", "rx";
! 1072: power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
! 1073: resets = <&cpg 202>;
! 1074: status = "disabled";
! 1075: };
! 1076:
1.1.1.2 jmcneill 1077: msiof0: spi@e6e90000 {
1078: compatible = "renesas,msiof-r8a77990",
1079: "renesas,rcar-gen3-msiof";
1080: reg = <0 0xe6e90000 0 0x0064>;
1081: interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
1082: clocks = <&cpg CPG_MOD 211>;
1.1.1.3 ! jmcneill 1083: dmas = <&dmac1 0x41>, <&dmac1 0x40>,
! 1084: <&dmac2 0x41>, <&dmac2 0x40>;
! 1085: dma-names = "tx", "rx", "tx", "rx";
1.1.1.2 jmcneill 1086: power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1087: resets = <&cpg 211>;
1088: #address-cells = <1>;
1089: #size-cells = <0>;
1090: status = "disabled";
1091: };
1092:
1093: msiof1: spi@e6ea0000 {
1094: compatible = "renesas,msiof-r8a77990",
1095: "renesas,rcar-gen3-msiof";
1096: reg = <0 0xe6ea0000 0 0x0064>;
1097: interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
1098: clocks = <&cpg CPG_MOD 210>;
1.1.1.3 ! jmcneill 1099: dmas = <&dmac1 0x43>, <&dmac1 0x42>,
! 1100: <&dmac2 0x43>, <&dmac2 0x42>;
! 1101: dma-names = "tx", "rx", "tx", "rx";
1.1.1.2 jmcneill 1102: power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1103: resets = <&cpg 210>;
1104: #address-cells = <1>;
1105: #size-cells = <0>;
1106: status = "disabled";
1107: };
1108:
1109: msiof2: spi@e6c00000 {
1110: compatible = "renesas,msiof-r8a77990",
1111: "renesas,rcar-gen3-msiof";
1112: reg = <0 0xe6c00000 0 0x0064>;
1113: interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
1114: clocks = <&cpg CPG_MOD 209>;
1.1.1.3 ! jmcneill 1115: dmas = <&dmac0 0x45>, <&dmac0 0x44>;
! 1116: dma-names = "tx", "rx";
1.1.1.2 jmcneill 1117: power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1118: resets = <&cpg 209>;
1119: #address-cells = <1>;
1120: #size-cells = <0>;
1121: status = "disabled";
1122: };
1123:
1124: msiof3: spi@e6c10000 {
1125: compatible = "renesas,msiof-r8a77990",
1126: "renesas,rcar-gen3-msiof";
1127: reg = <0 0xe6c10000 0 0x0064>;
1128: interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>;
1129: clocks = <&cpg CPG_MOD 208>;
1.1.1.3 ! jmcneill 1130: dmas = <&dmac0 0x47>, <&dmac0 0x46>;
! 1131: dma-names = "tx", "rx";
1.1.1.2 jmcneill 1132: power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1133: resets = <&cpg 208>;
1134: #address-cells = <1>;
1135: #size-cells = <0>;
1136: status = "disabled";
1137: };
1138:
1139: vin4: video@e6ef4000 {
1140: compatible = "renesas,vin-r8a77990";
1141: reg = <0 0xe6ef4000 0 0x1000>;
1142: interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
1143: clocks = <&cpg CPG_MOD 807>;
1144: power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1145: resets = <&cpg 807>;
1146: renesas,id = <4>;
1147: status = "disabled";
1148:
1149: ports {
1150: #address-cells = <1>;
1151: #size-cells = <0>;
1152:
1153: port@1 {
1.1.1.3 ! jmcneill 1154: #address-cells = <1>;
! 1155: #size-cells = <0>;
! 1156:
1.1.1.2 jmcneill 1157: reg = <1>;
1158:
1.1.1.3 ! jmcneill 1159: vin4csi40: endpoint@2 {
! 1160: reg = <2>;
1.1.1.2 jmcneill 1161: remote-endpoint= <&csi40vin4>;
1162: };
1163: };
1164: };
1165: };
1166:
1167: vin5: video@e6ef5000 {
1168: compatible = "renesas,vin-r8a77990";
1169: reg = <0 0xe6ef5000 0 0x1000>;
1170: interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
1171: clocks = <&cpg CPG_MOD 806>;
1172: power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1173: resets = <&cpg 806>;
1174: renesas,id = <5>;
1175: status = "disabled";
1176:
1177: ports {
1178: #address-cells = <1>;
1179: #size-cells = <0>;
1180:
1181: port@1 {
1.1.1.3 ! jmcneill 1182: #address-cells = <1>;
! 1183: #size-cells = <0>;
! 1184:
1.1.1.2 jmcneill 1185: reg = <1>;
1186:
1.1.1.3 ! jmcneill 1187: vin5csi40: endpoint@2 {
! 1188: reg = <2>;
1.1.1.2 jmcneill 1189: remote-endpoint= <&csi40vin5>;
1190: };
1191: };
1192: };
1193: };
1194:
1.1.1.3 ! jmcneill 1195: rcar_sound: sound@ec500000 {
! 1196: /*
! 1197: * #sound-dai-cells is required
! 1198: *
! 1199: * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
! 1200: * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>;
! 1201: */
! 1202: /*
! 1203: * #clock-cells is required for audio_clkout0/1/2/3
! 1204: *
! 1205: * clkout : #clock-cells = <0>; <&rcar_sound>;
! 1206: * clkout0/1/2/3: #clock-cells = <1>; <&rcar_sound N>;
! 1207: */
! 1208: compatible = "renesas,rcar_sound-r8a77990", "renesas,rcar_sound-gen3";
! 1209: reg = <0 0xec500000 0 0x1000>, /* SCU */
! 1210: <0 0xec5a0000 0 0x100>, /* ADG */
! 1211: <0 0xec540000 0 0x1000>, /* SSIU */
! 1212: <0 0xec541000 0 0x280>, /* SSI */
! 1213: <0 0xec760000 0 0x200>; /* Audio DMAC peri peri*/
! 1214: reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
! 1215:
! 1216: clocks = <&cpg CPG_MOD 1005>,
! 1217: <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
! 1218: <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
! 1219: <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
! 1220: <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
! 1221: <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
! 1222: <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
! 1223: <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
! 1224: <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
! 1225: <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
! 1226: <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
! 1227: <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
! 1228: <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
! 1229: <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
! 1230: <&audio_clk_a>, <&audio_clk_b>,
! 1231: <&audio_clk_c>,
! 1232: <&cpg CPG_CORE R8A77990_CLK_ZA2>;
! 1233: clock-names = "ssi-all",
! 1234: "ssi.9", "ssi.8", "ssi.7", "ssi.6",
! 1235: "ssi.5", "ssi.4", "ssi.3", "ssi.2",
! 1236: "ssi.1", "ssi.0",
! 1237: "src.9", "src.8", "src.7", "src.6",
! 1238: "src.5", "src.4", "src.3", "src.2",
! 1239: "src.1", "src.0",
! 1240: "mix.1", "mix.0",
! 1241: "ctu.1", "ctu.0",
! 1242: "dvc.0", "dvc.1",
! 1243: "clk_a", "clk_b", "clk_c", "clk_i";
! 1244: power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
! 1245: resets = <&cpg 1005>,
! 1246: <&cpg 1006>, <&cpg 1007>,
! 1247: <&cpg 1008>, <&cpg 1009>,
! 1248: <&cpg 1010>, <&cpg 1011>,
! 1249: <&cpg 1012>, <&cpg 1013>,
! 1250: <&cpg 1014>, <&cpg 1015>;
! 1251: reset-names = "ssi-all",
! 1252: "ssi.9", "ssi.8", "ssi.7", "ssi.6",
! 1253: "ssi.5", "ssi.4", "ssi.3", "ssi.2",
! 1254: "ssi.1", "ssi.0";
! 1255: status = "disabled";
! 1256:
! 1257: rcar_sound,dvc {
! 1258: dvc0: dvc-0 {
! 1259: dmas = <&audma0 0xbc>;
! 1260: dma-names = "tx";
! 1261: };
! 1262: dvc1: dvc-1 {
! 1263: dmas = <&audma0 0xbe>;
! 1264: dma-names = "tx";
! 1265: };
! 1266: };
! 1267:
! 1268: rcar_sound,mix {
! 1269: mix0: mix-0 { };
! 1270: mix1: mix-1 { };
! 1271: };
! 1272:
! 1273: rcar_sound,ctu {
! 1274: ctu00: ctu-0 { };
! 1275: ctu01: ctu-1 { };
! 1276: ctu02: ctu-2 { };
! 1277: ctu03: ctu-3 { };
! 1278: ctu10: ctu-4 { };
! 1279: ctu11: ctu-5 { };
! 1280: ctu12: ctu-6 { };
! 1281: ctu13: ctu-7 { };
! 1282: };
! 1283:
! 1284: rcar_sound,src {
! 1285: src0: src-0 {
! 1286: interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>;
! 1287: dmas = <&audma0 0x85>, <&audma0 0x9a>;
! 1288: dma-names = "rx", "tx";
! 1289: };
! 1290: src1: src-1 {
! 1291: interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
! 1292: dmas = <&audma0 0x87>, <&audma0 0x9c>;
! 1293: dma-names = "rx", "tx";
! 1294: };
! 1295: src2: src-2 {
! 1296: interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
! 1297: dmas = <&audma0 0x89>, <&audma0 0x9e>;
! 1298: dma-names = "rx", "tx";
! 1299: };
! 1300: src3: src-3 {
! 1301: interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
! 1302: dmas = <&audma0 0x8b>, <&audma0 0xa0>;
! 1303: dma-names = "rx", "tx";
! 1304: };
! 1305: src4: src-4 {
! 1306: interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
! 1307: dmas = <&audma0 0x8d>, <&audma0 0xb0>;
! 1308: dma-names = "rx", "tx";
! 1309: };
! 1310: src5: src-5 {
! 1311: interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
! 1312: dmas = <&audma0 0x8f>, <&audma0 0xb2>;
! 1313: dma-names = "rx", "tx";
! 1314: };
! 1315: src6: src-6 {
! 1316: interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
! 1317: dmas = <&audma0 0x91>, <&audma0 0xb4>;
! 1318: dma-names = "rx", "tx";
! 1319: };
! 1320: src7: src-7 {
! 1321: interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>;
! 1322: dmas = <&audma0 0x93>, <&audma0 0xb6>;
! 1323: dma-names = "rx", "tx";
! 1324: };
! 1325: src8: src-8 {
! 1326: interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
! 1327: dmas = <&audma0 0x95>, <&audma0 0xb8>;
! 1328: dma-names = "rx", "tx";
! 1329: };
! 1330: src9: src-9 {
! 1331: interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>;
! 1332: dmas = <&audma0 0x97>, <&audma0 0xba>;
! 1333: dma-names = "rx", "tx";
! 1334: };
! 1335: };
! 1336:
! 1337: rcar_sound,ssi {
! 1338: ssi0: ssi-0 {
! 1339: interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
! 1340: dmas = <&audma0 0x01>, <&audma0 0x02>,
! 1341: <&audma0 0x15>, <&audma0 0x16>;
! 1342: dma-names = "rx", "tx", "rxu", "txu";
! 1343: };
! 1344: ssi1: ssi-1 {
! 1345: interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
! 1346: dmas = <&audma0 0x03>, <&audma0 0x04>,
! 1347: <&audma0 0x49>, <&audma0 0x4a>;
! 1348: dma-names = "rx", "tx", "rxu", "txu";
! 1349: };
! 1350: ssi2: ssi-2 {
! 1351: interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
! 1352: dmas = <&audma0 0x05>, <&audma0 0x06>,
! 1353: <&audma0 0x63>, <&audma0 0x64>;
! 1354: dma-names = "rx", "tx", "rxu", "txu";
! 1355: };
! 1356: ssi3: ssi-3 {
! 1357: interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
! 1358: dmas = <&audma0 0x07>, <&audma0 0x08>,
! 1359: <&audma0 0x6f>, <&audma0 0x70>;
! 1360: dma-names = "rx", "tx", "rxu", "txu";
! 1361: };
! 1362: ssi4: ssi-4 {
! 1363: interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
! 1364: dmas = <&audma0 0x09>, <&audma0 0x0a>,
! 1365: <&audma0 0x71>, <&audma0 0x72>;
! 1366: dma-names = "rx", "tx", "rxu", "txu";
! 1367: };
! 1368: ssi5: ssi-5 {
! 1369: interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
! 1370: dmas = <&audma0 0x0b>, <&audma0 0x0c>,
! 1371: <&audma0 0x73>, <&audma0 0x74>;
! 1372: dma-names = "rx", "tx", "rxu", "txu";
! 1373: };
! 1374: ssi6: ssi-6 {
! 1375: interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
! 1376: dmas = <&audma0 0x0d>, <&audma0 0x0e>,
! 1377: <&audma0 0x75>, <&audma0 0x76>;
! 1378: dma-names = "rx", "tx", "rxu", "txu";
! 1379: };
! 1380: ssi7: ssi-7 {
! 1381: interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
! 1382: dmas = <&audma0 0x0f>, <&audma0 0x10>,
! 1383: <&audma0 0x79>, <&audma0 0x7a>;
! 1384: dma-names = "rx", "tx", "rxu", "txu";
! 1385: };
! 1386: ssi8: ssi-8 {
! 1387: interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
! 1388: dmas = <&audma0 0x11>, <&audma0 0x12>,
! 1389: <&audma0 0x7b>, <&audma0 0x7c>;
! 1390: dma-names = "rx", "tx", "rxu", "txu";
! 1391: };
! 1392: ssi9: ssi-9 {
! 1393: interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
! 1394: dmas = <&audma0 0x13>, <&audma0 0x14>,
! 1395: <&audma0 0x7d>, <&audma0 0x7e>;
! 1396: dma-names = "rx", "tx", "rxu", "txu";
! 1397: };
! 1398: };
! 1399: };
! 1400:
! 1401: audma0: dma-controller@ec700000 {
! 1402: compatible = "renesas,dmac-r8a77990",
! 1403: "renesas,rcar-dmac";
! 1404: reg = <0 0xec700000 0 0x10000>;
! 1405: interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH
! 1406: GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH
! 1407: GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH
! 1408: GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH
! 1409: GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH
! 1410: GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH
! 1411: GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH
! 1412: GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH
! 1413: GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH
! 1414: GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH
! 1415: GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH
! 1416: GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH
! 1417: GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH
! 1418: GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH
! 1419: GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH
! 1420: GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH
! 1421: GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>;
! 1422: interrupt-names = "error",
! 1423: "ch0", "ch1", "ch2", "ch3",
! 1424: "ch4", "ch5", "ch6", "ch7",
! 1425: "ch8", "ch9", "ch10", "ch11",
! 1426: "ch12", "ch13", "ch14", "ch15";
! 1427: clocks = <&cpg CPG_MOD 502>;
! 1428: clock-names = "fck";
! 1429: power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
! 1430: resets = <&cpg 502>;
! 1431: #dma-cells = <1>;
! 1432: dma-channels = <16>;
! 1433: iommus = <&ipmmu_mp 0>, <&ipmmu_mp 1>,
! 1434: <&ipmmu_mp 2>, <&ipmmu_mp 3>,
! 1435: <&ipmmu_mp 4>, <&ipmmu_mp 5>,
! 1436: <&ipmmu_mp 6>, <&ipmmu_mp 7>,
! 1437: <&ipmmu_mp 8>, <&ipmmu_mp 9>,
! 1438: <&ipmmu_mp 10>, <&ipmmu_mp 11>,
! 1439: <&ipmmu_mp 12>, <&ipmmu_mp 13>,
! 1440: <&ipmmu_mp 14>, <&ipmmu_mp 15>;
! 1441: };
! 1442:
1.1.1.2 jmcneill 1443: xhci0: usb@ee000000 {
1444: compatible = "renesas,xhci-r8a77990",
1445: "renesas,rcar-gen3-xhci";
1446: reg = <0 0xee000000 0 0xc00>;
1447: interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
1448: clocks = <&cpg CPG_MOD 328>;
1449: power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1450: resets = <&cpg 328>;
1451: status = "disabled";
1452: };
1453:
1.1.1.3 ! jmcneill 1454: usb3_peri0: usb@ee020000 {
! 1455: compatible = "renesas,r8a77990-usb3-peri",
! 1456: "renesas,rcar-gen3-usb3-peri";
! 1457: reg = <0 0xee020000 0 0x400>;
! 1458: interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>;
! 1459: clocks = <&cpg CPG_MOD 328>;
! 1460: power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
! 1461: resets = <&cpg 328>;
! 1462: status = "disabled";
! 1463: };
! 1464:
1.1.1.2 jmcneill 1465: ohci0: usb@ee080000 {
1466: compatible = "generic-ohci";
1467: reg = <0 0xee080000 0 0x100>;
1468: interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1469: clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
1470: phys = <&usb2_phy0>;
1471: phy-names = "usb";
1472: power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1473: resets = <&cpg 703>, <&cpg 704>;
1474: status = "disabled";
1475: };
1476:
1477: ehci0: usb@ee080100 {
1478: compatible = "generic-ehci";
1479: reg = <0 0xee080100 0 0x100>;
1480: interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1481: clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
1482: phys = <&usb2_phy0>;
1483: phy-names = "usb";
1484: companion = <&ohci0>;
1485: power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1486: resets = <&cpg 703>, <&cpg 704>;
1487: status = "disabled";
1488: };
1489:
1490: usb2_phy0: usb-phy@ee080200 {
1491: compatible = "renesas,usb2-phy-r8a77990",
1492: "renesas,rcar-gen3-usb2-phy";
1493: reg = <0 0xee080200 0 0x700>;
1494: interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1495: clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
1496: power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1497: resets = <&cpg 703>, <&cpg 704>;
1498: #phy-cells = <0>;
1499: status = "disabled";
1500: };
1501:
1.1.1.3 ! jmcneill 1502: sdhi0: sd@ee100000 {
! 1503: compatible = "renesas,sdhi-r8a77990",
! 1504: "renesas,rcar-gen3-sdhi";
! 1505: reg = <0 0xee100000 0 0x2000>;
! 1506: interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
! 1507: clocks = <&cpg CPG_MOD 314>;
! 1508: max-frequency = <200000000>;
! 1509: power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
! 1510: resets = <&cpg 314>;
! 1511: status = "disabled";
! 1512: };
! 1513:
! 1514: sdhi1: sd@ee120000 {
! 1515: compatible = "renesas,sdhi-r8a77990",
! 1516: "renesas,rcar-gen3-sdhi";
! 1517: reg = <0 0xee120000 0 0x2000>;
! 1518: interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
! 1519: clocks = <&cpg CPG_MOD 313>;
! 1520: max-frequency = <200000000>;
! 1521: power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
! 1522: resets = <&cpg 313>;
! 1523: status = "disabled";
! 1524: };
! 1525:
! 1526: sdhi3: sd@ee160000 {
! 1527: compatible = "renesas,sdhi-r8a77990",
! 1528: "renesas,rcar-gen3-sdhi";
! 1529: reg = <0 0xee160000 0 0x2000>;
! 1530: interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
! 1531: clocks = <&cpg CPG_MOD 311>;
! 1532: max-frequency = <200000000>;
! 1533: power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
! 1534: resets = <&cpg 311>;
! 1535: status = "disabled";
! 1536: };
! 1537:
1.1 jmcneill 1538: gic: interrupt-controller@f1010000 {
1539: compatible = "arm,gic-400";
1540: #interrupt-cells = <3>;
1541: #address-cells = <0>;
1542: interrupt-controller;
1543: reg = <0x0 0xf1010000 0 0x1000>,
1544: <0x0 0xf1020000 0 0x20000>,
1545: <0x0 0xf1040000 0 0x20000>,
1546: <0x0 0xf1060000 0 0x20000>;
1547: interrupts = <GIC_PPI 9
1.1.1.2 jmcneill 1548: (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
1.1 jmcneill 1549: clocks = <&cpg CPG_MOD 408>;
1550: clock-names = "clk";
1.1.1.2 jmcneill 1551: power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1.1 jmcneill 1552: resets = <&cpg 408>;
1553: };
1554:
1.1.1.3 ! jmcneill 1555: pciec0: pcie@fe000000 {
! 1556: compatible = "renesas,pcie-r8a77990",
! 1557: "renesas,pcie-rcar-gen3";
! 1558: reg = <0 0xfe000000 0 0x80000>;
! 1559: #address-cells = <3>;
! 1560: #size-cells = <2>;
! 1561: bus-range = <0x00 0xff>;
! 1562: device_type = "pci";
! 1563: ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000
! 1564: 0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000
! 1565: 0x02000000 0 0x30000000 0 0x30000000 0 0x08000000
! 1566: 0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
! 1567: /* Map all possible DDR as inbound ranges */
! 1568: dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x40000000>;
! 1569: interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
! 1570: <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
! 1571: <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
! 1572: #interrupt-cells = <1>;
! 1573: interrupt-map-mask = <0 0 0 0>;
! 1574: interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
! 1575: clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>;
! 1576: clock-names = "pcie", "pcie_bus";
! 1577: power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
! 1578: resets = <&cpg 319>;
! 1579: status = "disabled";
! 1580: };
! 1581:
1.1.1.2 jmcneill 1582: vspb0: vsp@fe960000 {
1583: compatible = "renesas,vsp2";
1584: reg = <0 0xfe960000 0 0x8000>;
1585: interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>;
1586: clocks = <&cpg CPG_MOD 626>;
1587: power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1588: resets = <&cpg 626>;
1589: renesas,fcp = <&fcpvb0>;
1590: };
1591:
1592: fcpvb0: fcp@fe96f000 {
1593: compatible = "renesas,fcpv";
1594: reg = <0 0xfe96f000 0 0x200>;
1595: clocks = <&cpg CPG_MOD 607>;
1596: power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1597: resets = <&cpg 607>;
1598: iommus = <&ipmmu_vp0 5>;
1599: };
1600:
1601: vspi0: vsp@fe9a0000 {
1602: compatible = "renesas,vsp2";
1603: reg = <0 0xfe9a0000 0 0x8000>;
1604: interrupts = <GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>;
1605: clocks = <&cpg CPG_MOD 631>;
1606: power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1607: resets = <&cpg 631>;
1608: renesas,fcp = <&fcpvi0>;
1609: };
1610:
1611: fcpvi0: fcp@fe9af000 {
1612: compatible = "renesas,fcpv";
1613: reg = <0 0xfe9af000 0 0x200>;
1614: clocks = <&cpg CPG_MOD 611>;
1615: power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1616: resets = <&cpg 611>;
1617: iommus = <&ipmmu_vp0 8>;
1618: };
1619:
1620: vspd0: vsp@fea20000 {
1621: compatible = "renesas,vsp2";
1622: reg = <0 0xfea20000 0 0x7000>;
1623: interrupts = <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>;
1624: clocks = <&cpg CPG_MOD 623>;
1625: power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1626: resets = <&cpg 623>;
1627: renesas,fcp = <&fcpvd0>;
1628: };
1629:
1630: fcpvd0: fcp@fea27000 {
1631: compatible = "renesas,fcpv";
1632: reg = <0 0xfea27000 0 0x200>;
1633: clocks = <&cpg CPG_MOD 603>;
1634: power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1635: resets = <&cpg 603>;
1636: iommus = <&ipmmu_vi0 8>;
1637: };
1638:
1639: vspd1: vsp@fea28000 {
1640: compatible = "renesas,vsp2";
1641: reg = <0 0xfea28000 0 0x7000>;
1642: interrupts = <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>;
1643: clocks = <&cpg CPG_MOD 622>;
1644: power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1645: resets = <&cpg 622>;
1646: renesas,fcp = <&fcpvd1>;
1647: };
1648:
1649: fcpvd1: fcp@fea2f000 {
1650: compatible = "renesas,fcpv";
1651: reg = <0 0xfea2f000 0 0x200>;
1652: clocks = <&cpg CPG_MOD 602>;
1653: power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1654: resets = <&cpg 602>;
1655: iommus = <&ipmmu_vi0 9>;
1656: };
1657:
1658: csi40: csi2@feaa0000 {
1659: compatible = "renesas,r8a77990-csi2", "renesas,rcar-gen3-csi2";
1660: reg = <0 0xfeaa0000 0 0x10000>;
1661: interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
1662: clocks = <&cpg CPG_MOD 716>;
1663: power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1664: resets = <&cpg 716>;
1665: status = "disabled";
1666:
1667: ports {
1668: #address-cells = <1>;
1669: #size-cells = <0>;
1670:
1671: port@1 {
1672: #address-cells = <1>;
1673: #size-cells = <0>;
1674:
1675: reg = <1>;
1676:
1677: csi40vin4: endpoint@0 {
1678: reg = <0>;
1679: remote-endpoint = <&vin4csi40>;
1680: };
1681: csi40vin5: endpoint@1 {
1682: reg = <1>;
1683: remote-endpoint = <&vin5csi40>;
1684: };
1685: };
1686: };
1687: };
1688:
1689: du: display@feb00000 {
1690: compatible = "renesas,du-r8a77990";
1691: reg = <0 0xfeb00000 0 0x80000>;
1692: interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
1693: <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
1694: clocks = <&cpg CPG_MOD 724>,
1695: <&cpg CPG_MOD 723>;
1696: clock-names = "du.0", "du.1";
1697: vsps = <&vspd0 0 &vspd1 0>;
1698: status = "disabled";
1699:
1700: ports {
1701: #address-cells = <1>;
1702: #size-cells = <0>;
1703:
1704: port@0 {
1705: reg = <0>;
1706: du_out_rgb: endpoint {
1707: };
1708: };
1709:
1710: port@1 {
1711: reg = <1>;
1712: du_out_lvds0: endpoint {
1713: remote-endpoint = <&lvds0_in>;
1714: };
1715: };
1716:
1717: port@2 {
1718: reg = <2>;
1719: du_out_lvds1: endpoint {
1720: remote-endpoint = <&lvds1_in>;
1721: };
1722: };
1723: };
1724: };
1725:
1726: lvds0: lvds-encoder@feb90000 {
1727: compatible = "renesas,r8a77990-lvds";
1728: reg = <0 0xfeb90000 0 0x20>;
1729: clocks = <&cpg CPG_MOD 727>;
1730: power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1731: resets = <&cpg 727>;
1732: status = "disabled";
1733:
1734: ports {
1735: #address-cells = <1>;
1736: #size-cells = <0>;
1737:
1738: port@0 {
1739: reg = <0>;
1740: lvds0_in: endpoint {
1741: remote-endpoint = <&du_out_lvds0>;
1742: };
1743: };
1744:
1745: port@1 {
1746: reg = <1>;
1747: lvds0_out: endpoint {
1748: };
1749: };
1750: };
1751: };
1752:
1753: lvds1: lvds-encoder@feb90100 {
1754: compatible = "renesas,r8a77990-lvds";
1755: reg = <0 0xfeb90100 0 0x20>;
1756: clocks = <&cpg CPG_MOD 727>;
1757: power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1758: resets = <&cpg 726>;
1759: status = "disabled";
1760:
1761: ports {
1762: #address-cells = <1>;
1763: #size-cells = <0>;
1764:
1765: port@0 {
1766: reg = <0>;
1767: lvds1_in: endpoint {
1768: remote-endpoint = <&du_out_lvds1>;
1769: };
1770: };
1771:
1772: port@1 {
1773: reg = <1>;
1774: lvds1_out: endpoint {
1775: };
1776: };
1777: };
1778: };
1779:
1.1 jmcneill 1780: prr: chipid@fff00044 {
1781: compatible = "renesas,prr";
1782: reg = <0 0xfff00044 0 4>;
1783: };
1784: };
1785:
1.1.1.3 ! jmcneill 1786: thermal-zones {
! 1787: cpu-thermal {
! 1788: polling-delay-passive = <250>;
! 1789: polling-delay = <1000>;
! 1790: thermal-sensors = <&thermal>;
! 1791:
! 1792: trips {
! 1793: cpu-crit {
! 1794: temperature = <120000>;
! 1795: hysteresis = <2000>;
! 1796: type = "critical";
! 1797: };
! 1798: };
! 1799:
! 1800: cooling-maps {
! 1801: };
! 1802: };
! 1803: };
! 1804:
1.1 jmcneill 1805: timer {
1806: compatible = "arm,armv8-timer";
1.1.1.2 jmcneill 1807: interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
1808: <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
1809: <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
1810: <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
1.1 jmcneill 1811: };
1812: };