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1.1 jmcneill 1: /* Copyright (c) 2013-2016, The Linux Foundation. All rights reserved.
2: *
3: * This program is free software; you can redistribute it and/or modify
4: * it under the terms of the GNU General Public License version 2 and
5: * only version 2 as published by the Free Software Foundation.
6: *
7: * This program is distributed in the hope that it will be useful,
8: * but WITHOUT ANY WARRANTY; without even the implied warranty of
9: * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10: * GNU General Public License for more details.
11: */
12:
13: #include <dt-bindings/interrupt-controller/arm-gic.h>
14: #include <dt-bindings/clock/qcom,gcc-msm8994.h>
15:
16: / {
17: model = "Qualcomm Technologies, Inc. MSM 8992";
18: compatible = "qcom,msm8992";
19: // msm-id needed by bootloader for selecting correct blob
20: qcom,msm-id = <251 0>, <252 0>;
21: interrupt-parent = <&intc>;
22:
23: #address-cells = <2>;
24: #size-cells = <2>;
25:
26: chosen { };
27:
28: cpus {
29: #address-cells = <2>;
30: #size-cells = <0>;
31: cpu-map {
32: cluster0 {
33: core0 {
34: cpu = <&CPU0>;
35: };
36: };
37: };
38:
39: CPU0: cpu@0 {
40: device_type = "cpu";
41: compatible = "arm,cortex-a53", "arm,armv8";
42: reg = <0x0 0x0>;
43: next-level-cache = <&L2_0>;
44: L2_0: l2-cache {
45: compatible = "cache";
46: cache-level = <2>;
47: };
48: };
49: };
50:
51: timer {
52: compatible = "arm,armv8-timer";
53: interrupts = <GIC_PPI 2 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
54: <GIC_PPI 3 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
55: <GIC_PPI 4 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
56: <GIC_PPI 1 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
57: };
58:
59: xo_board: xo_board {
60: compatible = "fixed-clock";
61: #clock-cells = <0>;
62: clock-frequency = <19200000>;
63: };
64:
65: sleep_clk: sleep_clk {
66: compatible = "fixed-clock";
67: #clock-cells = <0>;
68: clock-frequency = <32768>;
69: };
70:
1.1.1.2 jmcneill 71: vreg_vph_pwr: vreg-vph-pwr {
72: compatible = "regulator-fixed";
73: status = "okay";
74: regulator-name = "vph-pwr";
75:
76: regulator-min-microvolt = <3600000>;
77: regulator-max-microvolt = <3600000>;
78:
79: regulator-always-on;
80: };
81:
82: sfpb_mutex: hwmutex {
83: compatible = "qcom,sfpb-mutex";
84: syscon = <&sfpb_mutex_regs 0x0 0x100>;
85: #hwlock-cells = <1>;
86: };
87:
88: smem {
89: compatible = "qcom,smem";
90: memory-region = <&smem_region>;
91: qcom,rpm-msg-ram = <&rpm_msg_ram>;
92: hwlocks = <&sfpb_mutex 3>;
93: };
94:
1.1 jmcneill 95: soc {
96: #address-cells = <1>;
97: #size-cells = <1>;
98: ranges = <0 0 0 0xffffffff>;
99: compatible = "simple-bus";
100:
101: intc: interrupt-controller@f9000000 {
102: compatible = "qcom,msm-qgic2";
103: interrupt-controller;
104: #interrupt-cells = <3>;
105: reg = <0xf9000000 0x1000>,
106: <0xf9002000 0x1000>;
107: };
108:
1.1.1.2 jmcneill 109: apcs: syscon@f900d000 {
110: compatible = "syscon";
111: reg = <0xf900d000 0x2000>;
112: };
113:
1.1 jmcneill 114: timer@f9020000 {
115: #address-cells = <1>;
116: #size-cells = <1>;
117: ranges;
118: compatible = "arm,armv7-timer-mem";
119: reg = <0xf9020000 0x1000>;
120:
121: frame@f9021000 {
122: frame-number = <0>;
123: interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
124: <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
125: reg = <0xf9021000 0x1000>,
126: <0xf9022000 0x1000>;
127: };
128:
129: frame@f9023000 {
130: frame-number = <1>;
131: interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
132: reg = <0xf9023000 0x1000>;
133: status = "disabled";
134: };
135:
136: frame@f9024000 {
137: frame-number = <2>;
138: interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
139: reg = <0xf9024000 0x1000>;
140: status = "disabled";
141: };
142:
143: frame@f9025000 {
144: frame-number = <3>;
145: interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
146: reg = <0xf9025000 0x1000>;
147: status = "disabled";
148: };
149:
150: frame@f9026000 {
151: frame-number = <4>;
152: interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
153: reg = <0xf9026000 0x1000>;
154: status = "disabled";
155: };
156:
157: frame@f9027000 {
158: frame-number = <5>;
159: interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
160: reg = <0xf9027000 0x1000>;
161: status = "disabled";
162: };
163:
164: frame@f9028000 {
165: frame-number = <6>;
166: interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
167: reg = <0xf9028000 0x1000>;
168: status = "disabled";
169: };
170: };
171:
172: restart@fc4ab000 {
173: compatible = "qcom,pshold";
174: reg = <0xfc4ab000 0x4>;
175: };
176:
177: msmgpio: pinctrl@fd510000 {
178: compatible = "qcom,msm8994-pinctrl";
179: reg = <0xfd510000 0x4000>;
180: interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>;
181: gpio-controller;
182: #gpio-cells = <2>;
183: interrupt-controller;
184: #interrupt-cells = <2>;
185: };
186:
187: blsp1_uart2: serial@f991e000 {
188: compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
189: reg = <0xf991e000 0x1000>;
190: interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_LOW>;
191: status = "disabled";
192: clock-names = "core", "iface";
193: clocks = <&clock_gcc GCC_BLSP1_UART2_APPS_CLK>,
194: <&clock_gcc GCC_BLSP1_AHB_CLK>;
195: };
196:
197: clock_gcc: clock-controller@fc400000 {
198: compatible = "qcom,gcc-msm8994";
199: #clock-cells = <1>;
200: #reset-cells = <1>;
201: #power-domain-cells = <1>;
202: reg = <0xfc400000 0x2000>;
203: };
1.1.1.2 jmcneill 204:
1.1.1.2.4.1! pgoyette 205: sdhci1: mmc@f9824900 {
! 206: compatible = "qcom,sdhci-msm-v4";
! 207: reg = <0xf9824900 0x1a0>, <0xf9824000 0x800>;
! 208: reg-names = "hc_mem", "core_mem";
! 209:
! 210: interrupts = <GIC_SPI 123 IRQ_TYPE_NONE>,
! 211: <GIC_SPI 138 IRQ_TYPE_NONE>;
! 212: interrupt-names = "hc_irq", "pwr_irq";
! 213:
! 214: clocks = <&clock_gcc GCC_SDCC1_APPS_CLK>,
! 215: <&clock_gcc GCC_SDCC1_AHB_CLK>;
! 216: clock-names = "core", "iface";
! 217:
! 218: pinctrl-names = "default", "sleep";
! 219: pinctrl-0 = <&sdc1_clk_on &sdc1_cmd_on &sdc1_data_on
! 220: &sdc1_rclk_on>;
! 221: pinctrl-1 = <&sdc1_clk_off &sdc1_cmd_off &sdc1_data_off
! 222: &sdc1_rclk_off>;
! 223:
! 224: regulator-always-on;
! 225: bus-width = <8>;
! 226: mmc-hs400-1_8v;
! 227: status = "okay";
! 228: };
! 229:
1.1.1.2 jmcneill 230: rpm_msg_ram: memory@fc428000 {
231: compatible = "qcom,rpm-msg-ram";
232: reg = <0xfc428000 0x4000>;
233: };
234:
235: sfpb_mutex_regs: syscon@fd484000 {
236: #address-cells = <1>;
237: #size-cells = <1>;
238: compatible = "syscon";
239: reg = <0xfd484000 0x400>;
240: };
1.1 jmcneill 241: };
242:
243: memory {
244: device_type = "memory";
245: reg = <0 0 0 0>; // bootloader will update
246: };
1.1.1.2 jmcneill 247:
248: reserved-memory {
249: #address-cells = <2>;
250: #size-cells = <2>;
251: ranges;
252:
253: smem_region: smem@6a00000 {
254: reg = <0x0 0x6a00000 0x0 0x200000>;
255: no-map;
256: };
257: };
258:
1.1.1.2.4.1! pgoyette 259: smd_rpm: smd {
! 260: compatible = "qcom,smd";
! 261: rpm {
! 262: interrupts = <GIC_SPI 168 IRQ_TYPE_EDGE_RISING>;
! 263: qcom,ipc = <&apcs 8 0>;
! 264: qcom,smd-edge = <15>;
! 265: qcom,local-pid = <0>;
! 266: qcom,remote-pid = <6>;
! 267:
! 268: rpm-requests {
! 269: compatible = "qcom,rpm-msm8994";
! 270: qcom,smd-channels = "rpm_requests";
! 271:
! 272: pm8994-regulators {
! 273: compatible = "qcom,rpm-pm8994-regulators";
! 274:
! 275: pm8994_s1: s1 {};
! 276: pm8994_s2: s2 {};
! 277: pm8994_s3: s3 {};
! 278: pm8994_s4: s4 {};
! 279: pm8994_s5: s5 {};
! 280: pm8994_s6: s6 {};
! 281: pm8994_s7: s7 {};
! 282:
! 283: pm8994_l1: l1 {};
! 284: pm8994_l2: l2 {};
! 285: pm8994_l3: l3 {};
! 286: pm8994_l4: l4 {};
! 287: pm8994_l6: l6 {};
! 288: pm8994_l8: l8 {};
! 289: pm8994_l9: l9 {};
! 290: pm8994_l10: l10 {};
! 291: pm8994_l11: l11 {};
! 292: pm8994_l12: l12 {};
! 293: pm8994_l13: l13 {};
! 294: pm8994_l14: l14 {};
! 295: pm8994_l15: l15 {};
! 296: pm8994_l16: l16 {};
! 297: pm8994_l17: l17 {};
! 298: pm8994_l18: l18 {};
! 299: pm8994_l19: l19 {};
! 300: pm8994_l20: l20 {};
! 301: pm8994_l21: l21 {};
! 302: pm8994_l22: l22 {};
! 303: pm8994_l23: l23 {};
! 304: pm8994_l24: l24 {};
! 305: pm8994_l25: l25 {};
! 306: pm8994_l26: l26 {};
! 307: pm8994_l27: l27 {};
! 308: pm8994_l28: l28 {};
! 309: pm8994_l29: l29 {};
! 310: pm8994_l30: l30 {};
! 311: pm8994_l31: l31 {};
! 312: pm8994_l32: l32 {};
! 313:
! 314: pm8994_lvs1: lvs1 {};
! 315: pm8994_lvs2: lvs2 {};
! 316: };
! 317: };
! 318: };
! 319: };
1.1 jmcneill 320: };
321:
322: #include "msm8992-pins.dtsi"