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===================================================================
RCS file: /ftp/cvs/cvsroot/src/sys/external/gpl2/dts/dist/arch/arm64/boot/dts/arm/foundation-v8-gicv3.dtsi,v
rcsdiff: /ftp/cvs/cvsroot/src/sys/external/gpl2/dts/dist/arch/arm64/boot/dts/arm/foundation-v8-gicv3.dtsi,v: warning: Unknown phrases like `commitid ...;' are present.
retrieving revision 1.1.1.2
retrieving revision 1.1.1.3
diff -u -p -r1.1.1.2 -r1.1.1.3
--- src/sys/external/gpl2/dts/dist/arch/arm64/boot/dts/arm/foundation-v8-gicv3.dtsi	2019/05/25 11:29:15	1.1.1.2
+++ src/sys/external/gpl2/dts/dist/arch/arm64/boot/dts/arm/foundation-v8-gicv3.dtsi	2021/11/07 16:50:09	1.1.1.3
@@ -8,9 +8,9 @@
 	gic: interrupt-controller@2f000000 {
 		compatible = "arm,gic-v3";
 		#interrupt-cells = <3>;
-		#address-cells = <2>;
-		#size-cells = <2>;
-		ranges;
+		#address-cells = <1>;
+		#size-cells = <1>;
+		ranges = <0x0 0x0 0x2f000000 0x100000>;
 		interrupt-controller;
 		reg =	<0x0 0x2f000000 0x0 0x10000>,
 			<0x0 0x2f100000 0x0 0x200000>,
@@ -19,10 +19,11 @@
 			<0x0 0x2c02f000 0x0 0x2000>;
 		interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;
 
-		its: its@2f020000 {
+		its: msi-controller@2f020000 {
 			compatible = "arm,gic-v3-its";
 			msi-controller;
-			reg = <0x0 0x2f020000 0x0 0x20000>;
+			#msi-cells = <1>;
+			reg = <0x20000 0x20000>;
 		};
 	};
 };