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Annotation of src/sys/external/gpl2/dts/dist/arch/arm64/boot/dts/amlogic/meson-gxl-mali.dtsi, Revision 1.1.1.2.2.1

1.1.1.2   jmcneill    1: // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
1.1       jmcneill    2: /*
                      3:  * Copyright (c) 2017 BayLibre SAS
                      4:  * Author: Neil Armstrong <narmstrong@baylibre.com>
                      5:  */
                      6:
                      7: &apb {
                      8:        mali: gpu@c0000 {
1.1.1.2.2.1! christos    9:                compatible = "amlogic,meson-gxl-mali", "arm,mali-450";
1.1       jmcneill   10:                reg = <0x0 0xc0000 0x0 0x40000>;
                     11:                interrupts = <GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH>,
                     12:                             <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>,
                     13:                             <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>,
                     14:                             <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>,
                     15:                             <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>,
                     16:                             <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>,
                     17:                             <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>,
                     18:                             <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>,
                     19:                             <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>,
                     20:                             <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
                     21:                interrupt-names = "gp", "gpmmu", "pp", "pmu",
                     22:                        "pp0", "ppmmu0", "pp1", "ppmmu1",
                     23:                        "pp2", "ppmmu2";
                     24:                clocks = <&clkc CLKID_CLK81>, <&clkc CLKID_MALI>;
                     25:                clock-names = "bus", "core";
                     26:
                     27:                /*
                     28:                 * Mali clocking is provided by two identical clock paths
                     29:                 * MALI_0 and MALI_1 muxed to a single clock by a glitch
                     30:                 * free mux to safely change frequency while running.
                     31:                 */
1.1.1.2   jmcneill   32:                assigned-clocks = <&clkc CLKID_GP0_PLL>,
                     33:                                  <&clkc CLKID_MALI_0_SEL>,
1.1       jmcneill   34:                                  <&clkc CLKID_MALI_0>,
                     35:                                  <&clkc CLKID_MALI>; /* Glitch free mux */
1.1.1.2   jmcneill   36:                assigned-clock-parents = <0>, /* Do Nothing */
                     37:                                         <&clkc CLKID_GP0_PLL>,
1.1       jmcneill   38:                                         <0>, /* Do Nothing */
                     39:                                         <&clkc CLKID_MALI_0>;
1.1.1.2   jmcneill   40:                assigned-clock-rates = <744000000>,
                     41:                                       <0>, /* Do Nothing */
                     42:                                       <744000000>,
1.1       jmcneill   43:                                       <0>; /* Do Nothing */
                     44:        };
                     45: };