Annotation of src/sys/external/gpl2/dts/dist/arch/arm/boot/dts/imx6ul-ccimx6ulsbcpro.dts, Revision 1.1.1.2
1.1 jmcneill 1: // SPDX-License-Identifier: GPL-2.0
2: /*
3: * Digi International's ConnectCore6UL SBC Pro board device tree source
4: *
5: * Copyright 2018 Digi International, Inc.
6: *
7: */
8:
9: /dts-v1/;
10: #include <dt-bindings/input/input.h>
11: #include <dt-bindings/interrupt-controller/irq.h>
12: #include "imx6ul.dtsi"
13: #include "imx6ul-ccimx6ulsom.dtsi"
14:
15: / {
16: model = "Digi International ConnectCore 6UL SBC Pro.";
17: compatible = "digi,ccimx6ulsbcpro", "digi,ccimx6ulsom", "fsl,imx6ul";
18:
19: lcd_backlight: backlight {
20: compatible = "pwm-backlight";
21: pwms = <&pwm5 0 50000>;
22: brightness-levels = <0 4 8 16 32 64 128 255>;
23: default-brightness-level = <6>;
24: status = "okay";
25: };
26:
1.1.1.2 ! jmcneill 27: panel {
! 28: compatible = "auo,g101evn010", "simple-panel";
! 29: power-supply = <&ldo4_ext>;
! 30: backlight = <&lcd_backlight>;
! 31:
! 32: port {
! 33: panel_in: endpoint {
! 34: remote-endpoint = <&display_out>;
! 35: };
! 36: };
! 37: };
! 38:
1.1 jmcneill 39: reg_usb_otg1_vbus: regulator-usb-otg1 {
40: compatible = "regulator-fixed";
41: regulator-name = "usb_otg1_vbus";
42: regulator-min-microvolt = <5000000>;
43: regulator-max-microvolt = <5000000>;
44: gpio = <&gpio1 4 GPIO_ACTIVE_HIGH>;
45: enable-active-high;
46: };
47: };
48:
49: &adc1 {
50: pinctrl-names = "default";
51: pinctrl-0 = <&pinctrl_adc1>;
52: status = "okay";
53: };
54:
55: &can1 {
56: pinctrl-names = "default";
57: pinctrl-0 = <&pinctrl_flexcan1>;
58: xceiver-supply = <&ext_3v3>;
59: status = "okay";
60: };
61:
62: /* CAN2 is multiplexed with UART2 RTS/CTS */
63: &can2 {
64: pinctrl-names = "default";
65: pinctrl-0 = <&pinctrl_flexcan2>;
66: xceiver-supply = <&ext_3v3>;
67: status = "disabled";
68: };
69:
70: &ecspi1 {
71: cs-gpios = <&gpio3 26 GPIO_ACTIVE_LOW>;
72: pinctrl-names = "default";
73: pinctrl-0 = <&pinctrl_ecspi1_master>;
74: status = "okay";
75: };
76:
77: &fec1 {
78: pinctrl-names = "default";
79: pinctrl-0 = <&pinctrl_enet1>;
80: phy-mode = "rmii";
81: phy-handle = <ðphy0>;
82: status = "okay";
83: };
84:
85: &fec2 {
86: pinctrl-names = "default";
87: pinctrl-0 = <&pinctrl_enet2 &pinctrl_enet2_mdio>;
88: phy-mode = "rmii";
89: phy-handle = <ðphy1>;
90: phy-reset-gpios = <&gpio5 6 GPIO_ACTIVE_LOW>;
91: phy-reset-duration = <26>;
92: status = "okay";
93:
94: mdio {
95: #address-cells = <1>;
96: #size-cells = <0>;
97:
98: ethphy0: ethernet-phy@0 {
99: compatible = "ethernet-phy-ieee802.3-c22";
100: smsc,disable-energy-detect;
101: reg = <0>;
102: };
103:
104: ethphy1: ethernet-phy@1 {
105: compatible = "ethernet-phy-ieee802.3-c22";
106: smsc,disable-energy-detect;
107: reg = <1>;
108: };
109: };
110: };
111:
112: &gpio5 {
113: emmc-usd-mux {
114: gpio-hog;
115: gpios = <1 GPIO_ACTIVE_LOW>;
116: output-high;
117: };
118: };
119:
1.1.1.2 ! jmcneill 120: &i2c1 {
! 121: touchscreen@14 {
! 122: compatible = "goodix,gt911";
! 123: reg = <0x14>;
! 124: pinctrl-names = "default";
! 125: pinctrl-0 = <&pinctrl_goodix_touch>;
! 126: interrupt-parent = <&gpio5>;
! 127: interrupts = <2 IRQ_TYPE_EDGE_RISING>;
! 128: irq-gpios = <&gpio5 2 GPIO_ACTIVE_HIGH>;
! 129: status = "okay";
! 130: };
! 131: };
! 132:
1.1 jmcneill 133: &lcdif {
134: pinctrl-names = "default";
135: pinctrl-0 = <&pinctrl_lcdif_dat0_17
136: &pinctrl_lcdif_clken
137: &pinctrl_lcdif_hvsync>;
138: lcd-supply = <&ldo4_ext>; /* BU90T82 LVDS bridge power */
139: status = "okay";
1.1.1.2 ! jmcneill 140:
! 141: port {
! 142: display_out: endpoint {
! 143: remote-endpoint = <&panel_in>;
! 144: };
! 145: };
1.1 jmcneill 146: };
147:
148: &ldo4_ext {
149: regulator-max-microvolt = <1800000>;
150: };
151:
152: &pwm1 {
153: status = "okay";
154: };
155:
156: &pwm2 {
157: status = "okay";
158: };
159:
160: &pwm3 {
161: status = "okay";
162: };
163:
164: &pwm4 {
165: pinctrl-names = "default";
166: pinctrl-0 = <&pinctrl_pwm4>;
167: status = "okay";
168: };
169:
170: &pwm5 {
171: pinctrl-names = "default";
172: pinctrl-0 = <&pinctrl_pwm5>;
173: status = "okay";
174: };
175:
176: &pwm6 {
177: status = "okay";
178: };
179:
180: &pwm7 {
181: status = "okay";
182: };
183:
184: &pwm8 {
185: status = "okay";
186: };
187:
188: &sai2 {
189: pinctrl-names = "default", "sleep";
190: pinctrl-0 = <&pinctrl_sai2>;
191: pinctrl-1 = <&pinctrl_sai2_sleep>;
192: assigned-clocks = <&clks IMX6UL_CLK_SAI2_SEL>,
193: <&clks IMX6UL_CLK_PLL4_AUDIO_DIV>,
194: <&clks IMX6UL_CLK_SAI2>;
195: assigned-clock-rates = <0>, <786432000>, <12288000>;
196: assigned-clock-parents = <&clks IMX6UL_CLK_PLL4_AUDIO_DIV>;
197: status = "okay";
198: };
199:
200: /* UART2 RTS/CTS muxed with CAN2 */
201: &uart2 {
202: pinctrl-names = "default";
203: pinctrl-0 = <&pinctrl_uart2_4wires>;
204: uart-has-rtscts;
205: status = "okay";
206: };
207:
208: /* UART3 RTS/CTS muxed with CAN 1 */
209: &uart3 {
210: pinctrl-names = "default";
211: pinctrl-0 = <&pinctrl_uart3_2wires>;
212: status = "okay";
213: };
214:
215: &uart5 {
216: pinctrl-names = "default";
217: pinctrl-0 = <&pinctrl_uart5>;
218: status = "okay";
219: };
220:
221: &usbotg1 {
222: dr_mode = "otg";
223: vbus-supply = <®_usb_otg1_vbus>;
224: pinctrl-0 = <&pinctrl_usbotg1>;
225: status = "okay";
226: };
227:
228: &usbotg2 {
229: dr_mode = "host";
230: disable-over-current;
231: status = "okay";
232: };
233:
234: /* USDHC2 (microSD conflicts with eMMC) */
235: &usdhc2 {
236: pinctrl-names = "default";
237: pinctrl-0 = <&pinctrl_usdhc2>;
238: no-1-8-v;
239: broken-cd; /* no carrier detect line (use polling) */
240: status = "okay";
241: };
242:
243: &iomuxc {
244: pinctrl_adc1: adc1grp {
245: fsl,pins = <
246: /* EXP_GPIO_2 -> GPIO1_3/ADC1_IN3 */
247: MX6UL_PAD_GPIO1_IO03__GPIO1_IO03 0xb0
248: >;
249: };
250:
251: pinctrl_ecspi1_master: ecspi1grp1 {
252: fsl,pins = <
253: MX6UL_PAD_LCD_DATA20__ECSPI1_SCLK 0x10b0
254: MX6UL_PAD_LCD_DATA22__ECSPI1_MOSI 0x10b0
255: MX6UL_PAD_LCD_DATA23__ECSPI1_MISO 0x10b0
256: MX6UL_PAD_LCD_DATA21__GPIO3_IO26 0x10b0
257: >;
258: };
259:
260: pinctrl_enet1: enet1grp {
261: fsl,pins = <
262: MX6UL_PAD_ENET1_RX_EN__ENET1_RX_EN 0x1b0b0
263: MX6UL_PAD_ENET1_RX_ER__ENET1_RX_ER 0x1b0b0
264: MX6UL_PAD_ENET1_RX_DATA0__ENET1_RDATA00 0x1b0b0
265: MX6UL_PAD_ENET1_RX_DATA1__ENET1_RDATA01 0x1b0b0
266: MX6UL_PAD_ENET1_TX_EN__ENET1_TX_EN 0x1b0b0
267: MX6UL_PAD_ENET1_TX_DATA0__ENET1_TDATA00 0x1b0b0
268: MX6UL_PAD_ENET1_TX_DATA1__ENET1_TDATA01 0x1b0b0
269: MX6UL_PAD_ENET1_TX_CLK__ENET1_REF_CLK1 0x40017051
270: >;
271: };
272:
273: pinctrl_enet2: enet2grp {
274: fsl,pins = <
275: MX6UL_PAD_ENET2_RX_EN__ENET2_RX_EN 0x1b0b0
276: MX6UL_PAD_ENET2_RX_ER__ENET2_RX_ER 0x1b0b0
277: MX6UL_PAD_ENET2_RX_DATA0__ENET2_RDATA00 0x1b0b0
278: MX6UL_PAD_ENET2_RX_DATA1__ENET2_RDATA01 0x1b0b0
279: MX6UL_PAD_ENET2_TX_EN__ENET2_TX_EN 0x1b0b0
280: MX6UL_PAD_ENET2_TX_DATA0__ENET2_TDATA00 0x1b0b0
281: MX6UL_PAD_ENET2_TX_DATA1__ENET2_TDATA01 0x1b0b0
282: MX6UL_PAD_ENET2_TX_CLK__ENET2_REF_CLK2 0x40017051
283: >;
284: };
285:
286: pinctrl_enet2_mdio: mdioenet2grp {
287: fsl,pins = <
288: MX6UL_PAD_GPIO1_IO07__ENET2_MDC 0x1b0b0
289: MX6UL_PAD_GPIO1_IO06__ENET2_MDIO 0x1b0b0
290: >;
291: };
292:
293: pinctrl_flexcan1: flexcan1grp{
294: fsl,pins = <
295: MX6UL_PAD_UART3_CTS_B__FLEXCAN1_TX 0x1b020
296: MX6UL_PAD_UART3_RTS_B__FLEXCAN1_RX 0x1b020
297: >;
298: };
299: pinctrl_flexcan2: flexcan2grp{
300: fsl,pins = <
301: MX6UL_PAD_UART2_CTS_B__FLEXCAN2_TX 0x1b020
302: MX6UL_PAD_UART2_RTS_B__FLEXCAN2_RX 0x1b020
303: >;
304: };
305:
1.1.1.2 ! jmcneill 306: pinctrl_goodix_touch: goodixgrp{
! 307: fsl,pins = <
! 308: MX6UL_PAD_SNVS_TAMPER2__GPIO5_IO02 0x1020
! 309: >;
! 310: };
! 311:
1.1 jmcneill 312: pinctrl_lcdif_dat0_17: lcdifdatgrp0-17 {
313: fsl,pins = <
314: MX6UL_PAD_LCD_DATA00__LCDIF_DATA00 0x79
315: MX6UL_PAD_LCD_DATA01__LCDIF_DATA01 0x79
316: MX6UL_PAD_LCD_DATA02__LCDIF_DATA02 0x79
317: MX6UL_PAD_LCD_DATA03__LCDIF_DATA03 0x79
318: MX6UL_PAD_LCD_DATA04__LCDIF_DATA04 0x79
319: MX6UL_PAD_LCD_DATA05__LCDIF_DATA05 0x79
320: MX6UL_PAD_LCD_DATA06__LCDIF_DATA06 0x79
321: MX6UL_PAD_LCD_DATA07__LCDIF_DATA07 0x79
322: MX6UL_PAD_LCD_DATA08__LCDIF_DATA08 0x79
323: MX6UL_PAD_LCD_DATA09__LCDIF_DATA09 0x79
324: MX6UL_PAD_LCD_DATA10__LCDIF_DATA10 0x79
325: MX6UL_PAD_LCD_DATA11__LCDIF_DATA11 0x79
326: MX6UL_PAD_LCD_DATA12__LCDIF_DATA12 0x79
327: MX6UL_PAD_LCD_DATA13__LCDIF_DATA13 0x79
328: MX6UL_PAD_LCD_DATA14__LCDIF_DATA14 0x79
329: MX6UL_PAD_LCD_DATA15__LCDIF_DATA15 0x79
330: MX6UL_PAD_LCD_DATA16__LCDIF_DATA16 0x79
331: MX6UL_PAD_LCD_DATA17__LCDIF_DATA17 0x79
332: >;
333: };
334:
335: pinctrl_lcdif_clken: lcdifctrlgrp1 {
336: fsl,pins = <
337: MX6UL_PAD_LCD_CLK__LCDIF_CLK 0x17050
338: MX6UL_PAD_LCD_ENABLE__LCDIF_ENABLE 0x79
339: >;
340: };
341:
342: pinctrl_lcdif_hvsync: lcdifctrlgrp2 {
343: fsl,pins = <
344: MX6UL_PAD_LCD_HSYNC__LCDIF_HSYNC 0x79
345: MX6UL_PAD_LCD_VSYNC__LCDIF_VSYNC 0x79
346: >;
347: };
348:
349: pinctrl_pwm4: pwm4grp {
350: fsl,pins = <
351: MX6UL_PAD_GPIO1_IO05__PWM4_OUT 0x110b0
352: >;
353: };
354:
355: pinctrl_pwm5: pwm5grp {
356: fsl,pins = <
357: MX6UL_PAD_NAND_DQS__PWM5_OUT 0x110b0
358: >;
359: };
360:
361: pinctrl_sai2: sai2grp {
362: fsl,pins = <
363: MX6UL_PAD_JTAG_TRST_B__SAI2_TX_DATA 0x11088
364: MX6UL_PAD_JTAG_TCK__SAI2_RX_DATA 0x11088
365: MX6UL_PAD_JTAG_TMS__SAI2_MCLK 0x17088
366: MX6UL_PAD_JTAG_TDI__SAI2_TX_BCLK 0x17088
367: MX6UL_PAD_JTAG_TDO__SAI2_TX_SYNC 0x17088
368: /* Interrupt */
369: MX6UL_PAD_SNVS_TAMPER7__GPIO5_IO07 0x10b0
370: >;
371: };
372:
373: pinctrl_sai2_sleep: sai2grp-sleep {
374: fsl,pins = <
375: MX6UL_PAD_JTAG_TRST_B__GPIO1_IO15 0x3000
376: MX6UL_PAD_JTAG_TCK__GPIO1_IO14 0x3000
377: MX6UL_PAD_JTAG_TMS__GPIO1_IO11 0x3000
378: MX6UL_PAD_JTAG_TDO__GPIO1_IO12 0x3000
379: /* Interrupt */
380: MX6UL_PAD_SNVS_TAMPER7__GPIO5_IO07 0x3000
381: >;
382: };
383:
384: pinctrl_uart2_4wires: uart2grp-4wires {
385: fsl,pins = <
386: MX6UL_PAD_UART2_TX_DATA__UART2_DCE_TX 0x1b0b1
387: MX6UL_PAD_UART2_RX_DATA__UART2_DCE_RX 0x1b0b1
388: MX6UL_PAD_UART2_CTS_B__UART2_DCE_CTS 0x1b0b1
389: MX6UL_PAD_UART2_RTS_B__UART2_DCE_RTS 0x1b0b1
390: >;
391: };
392:
393: pinctrl_uart3_2wires: uart3grp-2wires {
394: fsl,pins = <
395: MX6UL_PAD_UART3_TX_DATA__UART3_DCE_TX 0x1b0b1
396: MX6UL_PAD_UART3_RX_DATA__UART3_DCE_RX 0x1b0b1
397: >;
398: };
399:
400: pinctrl_uart5: uart5grp {
401: fsl,pins = <
402: MX6UL_PAD_UART5_TX_DATA__UART5_DCE_TX 0x1b0b1
403: MX6UL_PAD_UART5_RX_DATA__UART5_DCE_RX 0x1b0b1
404: >;
405: };
406:
407: pinctrl_usdhc2: usdhc2grp {
408: fsl,pins = <
409: MX6UL_PAD_CSI_HSYNC__USDHC2_CMD 0x17059
410: MX6UL_PAD_CSI_VSYNC__USDHC2_CLK 0x10039
411: MX6UL_PAD_CSI_DATA00__USDHC2_DATA0 0x17059
412: MX6UL_PAD_CSI_DATA01__USDHC2_DATA1 0x17059
413: MX6UL_PAD_CSI_DATA02__USDHC2_DATA2 0x17059
414: MX6UL_PAD_CSI_DATA03__USDHC2_DATA3 0x17059
415: /* Mux selector between eMMC/SD# */
416: MX6UL_PAD_SNVS_TAMPER1__GPIO5_IO01 0x79
417: >;
418: };
419:
420: pinctrl_usbotg1: usbotg1grp {
421: fsl,pins = <
422: MX6UL_PAD_GPIO1_IO00__ANATOP_OTG1_ID 0x17059
423: MX6UL_PAD_GPIO1_IO04__GPIO1_IO04 0x17059
424: MX6UL_PAD_GPIO1_IO01__USB_OTG1_OC 0x17059
425: >;
426: };
427: };
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