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Annotation of src/sys/external/gpl2/dts/dist/arch/arm/boot/dts/imx6qdl-sr-som.dtsi, Revision 1.1.1.1.4.1

1.1       jmcneill    1: /*
                      2:  * Copyright (C) 2013,2014 Russell King
                      3:  *
                      4:  * This file is dual-licensed: you can use it either under the terms
                      5:  * of the GPL or the X11 license, at your option. Note that this dual
                      6:  * licensing only applies to this file, and not this project as a
                      7:  * whole.
                      8:  *
                      9:  *  a) This file is free software; you can redistribute it and/or
                     10:  *     modify it under the terms of the GNU General Public License
                     11:  *     version 2 as published by the Free Software Foundation.
                     12:  *
                     13:  *     This file is distributed in the hope that it will be useful,
                     14:  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
                     15:  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
                     16:  *     GNU General Public License for more details.
                     17:  *
                     18:  * Or, alternatively,
                     19:  *
                     20:  *  b) Permission is hereby granted, free of charge, to any person
                     21:  *     obtaining a copy of this software and associated documentation
                     22:  *     files (the "Software"), to deal in the Software without
                     23:  *     restriction, including without limitation the rights to use,
                     24:  *     copy, modify, merge, publish, distribute, sublicense, and/or
                     25:  *     sell copies of the Software, and to permit persons to whom the
                     26:  *     Software is furnished to do so, subject to the following
                     27:  *     conditions:
                     28:  *
                     29:  *     The above copyright notice and this permission notice shall be
                     30:  *     included in all copies or substantial portions of the Software.
                     31:  *
                     32:  *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
                     33:  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
                     34:  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
                     35:  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
                     36:  *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
                     37:  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
                     38:  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
                     39:  *     OTHER DEALINGS IN THE SOFTWARE.
                     40:  */
                     41: #include <dt-bindings/gpio/gpio.h>
                     42:
                     43: / {
                     44:        vcc_3v3: regulator-vcc-3v3 {
                     45:                compatible = "regulator-fixed";
                     46:                regulator-always-on;
                     47:                regulator-name = "vcc_3v3";
                     48:                regulator-min-microvolt = <3300000>;
                     49:                regulator-max-microvolt = <3300000>;
                     50:        };
                     51: };
                     52:
                     53: &fec {
                     54:        pinctrl-names = "default";
                     55:        pinctrl-0 = <&pinctrl_microsom_enet_ar8035>;
1.1.1.1.4.1! christos   56:        phy-mode = "rgmii-id";
1.1       jmcneill   57:        phy-reset-duration = <2>;
                     58:        phy-reset-gpios = <&gpio4 15 GPIO_ACTIVE_LOW>;
                     59:        status = "okay";
                     60: };
                     61:
                     62: &iomuxc {
                     63:        microsom {
                     64:                pinctrl_microsom_enet_ar8035: microsom-enet-ar8035 {
                     65:                        fsl,pins = <
                     66:                                MX6QDL_PAD_ENET_MDIO__ENET_MDIO         0x1b8b0
                     67:                                MX6QDL_PAD_ENET_MDC__ENET_MDC           0x1b0b0
                     68:                                /* AR8035 reset */
                     69:                                MX6QDL_PAD_KEY_ROW4__GPIO4_IO15         0x130b0
                     70:                                /* AR8035 interrupt */
                     71:                                MX6QDL_PAD_DI0_PIN2__GPIO4_IO18         0x1b0b0
                     72:                                /* GPIO16 -> AR8035 25MHz */
                     73:                                MX6QDL_PAD_GPIO_16__ENET_REF_CLK        0x4001b0b0
                     74:                                MX6QDL_PAD_RGMII_TXC__RGMII_TXC         0x13030
                     75:                                MX6QDL_PAD_RGMII_TD0__RGMII_TD0         0x1b030
                     76:                                MX6QDL_PAD_RGMII_TD1__RGMII_TD1         0x1b030
                     77:                                MX6QDL_PAD_RGMII_TD2__RGMII_TD2         0x1b030
                     78:                                MX6QDL_PAD_RGMII_TD3__RGMII_TD3         0x1b030
                     79:                                MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL   0x1b030
                     80:                                /* AR8035 CLK_25M --> ENET_REF_CLK (V22) */
                     81:                                MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK    0x0a0b1
                     82:                                /* AR8035 pin strapping: IO voltage: pull up */
                     83:                                MX6QDL_PAD_RGMII_RXC__RGMII_RXC         0x1b030
                     84:                                /* AR8035 pin strapping: PHYADDR#0: pull down */
                     85:                                MX6QDL_PAD_RGMII_RD0__RGMII_RD0         0x13030
                     86:                                /* AR8035 pin strapping: PHYADDR#1: pull down */
                     87:                                MX6QDL_PAD_RGMII_RD1__RGMII_RD1         0x13030
                     88:                                /* AR8035 pin strapping: MODE#1: pull up */
                     89:                                MX6QDL_PAD_RGMII_RD2__RGMII_RD2         0x1b030
                     90:                                /* AR8035 pin strapping: MODE#3: pull up */
                     91:                                MX6QDL_PAD_RGMII_RD3__RGMII_RD3         0x1b030
                     92:                                /* AR8035 pin strapping: MODE#0: pull down */
                     93:                                MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL   0x13030
                     94:
                     95:                                /*
                     96:                                 * As the RMII pins are also connected to RGMII
                     97:                                 * so that an AR8030 can be placed, set these
                     98:                                 * to high-z with the same pulls as above.
                     99:                                 * Use the GPIO settings to avoid changing the
                    100:                                 * input select registers.
                    101:                                 */
                    102:                                MX6QDL_PAD_ENET_CRS_DV__GPIO1_IO25      0x03000
                    103:                                MX6QDL_PAD_ENET_RXD0__GPIO1_IO27        0x03000
                    104:                                MX6QDL_PAD_ENET_RXD1__GPIO1_IO26        0x03000
                    105:                        >;
                    106:                };
                    107:
                    108:                pinctrl_microsom_uart1: microsom-uart1 {
                    109:                        fsl,pins = <
                    110:                                MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA    0x1b0b1
                    111:                                MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA    0x1b0b1
                    112:                        >;
                    113:                };
                    114:        };
                    115: };
                    116:
                    117: &uart1 {
                    118:        pinctrl-names = "default";
                    119:        pinctrl-0 = <&pinctrl_microsom_uart1>;
                    120:        status = "okay";
                    121: };