CVS log for src/sys/external/bsd/compiler_rt/dist/lib/builtins/arm/aeabi_cfcmp.S

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Pull up following revision(s) (requested by skrll in ticket #1329):

	lib/libc/arch/arm/gen/swapcontext.S: revision 1.18
	sys/external/bsd/compiler_rt/dist/lib/builtins/arm/divsi3.S: revision 1.2
	sys/external/bsd/compiler_rt/dist/lib/builtins/arm/divsi3.S: revision 1.3
	sys/external/bsd/compiler_rt/dist/lib/builtins/arm/aeabi_cfcmp.S: revision 1.2
	sys/external/bsd/compiler_rt/dist/lib/builtins/arm/aeabi_cfcmp.S: revision 1.3
	lib/libc/arch/arm/sys/__clone.S: revision 1.10
	lib/libc/arch/arm/sys/__clone.S: revision 1.11
	sys/external/bsd/compiler_rt/dist/lib/builtins/arm/modsi3.S: revision 1.2
	lib/libc/arch/arm/sys/__clone.S: revision 1.12
	sys/external/bsd/compiler_rt/dist/lib/builtins/arm/modsi3.S: revision 1.3
	lib/libc/arch/arm/sys/__clone.S: revision 1.13
	lib/libc/arch/arm/sys/__clone.S: revision 1.14
	sys/external/bsd/compiler_rt/dist/lib/builtins/arm/divmodsi4.S: revision 1.2
	sys/external/bsd/compiler_rt/dist/lib/builtins/arm/divmodsi4.S: revision 1.3
	lib/libc/arch/arm/gen/swapcontext.S: revision 1.16
	lib/libc/arch/arm/gen/swapcontext.S: revision 1.17

Align sp to 8-byte boundary as required by EABI.

This is especially important for non-leaf functions; GCC optimizes codes
based on assumption that sp is aligned properly.

Mostly fix broken earmv5 userland compiled by GCC10 due to alignment
faults in ld.elf_so, where {ld,st}rd are used for [sp, #8x].

No regression for ATF is observed for earmv[67]{,hf}{,eb}.

Align sp to 8-byte boundary as required by EABI.
IIUC, this change only affects libc compiled for ``Thumb-mode userland'',
which we've not officially supported yet.

Fix previous. For Thumb-1:
- sp cannot be manipulated directly
- {add,sub}s should be used instead of {add,sub}

Trailing whitespace

The _INVOKE_CERROR macro deals with thumb so simplify the code (at the
expense of a couple more instructions).

Do previous differently by pushing even number of registers and remove
strange r7 usage.

Do previous differtly by pushing two registers in the same way as the
_INVOKE_CERROR macro

Sync with HEAD.

Do previous differently by pushing even number of registers and remove
strange r7 usage.

Align sp to 8-byte boundary as required by EABI.

This is especially important for non-leaf functions; GCC optimizes codes
based on assumption that sp is aligned properly.

Mostly fix broken earmv5 userland compiled by GCC10 due to alignment
faults in ld.elf_so, where {ld,st}rd are used for [sp, #8x].

No regression for ATF is observed for earmv[67]{,hf}{,eb}.

update from HEAD

Sync with HEAD

file aeabi_cfcmp.S was added on branch tls-maxphys on 2017-12-03 11:37:46 +0000

file aeabi_cfcmp.S was added on branch nick-nhusb on 2016-03-19 11:30:26 +0000

Import compiler-rt r259194. Primary changes are better support for
128bit long double and a number of refinements in the profiling backend.

Initial revision