version 1.28.2.15, 2015/03/22 08:07:34 |
version 1.28.2.16, 2015/03/22 08:09:44 |
Line 965 xhci_configure_endpoint(struct usbd_pipe |
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Line 965 xhci_configure_endpoint(struct usbd_pipe |
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cp[2] = htole32(0); |
cp[2] = htole32(0); |
cp[3] = htole32(0); |
cp[3] = htole32(0); |
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uint8_t eptype = xhci_ep_get_type(pipe->up_endpoint->ue_edesc); |
cp = xhci_slot_get_icv(sc, xs, xhci_dci_to_ici(dci)); |
cp = xhci_slot_get_icv(sc, xs, xhci_dci_to_ici(dci)); |
if (xfertype == UE_INTERRUPT) { |
if (xfertype == UE_INTERRUPT) { |
cp[0] = htole32( |
cp[0] = htole32( |
XHCI_EPCTX_0_IVAL_SET(3) /* XXX */ |
XHCI_EPCTX_0_IVAL_SET(3) /* XXX */ |
); |
); |
cp[1] = htole32( |
cp[1] = htole32( |
XHCI_EPCTX_1_CERR_SET(3) | |
XHCI_EPCTX_1_CERR_SET(3) | |
XHCI_EPCTX_1_EPTYPE_SET(xhci_ep_get_type(pipe->up_endpoint->ue_edesc)) | |
XHCI_EPCTX_1_EPTYPE_SET(eptype) | |
XHCI_EPCTX_1_MAXB_SET(0) | |
XHCI_EPCTX_1_MAXB_SET(0) | |
XHCI_EPCTX_1_MAXP_SIZE_SET(8) /* XXX */ |
XHCI_EPCTX_1_MAXP_SIZE_SET(8) /* XXX */ |
); |
); |
cp[4] = htole32( |
cp[4] = htole32( |
XHCI_EPCTX_4_AVG_TRB_LEN_SET(8) |
XHCI_EPCTX_4_AVG_TRB_LEN_SET(8) |
); |
); |
} else { |
} else { |
cp[0] = htole32(0); |
cp[0] = htole32(0); |
cp[1] = htole32( |
cp[1] = htole32( |
XHCI_EPCTX_1_CERR_SET(3) | |
XHCI_EPCTX_1_CERR_SET(3) | |
XHCI_EPCTX_1_EPTYPE_SET(xhci_ep_get_type(pipe->up_endpoint->ue_edesc)) | |
XHCI_EPCTX_1_EPTYPE_SET(eptype) | |
XHCI_EPCTX_1_MAXB_SET(0) | |
XHCI_EPCTX_1_MAXB_SET(0) | |
XHCI_EPCTX_1_MAXP_SIZE_SET(512) /* XXX */ |
XHCI_EPCTX_1_MAXP_SIZE_SET(512) /* XXX */ |
); |
); |
} |
} |
*(uint64_t *)(&cp[2]) = htole64( |
*(uint64_t *)(&cp[2]) = htole64( |
xhci_ring_trbp(&xs->xs_ep[dci].xe_tr, 0) | |
xhci_ring_trbp(&xs->xs_ep[dci].xe_tr, 0) | |
Line 1689 xhci_ring_put(struct xhci_softc * const |
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Line 1690 xhci_ring_put(struct xhci_softc * const |
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/* Write the first TRB last */ |
/* Write the first TRB last */ |
i = 0; |
i = 0; |
{ |
parameter = trbs[i].trb_0; |
parameter = trbs[i].trb_0; |
status = trbs[i].trb_2; |
status = trbs[i].trb_2; |
control = trbs[i].trb_3; |
control = trbs[i].trb_3; |
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if (xr->xr_cs) { |
if (xr->xr_cs) { |
control |= XHCI_TRB_3_CYCLE_BIT; |
control |= XHCI_TRB_3_CYCLE_BIT; |
} else { |
} else { |
control &= ~XHCI_TRB_3_CYCLE_BIT; |
control &= ~XHCI_TRB_3_CYCLE_BIT; |
} |
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xhci_trb_put(&xr->xr_trb[xr->xr_ep], htole64(parameter), |
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htole32(status), htole32(control)); |
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usb_syncmem(&xr->xr_dma, XHCI_TRB_SIZE * ri, XHCI_TRB_SIZE * 1, |
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BUS_DMASYNC_PREWRITE); |
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xr->xr_cookies[xr->xr_ep] = cookie; |
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} |
} |
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xhci_trb_put(&xr->xr_trb[xr->xr_ep], htole64(parameter), |
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htole32(status), htole32(control)); |
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usb_syncmem(&xr->xr_dma, XHCI_TRB_SIZE * ri, XHCI_TRB_SIZE * 1, |
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BUS_DMASYNC_PREWRITE); |
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xr->xr_cookies[xr->xr_ep] = cookie; |
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xr->xr_ep = ri; |
xr->xr_ep = ri; |
xr->xr_cs = cs; |
xr->xr_cs = cs; |
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Line 2512 xhci_device_bulk_done(struct usbd_xfer * |
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Line 2511 xhci_device_bulk_done(struct usbd_xfer * |
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usb_syncmem(&xfer->ux_dmabuf, 0, xfer->ux_length, |
usb_syncmem(&xfer->ux_dmabuf, 0, xfer->ux_length, |
isread ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE); |
isread ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE); |
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} |
} |
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static void |
static void |