version 1.17, 2018/09/12 21:57:18 |
version 1.18, 2019/01/22 03:42:28 |
Line 106 static int axen_ioctl(struct ifnet *, u_ |
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Line 106 static int axen_ioctl(struct ifnet *, u_ |
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static int axen_init(struct ifnet *); |
static int axen_init(struct ifnet *); |
static void axen_stop(struct ifnet *, int); |
static void axen_stop(struct ifnet *, int); |
static void axen_watchdog(struct ifnet *); |
static void axen_watchdog(struct ifnet *); |
static int axen_miibus_readreg(device_t, int, int); |
static int axen_miibus_readreg(device_t, int, int, uint16_t *); |
static void axen_miibus_writereg(device_t, int, int, int); |
static int axen_miibus_writereg(device_t, int, int, uint16_t); |
static void axen_miibus_statchg(struct ifnet *); |
static void axen_miibus_statchg(struct ifnet *); |
static int axen_cmd(struct axen_softc *, int, int, int, void *); |
static int axen_cmd(struct axen_softc *, int, int, int, void *); |
static int axen_ifmedia_upd(struct ifnet *); |
static int axen_ifmedia_upd(struct ifnet *); |
Line 174 axen_cmd(struct axen_softc *sc, int cmd, |
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Line 174 axen_cmd(struct axen_softc *sc, int cmd, |
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} |
} |
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static int |
static int |
axen_miibus_readreg(device_t dev, int phy, int reg) |
axen_miibus_readreg(device_t dev, int phy, int reg, uint16_t *val) |
{ |
{ |
struct axen_softc *sc = device_private(dev); |
struct axen_softc *sc = device_private(dev); |
usbd_status err; |
usbd_status err; |
uint16_t val; |
uint16_t data; |
int ival; |
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if (sc->axen_dying) { |
if (sc->axen_dying) { |
DPRINTF(("axen: dying\n")); |
DPRINTF(("axen: dying\n")); |
return 0; |
return -1; |
} |
} |
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if (sc->axen_phyno != phy) |
if (sc->axen_phyno != phy) |
return 0; |
return -1; |
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axen_lock_mii(sc); |
axen_lock_mii(sc); |
err = axen_cmd(sc, AXEN_CMD_MII_READ_REG, reg, phy, &val); |
err = axen_cmd(sc, AXEN_CMD_MII_READ_REG, reg, phy, &data); |
axen_unlock_mii(sc); |
axen_unlock_mii(sc); |
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if (err) { |
if (err) { |
aprint_error_dev(sc->axen_dev, "read PHY failed\n"); |
aprint_error_dev(sc->axen_dev, "read PHY failed\n"); |
return -1; |
return err; |
} |
} |
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ival = le16toh(val); |
*val = le16toh(data); |
DPRINTFN(2,("axen_miibus_readreg: phy 0x%x reg 0x%x val 0x%x\n", |
DPRINTFN(2,("axen_miibus_readreg: phy 0x%x reg 0x%x val 0x%hx\n", |
phy, reg, ival)); |
phy, reg, *val)); |
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if (reg == MII_BMSR) { |
if (reg == MII_BMSR) { |
ival &= ~BMSR_EXTCAP; |
*val &= ~BMSR_EXTCAP; |
} |
} |
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return ival; |
return 0; |
} |
} |
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static void |
static int |
axen_miibus_writereg(device_t dev, int phy, int reg, int val) |
axen_miibus_writereg(device_t dev, int phy, int reg, uint16_t val) |
{ |
{ |
struct axen_softc *sc = device_private(dev); |
struct axen_softc *sc = device_private(dev); |
usbd_status err; |
usbd_status err; |
uint16_t uval; |
uint16_t uval; |
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if (sc->axen_dying) |
if (sc->axen_dying) |
return; |
return -1; |
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if (sc->axen_phyno != phy) |
if (sc->axen_phyno != phy) |
return; |
return -1; |
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uval = htole16(val); |
uval = htole16(val); |
axen_lock_mii(sc); |
axen_lock_mii(sc); |
err = axen_cmd(sc, AXEN_CMD_MII_WRITE_REG, reg, phy, &uval); |
err = axen_cmd(sc, AXEN_CMD_MII_WRITE_REG, reg, phy, &uval); |
axen_unlock_mii(sc); |
axen_unlock_mii(sc); |
DPRINTFN(2, ("axen_miibus_writereg: phy 0x%x reg 0x%x val 0x%0x\n", |
DPRINTFN(2, ("axen_miibus_writereg: phy 0x%x reg 0x%x val 0x%04hx\n", |
phy, reg, val)); |
phy, reg, val)); |
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if (err) { |
if (err) { |
aprint_error_dev(sc->axen_dev, "write PHY failed\n"); |
aprint_error_dev(sc->axen_dev, "write PHY failed\n"); |
return; |
return err; |
} |
} |
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return 0; |
} |
} |
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static void |
static void |
Line 625 axen_ax88179_init(struct axen_softc *sc) |
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Line 626 axen_ax88179_init(struct axen_softc *sc) |
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#if 1 /* XXX: phy hack ? */ |
#if 1 /* XXX: phy hack ? */ |
axen_miibus_writereg(sc->axen_dev, sc->axen_phyno, 0x1F, 0x0005); |
axen_miibus_writereg(sc->axen_dev, sc->axen_phyno, 0x1F, 0x0005); |
axen_miibus_writereg(sc->axen_dev, sc->axen_phyno, 0x0C, 0x0000); |
axen_miibus_writereg(sc->axen_dev, sc->axen_phyno, 0x0C, 0x0000); |
val = axen_miibus_readreg(sc->axen_dev, sc->axen_phyno, 0x0001); |
axen_miibus_readreg(sc->axen_dev, sc->axen_phyno, 0x0001, &wval); |
axen_miibus_writereg(sc->axen_dev, sc->axen_phyno, 0x01, |
axen_miibus_writereg(sc->axen_dev, sc->axen_phyno, 0x01, |
val | 0x0080); |
wval | 0x0080); |
axen_miibus_writereg(sc->axen_dev, sc->axen_phyno, 0x1F, 0x0000); |
axen_miibus_writereg(sc->axen_dev, sc->axen_phyno, 0x1F, 0x0000); |
#endif |
#endif |
} |
} |