Annotation of src/sys/dev/usb/ehcivar.h, Revision 1.38.10.1
1.38.10.1! jmcneill 1: /* $NetBSD: ehcivar.h,v 1.38 2011/01/18 08:29:24 matt Exp $ */
1.1 augustss 2:
3: /*
1.4 augustss 4: * Copyright (c) 2001 The NetBSD Foundation, Inc.
1.1 augustss 5: * All rights reserved.
6: *
7: * This code is derived from software contributed to The NetBSD Foundation
8: * by Lennart Augustsson (lennart@augustsson.net).
9: *
10: * Redistribution and use in source and binary forms, with or without
11: * modification, are permitted provided that the following conditions
12: * are met:
13: * 1. Redistributions of source code must retain the above copyright
14: * notice, this list of conditions and the following disclaimer.
15: * 2. Redistributions in binary form must reproduce the above copyright
16: * notice, this list of conditions and the following disclaimer in the
17: * documentation and/or other materials provided with the distribution.
18: *
19: * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20: * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21: * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22: * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23: * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24: * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25: * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26: * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27: * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28: * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29: * POSSIBILITY OF SUCH DAMAGE.
30: */
31:
1.7 augustss 32: typedef struct ehci_soft_qtd {
33: ehci_qtd_t qtd;
34: struct ehci_soft_qtd *nextqtd; /* mirrors nextqtd in TD */
35: ehci_physaddr_t physaddr;
1.31 bouyer 36: usb_dma_t dma; /* qTD's DMA infos */
37: int offs; /* qTD's offset in usb_dma_t */
1.7 augustss 38: usbd_xfer_handle xfer;
39: LIST_ENTRY(ehci_soft_qtd) hnext;
40: u_int16_t len;
41: } ehci_soft_qtd_t;
42: #define EHCI_SQTD_SIZE ((sizeof (struct ehci_soft_qtd) + EHCI_QTD_ALIGN - 1) / EHCI_QTD_ALIGN * EHCI_QTD_ALIGN)
43: #define EHCI_SQTD_CHUNK (EHCI_PAGE_SIZE / EHCI_SQTD_SIZE)
44:
45: typedef struct ehci_soft_qh {
46: ehci_qh_t qh;
47: struct ehci_soft_qh *next;
1.9 augustss 48: struct ehci_soft_qtd *sqtd;
1.7 augustss 49: ehci_physaddr_t physaddr;
1.31 bouyer 50: usb_dma_t dma; /* QH's DMA infos */
51: int offs; /* QH's offset in usb_dma_t */
1.15 augustss 52: int islot;
1.7 augustss 53: } ehci_soft_qh_t;
54: #define EHCI_SQH_SIZE ((sizeof (struct ehci_soft_qh) + EHCI_QH_ALIGN - 1) / EHCI_QH_ALIGN * EHCI_QH_ALIGN)
55: #define EHCI_SQH_CHUNK (EHCI_PAGE_SIZE / EHCI_SQH_SIZE)
56:
1.32 jmcneill 57: typedef struct ehci_soft_itd {
58: ehci_itd_t itd;
59: union {
60: struct {
61: /* soft_itds links in a periodic frame*/
62: struct ehci_soft_itd *next;
63: struct ehci_soft_itd *prev;
64: } frame_list;
65: /* circular list of free itds */
66: LIST_ENTRY(ehci_soft_itd) free_list;
67: } u;
68: struct ehci_soft_itd *xfer_next; /* Next soft_itd in xfer */
69: ehci_physaddr_t physaddr;
70: usb_dma_t dma;
71: int offs;
72: int slot;
73: struct timeval t; /* store free time */
74: } ehci_soft_itd_t;
75: #define EHCI_ITD_SIZE ((sizeof(struct ehci_soft_itd) + EHCI_QH_ALIGN - 1) / EHCI_ITD_ALIGN * EHCI_ITD_ALIGN)
76: #define EHCI_ITD_CHUNK (EHCI_PAGE_SIZE / EHCI_ITD_SIZE)
77:
1.11 augustss 78: struct ehci_xfer {
79: struct usbd_xfer xfer;
80: struct usb_task abort_task;
1.33 jmcneill 81: TAILQ_ENTRY(ehci_xfer) inext; /* list of active xfers */
1.11 augustss 82: ehci_soft_qtd_t *sqtdstart;
83: ehci_soft_qtd_t *sqtdend;
1.32 jmcneill 84: ehci_soft_itd_t *itdstart;
85: ehci_soft_itd_t *itdend;
86: u_int isoc_len;
1.22 chs 87: int isdone; /* used only when DIAGNOSTIC is defined */
1.11 augustss 88: };
89: #define EXFER(xfer) ((struct ehci_xfer *)(xfer))
90:
1.15 augustss 91: /* Information about an entry in the interrupt list. */
92: struct ehci_soft_islot {
93: ehci_soft_qh_t *sqh; /* Queue Head. */
94: };
95:
96: #define EHCI_FRAMELIST_MAXCOUNT 1024
97: #define EHCI_IPOLLRATES 8 /* Poll rates (1ms, 2, 4, 8 .. 128) */
98: #define EHCI_INTRQHS ((1 << EHCI_IPOLLRATES) - 1)
1.18 augustss 99: #define EHCI_MAX_POLLRATE (1 << (EHCI_IPOLLRATES - 1))
1.15 augustss 100: #define EHCI_IQHIDX(lev, pos) \
101: ((((pos) & ((1 << (lev)) - 1)) | (1 << (lev))) - 1)
102: #define EHCI_ILEV_IVAL(lev) (1 << (lev))
103:
1.7 augustss 104:
105: #define EHCI_HASH_SIZE 128
1.3 augustss 106: #define EHCI_COMPANION_MAX 8
1.7 augustss 107:
1.32 jmcneill 108: #define EHCI_FREE_LIST_INTERVAL 100
109:
1.1 augustss 110: typedef struct ehci_softc {
1.29 drochner 111: device_t sc_dev;
1.38.10.1! jmcneill 112: kmutex_t sc_lock;
! 113: kmutex_t sc_intr_lock;
! 114: kcondvar_t sc_doorbell;
! 115: void *sc_doorbell_si;
! 116: void *sc_pcd_si;
1.29 drochner 117: struct usbd_bus sc_bus;
1.1 augustss 118: bus_space_tag_t iot;
119: bus_space_handle_t ioh;
120: bus_size_t sc_size;
1.2 augustss 121: u_int sc_offs; /* offset to operational regs */
1.23 xtraeme 122: int sc_flags; /* misc flags */
123: #define EHCIF_DROPPED_INTR_WORKAROUND 0x01
1.38 matt 124: #define EHCIF_ETTF 0x02 /* Emb. Transaction Translater func. */
1.1 augustss 125:
1.19 augustss 126: char sc_vendor[32]; /* vendor string for root hub */
1.1 augustss 127: int sc_id_vendor; /* vendor ID for root hub */
128:
1.13 augustss 129: u_int32_t sc_cmd; /* shadow of cmd reg during suspend */
1.1 augustss 130:
1.3 augustss 131: u_int sc_ncomp;
1.5 augustss 132: u_int sc_npcomp;
1.29 drochner 133: device_t sc_comps[EHCI_COMPANION_MAX];
1.3 augustss 134:
135: usb_dma_t sc_fldma;
1.15 augustss 136: ehci_link_t *sc_flist;
1.3 augustss 137: u_int sc_flsize;
1.15 augustss 138: u_int sc_rand; /* XXX need proper intr scheduling */
139:
140: struct ehci_soft_islot sc_islots[EHCI_INTRQHS];
1.3 augustss 141:
1.32 jmcneill 142: /* jcmm - an array matching sc_flist, but with software pointers,
143: * not hardware address pointers
144: */
145: struct ehci_soft_itd **sc_softitds;
146:
1.33 jmcneill 147: TAILQ_HEAD(, ehci_xfer) sc_intrhead;
1.11 augustss 148:
1.7 augustss 149: ehci_soft_qh_t *sc_freeqhs;
150: ehci_soft_qtd_t *sc_freeqtds;
1.32 jmcneill 151: LIST_HEAD(sc_freeitds, ehci_soft_itd) sc_freeitds;
1.7 augustss 152:
1.4 augustss 153: int sc_noport;
1.21 augustss 154: u_int8_t sc_hasppc; /* has Port Power Control */
1.4 augustss 155: u_int8_t sc_addr; /* device address */
156: u_int8_t sc_conf; /* device configuration */
157: usbd_xfer_handle sc_intrxfer;
1.21 augustss 158: char sc_isreset[EHCI_MAX_PORTS];
1.12 augustss 159: char sc_softwake;
1.38.10.1! jmcneill 160: kcondvar_t sc_softwake_cv;
1.5 augustss 161:
162: u_int32_t sc_eintrs;
1.9 augustss 163: ehci_soft_qh_t *sc_async_head;
1.4 augustss 164:
165: SIMPLEQ_HEAD(, usbd_xfer) sc_free_xfers; /* free xfers */
1.8 augustss 166:
1.34 dyoung 167: struct callout sc_tmo_intrlist;
1.4 augustss 168:
1.34 dyoung 169: device_t sc_child; /* /dev/usb# device */
1.4 augustss 170: char sc_dying;
1.16 fvdl 171: struct usb_dma_reserve sc_dma_reserve;
1.37 kiyohara 172:
173: void (*sc_vendor_init)(struct ehci_softc *);
174: int (*sc_vendor_port_status)(struct ehci_softc *, uint32_t, int);
1.1 augustss 175: } ehci_softc_t;
1.2 augustss 176:
1.3 augustss 177: #define EREAD1(sc, a) bus_space_read_1((sc)->iot, (sc)->ioh, (a))
178: #define EREAD2(sc, a) bus_space_read_2((sc)->iot, (sc)->ioh, (a))
179: #define EREAD4(sc, a) bus_space_read_4((sc)->iot, (sc)->ioh, (a))
180: #define EWRITE1(sc, a, x) bus_space_write_1((sc)->iot, (sc)->ioh, (a), (x))
181: #define EWRITE2(sc, a, x) bus_space_write_2((sc)->iot, (sc)->ioh, (a), (x))
182: #define EWRITE4(sc, a, x) bus_space_write_4((sc)->iot, (sc)->ioh, (a), (x))
1.2 augustss 183: #define EOREAD1(sc, a) bus_space_read_1((sc)->iot, (sc)->ioh, (sc)->sc_offs+(a))
184: #define EOREAD2(sc, a) bus_space_read_2((sc)->iot, (sc)->ioh, (sc)->sc_offs+(a))
185: #define EOREAD4(sc, a) bus_space_read_4((sc)->iot, (sc)->ioh, (sc)->sc_offs+(a))
186: #define EOWRITE1(sc, a, x) bus_space_write_1((sc)->iot, (sc)->ioh, (sc)->sc_offs+(a), (x))
187: #define EOWRITE2(sc, a, x) bus_space_write_2((sc)->iot, (sc)->ioh, (sc)->sc_offs+(a), (x))
188: #define EOWRITE4(sc, a, x) bus_space_write_4((sc)->iot, (sc)->ioh, (sc)->sc_offs+(a), (x))
1.1 augustss 189:
190: usbd_status ehci_init(ehci_softc_t *);
191: int ehci_intr(void *);
192: int ehci_detach(ehci_softc_t *, int);
1.27 dyoung 193: int ehci_activate(device_t, enum devact);
194: void ehci_childdet(device_t, device_t);
1.36 dyoung 195: bool ehci_suspend(device_t, const pmf_qual_t *);
196: bool ehci_resume(device_t, const pmf_qual_t *);
1.28 dyoung 197: bool ehci_shutdown(device_t, int);
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