Annotation of src/sys/dev/usb/ehci.c, Revision 1.124
1.124 ! kiyohara 1: /* $NetBSD: ehci.c,v 1.123 2007/02/26 13:26:45 drochner Exp $ */
1.1 augustss 2:
3: /*
1.100 augustss 4: * Copyright (c) 2004,2005 The NetBSD Foundation, Inc.
1.1 augustss 5: * All rights reserved.
6: *
7: * This code is derived from software contributed to The NetBSD Foundation
1.61 mycroft 8: * by Lennart Augustsson (lennart@augustsson.net) and by Charles M. Hannum.
1.1 augustss 9: *
10: * Redistribution and use in source and binary forms, with or without
11: * modification, are permitted provided that the following conditions
12: * are met:
13: * 1. Redistributions of source code must retain the above copyright
14: * notice, this list of conditions and the following disclaimer.
15: * 2. Redistributions in binary form must reproduce the above copyright
16: * notice, this list of conditions and the following disclaimer in the
17: * documentation and/or other materials provided with the distribution.
18: * 3. All advertising materials mentioning features or use of this software
19: * must display the following acknowledgement:
20: * This product includes software developed by the NetBSD
21: * Foundation, Inc. and its contributors.
22: * 4. Neither the name of The NetBSD Foundation nor the names of its
23: * contributors may be used to endorse or promote products derived
24: * from this software without specific prior written permission.
25: *
26: * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
27: * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
28: * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
29: * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
30: * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
31: * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
32: * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
33: * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
34: * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
35: * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
36: * POSSIBILITY OF SUCH DAMAGE.
37: */
38:
39: /*
1.3 augustss 40: * USB Enhanced Host Controller Driver, a.k.a. USB 2.0 controller.
1.1 augustss 41: *
1.35 enami 42: * The EHCI 1.0 spec can be found at
1.34 augustss 43: * http://developer.intel.com/technology/usb/download/ehci-r10.pdf
1.7 augustss 44: * and the USB 2.0 spec at
1.43 ichiro 45: * http://www.usb.org/developers/docs/usb_20.zip
1.1 augustss 46: *
47: */
1.4 lukem 48:
1.52 jdolecek 49: /*
50: * TODO:
51: * 1) hold off explorations by companion controllers until ehci has started.
52: *
1.100 augustss 53: * 2) The EHCI driver lacks support for isochronous transfers, so
1.52 jdolecek 54: * devices using them don't work.
55: *
1.101 wiz 56: * 3) The hub driver needs to handle and schedule the transaction translator,
1.100 augustss 57: * to assign place in frame where different devices get to go. See chapter
1.91 perry 58: * on hubs in USB 2.0 for details.
1.52 jdolecek 59: *
1.60 mycroft 60: * 4) command failures are not recovered correctly
1.52 jdolecek 61: */
62:
1.4 lukem 63: #include <sys/cdefs.h>
1.124 ! kiyohara 64: __KERNEL_RCSID(0, "$NetBSD: ehci.c,v 1.123 2007/02/26 13:26:45 drochner Exp $");
1.47 augustss 65:
66: #include "ohci.h"
67: #include "uhci.h"
1.1 augustss 68:
69: #include <sys/param.h>
70: #include <sys/systm.h>
71: #include <sys/kernel.h>
72: #include <sys/malloc.h>
73: #include <sys/device.h>
74: #include <sys/select.h>
75: #include <sys/proc.h>
76: #include <sys/queue.h>
77:
78: #include <machine/bus.h>
79: #include <machine/endian.h>
80:
81: #include <dev/usb/usb.h>
82: #include <dev/usb/usbdi.h>
83: #include <dev/usb/usbdivar.h>
84: #include <dev/usb/usb_mem.h>
85: #include <dev/usb/usb_quirks.h>
86:
87: #include <dev/usb/ehcireg.h>
88: #include <dev/usb/ehcivar.h>
89:
90: #ifdef EHCI_DEBUG
1.73 augustss 91: #define DPRINTF(x) do { if (ehcidebug) printf x; } while(0)
92: #define DPRINTFN(n,x) do { if (ehcidebug>(n)) printf x; } while (0)
1.6 augustss 93: int ehcidebug = 0;
1.15 augustss 94: #ifndef __NetBSD__
1.1 augustss 95: #define bitmask_snprintf(q,f,b,l) snprintf((b), (l), "%b", (q), (f))
1.15 augustss 96: #endif
1.1 augustss 97: #else
98: #define DPRINTF(x)
99: #define DPRINTFN(n,x)
100: #endif
101:
1.5 augustss 102: struct ehci_pipe {
103: struct usbd_pipe pipe;
1.55 mycroft 104: int nexttoggle;
105:
1.10 augustss 106: ehci_soft_qh_t *sqh;
107: union {
108: ehci_soft_qtd_t *qtd;
109: /* ehci_soft_itd_t *itd; */
110: } tail;
111: union {
112: /* Control pipe */
113: struct {
114: usb_dma_t reqdma;
115: u_int length;
116: } ctl;
117: /* Interrupt pipe */
1.78 augustss 118: struct {
119: u_int length;
120: } intr;
1.10 augustss 121: /* Bulk pipe */
122: struct {
123: u_int length;
124: } bulk;
125: /* Iso pipe */
1.15 augustss 126: /* XXX */
1.10 augustss 127: } u;
1.5 augustss 128: };
129:
130: Static void ehci_shutdown(void *);
131: Static void ehci_power(int, void *);
132:
133: Static usbd_status ehci_open(usbd_pipe_handle);
134: Static void ehci_poll(struct usbd_bus *);
135: Static void ehci_softintr(void *);
1.11 augustss 136: Static int ehci_intr1(ehci_softc_t *);
1.15 augustss 137: Static void ehci_waitintr(ehci_softc_t *, usbd_xfer_handle);
1.18 augustss 138: Static void ehci_check_intr(ehci_softc_t *, struct ehci_xfer *);
139: Static void ehci_idone(struct ehci_xfer *);
1.15 augustss 140: Static void ehci_timeout(void *);
141: Static void ehci_timeout_task(void *);
1.108 xtraeme 142: Static void ehci_intrlist_timeout(void *);
1.5 augustss 143:
144: Static usbd_status ehci_allocm(struct usbd_bus *, usb_dma_t *, u_int32_t);
145: Static void ehci_freem(struct usbd_bus *, usb_dma_t *);
146:
147: Static usbd_xfer_handle ehci_allocx(struct usbd_bus *);
148: Static void ehci_freex(struct usbd_bus *, usbd_xfer_handle);
149:
150: Static usbd_status ehci_root_ctrl_transfer(usbd_xfer_handle);
151: Static usbd_status ehci_root_ctrl_start(usbd_xfer_handle);
152: Static void ehci_root_ctrl_abort(usbd_xfer_handle);
153: Static void ehci_root_ctrl_close(usbd_pipe_handle);
154: Static void ehci_root_ctrl_done(usbd_xfer_handle);
155:
156: Static usbd_status ehci_root_intr_transfer(usbd_xfer_handle);
157: Static usbd_status ehci_root_intr_start(usbd_xfer_handle);
158: Static void ehci_root_intr_abort(usbd_xfer_handle);
159: Static void ehci_root_intr_close(usbd_pipe_handle);
160: Static void ehci_root_intr_done(usbd_xfer_handle);
161:
162: Static usbd_status ehci_device_ctrl_transfer(usbd_xfer_handle);
163: Static usbd_status ehci_device_ctrl_start(usbd_xfer_handle);
164: Static void ehci_device_ctrl_abort(usbd_xfer_handle);
165: Static void ehci_device_ctrl_close(usbd_pipe_handle);
166: Static void ehci_device_ctrl_done(usbd_xfer_handle);
167:
168: Static usbd_status ehci_device_bulk_transfer(usbd_xfer_handle);
169: Static usbd_status ehci_device_bulk_start(usbd_xfer_handle);
170: Static void ehci_device_bulk_abort(usbd_xfer_handle);
171: Static void ehci_device_bulk_close(usbd_pipe_handle);
172: Static void ehci_device_bulk_done(usbd_xfer_handle);
173:
174: Static usbd_status ehci_device_intr_transfer(usbd_xfer_handle);
175: Static usbd_status ehci_device_intr_start(usbd_xfer_handle);
176: Static void ehci_device_intr_abort(usbd_xfer_handle);
177: Static void ehci_device_intr_close(usbd_pipe_handle);
178: Static void ehci_device_intr_done(usbd_xfer_handle);
179:
180: Static usbd_status ehci_device_isoc_transfer(usbd_xfer_handle);
181: Static usbd_status ehci_device_isoc_start(usbd_xfer_handle);
182: Static void ehci_device_isoc_abort(usbd_xfer_handle);
183: Static void ehci_device_isoc_close(usbd_pipe_handle);
184: Static void ehci_device_isoc_done(usbd_xfer_handle);
185:
186: Static void ehci_device_clear_toggle(usbd_pipe_handle pipe);
187: Static void ehci_noop(usbd_pipe_handle pipe);
188:
1.104 christos 189: Static int ehci_str(usb_string_descriptor_t *, int, const char *);
1.6 augustss 190: Static void ehci_pcd(ehci_softc_t *, usbd_xfer_handle);
191: Static void ehci_disown(ehci_softc_t *, int, int);
1.5 augustss 192:
1.9 augustss 193: Static ehci_soft_qh_t *ehci_alloc_sqh(ehci_softc_t *);
194: Static void ehci_free_sqh(ehci_softc_t *, ehci_soft_qh_t *);
195:
196: Static ehci_soft_qtd_t *ehci_alloc_sqtd(ehci_softc_t *);
197: Static void ehci_free_sqtd(ehci_softc_t *, ehci_soft_qtd_t *);
1.25 augustss 198: Static usbd_status ehci_alloc_sqtd_chain(struct ehci_pipe *,
1.15 augustss 199: ehci_softc_t *, int, int, usbd_xfer_handle,
200: ehci_soft_qtd_t **, ehci_soft_qtd_t **);
1.25 augustss 201: Static void ehci_free_sqtd_chain(ehci_softc_t *, ehci_soft_qtd_t *,
1.18 augustss 202: ehci_soft_qtd_t *);
1.15 augustss 203:
204: Static usbd_status ehci_device_request(usbd_xfer_handle xfer);
1.9 augustss 205:
1.78 augustss 206: Static usbd_status ehci_device_setintr(ehci_softc_t *, ehci_soft_qh_t *,
207: int ival);
208:
1.10 augustss 209: Static void ehci_add_qh(ehci_soft_qh_t *, ehci_soft_qh_t *);
210: Static void ehci_rem_qh(ehci_softc_t *, ehci_soft_qh_t *,
211: ehci_soft_qh_t *);
1.23 augustss 212: Static void ehci_set_qh_qtd(ehci_soft_qh_t *, ehci_soft_qtd_t *);
1.11 augustss 213: Static void ehci_sync_hc(ehci_softc_t *);
1.10 augustss 214:
215: Static void ehci_close_pipe(usbd_pipe_handle, ehci_soft_qh_t *);
216: Static void ehci_abort_xfer(usbd_xfer_handle, usbd_status);
1.9 augustss 217:
1.5 augustss 218: #ifdef EHCI_DEBUG
1.18 augustss 219: Static void ehci_dump_regs(ehci_softc_t *);
1.107 augustss 220: void ehci_dump(void);
1.6 augustss 221: Static ehci_softc_t *theehci;
1.15 augustss 222: Static void ehci_dump_link(ehci_link_t, int);
223: Static void ehci_dump_sqtds(ehci_soft_qtd_t *);
1.9 augustss 224: Static void ehci_dump_sqtd(ehci_soft_qtd_t *);
225: Static void ehci_dump_qtd(ehci_qtd_t *);
226: Static void ehci_dump_sqh(ehci_soft_qh_t *);
1.38 martin 227: #ifdef DIAGNOSTIC
1.18 augustss 228: Static void ehci_dump_exfer(struct ehci_xfer *);
1.5 augustss 229: #endif
1.38 martin 230: #endif
1.5 augustss 231:
1.11 augustss 232: #define EHCI_NULL htole32(EHCI_LINK_TERMINATE)
233:
1.5 augustss 234: #define EHCI_INTR_ENDPT 1
235:
1.18 augustss 236: #define ehci_add_intr_list(sc, ex) \
237: LIST_INSERT_HEAD(&(sc)->sc_intrhead, (ex), inext);
238: #define ehci_del_intr_list(ex) \
1.44 augustss 239: do { \
240: LIST_REMOVE((ex), inext); \
241: (ex)->inext.le_prev = NULL; \
242: } while (0)
243: #define ehci_active_intr_list(ex) ((ex)->inext.le_prev != NULL)
1.18 augustss 244:
1.123 drochner 245: Static const struct usbd_bus_methods ehci_bus_methods = {
1.5 augustss 246: ehci_open,
247: ehci_softintr,
248: ehci_poll,
249: ehci_allocm,
250: ehci_freem,
251: ehci_allocx,
252: ehci_freex,
253: };
254:
1.123 drochner 255: Static const struct usbd_pipe_methods ehci_root_ctrl_methods = {
1.5 augustss 256: ehci_root_ctrl_transfer,
257: ehci_root_ctrl_start,
258: ehci_root_ctrl_abort,
259: ehci_root_ctrl_close,
260: ehci_noop,
261: ehci_root_ctrl_done,
262: };
263:
1.123 drochner 264: Static const struct usbd_pipe_methods ehci_root_intr_methods = {
1.5 augustss 265: ehci_root_intr_transfer,
266: ehci_root_intr_start,
267: ehci_root_intr_abort,
268: ehci_root_intr_close,
269: ehci_noop,
270: ehci_root_intr_done,
271: };
272:
1.123 drochner 273: Static const struct usbd_pipe_methods ehci_device_ctrl_methods = {
1.5 augustss 274: ehci_device_ctrl_transfer,
275: ehci_device_ctrl_start,
276: ehci_device_ctrl_abort,
277: ehci_device_ctrl_close,
278: ehci_noop,
279: ehci_device_ctrl_done,
280: };
281:
1.123 drochner 282: Static const struct usbd_pipe_methods ehci_device_intr_methods = {
1.5 augustss 283: ehci_device_intr_transfer,
284: ehci_device_intr_start,
285: ehci_device_intr_abort,
286: ehci_device_intr_close,
287: ehci_device_clear_toggle,
288: ehci_device_intr_done,
289: };
290:
1.123 drochner 291: Static const struct usbd_pipe_methods ehci_device_bulk_methods = {
1.5 augustss 292: ehci_device_bulk_transfer,
293: ehci_device_bulk_start,
294: ehci_device_bulk_abort,
295: ehci_device_bulk_close,
296: ehci_device_clear_toggle,
297: ehci_device_bulk_done,
298: };
299:
1.123 drochner 300: Static const struct usbd_pipe_methods ehci_device_isoc_methods = {
1.5 augustss 301: ehci_device_isoc_transfer,
302: ehci_device_isoc_start,
303: ehci_device_isoc_abort,
304: ehci_device_isoc_close,
305: ehci_noop,
306: ehci_device_isoc_done,
307: };
308:
1.123 drochner 309: static const uint8_t revbits[EHCI_MAX_POLLRATE] = {
1.95 augustss 310: 0x00,0x40,0x20,0x60,0x10,0x50,0x30,0x70,0x08,0x48,0x28,0x68,0x18,0x58,0x38,0x78,
311: 0x04,0x44,0x24,0x64,0x14,0x54,0x34,0x74,0x0c,0x4c,0x2c,0x6c,0x1c,0x5c,0x3c,0x7c,
312: 0x02,0x42,0x22,0x62,0x12,0x52,0x32,0x72,0x0a,0x4a,0x2a,0x6a,0x1a,0x5a,0x3a,0x7a,
313: 0x06,0x46,0x26,0x66,0x16,0x56,0x36,0x76,0x0e,0x4e,0x2e,0x6e,0x1e,0x5e,0x3e,0x7e,
314: 0x01,0x41,0x21,0x61,0x11,0x51,0x31,0x71,0x09,0x49,0x29,0x69,0x19,0x59,0x39,0x79,
315: 0x05,0x45,0x25,0x65,0x15,0x55,0x35,0x75,0x0d,0x4d,0x2d,0x6d,0x1d,0x5d,0x3d,0x7d,
316: 0x03,0x43,0x23,0x63,0x13,0x53,0x33,0x73,0x0b,0x4b,0x2b,0x6b,0x1b,0x5b,0x3b,0x7b,
317: 0x07,0x47,0x27,0x67,0x17,0x57,0x37,0x77,0x0f,0x4f,0x2f,0x6f,0x1f,0x5f,0x3f,0x7f,
1.94 augustss 318: };
319:
1.1 augustss 320: usbd_status
321: ehci_init(ehci_softc_t *sc)
322: {
1.104 christos 323: u_int32_t vers, sparams, cparams, hcr;
1.3 augustss 324: u_int i;
325: usbd_status err;
1.11 augustss 326: ehci_soft_qh_t *sqh;
1.89 augustss 327: u_int ncomp;
1.3 augustss 328:
329: DPRINTF(("ehci_init: start\n"));
1.6 augustss 330: #ifdef EHCI_DEBUG
331: theehci = sc;
332: #endif
1.3 augustss 333:
334: sc->sc_offs = EREAD1(sc, EHCI_CAPLENGTH);
335:
1.104 christos 336: vers = EREAD2(sc, EHCI_HCIVERSION);
1.121 ad 337: aprint_verbose("%s: EHCI version %x.%x\n", USBDEVNAME(sc->sc_bus.bdev),
1.104 christos 338: vers >> 8, vers & 0xff);
1.3 augustss 339:
340: sparams = EREAD4(sc, EHCI_HCSPARAMS);
341: DPRINTF(("ehci_init: sparams=0x%x\n", sparams));
1.6 augustss 342: sc->sc_npcomp = EHCI_HCS_N_PCC(sparams);
1.89 augustss 343: ncomp = EHCI_HCS_N_CC(sparams);
344: if (ncomp != sc->sc_ncomp) {
1.121 ad 345: aprint_verbose("%s: wrong number of companions (%d != %d)\n",
1.3 augustss 346: USBDEVNAME(sc->sc_bus.bdev),
1.89 augustss 347: ncomp, sc->sc_ncomp);
1.47 augustss 348: #if NOHCI == 0 || NUHCI == 0
349: aprint_error("%s: ohci or uhci probably not configured\n",
350: USBDEVNAME(sc->sc_bus.bdev));
351: #endif
1.89 augustss 352: if (ncomp < sc->sc_ncomp)
353: sc->sc_ncomp = ncomp;
1.3 augustss 354: }
355: if (sc->sc_ncomp > 0) {
1.41 thorpej 356: aprint_normal("%s: companion controller%s, %d port%s each:",
1.3 augustss 357: USBDEVNAME(sc->sc_bus.bdev), sc->sc_ncomp!=1 ? "s" : "",
358: EHCI_HCS_N_PCC(sparams),
359: EHCI_HCS_N_PCC(sparams)!=1 ? "s" : "");
360: for (i = 0; i < sc->sc_ncomp; i++)
1.41 thorpej 361: aprint_normal(" %s", USBDEVNAME(sc->sc_comps[i]->bdev));
362: aprint_normal("\n");
1.3 augustss 363: }
1.5 augustss 364: sc->sc_noport = EHCI_HCS_N_PORTS(sparams);
1.3 augustss 365: cparams = EREAD4(sc, EHCI_HCCPARAMS);
366: DPRINTF(("ehci_init: cparams=0x%x\n", cparams));
1.106 augustss 367: sc->sc_hasppc = EHCI_HCS_PPC(sparams);
1.36 augustss 368:
369: if (EHCI_HCC_64BIT(cparams)) {
370: /* MUST clear segment register if 64 bit capable. */
371: EWRITE4(sc, EHCI_CTRLDSSEGMENT, 0);
372: }
1.33 augustss 373:
1.3 augustss 374: sc->sc_bus.usbrev = USBREV_2_0;
375:
1.90 fvdl 376: usb_setup_reserve(sc, &sc->sc_dma_reserve, sc->sc_bus.dmatag,
377: USB_MEM_RESERVE);
378:
1.3 augustss 379: /* Reset the controller */
380: DPRINTF(("%s: resetting\n", USBDEVNAME(sc->sc_bus.bdev)));
381: EOWRITE4(sc, EHCI_USBCMD, 0); /* Halt controller */
382: usb_delay_ms(&sc->sc_bus, 1);
383: EOWRITE4(sc, EHCI_USBCMD, EHCI_CMD_HCRESET);
384: for (i = 0; i < 100; i++) {
1.34 augustss 385: usb_delay_ms(&sc->sc_bus, 1);
1.3 augustss 386: hcr = EOREAD4(sc, EHCI_USBCMD) & EHCI_CMD_HCRESET;
387: if (!hcr)
388: break;
389: }
390: if (hcr) {
1.41 thorpej 391: aprint_error("%s: reset timeout\n",
392: USBDEVNAME(sc->sc_bus.bdev));
1.3 augustss 393: return (USBD_IOERROR);
394: }
395:
1.78 augustss 396: /* XXX need proper intr scheduling */
397: sc->sc_rand = 96;
398:
1.3 augustss 399: /* frame list size at default, read back what we got and use that */
400: switch (EHCI_CMD_FLS(EOREAD4(sc, EHCI_USBCMD))) {
1.78 augustss 401: case 0: sc->sc_flsize = 1024; break;
402: case 1: sc->sc_flsize = 512; break;
403: case 2: sc->sc_flsize = 256; break;
1.3 augustss 404: case 3: return (USBD_IOERROR);
405: }
1.78 augustss 406: err = usb_allocmem(&sc->sc_bus, sc->sc_flsize * sizeof(ehci_link_t),
407: EHCI_FLALIGN_ALIGN, &sc->sc_fldma);
1.3 augustss 408: if (err)
409: return (err);
410: DPRINTF(("%s: flsize=%d\n", USBDEVNAME(sc->sc_bus.bdev),sc->sc_flsize));
1.78 augustss 411: sc->sc_flist = KERNADDR(&sc->sc_fldma, 0);
412: EOWRITE4(sc, EHCI_PERIODICLISTBASE, DMAADDR(&sc->sc_fldma, 0));
1.3 augustss 413:
1.5 augustss 414: /* Set up the bus struct. */
415: sc->sc_bus.methods = &ehci_bus_methods;
416: sc->sc_bus.pipe_size = sizeof(struct ehci_pipe);
417:
1.112 jmcneill 418: sc->sc_powerhook = powerhook_establish(USBDEVNAME(sc->sc_bus.bdev),
419: ehci_power, sc);
1.5 augustss 420: sc->sc_shutdownhook = shutdownhook_establish(ehci_shutdown, sc);
421:
1.6 augustss 422: sc->sc_eintrs = EHCI_NORMAL_INTRS;
423:
1.78 augustss 424: /*
425: * Allocate the interrupt dummy QHs. These are arranged to give poll
426: * intervals that are powers of 2 times 1ms.
427: */
428: for (i = 0; i < EHCI_INTRQHS; i++) {
429: sqh = ehci_alloc_sqh(sc);
430: if (sqh == NULL) {
431: err = USBD_NOMEM;
432: goto bad1;
433: }
434: sc->sc_islots[i].sqh = sqh;
435: }
436: for (i = 0; i < EHCI_INTRQHS; i++) {
437: sqh = sc->sc_islots[i].sqh;
438: if (i == 0) {
439: /* The last (1ms) QH terminates. */
440: sqh->qh.qh_link = EHCI_NULL;
441: sqh->next = NULL;
442: } else {
443: /* Otherwise the next QH has half the poll interval */
444: sqh->next = sc->sc_islots[(i + 1) / 2 - 1].sqh;
445: sqh->qh.qh_link = htole32(sqh->next->physaddr |
446: EHCI_LINK_QH);
447: }
448: sqh->qh.qh_endp = htole32(EHCI_QH_SET_EPS(EHCI_QH_SPEED_HIGH));
449: sqh->qh.qh_curqtd = EHCI_NULL;
450: sqh->next = NULL;
451: sqh->qh.qh_qtd.qtd_next = EHCI_NULL;
452: sqh->qh.qh_qtd.qtd_altnext = EHCI_NULL;
453: sqh->qh.qh_qtd.qtd_status = htole32(EHCI_QTD_HALTED);
454: sqh->sqtd = NULL;
455: }
456: /* Point the frame list at the last level (128ms). */
457: for (i = 0; i < sc->sc_flsize; i++) {
1.94 augustss 458: int j;
459:
460: j = (i & ~(EHCI_MAX_POLLRATE-1)) |
461: revbits[i & (EHCI_MAX_POLLRATE-1)];
462: sc->sc_flist[j] = htole32(EHCI_LINK_QH |
1.78 augustss 463: sc->sc_islots[EHCI_IQHIDX(EHCI_IPOLLRATES - 1,
464: i)].sqh->physaddr);
465: }
466:
1.11 augustss 467: /* Allocate dummy QH that starts the async list. */
468: sqh = ehci_alloc_sqh(sc);
469: if (sqh == NULL) {
1.9 augustss 470: err = USBD_NOMEM;
471: goto bad1;
472: }
1.11 augustss 473: /* Fill the QH */
474: sqh->qh.qh_endp =
475: htole32(EHCI_QH_SET_EPS(EHCI_QH_SPEED_HIGH) | EHCI_QH_HRECL);
476: sqh->qh.qh_link =
477: htole32(sqh->physaddr | EHCI_LINK_QH);
478: sqh->qh.qh_curqtd = EHCI_NULL;
479: sqh->next = NULL;
480: /* Fill the overlay qTD */
481: sqh->qh.qh_qtd.qtd_next = EHCI_NULL;
482: sqh->qh.qh_qtd.qtd_altnext = EHCI_NULL;
1.26 augustss 483: sqh->qh.qh_qtd.qtd_status = htole32(EHCI_QTD_HALTED);
1.11 augustss 484: sqh->sqtd = NULL;
1.9 augustss 485: #ifdef EHCI_DEBUG
486: if (ehcidebug) {
1.27 enami 487: ehci_dump_sqh(sqh);
1.9 augustss 488: }
489: #endif
490:
491: /* Point to async list */
1.11 augustss 492: sc->sc_async_head = sqh;
493: EOWRITE4(sc, EHCI_ASYNCLISTADDR, sqh->physaddr | EHCI_LINK_QH);
1.9 augustss 494:
1.108 xtraeme 495: usb_callout_init(sc->sc_tmo_intrlist);
1.9 augustss 496:
1.10 augustss 497: lockinit(&sc->sc_doorbell_lock, PZERO, "ehcidb", 0, 0);
498:
1.6 augustss 499: /* Turn on controller */
500: EOWRITE4(sc, EHCI_USBCMD,
1.88 augustss 501: EHCI_CMD_ITC_2 | /* 2 microframes interrupt delay */
1.6 augustss 502: (EOREAD4(sc, EHCI_USBCMD) & EHCI_CMD_FLS_M) |
1.10 augustss 503: EHCI_CMD_ASE |
1.78 augustss 504: EHCI_CMD_PSE |
1.6 augustss 505: EHCI_CMD_RS);
506:
507: /* Take over port ownership */
508: EOWRITE4(sc, EHCI_CONFIGFLAG, EHCI_CONF_CF);
509:
1.8 augustss 510: for (i = 0; i < 100; i++) {
1.34 augustss 511: usb_delay_ms(&sc->sc_bus, 1);
1.8 augustss 512: hcr = EOREAD4(sc, EHCI_USBSTS) & EHCI_STS_HCH;
513: if (!hcr)
514: break;
515: }
516: if (hcr) {
1.41 thorpej 517: aprint_error("%s: run timeout\n", USBDEVNAME(sc->sc_bus.bdev));
1.8 augustss 518: return (USBD_IOERROR);
519: }
520:
1.105 augustss 521: /* Enable interrupts */
522: DPRINTFN(1,("ehci_init: enabling\n"));
523: EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs);
524:
1.5 augustss 525: return (USBD_NORMAL_COMPLETION);
1.9 augustss 526:
527: #if 0
1.11 augustss 528: bad2:
1.15 augustss 529: ehci_free_sqh(sc, sc->sc_async_head);
1.9 augustss 530: #endif
531: bad1:
532: usb_freemem(&sc->sc_bus, &sc->sc_fldma);
533: return (err);
1.1 augustss 534: }
535:
536: int
537: ehci_intr(void *v)
538: {
1.6 augustss 539: ehci_softc_t *sc = v;
540:
1.17 augustss 541: if (sc == NULL || sc->sc_dying)
1.15 augustss 542: return (0);
543:
1.6 augustss 544: /* If we get an interrupt while polling, then just ignore it. */
545: if (sc->sc_bus.use_polling) {
1.78 augustss 546: u_int32_t intrs = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS));
547:
548: if (intrs)
549: EOWRITE4(sc, EHCI_USBSTS, intrs); /* Acknowledge */
1.6 augustss 550: #ifdef DIAGNOSTIC
1.65 mycroft 551: DPRINTFN(16, ("ehci_intr: ignored interrupt while polling\n"));
1.6 augustss 552: #endif
553: return (0);
554: }
555:
1.33 augustss 556: return (ehci_intr1(sc));
1.6 augustss 557: }
558:
559: Static int
560: ehci_intr1(ehci_softc_t *sc)
561: {
562: u_int32_t intrs, eintrs;
563:
564: DPRINTFN(20,("ehci_intr1: enter\n"));
565:
566: /* In case the interrupt occurs before initialization has completed. */
567: if (sc == NULL) {
568: #ifdef DIAGNOSTIC
1.72 augustss 569: printf("ehci_intr1: sc == NULL\n");
1.6 augustss 570: #endif
571: return (0);
572: }
573:
574: intrs = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS));
575: if (!intrs)
576: return (0);
577:
578: eintrs = intrs & sc->sc_eintrs;
1.72 augustss 579: DPRINTFN(7, ("ehci_intr1: sc=%p intrs=0x%x(0x%x) eintrs=0x%x\n",
1.6 augustss 580: sc, (u_int)intrs, EOREAD4(sc, EHCI_USBSTS),
581: (u_int)eintrs));
582: if (!eintrs)
583: return (0);
584:
1.68 mycroft 585: EOWRITE4(sc, EHCI_USBSTS, intrs); /* Acknowledge */
1.6 augustss 586: sc->sc_bus.intr_context++;
587: sc->sc_bus.no_intrs++;
1.10 augustss 588: if (eintrs & EHCI_STS_IAA) {
589: DPRINTF(("ehci_intr1: door bell\n"));
1.11 augustss 590: wakeup(&sc->sc_async_head);
1.20 augustss 591: eintrs &= ~EHCI_STS_IAA;
1.10 augustss 592: }
1.18 augustss 593: if (eintrs & (EHCI_STS_INT | EHCI_STS_ERRINT)) {
1.46 augustss 594: DPRINTFN(5,("ehci_intr1: %s %s\n",
595: eintrs & EHCI_STS_INT ? "INT" : "",
596: eintrs & EHCI_STS_ERRINT ? "ERRINT" : ""));
1.18 augustss 597: usb_schedsoftintr(&sc->sc_bus);
1.21 augustss 598: eintrs &= ~(EHCI_STS_INT | EHCI_STS_ERRINT);
1.6 augustss 599: }
600: if (eintrs & EHCI_STS_HSE) {
601: printf("%s: unrecoverable error, controller halted\n",
602: USBDEVNAME(sc->sc_bus.bdev));
603: /* XXX what else */
604: }
605: if (eintrs & EHCI_STS_PCD) {
606: ehci_pcd(sc, sc->sc_intrxfer);
607: eintrs &= ~EHCI_STS_PCD;
608: }
609:
610: sc->sc_bus.intr_context--;
611:
612: if (eintrs != 0) {
613: /* Block unprocessed interrupts. */
614: sc->sc_eintrs &= ~eintrs;
615: EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs);
616: printf("%s: blocking intrs 0x%x\n",
617: USBDEVNAME(sc->sc_bus.bdev), eintrs);
618: }
619:
620: return (1);
621: }
622:
623:
624: void
625: ehci_pcd(ehci_softc_t *sc, usbd_xfer_handle xfer)
626: {
627: usbd_pipe_handle pipe;
628: u_char *p;
629: int i, m;
630:
631: if (xfer == NULL) {
632: /* Just ignore the change. */
633: return;
634: }
635:
636: pipe = xfer->pipe;
637:
1.30 augustss 638: p = KERNADDR(&xfer->dmabuf, 0);
1.6 augustss 639: m = min(sc->sc_noport, xfer->length * 8 - 1);
640: memset(p, 0, xfer->length);
641: for (i = 1; i <= m; i++) {
642: /* Pick out CHANGE bits from the status reg. */
643: if (EOREAD4(sc, EHCI_PORTSC(i)) & EHCI_PS_CLEAR)
644: p[i/8] |= 1 << (i%8);
645: }
646: DPRINTF(("ehci_pcd: change=0x%02x\n", *p));
647: xfer->actlen = xfer->length;
648: xfer->status = USBD_NORMAL_COMPLETION;
649:
650: usb_transfer_complete(xfer);
1.1 augustss 651: }
652:
1.5 augustss 653: void
654: ehci_softintr(void *v)
655: {
1.18 augustss 656: ehci_softc_t *sc = v;
1.53 chs 657: struct ehci_xfer *ex, *nextex;
1.18 augustss 658:
659: DPRINTFN(10,("%s: ehci_softintr (%d)\n", USBDEVNAME(sc->sc_bus.bdev),
660: sc->sc_bus.intr_context));
661:
662: sc->sc_bus.intr_context++;
663:
664: /*
665: * The only explanation I can think of for why EHCI is as brain dead
666: * as UHCI interrupt-wise is that Intel was involved in both.
667: * An interrupt just tells us that something is done, we have no
668: * clue what, so we need to scan through all active transfers. :-(
669: */
1.53 chs 670: for (ex = LIST_FIRST(&sc->sc_intrhead); ex; ex = nextex) {
671: nextex = LIST_NEXT(ex, inext);
1.18 augustss 672: ehci_check_intr(sc, ex);
1.53 chs 673: }
1.18 augustss 674:
1.108 xtraeme 675: /* Schedule a callout to catch any dropped transactions. */
676: if ((sc->sc_flags & EHCIF_DROPPED_INTR_WORKAROUND) &&
677: !LIST_EMPTY(&sc->sc_intrhead))
678: usb_callout(sc->sc_tmo_intrlist, hz,
679: ehci_intrlist_timeout, sc);
680:
1.77 augustss 681: #ifdef USB_USE_SOFTINTR
1.29 augustss 682: if (sc->sc_softwake) {
683: sc->sc_softwake = 0;
684: wakeup(&sc->sc_softwake);
685: }
1.77 augustss 686: #endif /* USB_USE_SOFTINTR */
1.29 augustss 687:
1.18 augustss 688: sc->sc_bus.intr_context--;
689: }
690:
691: /* Check for an interrupt. */
692: void
1.115 christos 693: ehci_check_intr(ehci_softc_t *sc, struct ehci_xfer *ex)
1.18 augustss 694: {
695: ehci_soft_qtd_t *sqtd, *lsqtd;
696: u_int32_t status;
697:
1.22 augustss 698: DPRINTFN(/*15*/2, ("ehci_check_intr: ex=%p\n", ex));
1.18 augustss 699:
700: if (ex->sqtdstart == NULL) {
701: printf("ehci_check_intr: sqtdstart=NULL\n");
702: return;
703: }
704: lsqtd = ex->sqtdend;
705: #ifdef DIAGNOSTIC
706: if (lsqtd == NULL) {
1.84 augustss 707: printf("ehci_check_intr: lsqtd==0\n");
1.18 augustss 708: return;
709: }
710: #endif
1.33 augustss 711: /*
1.18 augustss 712: * If the last TD is still active we need to check whether there
713: * is a an error somewhere in the middle, or whether there was a
714: * short packet (SPD and not ACTIVE).
715: */
716: if (le32toh(lsqtd->qtd.qtd_status) & EHCI_QTD_ACTIVE) {
717: DPRINTFN(12, ("ehci_check_intr: active ex=%p\n", ex));
718: for (sqtd = ex->sqtdstart; sqtd != lsqtd; sqtd=sqtd->nextqtd) {
719: status = le32toh(sqtd->qtd.qtd_status);
720: /* If there's an active QTD the xfer isn't done. */
721: if (status & EHCI_QTD_ACTIVE)
722: break;
723: /* Any kind of error makes the xfer done. */
724: if (status & EHCI_QTD_HALTED)
725: goto done;
726: /* We want short packets, and it is short: it's done */
1.58 mycroft 727: if (EHCI_QTD_GET_BYTES(status) != 0)
1.18 augustss 728: goto done;
729: }
730: DPRINTFN(12, ("ehci_check_intr: ex=%p std=%p still active\n",
731: ex, ex->sqtdstart));
732: return;
733: }
734: done:
735: DPRINTFN(12, ("ehci_check_intr: ex=%p done\n", ex));
736: usb_uncallout(ex->xfer.timeout_handle, ehci_timeout, ex);
737: ehci_idone(ex);
738: }
739:
740: void
741: ehci_idone(struct ehci_xfer *ex)
742: {
743: usbd_xfer_handle xfer = &ex->xfer;
744: struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;
1.82 augustss 745: ehci_soft_qtd_t *sqtd, *lsqtd;
746: u_int32_t status = 0, nstatus = 0;
1.18 augustss 747: int actlen;
748:
1.22 augustss 749: DPRINTFN(/*12*/2, ("ehci_idone: ex=%p\n", ex));
1.18 augustss 750: #ifdef DIAGNOSTIC
751: {
752: int s = splhigh();
753: if (ex->isdone) {
754: splx(s);
755: #ifdef EHCI_DEBUG
756: printf("ehci_idone: ex is done!\n ");
757: ehci_dump_exfer(ex);
758: #else
759: printf("ehci_idone: ex=%p is done!\n", ex);
760: #endif
761: return;
762: }
763: ex->isdone = 1;
764: splx(s);
765: }
766: #endif
767:
768: if (xfer->status == USBD_CANCELLED ||
769: xfer->status == USBD_TIMEOUT) {
770: DPRINTF(("ehci_idone: aborted xfer=%p\n", xfer));
771: return;
772: }
773:
774: #ifdef EHCI_DEBUG
1.23 augustss 775: DPRINTFN(/*10*/2, ("ehci_idone: xfer=%p, pipe=%p ready\n", xfer, epipe));
1.18 augustss 776: if (ehcidebug > 10)
777: ehci_dump_sqtds(ex->sqtdstart);
778: #endif
779:
780: /* The transfer is done, compute actual length and status. */
1.82 augustss 781: lsqtd = ex->sqtdend;
1.18 augustss 782: actlen = 0;
1.82 augustss 783: for (sqtd = ex->sqtdstart; sqtd != lsqtd->nextqtd; sqtd=sqtd->nextqtd) {
1.18 augustss 784: nstatus = le32toh(sqtd->qtd.qtd_status);
785: if (nstatus & EHCI_QTD_ACTIVE)
786: break;
787:
788: status = nstatus;
789: if (EHCI_QTD_GET_PID(status) != EHCI_QTD_PID_SETUP)
790: actlen += sqtd->len - EHCI_QTD_GET_BYTES(status);
791: }
1.22 augustss 792:
1.91 perry 793: /*
1.86 augustss 794: * If there are left over TDs we need to update the toggle.
795: * The default pipe doesn't need it since control transfers
796: * start the toggle at 0 every time.
1.117 drochner 797: * For a short transfer we need to update the toggle for the missing
798: * packets within the qTD.
1.86 augustss 799: */
1.117 drochner 800: if ((sqtd != lsqtd->nextqtd || EHCI_QTD_GET_BYTES(status)) &&
1.82 augustss 801: xfer->pipe->device->default_pipe != xfer->pipe) {
1.117 drochner 802: DPRINTFN(2, ("ehci_idone: need toggle update "
803: "status=%08x nstatus=%08x\n", status, nstatus));
1.58 mycroft 804: #if 0
805: ehci_dump_sqh(epipe->sqh);
806: ehci_dump_sqtds(ex->sqtdstart);
807: #endif
808: epipe->nexttoggle = EHCI_QTD_GET_TOGGLE(nstatus);
1.22 augustss 809: }
1.18 augustss 810:
1.23 augustss 811: DPRINTFN(/*10*/2, ("ehci_idone: len=%d, actlen=%d, status=0x%x\n",
1.22 augustss 812: xfer->length, actlen, status));
1.18 augustss 813: xfer->actlen = actlen;
1.98 augustss 814: if (status & EHCI_QTD_HALTED) {
1.18 augustss 815: #ifdef EHCI_DEBUG
816: char sbuf[128];
817:
818: bitmask_snprintf((u_int32_t)status,
1.63 mycroft 819: "\20\7HALTED\6BUFERR\5BABBLE\4XACTERR"
1.98 augustss 820: "\3MISSED\1PINGSTATE", sbuf, sizeof(sbuf));
1.18 augustss 821:
1.98 augustss 822: DPRINTFN(2, ("ehci_idone: error, addr=%d, endpt=0x%02x, "
1.18 augustss 823: "status 0x%s\n",
824: xfer->pipe->device->address,
825: xfer->pipe->endpoint->edesc->bEndpointAddress,
826: sbuf));
1.23 augustss 827: if (ehcidebug > 2) {
828: ehci_dump_sqh(epipe->sqh);
829: ehci_dump_sqtds(ex->sqtdstart);
830: }
1.18 augustss 831: #endif
1.98 augustss 832: /* low&full speed has an extra error flag */
833: if (EHCI_QH_GET_EPS(epipe->sqh->qh.qh_endp) !=
834: EHCI_QH_SPEED_HIGH)
835: status &= EHCI_QTD_STATERRS | EHCI_QTD_PINGSTATE;
836: else
837: status &= EHCI_QTD_STATERRS;
838: if (status == 0) /* no other errors means a stall */
1.18 augustss 839: xfer->status = USBD_STALLED;
840: else
841: xfer->status = USBD_IOERROR; /* more info XXX */
1.98 augustss 842: /* XXX need to reset TT on missed microframe */
843: if (status & EHCI_QTD_MISSEDMICRO) {
844: ehci_softc_t *sc = (ehci_softc_t *)
845: xfer->pipe->device->bus;
846:
847: printf("%s: missed microframe, TT reset not "
848: "implemented, hub might be inoperational\n",
849: USBDEVNAME(sc->sc_bus.bdev));
850: }
1.18 augustss 851: } else {
852: xfer->status = USBD_NORMAL_COMPLETION;
853: }
854:
855: usb_transfer_complete(xfer);
1.22 augustss 856: DPRINTFN(/*12*/2, ("ehci_idone: ex=%p done\n", ex));
1.5 augustss 857: }
858:
1.15 augustss 859: /*
860: * Wait here until controller claims to have an interrupt.
1.18 augustss 861: * Then call ehci_intr and return. Use timeout to avoid waiting
1.15 augustss 862: * too long.
863: */
864: void
865: ehci_waitintr(ehci_softc_t *sc, usbd_xfer_handle xfer)
866: {
1.97 augustss 867: int timo;
1.15 augustss 868: u_int32_t intrs;
869:
870: xfer->status = USBD_IN_PROGRESS;
1.97 augustss 871: for (timo = xfer->timeout; timo >= 0; timo--) {
1.15 augustss 872: usb_delay_ms(&sc->sc_bus, 1);
1.17 augustss 873: if (sc->sc_dying)
874: break;
1.15 augustss 875: intrs = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS)) &
876: sc->sc_eintrs;
877: DPRINTFN(15,("ehci_waitintr: 0x%04x\n", intrs));
1.70 yamt 878: #ifdef EHCI_DEBUG
1.15 augustss 879: if (ehcidebug > 15)
1.18 augustss 880: ehci_dump_regs(sc);
1.15 augustss 881: #endif
882: if (intrs) {
883: ehci_intr1(sc);
884: if (xfer->status != USBD_IN_PROGRESS)
885: return;
886: }
887: }
888:
889: /* Timeout */
890: DPRINTF(("ehci_waitintr: timeout\n"));
891: xfer->status = USBD_TIMEOUT;
892: usb_transfer_complete(xfer);
893: /* XXX should free TD */
894: }
895:
1.5 augustss 896: void
897: ehci_poll(struct usbd_bus *bus)
898: {
899: ehci_softc_t *sc = (ehci_softc_t *)bus;
900: #ifdef EHCI_DEBUG
901: static int last;
902: int new;
1.6 augustss 903: new = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS));
1.5 augustss 904: if (new != last) {
905: DPRINTFN(10,("ehci_poll: intrs=0x%04x\n", new));
906: last = new;
907: }
908: #endif
909:
1.6 augustss 910: if (EOREAD4(sc, EHCI_USBSTS) & sc->sc_eintrs)
1.5 augustss 911: ehci_intr1(sc);
912: }
913:
1.1 augustss 914: int
915: ehci_detach(struct ehci_softc *sc, int flags)
916: {
917: int rv = 0;
918:
919: if (sc->sc_child != NULL)
920: rv = config_detach(sc->sc_child, flags);
1.33 augustss 921:
1.1 augustss 922: if (rv != 0)
923: return (rv);
924:
1.108 xtraeme 925: usb_uncallout(sc->sc_tmo_intrlist, ehci_intrlist_timeout, sc);
1.6 augustss 926:
1.1 augustss 927: if (sc->sc_powerhook != NULL)
928: powerhook_disestablish(sc->sc_powerhook);
929: if (sc->sc_shutdownhook != NULL)
930: shutdownhook_disestablish(sc->sc_shutdownhook);
931:
1.17 augustss 932: usb_delay_ms(&sc->sc_bus, 300); /* XXX let stray task complete */
1.15 augustss 933:
1.1 augustss 934: /* XXX free other data structures XXX */
935:
936: return (rv);
937: }
938:
939:
940: int
941: ehci_activate(device_ptr_t self, enum devact act)
942: {
943: struct ehci_softc *sc = (struct ehci_softc *)self;
944: int rv = 0;
945:
946: switch (act) {
947: case DVACT_ACTIVATE:
948: return (EOPNOTSUPP);
949:
950: case DVACT_DEACTIVATE:
1.124 ! kiyohara 951: sc->sc_dying = 1;
1.1 augustss 952: if (sc->sc_child != NULL)
953: rv = config_deactivate(sc->sc_child);
954: break;
955: }
956: return (rv);
957: }
958:
1.5 augustss 959: /*
960: * Handle suspend/resume.
961: *
962: * We need to switch to polling mode here, because this routine is
1.73 augustss 963: * called from an interrupt context. This is all right since we
1.5 augustss 964: * are almost suspended anyway.
965: */
966: void
967: ehci_power(int why, void *v)
968: {
969: ehci_softc_t *sc = v;
1.74 augustss 970: u_int32_t cmd, hcr;
971: int s, i;
1.5 augustss 972:
973: #ifdef EHCI_DEBUG
974: DPRINTF(("ehci_power: sc=%p, why=%d\n", sc, why));
1.74 augustss 975: if (ehcidebug > 0)
976: ehci_dump_regs(sc);
1.5 augustss 977: #endif
978:
979: s = splhardusb();
980: switch (why) {
981: case PWR_SUSPEND:
982: case PWR_STANDBY:
983: sc->sc_bus.use_polling++;
1.74 augustss 984:
985: sc->sc_cmd = EOREAD4(sc, EHCI_USBCMD);
986:
987: cmd = sc->sc_cmd & ~(EHCI_CMD_ASE | EHCI_CMD_PSE);
988: EOWRITE4(sc, EHCI_USBCMD, cmd);
989:
990: for (i = 0; i < 100; i++) {
991: hcr = EOREAD4(sc, EHCI_USBSTS) &
992: (EHCI_STS_ASS | EHCI_STS_PSS);
993: if (hcr == 0)
994: break;
995:
996: usb_delay_ms(&sc->sc_bus, 1);
997: }
998: if (hcr != 0) {
999: printf("%s: reset timeout\n",
1000: USBDEVNAME(sc->sc_bus.bdev));
1001: }
1002:
1003: cmd &= ~EHCI_CMD_RS;
1004: EOWRITE4(sc, EHCI_USBCMD, cmd);
1005:
1006: for (i = 0; i < 100; i++) {
1007: hcr = EOREAD4(sc, EHCI_USBSTS) & EHCI_STS_HCH;
1008: if (hcr == EHCI_STS_HCH)
1009: break;
1010:
1011: usb_delay_ms(&sc->sc_bus, 1);
1012: }
1013: if (hcr != EHCI_STS_HCH) {
1014: printf("%s: config timeout\n",
1015: USBDEVNAME(sc->sc_bus.bdev));
1.5 augustss 1016: }
1.74 augustss 1017:
1.5 augustss 1018: sc->sc_bus.use_polling--;
1019: break;
1.74 augustss 1020:
1.5 augustss 1021: case PWR_RESUME:
1022: sc->sc_bus.use_polling++;
1.74 augustss 1023:
1024: /* restore things in case the bios sucks */
1025: EOWRITE4(sc, EHCI_CTRLDSSEGMENT, 0);
1026: EOWRITE4(sc, EHCI_PERIODICLISTBASE, DMAADDR(&sc->sc_fldma, 0));
1027: EOWRITE4(sc, EHCI_ASYNCLISTADDR,
1028: sc->sc_async_head->physaddr | EHCI_LINK_QH);
1029: EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs);
1030:
1031: EOWRITE4(sc, EHCI_USBCMD, sc->sc_cmd);
1032:
1033: for (i = 0; i < 100; i++) {
1034: hcr = EOREAD4(sc, EHCI_USBSTS) & EHCI_STS_HCH;
1035: if (hcr != EHCI_STS_HCH)
1036: break;
1037:
1038: usb_delay_ms(&sc->sc_bus, 1);
1039: }
1040: if (hcr == EHCI_STS_HCH) {
1041: printf("%s: config timeout\n",
1042: USBDEVNAME(sc->sc_bus.bdev));
1043: }
1044:
1045: usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT);
1046:
1.5 augustss 1047: sc->sc_bus.use_polling--;
1048: break;
1049: case PWR_SOFTSUSPEND:
1050: case PWR_SOFTSTANDBY:
1051: case PWR_SOFTRESUME:
1052: break;
1053: }
1054: splx(s);
1.74 augustss 1055:
1056: #ifdef EHCI_DEBUG
1057: DPRINTF(("ehci_power: sc=%p\n", sc));
1058: if (ehcidebug > 0)
1059: ehci_dump_regs(sc);
1060: #endif
1.5 augustss 1061: }
1062:
1063: /*
1064: * Shut down the controller when the system is going down.
1065: */
1066: void
1067: ehci_shutdown(void *v)
1068: {
1.8 augustss 1069: ehci_softc_t *sc = v;
1.5 augustss 1070:
1071: DPRINTF(("ehci_shutdown: stopping the HC\n"));
1.8 augustss 1072: EOWRITE4(sc, EHCI_USBCMD, 0); /* Halt controller */
1073: EOWRITE4(sc, EHCI_USBCMD, EHCI_CMD_HCRESET);
1.5 augustss 1074: }
1075:
1076: usbd_status
1077: ehci_allocm(struct usbd_bus *bus, usb_dma_t *dma, u_int32_t size)
1078: {
1079: struct ehci_softc *sc = (struct ehci_softc *)bus;
1.25 augustss 1080: usbd_status err;
1.5 augustss 1081:
1.25 augustss 1082: err = usb_allocmem(&sc->sc_bus, size, 0, dma);
1.90 fvdl 1083: if (err == USBD_NOMEM)
1084: err = usb_reserve_allocm(&sc->sc_dma_reserve, dma, size);
1.25 augustss 1085: #ifdef EHCI_DEBUG
1086: if (err)
1087: printf("ehci_allocm: usb_allocmem()=%d\n", err);
1088: #endif
1089: return (err);
1.5 augustss 1090: }
1091:
1092: void
1093: ehci_freem(struct usbd_bus *bus, usb_dma_t *dma)
1094: {
1095: struct ehci_softc *sc = (struct ehci_softc *)bus;
1096:
1.90 fvdl 1097: if (dma->block->flags & USB_DMA_RESERVE) {
1098: usb_reserve_freem(&((struct ehci_softc *)bus)->sc_dma_reserve,
1099: dma);
1100: return;
1101: }
1.5 augustss 1102: usb_freemem(&sc->sc_bus, dma);
1103: }
1104:
1105: usbd_xfer_handle
1106: ehci_allocx(struct usbd_bus *bus)
1107: {
1108: struct ehci_softc *sc = (struct ehci_softc *)bus;
1109: usbd_xfer_handle xfer;
1110:
1111: xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers);
1.28 augustss 1112: if (xfer != NULL) {
1.32 lukem 1113: SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, next);
1.28 augustss 1114: #ifdef DIAGNOSTIC
1115: if (xfer->busy_free != XFER_FREE) {
1.72 augustss 1116: printf("ehci_allocx: xfer=%p not free, 0x%08x\n", xfer,
1.28 augustss 1117: xfer->busy_free);
1118: }
1119: #endif
1120: } else {
1.15 augustss 1121: xfer = malloc(sizeof(struct ehci_xfer), M_USB, M_NOWAIT);
1.28 augustss 1122: }
1.18 augustss 1123: if (xfer != NULL) {
1.71 augustss 1124: memset(xfer, 0, sizeof(struct ehci_xfer));
1.18 augustss 1125: #ifdef DIAGNOSTIC
1126: EXFER(xfer)->isdone = 1;
1127: xfer->busy_free = XFER_BUSY;
1128: #endif
1129: }
1.5 augustss 1130: return (xfer);
1131: }
1132:
1133: void
1134: ehci_freex(struct usbd_bus *bus, usbd_xfer_handle xfer)
1135: {
1136: struct ehci_softc *sc = (struct ehci_softc *)bus;
1137:
1.18 augustss 1138: #ifdef DIAGNOSTIC
1139: if (xfer->busy_free != XFER_BUSY) {
1140: printf("ehci_freex: xfer=%p not busy, 0x%08x\n", xfer,
1141: xfer->busy_free);
1142: }
1143: xfer->busy_free = XFER_FREE;
1144: if (!EXFER(xfer)->isdone) {
1145: printf("ehci_freex: !isdone\n");
1146: }
1147: #endif
1.5 augustss 1148: SIMPLEQ_INSERT_HEAD(&sc->sc_free_xfers, xfer, next);
1149: }
1150:
1151: Static void
1152: ehci_device_clear_toggle(usbd_pipe_handle pipe)
1153: {
1.15 augustss 1154: struct ehci_pipe *epipe = (struct ehci_pipe *)pipe;
1155:
1.23 augustss 1156: DPRINTF(("ehci_device_clear_toggle: epipe=%p status=0x%x\n",
1157: epipe, epipe->sqh->qh.qh_qtd.qtd_status));
1.22 augustss 1158: #ifdef USB_DEBUG
1159: if (ehcidebug)
1160: usbd_dump_pipe(pipe);
1.5 augustss 1161: #endif
1.55 mycroft 1162: epipe->nexttoggle = 0;
1.5 augustss 1163: }
1164:
1165: Static void
1.115 christos 1166: ehci_noop(usbd_pipe_handle pipe)
1.5 augustss 1167: {
1168: }
1169:
1170: #ifdef EHCI_DEBUG
1171: void
1.18 augustss 1172: ehci_dump_regs(ehci_softc_t *sc)
1.5 augustss 1173: {
1.6 augustss 1174: int i;
1175: printf("cmd=0x%08x, sts=0x%08x, ien=0x%08x\n",
1176: EOREAD4(sc, EHCI_USBCMD),
1177: EOREAD4(sc, EHCI_USBSTS),
1178: EOREAD4(sc, EHCI_USBINTR));
1.29 augustss 1179: printf("frindex=0x%08x ctrdsegm=0x%08x periodic=0x%08x async=0x%08x\n",
1.15 augustss 1180: EOREAD4(sc, EHCI_FRINDEX),
1181: EOREAD4(sc, EHCI_CTRLDSSEGMENT),
1182: EOREAD4(sc, EHCI_PERIODICLISTBASE),
1183: EOREAD4(sc, EHCI_ASYNCLISTADDR));
1.6 augustss 1184: for (i = 1; i <= sc->sc_noport; i++)
1.33 augustss 1185: printf("port %d status=0x%08x\n", i,
1.6 augustss 1186: EOREAD4(sc, EHCI_PORTSC(i)));
1.39 martin 1187: }
1188:
1.40 martin 1189: /*
1190: * Unused function - this is meant to be called from a kernel
1191: * debugger.
1192: */
1.39 martin 1193: void
1194: ehci_dump()
1195: {
1196: ehci_dump_regs(theehci);
1.6 augustss 1197: }
1198:
1199: void
1.15 augustss 1200: ehci_dump_link(ehci_link_t link, int type)
1.9 augustss 1201: {
1.15 augustss 1202: link = le32toh(link);
1203: printf("0x%08x", link);
1.9 augustss 1204: if (link & EHCI_LINK_TERMINATE)
1.15 augustss 1205: printf("<T>");
1206: else {
1207: printf("<");
1208: if (type) {
1209: switch (EHCI_LINK_TYPE(link)) {
1210: case EHCI_LINK_ITD: printf("ITD"); break;
1211: case EHCI_LINK_QH: printf("QH"); break;
1212: case EHCI_LINK_SITD: printf("SITD"); break;
1213: case EHCI_LINK_FSTN: printf("FSTN"); break;
1.16 augustss 1214: }
1.15 augustss 1215: }
1.9 augustss 1216: printf(">");
1.15 augustss 1217: }
1218: }
1219:
1220: void
1221: ehci_dump_sqtds(ehci_soft_qtd_t *sqtd)
1222: {
1.29 augustss 1223: int i;
1224: u_int32_t stop;
1225:
1226: stop = 0;
1227: for (i = 0; sqtd && i < 20 && !stop; sqtd = sqtd->nextqtd, i++) {
1.15 augustss 1228: ehci_dump_sqtd(sqtd);
1.72 augustss 1229: stop = sqtd->qtd.qtd_next & htole32(EHCI_LINK_TERMINATE);
1.29 augustss 1230: }
1231: if (sqtd)
1232: printf("dump aborted, too many TDs\n");
1.9 augustss 1233: }
1234:
1235: void
1236: ehci_dump_sqtd(ehci_soft_qtd_t *sqtd)
1237: {
1238: printf("QTD(%p) at 0x%08x:\n", sqtd, sqtd->physaddr);
1239: ehci_dump_qtd(&sqtd->qtd);
1240: }
1241:
1242: void
1243: ehci_dump_qtd(ehci_qtd_t *qtd)
1244: {
1245: u_int32_t s;
1.15 augustss 1246: char sbuf[128];
1.9 augustss 1247:
1.15 augustss 1248: printf(" next="); ehci_dump_link(qtd->qtd_next, 0);
1249: printf(" altnext="); ehci_dump_link(qtd->qtd_altnext, 0);
1.9 augustss 1250: printf("\n");
1.15 augustss 1251: s = le32toh(qtd->qtd_status);
1252: bitmask_snprintf(EHCI_QTD_GET_STATUS(s),
1253: "\20\10ACTIVE\7HALTED\6BUFERR\5BABBLE\4XACTERR"
1254: "\3MISSED\2SPLIT\1PING", sbuf, sizeof(sbuf));
1.9 augustss 1255: printf(" status=0x%08x: toggle=%d bytes=0x%x ioc=%d c_page=0x%x\n",
1256: s, EHCI_QTD_GET_TOGGLE(s), EHCI_QTD_GET_BYTES(s),
1257: EHCI_QTD_GET_IOC(s), EHCI_QTD_GET_C_PAGE(s));
1.15 augustss 1258: printf(" cerr=%d pid=%d stat=0x%s\n", EHCI_QTD_GET_CERR(s),
1259: EHCI_QTD_GET_PID(s), sbuf);
1.9 augustss 1260: for (s = 0; s < 5; s++)
1.15 augustss 1261: printf(" buffer[%d]=0x%08x\n", s, le32toh(qtd->qtd_buffer[s]));
1.9 augustss 1262: }
1263:
1264: void
1265: ehci_dump_sqh(ehci_soft_qh_t *sqh)
1266: {
1267: ehci_qh_t *qh = &sqh->qh;
1.15 augustss 1268: u_int32_t endp, endphub;
1.9 augustss 1269:
1270: printf("QH(%p) at 0x%08x:\n", sqh, sqh->physaddr);
1.15 augustss 1271: printf(" link="); ehci_dump_link(qh->qh_link, 1); printf("\n");
1272: endp = le32toh(qh->qh_endp);
1273: printf(" endp=0x%08x\n", endp);
1274: printf(" addr=0x%02x inact=%d endpt=%d eps=%d dtc=%d hrecl=%d\n",
1275: EHCI_QH_GET_ADDR(endp), EHCI_QH_GET_INACT(endp),
1276: EHCI_QH_GET_ENDPT(endp), EHCI_QH_GET_EPS(endp),
1277: EHCI_QH_GET_DTC(endp), EHCI_QH_GET_HRECL(endp));
1278: printf(" mpl=0x%x ctl=%d nrl=%d\n",
1279: EHCI_QH_GET_MPL(endp), EHCI_QH_GET_CTL(endp),
1280: EHCI_QH_GET_NRL(endp));
1281: endphub = le32toh(qh->qh_endphub);
1282: printf(" endphub=0x%08x\n", endphub);
1283: printf(" smask=0x%02x cmask=0x%02x huba=0x%02x port=%d mult=%d\n",
1284: EHCI_QH_GET_SMASK(endphub), EHCI_QH_GET_CMASK(endphub),
1285: EHCI_QH_GET_HUBA(endphub), EHCI_QH_GET_PORT(endphub),
1286: EHCI_QH_GET_MULT(endphub));
1287: printf(" curqtd="); ehci_dump_link(qh->qh_curqtd, 0); printf("\n");
1.12 augustss 1288: printf("Overlay qTD:\n");
1.9 augustss 1289: ehci_dump_qtd(&qh->qh_qtd);
1290: }
1291:
1.38 martin 1292: #ifdef DIAGNOSTIC
1.18 augustss 1293: Static void
1294: ehci_dump_exfer(struct ehci_xfer *ex)
1295: {
1296: printf("ehci_dump_exfer: ex=%p\n", ex);
1297: }
1.38 martin 1298: #endif
1.5 augustss 1299: #endif
1300:
1301: usbd_status
1302: ehci_open(usbd_pipe_handle pipe)
1303: {
1304: usbd_device_handle dev = pipe->device;
1305: ehci_softc_t *sc = (ehci_softc_t *)dev->bus;
1306: usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc;
1307: u_int8_t addr = dev->address;
1308: u_int8_t xfertype = ed->bmAttributes & UE_XFERTYPE;
1309: struct ehci_pipe *epipe = (struct ehci_pipe *)pipe;
1.10 augustss 1310: ehci_soft_qh_t *sqh;
1311: usbd_status err;
1312: int s;
1.78 augustss 1313: int ival, speed, naks;
1.80 augustss 1314: int hshubaddr, hshubport;
1.5 augustss 1315:
1316: DPRINTFN(1, ("ehci_open: pipe=%p, addr=%d, endpt=%d (%d)\n",
1317: pipe, addr, ed->bEndpointAddress, sc->sc_addr));
1318:
1.80 augustss 1319: if (dev->myhsport) {
1320: hshubaddr = dev->myhsport->parent->address;
1321: hshubport = dev->myhsport->portno;
1322: } else {
1323: hshubaddr = 0;
1324: hshubport = 0;
1325: }
1326:
1.17 augustss 1327: if (sc->sc_dying)
1328: return (USBD_IOERROR);
1329:
1.55 mycroft 1330: epipe->nexttoggle = 0;
1331:
1.5 augustss 1332: if (addr == sc->sc_addr) {
1333: switch (ed->bEndpointAddress) {
1334: case USB_CONTROL_ENDPOINT:
1335: pipe->methods = &ehci_root_ctrl_methods;
1336: break;
1337: case UE_DIR_IN | EHCI_INTR_ENDPT:
1338: pipe->methods = &ehci_root_intr_methods;
1339: break;
1340: default:
1341: return (USBD_INVAL);
1342: }
1.10 augustss 1343: return (USBD_NORMAL_COMPLETION);
1344: }
1345:
1.24 augustss 1346: /* XXX All this stuff is only valid for async. */
1.11 augustss 1347: switch (dev->speed) {
1348: case USB_SPEED_LOW: speed = EHCI_QH_SPEED_LOW; break;
1349: case USB_SPEED_FULL: speed = EHCI_QH_SPEED_FULL; break;
1350: case USB_SPEED_HIGH: speed = EHCI_QH_SPEED_HIGH; break;
1.37 provos 1351: default: panic("ehci_open: bad device speed %d", dev->speed);
1.11 augustss 1352: }
1.99 augustss 1353: if (speed != EHCI_QH_SPEED_HIGH && xfertype == UE_ISOCHRONOUS) {
1354: printf("%s: *** WARNING: opening low/full speed isoc device, "
1355: "this does not work yet.\n",
1.80 augustss 1356: USBDEVNAME(sc->sc_bus.bdev));
1357: DPRINTFN(1,("ehci_open: hshubaddr=%d hshubport=%d\n",
1358: hshubaddr, hshubport));
1.99 augustss 1359: return USBD_INVAL;
1.80 augustss 1360: }
1361:
1.10 augustss 1362: naks = 8; /* XXX */
1363: sqh = ehci_alloc_sqh(sc);
1364: if (sqh == NULL)
1.116 drochner 1365: return (USBD_NOMEM);
1.10 augustss 1366: /* qh_link filled when the QH is added */
1367: sqh->qh.qh_endp = htole32(
1368: EHCI_QH_SET_ADDR(addr) |
1.56 mycroft 1369: EHCI_QH_SET_ENDPT(UE_GET_ADDR(ed->bEndpointAddress)) |
1.55 mycroft 1370: EHCI_QH_SET_EPS(speed) |
1371: EHCI_QH_DTC |
1.10 augustss 1372: EHCI_QH_SET_MPL(UGETW(ed->wMaxPacketSize)) |
1373: (speed != EHCI_QH_SPEED_HIGH && xfertype == UE_CONTROL ?
1374: EHCI_QH_CTL : 0) |
1375: EHCI_QH_SET_NRL(naks)
1376: );
1377: sqh->qh.qh_endphub = htole32(
1.78 augustss 1378: EHCI_QH_SET_MULT(1) |
1.80 augustss 1379: EHCI_QH_SET_HUBA(hshubaddr) |
1380: EHCI_QH_SET_PORT(hshubport) |
1.93 augustss 1381: EHCI_QH_SET_CMASK(0x08) | /* XXX */
1382: EHCI_QH_SET_SMASK(xfertype == UE_INTERRUPT ? 0x02 : 0)
1.10 augustss 1383: );
1.11 augustss 1384: sqh->qh.qh_curqtd = EHCI_NULL;
1385: /* Fill the overlay qTD */
1386: sqh->qh.qh_qtd.qtd_next = EHCI_NULL;
1387: sqh->qh.qh_qtd.qtd_altnext = EHCI_NULL;
1.15 augustss 1388: sqh->qh.qh_qtd.qtd_status = htole32(0);
1.10 augustss 1389:
1390: epipe->sqh = sqh;
1.5 augustss 1391:
1.10 augustss 1392: switch (xfertype) {
1393: case UE_CONTROL:
1.33 augustss 1394: err = usb_allocmem(&sc->sc_bus, sizeof(usb_device_request_t),
1.10 augustss 1395: 0, &epipe->u.ctl.reqdma);
1.25 augustss 1396: #ifdef EHCI_DEBUG
1397: if (err)
1398: printf("ehci_open: usb_allocmem()=%d\n", err);
1399: #endif
1.10 augustss 1400: if (err)
1.116 drochner 1401: goto bad;
1.11 augustss 1402: pipe->methods = &ehci_device_ctrl_methods;
1.10 augustss 1403: s = splusb();
1.11 augustss 1404: ehci_add_qh(sqh, sc->sc_async_head);
1.10 augustss 1405: splx(s);
1406: break;
1407: case UE_BULK:
1408: pipe->methods = &ehci_device_bulk_methods;
1409: s = splusb();
1.11 augustss 1410: ehci_add_qh(sqh, sc->sc_async_head);
1.10 augustss 1411: splx(s);
1412: break;
1.24 augustss 1413: case UE_INTERRUPT:
1414: pipe->methods = &ehci_device_intr_methods;
1.78 augustss 1415: ival = pipe->interval;
1.116 drochner 1416: if (ival == USBD_DEFAULT_INTERVAL) {
1417: if (speed == EHCI_QH_SPEED_HIGH) {
1418: if (ed->bInterval > 16) {
1419: /*
1420: * illegal with high-speed, but there
1421: * were documentation bugs in the spec,
1422: * so be generous
1423: */
1424: ival = 256;
1425: } else
1426: ival = (1 << (ed->bInterval - 1)) / 8;
1427: } else
1428: ival = ed->bInterval;
1429: }
1430: err = ehci_device_setintr(sc, sqh, ival);
1431: if (err)
1432: goto bad;
1433: break;
1.24 augustss 1434: case UE_ISOCHRONOUS:
1435: pipe->methods = &ehci_device_isoc_methods;
1.116 drochner 1436: /* FALLTHROUGH */
1.10 augustss 1437: default:
1.116 drochner 1438: err = USBD_INVAL;
1439: goto bad;
1.5 augustss 1440: }
1441: return (USBD_NORMAL_COMPLETION);
1442:
1.116 drochner 1443: bad:
1.11 augustss 1444: ehci_free_sqh(sc, sqh);
1.116 drochner 1445: return (err);
1.10 augustss 1446: }
1447:
1448: /*
1449: * Add an ED to the schedule. Called at splusb().
1450: */
1451: void
1452: ehci_add_qh(ehci_soft_qh_t *sqh, ehci_soft_qh_t *head)
1453: {
1454: SPLUSBCHECK;
1455:
1456: sqh->next = head->next;
1457: sqh->qh.qh_link = head->qh.qh_link;
1458: head->next = sqh;
1.15 augustss 1459: head->qh.qh_link = htole32(sqh->physaddr | EHCI_LINK_QH);
1.10 augustss 1460:
1461: #ifdef EHCI_DEBUG
1.22 augustss 1462: if (ehcidebug > 5) {
1.10 augustss 1463: printf("ehci_add_qh:\n");
1464: ehci_dump_sqh(sqh);
1465: }
1.5 augustss 1466: #endif
1467: }
1468:
1.10 augustss 1469: /*
1470: * Remove an ED from the schedule. Called at splusb().
1471: */
1472: void
1473: ehci_rem_qh(ehci_softc_t *sc, ehci_soft_qh_t *sqh, ehci_soft_qh_t *head)
1474: {
1.33 augustss 1475: ehci_soft_qh_t *p;
1.10 augustss 1476:
1477: SPLUSBCHECK;
1478: /* XXX */
1.42 augustss 1479: for (p = head; p != NULL && p->next != sqh; p = p->next)
1.10 augustss 1480: ;
1481: if (p == NULL)
1.37 provos 1482: panic("ehci_rem_qh: ED not found");
1.10 augustss 1483: p->next = sqh->next;
1484: p->qh.qh_link = sqh->qh.qh_link;
1485:
1.11 augustss 1486: ehci_sync_hc(sc);
1487: }
1488:
1.23 augustss 1489: void
1490: ehci_set_qh_qtd(ehci_soft_qh_t *sqh, ehci_soft_qtd_t *sqtd)
1491: {
1.85 augustss 1492: int i;
1.87 augustss 1493: u_int32_t status;
1.85 augustss 1494:
1.87 augustss 1495: /* Save toggle bit and ping status. */
1496: status = sqh->qh.qh_qtd.qtd_status &
1497: htole32(EHCI_QTD_TOGGLE_MASK |
1498: EHCI_QTD_SET_STATUS(EHCI_QTD_PINGSTATE));
1.85 augustss 1499: /* Set HALTED to make hw leave it alone. */
1500: sqh->qh.qh_qtd.qtd_status =
1501: htole32(EHCI_QTD_SET_STATUS(EHCI_QTD_HALTED));
1.23 augustss 1502: sqh->qh.qh_curqtd = 0;
1503: sqh->qh.qh_qtd.qtd_next = htole32(sqtd->physaddr);
1.85 augustss 1504: sqh->qh.qh_qtd.qtd_altnext = 0;
1505: for (i = 0; i < EHCI_QTD_NBUFFERS; i++)
1506: sqh->qh.qh_qtd.qtd_buffer[i] = 0;
1.23 augustss 1507: sqh->sqtd = sqtd;
1.87 augustss 1508: /* Set !HALTED && !ACTIVE to start execution, preserve some fields */
1509: sqh->qh.qh_qtd.qtd_status = status;
1.23 augustss 1510: }
1511:
1.11 augustss 1512: /*
1513: * Ensure that the HC has released all references to the QH. We do this
1514: * by asking for a Async Advance Doorbell interrupt and then we wait for
1515: * the interrupt.
1516: * To make this easier we first obtain exclusive use of the doorbell.
1517: */
1518: void
1519: ehci_sync_hc(ehci_softc_t *sc)
1520: {
1.15 augustss 1521: int s, error;
1.11 augustss 1522:
1.12 augustss 1523: if (sc->sc_dying) {
1524: DPRINTFN(2,("ehci_sync_hc: dying\n"));
1525: return;
1526: }
1527: DPRINTFN(2,("ehci_sync_hc: enter\n"));
1.76 augustss 1528: usb_lockmgr(&sc->sc_doorbell_lock, LK_EXCLUSIVE, NULL); /* get doorbell */
1.10 augustss 1529: s = splhardusb();
1530: /* ask for doorbell */
1531: EOWRITE4(sc, EHCI_USBCMD, EOREAD4(sc, EHCI_USBCMD) | EHCI_CMD_IAAD);
1.15 augustss 1532: DPRINTFN(1,("ehci_sync_hc: cmd=0x%08x sts=0x%08x\n",
1533: EOREAD4(sc, EHCI_USBCMD), EOREAD4(sc, EHCI_USBSTS)));
1534: error = tsleep(&sc->sc_async_head, PZERO, "ehcidi", hz); /* bell wait */
1535: DPRINTFN(1,("ehci_sync_hc: cmd=0x%08x sts=0x%08x\n",
1536: EOREAD4(sc, EHCI_USBCMD), EOREAD4(sc, EHCI_USBSTS)));
1.10 augustss 1537: splx(s);
1.76 augustss 1538: usb_lockmgr(&sc->sc_doorbell_lock, LK_RELEASE, NULL); /* release doorbell */
1.15 augustss 1539: #ifdef DIAGNOSTIC
1540: if (error)
1541: printf("ehci_sync_hc: tsleep() = %d\n", error);
1542: #endif
1.12 augustss 1543: DPRINTFN(2,("ehci_sync_hc: exit\n"));
1.10 augustss 1544: }
1545:
1.5 augustss 1546: /***********/
1547:
1548: /*
1549: * Data structures and routines to emulate the root hub.
1550: */
1551: Static usb_device_descriptor_t ehci_devd = {
1552: USB_DEVICE_DESCRIPTOR_SIZE,
1553: UDESC_DEVICE, /* type */
1554: {0x00, 0x02}, /* USB version */
1555: UDCLASS_HUB, /* class */
1556: UDSUBCLASS_HUB, /* subclass */
1.11 augustss 1557: UDPROTO_HSHUBSTT, /* protocol */
1.5 augustss 1558: 64, /* max packet */
1559: {0},{0},{0x00,0x01}, /* device id */
1560: 1,2,0, /* string indicies */
1561: 1 /* # of configurations */
1562: };
1563:
1.123 drochner 1564: Static const usb_device_qualifier_t ehci_odevd = {
1.11 augustss 1565: USB_DEVICE_DESCRIPTOR_SIZE,
1566: UDESC_DEVICE_QUALIFIER, /* type */
1567: {0x00, 0x02}, /* USB version */
1568: UDCLASS_HUB, /* class */
1569: UDSUBCLASS_HUB, /* subclass */
1570: UDPROTO_FSHUB, /* protocol */
1571: 64, /* max packet */
1572: 1, /* # of configurations */
1573: 0
1574: };
1575:
1.123 drochner 1576: Static const usb_config_descriptor_t ehci_confd = {
1.5 augustss 1577: USB_CONFIG_DESCRIPTOR_SIZE,
1578: UDESC_CONFIG,
1579: {USB_CONFIG_DESCRIPTOR_SIZE +
1580: USB_INTERFACE_DESCRIPTOR_SIZE +
1581: USB_ENDPOINT_DESCRIPTOR_SIZE},
1582: 1,
1583: 1,
1584: 0,
1.120 drochner 1585: UC_ATTR_MBO | UC_SELF_POWERED,
1.5 augustss 1586: 0 /* max power */
1587: };
1588:
1.123 drochner 1589: Static const usb_interface_descriptor_t ehci_ifcd = {
1.5 augustss 1590: USB_INTERFACE_DESCRIPTOR_SIZE,
1591: UDESC_INTERFACE,
1592: 0,
1593: 0,
1594: 1,
1595: UICLASS_HUB,
1596: UISUBCLASS_HUB,
1.11 augustss 1597: UIPROTO_HSHUBSTT,
1.5 augustss 1598: 0
1599: };
1600:
1.123 drochner 1601: Static const usb_endpoint_descriptor_t ehci_endpd = {
1.5 augustss 1602: USB_ENDPOINT_DESCRIPTOR_SIZE,
1603: UDESC_ENDPOINT,
1604: UE_DIR_IN | EHCI_INTR_ENDPT,
1605: UE_INTERRUPT,
1606: {8, 0}, /* max packet */
1.118 drochner 1607: 12
1.5 augustss 1608: };
1609:
1.123 drochner 1610: Static const usb_hub_descriptor_t ehci_hubd = {
1.5 augustss 1611: USB_HUB_DESCRIPTOR_SIZE,
1612: UDESC_HUB,
1613: 0,
1614: {0,0},
1615: 0,
1616: 0,
1.111 christos 1617: {""},
1618: {""},
1.5 augustss 1619: };
1620:
1621: Static int
1.104 christos 1622: ehci_str(usb_string_descriptor_t *p, int l, const char *s)
1.5 augustss 1623: {
1624: int i;
1625:
1626: if (l == 0)
1627: return (0);
1628: p->bLength = 2 * strlen(s) + 2;
1629: if (l == 1)
1630: return (1);
1631: p->bDescriptorType = UDESC_STRING;
1632: l -= 2;
1633: for (i = 0; s[i] && l > 1; i++, l -= 2)
1634: USETW2(p->bString[i], 0, s[i]);
1635: return (2*i+2);
1636: }
1637:
1638: /*
1639: * Simulate a hardware hub by handling all the necessary requests.
1640: */
1641: Static usbd_status
1642: ehci_root_ctrl_transfer(usbd_xfer_handle xfer)
1643: {
1644: usbd_status err;
1645:
1646: /* Insert last in queue. */
1647: err = usb_insert_transfer(xfer);
1648: if (err)
1649: return (err);
1650:
1651: /* Pipe isn't running, start first */
1652: return (ehci_root_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
1653: }
1654:
1655: Static usbd_status
1656: ehci_root_ctrl_start(usbd_xfer_handle xfer)
1657: {
1658: ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus;
1659: usb_device_request_t *req;
1660: void *buf = NULL;
1661: int port, i;
1662: int s, len, value, index, l, totlen = 0;
1663: usb_port_status_t ps;
1664: usb_hub_descriptor_t hubd;
1665: usbd_status err;
1666: u_int32_t v;
1667:
1668: if (sc->sc_dying)
1669: return (USBD_IOERROR);
1670:
1671: #ifdef DIAGNOSTIC
1672: if (!(xfer->rqflags & URQ_REQUEST))
1673: /* XXX panic */
1674: return (USBD_INVAL);
1675: #endif
1676: req = &xfer->request;
1677:
1.72 augustss 1678: DPRINTFN(4,("ehci_root_ctrl_start: type=0x%02x request=%02x\n",
1.5 augustss 1679: req->bmRequestType, req->bRequest));
1680:
1681: len = UGETW(req->wLength);
1682: value = UGETW(req->wValue);
1683: index = UGETW(req->wIndex);
1684:
1685: if (len != 0)
1.30 augustss 1686: buf = KERNADDR(&xfer->dmabuf, 0);
1.5 augustss 1687:
1688: #define C(x,y) ((x) | ((y) << 8))
1689: switch(C(req->bRequest, req->bmRequestType)) {
1690: case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE):
1691: case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE):
1692: case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT):
1.33 augustss 1693: /*
1.5 augustss 1694: * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops
1695: * for the integrated root hub.
1696: */
1697: break;
1698: case C(UR_GET_CONFIG, UT_READ_DEVICE):
1699: if (len > 0) {
1700: *(u_int8_t *)buf = sc->sc_conf;
1701: totlen = 1;
1702: }
1703: break;
1704: case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE):
1.72 augustss 1705: DPRINTFN(8,("ehci_root_ctrl_start: wValue=0x%04x\n", value));
1.109 christos 1706: if (len == 0)
1707: break;
1.5 augustss 1708: switch(value >> 8) {
1709: case UDESC_DEVICE:
1710: if ((value & 0xff) != 0) {
1711: err = USBD_IOERROR;
1712: goto ret;
1713: }
1714: totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE);
1715: USETW(ehci_devd.idVendor, sc->sc_id_vendor);
1716: memcpy(buf, &ehci_devd, l);
1717: break;
1.33 augustss 1718: /*
1.11 augustss 1719: * We can't really operate at another speed, but the spec says
1720: * we need this descriptor.
1721: */
1722: case UDESC_DEVICE_QUALIFIER:
1723: if ((value & 0xff) != 0) {
1724: err = USBD_IOERROR;
1725: goto ret;
1726: }
1727: totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE);
1728: memcpy(buf, &ehci_odevd, l);
1729: break;
1.33 augustss 1730: /*
1.11 augustss 1731: * We can't really operate at another speed, but the spec says
1732: * we need this descriptor.
1733: */
1734: case UDESC_OTHER_SPEED_CONFIGURATION:
1.5 augustss 1735: case UDESC_CONFIG:
1736: if ((value & 0xff) != 0) {
1737: err = USBD_IOERROR;
1738: goto ret;
1739: }
1740: totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE);
1741: memcpy(buf, &ehci_confd, l);
1.11 augustss 1742: ((usb_config_descriptor_t *)buf)->bDescriptorType =
1743: value >> 8;
1.5 augustss 1744: buf = (char *)buf + l;
1745: len -= l;
1746: l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE);
1747: totlen += l;
1748: memcpy(buf, &ehci_ifcd, l);
1749: buf = (char *)buf + l;
1750: len -= l;
1751: l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE);
1752: totlen += l;
1753: memcpy(buf, &ehci_endpd, l);
1754: break;
1755: case UDESC_STRING:
1756: *(u_int8_t *)buf = 0;
1757: totlen = 1;
1758: switch (value & 0xff) {
1.88 augustss 1759: case 0: /* Language table */
1.123 drochner 1760: if (len > 0)
1761: *(u_int8_t *)buf = 4;
1762: if (len >= 4) {
1763: USETW(((usb_string_descriptor_t *)buf)->bString[0], 0x0409);
1764: totlen = 4;
1765: }
1.88 augustss 1766: break;
1.5 augustss 1767: case 1: /* Vendor */
1768: totlen = ehci_str(buf, len, sc->sc_vendor);
1769: break;
1770: case 2: /* Product */
1771: totlen = ehci_str(buf, len, "EHCI root hub");
1772: break;
1773: }
1774: break;
1775: default:
1776: err = USBD_IOERROR;
1777: goto ret;
1778: }
1779: break;
1780: case C(UR_GET_INTERFACE, UT_READ_INTERFACE):
1781: if (len > 0) {
1782: *(u_int8_t *)buf = 0;
1783: totlen = 1;
1784: }
1785: break;
1786: case C(UR_GET_STATUS, UT_READ_DEVICE):
1787: if (len > 1) {
1788: USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED);
1789: totlen = 2;
1790: }
1791: break;
1792: case C(UR_GET_STATUS, UT_READ_INTERFACE):
1793: case C(UR_GET_STATUS, UT_READ_ENDPOINT):
1794: if (len > 1) {
1795: USETW(((usb_status_t *)buf)->wStatus, 0);
1796: totlen = 2;
1797: }
1798: break;
1799: case C(UR_SET_ADDRESS, UT_WRITE_DEVICE):
1800: if (value >= USB_MAX_DEVICES) {
1801: err = USBD_IOERROR;
1802: goto ret;
1803: }
1804: sc->sc_addr = value;
1805: break;
1806: case C(UR_SET_CONFIG, UT_WRITE_DEVICE):
1807: if (value != 0 && value != 1) {
1808: err = USBD_IOERROR;
1809: goto ret;
1810: }
1811: sc->sc_conf = value;
1812: break;
1813: case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE):
1814: break;
1815: case C(UR_SET_FEATURE, UT_WRITE_DEVICE):
1816: case C(UR_SET_FEATURE, UT_WRITE_INTERFACE):
1817: case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT):
1818: err = USBD_IOERROR;
1819: goto ret;
1820: case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE):
1821: break;
1822: case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT):
1823: break;
1824: /* Hub requests */
1825: case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE):
1826: break;
1827: case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER):
1.106 augustss 1828: DPRINTFN(4, ("ehci_root_ctrl_start: UR_CLEAR_PORT_FEATURE "
1.5 augustss 1829: "port=%d feature=%d\n",
1830: index, value));
1831: if (index < 1 || index > sc->sc_noport) {
1832: err = USBD_IOERROR;
1833: goto ret;
1834: }
1835: port = EHCI_PORTSC(index);
1.106 augustss 1836: v = EOREAD4(sc, port);
1837: DPRINTFN(4, ("ehci_root_ctrl_start: portsc=0x%08x\n", v));
1838: v &= ~EHCI_PS_CLEAR;
1.5 augustss 1839: switch(value) {
1840: case UHF_PORT_ENABLE:
1841: EOWRITE4(sc, port, v &~ EHCI_PS_PE);
1842: break;
1843: case UHF_PORT_SUSPEND:
1844: EOWRITE4(sc, port, v &~ EHCI_PS_SUSP);
1845: break;
1846: case UHF_PORT_POWER:
1.106 augustss 1847: if (sc->sc_hasppc)
1848: EOWRITE4(sc, port, v &~ EHCI_PS_PP);
1.5 augustss 1849: break;
1.14 augustss 1850: case UHF_PORT_TEST:
1.72 augustss 1851: DPRINTFN(2,("ehci_root_ctrl_start: clear port test "
1.14 augustss 1852: "%d\n", index));
1853: break;
1854: case UHF_PORT_INDICATOR:
1.72 augustss 1855: DPRINTFN(2,("ehci_root_ctrl_start: clear port ind "
1.14 augustss 1856: "%d\n", index));
1857: EOWRITE4(sc, port, v &~ EHCI_PS_PIC);
1858: break;
1.5 augustss 1859: case UHF_C_PORT_CONNECTION:
1860: EOWRITE4(sc, port, v | EHCI_PS_CSC);
1861: break;
1862: case UHF_C_PORT_ENABLE:
1863: EOWRITE4(sc, port, v | EHCI_PS_PEC);
1864: break;
1865: case UHF_C_PORT_SUSPEND:
1866: /* how? */
1867: break;
1868: case UHF_C_PORT_OVER_CURRENT:
1869: EOWRITE4(sc, port, v | EHCI_PS_OCC);
1870: break;
1871: case UHF_C_PORT_RESET:
1.106 augustss 1872: sc->sc_isreset[index] = 0;
1.5 augustss 1873: break;
1874: default:
1875: err = USBD_IOERROR;
1876: goto ret;
1877: }
1878: #if 0
1879: switch(value) {
1880: case UHF_C_PORT_CONNECTION:
1881: case UHF_C_PORT_ENABLE:
1882: case UHF_C_PORT_SUSPEND:
1883: case UHF_C_PORT_OVER_CURRENT:
1884: case UHF_C_PORT_RESET:
1885: default:
1886: break;
1887: }
1888: #endif
1889: break;
1890: case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE):
1.109 christos 1891: if (len == 0)
1892: break;
1.51 toshii 1893: if ((value & 0xff) != 0) {
1.5 augustss 1894: err = USBD_IOERROR;
1895: goto ret;
1896: }
1897: hubd = ehci_hubd;
1898: hubd.bNbrPorts = sc->sc_noport;
1899: v = EOREAD4(sc, EHCI_HCSPARAMS);
1900: USETW(hubd.wHubCharacteristics,
1.14 augustss 1901: EHCI_HCS_PPC(v) ? UHD_PWR_INDIVIDUAL : UHD_PWR_NO_SWITCH |
1.78 augustss 1902: EHCI_HCS_P_INDICATOR(EREAD4(sc, EHCI_HCSPARAMS))
1.14 augustss 1903: ? UHD_PORT_IND : 0);
1.5 augustss 1904: hubd.bPwrOn2PwrGood = 200; /* XXX can't find out? */
1.33 augustss 1905: for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8)
1.5 augustss 1906: hubd.DeviceRemovable[i++] = 0; /* XXX can't find out? */
1907: hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i;
1908: l = min(len, hubd.bDescLength);
1909: totlen = l;
1910: memcpy(buf, &hubd, l);
1911: break;
1912: case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE):
1913: if (len != 4) {
1914: err = USBD_IOERROR;
1915: goto ret;
1916: }
1917: memset(buf, 0, len); /* ? XXX */
1918: totlen = len;
1919: break;
1920: case C(UR_GET_STATUS, UT_READ_CLASS_OTHER):
1.72 augustss 1921: DPRINTFN(8,("ehci_root_ctrl_start: get port status i=%d\n",
1.5 augustss 1922: index));
1923: if (index < 1 || index > sc->sc_noport) {
1924: err = USBD_IOERROR;
1925: goto ret;
1926: }
1927: if (len != 4) {
1928: err = USBD_IOERROR;
1929: goto ret;
1930: }
1931: v = EOREAD4(sc, EHCI_PORTSC(index));
1.72 augustss 1932: DPRINTFN(8,("ehci_root_ctrl_start: port status=0x%04x\n",
1.5 augustss 1933: v));
1.11 augustss 1934: i = UPS_HIGH_SPEED;
1.5 augustss 1935: if (v & EHCI_PS_CS) i |= UPS_CURRENT_CONNECT_STATUS;
1936: if (v & EHCI_PS_PE) i |= UPS_PORT_ENABLED;
1937: if (v & EHCI_PS_SUSP) i |= UPS_SUSPEND;
1938: if (v & EHCI_PS_OCA) i |= UPS_OVERCURRENT_INDICATOR;
1939: if (v & EHCI_PS_PR) i |= UPS_RESET;
1940: if (v & EHCI_PS_PP) i |= UPS_PORT_POWER;
1941: USETW(ps.wPortStatus, i);
1942: i = 0;
1943: if (v & EHCI_PS_CSC) i |= UPS_C_CONNECT_STATUS;
1944: if (v & EHCI_PS_PEC) i |= UPS_C_PORT_ENABLED;
1945: if (v & EHCI_PS_OCC) i |= UPS_C_OVERCURRENT_INDICATOR;
1.106 augustss 1946: if (sc->sc_isreset[index]) i |= UPS_C_PORT_RESET;
1.5 augustss 1947: USETW(ps.wPortChange, i);
1948: l = min(len, sizeof ps);
1949: memcpy(buf, &ps, l);
1950: totlen = l;
1951: break;
1952: case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE):
1953: err = USBD_IOERROR;
1954: goto ret;
1955: case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE):
1956: break;
1957: case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER):
1958: if (index < 1 || index > sc->sc_noport) {
1959: err = USBD_IOERROR;
1960: goto ret;
1961: }
1962: port = EHCI_PORTSC(index);
1.106 augustss 1963: v = EOREAD4(sc, port);
1964: DPRINTFN(4, ("ehci_root_ctrl_start: portsc=0x%08x\n", v));
1965: v &= ~EHCI_PS_CLEAR;
1.5 augustss 1966: switch(value) {
1967: case UHF_PORT_ENABLE:
1968: EOWRITE4(sc, port, v | EHCI_PS_PE);
1969: break;
1970: case UHF_PORT_SUSPEND:
1971: EOWRITE4(sc, port, v | EHCI_PS_SUSP);
1972: break;
1973: case UHF_PORT_RESET:
1.72 augustss 1974: DPRINTFN(5,("ehci_root_ctrl_start: reset port %d\n",
1.5 augustss 1975: index));
1.6 augustss 1976: if (EHCI_PS_IS_LOWSPEED(v)) {
1977: /* Low speed device, give up ownership. */
1978: ehci_disown(sc, index, 1);
1979: break;
1980: }
1.8 augustss 1981: /* Start reset sequence. */
1982: v &= ~ (EHCI_PS_PE | EHCI_PS_PR);
1.5 augustss 1983: EOWRITE4(sc, port, v | EHCI_PS_PR);
1.8 augustss 1984: /* Wait for reset to complete. */
1.13 augustss 1985: usb_delay_ms(&sc->sc_bus, USB_PORT_ROOT_RESET_DELAY);
1.17 augustss 1986: if (sc->sc_dying) {
1987: err = USBD_IOERROR;
1988: goto ret;
1989: }
1.8 augustss 1990: /* Terminate reset sequence. */
1991: EOWRITE4(sc, port, v);
1992: /* Wait for HC to complete reset. */
1.13 augustss 1993: usb_delay_ms(&sc->sc_bus, EHCI_PORT_RESET_COMPLETE);
1.17 augustss 1994: if (sc->sc_dying) {
1995: err = USBD_IOERROR;
1996: goto ret;
1997: }
1.8 augustss 1998: v = EOREAD4(sc, port);
1999: DPRINTF(("ehci after reset, status=0x%08x\n", v));
2000: if (v & EHCI_PS_PR) {
2001: printf("%s: port reset timeout\n",
2002: USBDEVNAME(sc->sc_bus.bdev));
2003: return (USBD_TIMEOUT);
1.5 augustss 2004: }
1.8 augustss 2005: if (!(v & EHCI_PS_PE)) {
1.6 augustss 2006: /* Not a high speed device, give up ownership.*/
2007: ehci_disown(sc, index, 0);
2008: break;
2009: }
1.106 augustss 2010: sc->sc_isreset[index] = 1;
1.8 augustss 2011: DPRINTF(("ehci port %d reset, status = 0x%08x\n",
1.6 augustss 2012: index, v));
1.5 augustss 2013: break;
2014: case UHF_PORT_POWER:
1.72 augustss 2015: DPRINTFN(2,("ehci_root_ctrl_start: set port power "
1.106 augustss 2016: "%d (has PPC = %d)\n", index,
2017: sc->sc_hasppc));
2018: if (sc->sc_hasppc)
2019: EOWRITE4(sc, port, v | EHCI_PS_PP);
1.5 augustss 2020: break;
1.11 augustss 2021: case UHF_PORT_TEST:
1.72 augustss 2022: DPRINTFN(2,("ehci_root_ctrl_start: set port test "
1.11 augustss 2023: "%d\n", index));
2024: break;
2025: case UHF_PORT_INDICATOR:
1.72 augustss 2026: DPRINTFN(2,("ehci_root_ctrl_start: set port ind "
1.11 augustss 2027: "%d\n", index));
1.14 augustss 2028: EOWRITE4(sc, port, v | EHCI_PS_PIC);
1.11 augustss 2029: break;
1.5 augustss 2030: default:
2031: err = USBD_IOERROR;
2032: goto ret;
2033: }
2034: break;
1.11 augustss 2035: case C(UR_CLEAR_TT_BUFFER, UT_WRITE_CLASS_OTHER):
2036: case C(UR_RESET_TT, UT_WRITE_CLASS_OTHER):
2037: case C(UR_GET_TT_STATE, UT_READ_CLASS_OTHER):
2038: case C(UR_STOP_TT, UT_WRITE_CLASS_OTHER):
2039: break;
1.5 augustss 2040: default:
2041: err = USBD_IOERROR;
2042: goto ret;
2043: }
2044: xfer->actlen = totlen;
2045: err = USBD_NORMAL_COMPLETION;
2046: ret:
2047: xfer->status = err;
2048: s = splusb();
2049: usb_transfer_complete(xfer);
2050: splx(s);
2051: return (USBD_IN_PROGRESS);
1.6 augustss 2052: }
2053:
2054: void
1.115 christos 2055: ehci_disown(ehci_softc_t *sc, int index, int lowspeed)
1.6 augustss 2056: {
1.24 augustss 2057: int port;
1.6 augustss 2058: u_int32_t v;
2059:
2060: DPRINTF(("ehci_disown: index=%d lowspeed=%d\n", index, lowspeed));
2061: #ifdef DIAGNOSTIC
2062: if (sc->sc_npcomp != 0) {
1.24 augustss 2063: int i = (index-1) / sc->sc_npcomp;
1.6 augustss 2064: if (i >= sc->sc_ncomp)
2065: printf("%s: strange port\n",
2066: USBDEVNAME(sc->sc_bus.bdev));
2067: else
2068: printf("%s: handing over %s speed device on "
2069: "port %d to %s\n",
2070: USBDEVNAME(sc->sc_bus.bdev),
2071: lowspeed ? "low" : "full",
2072: index, USBDEVNAME(sc->sc_comps[i]->bdev));
2073: } else {
2074: printf("%s: npcomp == 0\n", USBDEVNAME(sc->sc_bus.bdev));
2075: }
2076: #endif
2077: port = EHCI_PORTSC(index);
2078: v = EOREAD4(sc, port) &~ EHCI_PS_CLEAR;
2079: EOWRITE4(sc, port, v | EHCI_PS_PO);
1.5 augustss 2080: }
2081:
2082: /* Abort a root control request. */
2083: Static void
1.115 christos 2084: ehci_root_ctrl_abort(usbd_xfer_handle xfer)
1.5 augustss 2085: {
2086: /* Nothing to do, all transfers are synchronous. */
2087: }
2088:
2089: /* Close the root pipe. */
2090: Static void
1.115 christos 2091: ehci_root_ctrl_close(usbd_pipe_handle pipe)
1.5 augustss 2092: {
2093: DPRINTF(("ehci_root_ctrl_close\n"));
2094: /* Nothing to do. */
2095: }
2096:
2097: void
2098: ehci_root_intr_done(usbd_xfer_handle xfer)
2099: {
1.78 augustss 2100: xfer->hcpriv = NULL;
1.5 augustss 2101: }
2102:
2103: Static usbd_status
2104: ehci_root_intr_transfer(usbd_xfer_handle xfer)
2105: {
2106: usbd_status err;
2107:
2108: /* Insert last in queue. */
2109: err = usb_insert_transfer(xfer);
2110: if (err)
2111: return (err);
2112:
2113: /* Pipe isn't running, start first */
2114: return (ehci_root_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
2115: }
2116:
2117: Static usbd_status
2118: ehci_root_intr_start(usbd_xfer_handle xfer)
2119: {
2120: usbd_pipe_handle pipe = xfer->pipe;
2121: ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus;
2122:
2123: if (sc->sc_dying)
2124: return (USBD_IOERROR);
2125:
2126: sc->sc_intrxfer = xfer;
2127:
2128: return (USBD_IN_PROGRESS);
2129: }
2130:
2131: /* Abort a root interrupt request. */
2132: Static void
2133: ehci_root_intr_abort(usbd_xfer_handle xfer)
2134: {
2135: int s;
2136:
2137: if (xfer->pipe->intrxfer == xfer) {
2138: DPRINTF(("ehci_root_intr_abort: remove\n"));
2139: xfer->pipe->intrxfer = NULL;
2140: }
2141: xfer->status = USBD_CANCELLED;
2142: s = splusb();
2143: usb_transfer_complete(xfer);
2144: splx(s);
2145: }
2146:
2147: /* Close the root pipe. */
2148: Static void
2149: ehci_root_intr_close(usbd_pipe_handle pipe)
2150: {
2151: ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus;
1.33 augustss 2152:
1.5 augustss 2153: DPRINTF(("ehci_root_intr_close\n"));
2154:
2155: sc->sc_intrxfer = NULL;
2156: }
2157:
2158: void
2159: ehci_root_ctrl_done(usbd_xfer_handle xfer)
2160: {
1.78 augustss 2161: xfer->hcpriv = NULL;
1.9 augustss 2162: }
2163:
2164: /************************/
2165:
2166: ehci_soft_qh_t *
2167: ehci_alloc_sqh(ehci_softc_t *sc)
2168: {
2169: ehci_soft_qh_t *sqh;
2170: usbd_status err;
2171: int i, offs;
2172: usb_dma_t dma;
2173:
2174: if (sc->sc_freeqhs == NULL) {
2175: DPRINTFN(2, ("ehci_alloc_sqh: allocating chunk\n"));
2176: err = usb_allocmem(&sc->sc_bus, EHCI_SQH_SIZE * EHCI_SQH_CHUNK,
2177: EHCI_PAGE_SIZE, &dma);
1.25 augustss 2178: #ifdef EHCI_DEBUG
2179: if (err)
2180: printf("ehci_alloc_sqh: usb_allocmem()=%d\n", err);
2181: #endif
1.9 augustss 2182: if (err)
1.11 augustss 2183: return (NULL);
1.9 augustss 2184: for(i = 0; i < EHCI_SQH_CHUNK; i++) {
2185: offs = i * EHCI_SQH_SIZE;
1.30 augustss 2186: sqh = KERNADDR(&dma, offs);
1.31 augustss 2187: sqh->physaddr = DMAADDR(&dma, offs);
1.9 augustss 2188: sqh->next = sc->sc_freeqhs;
2189: sc->sc_freeqhs = sqh;
2190: }
2191: }
2192: sqh = sc->sc_freeqhs;
2193: sc->sc_freeqhs = sqh->next;
2194: memset(&sqh->qh, 0, sizeof(ehci_qh_t));
1.11 augustss 2195: sqh->next = NULL;
1.9 augustss 2196: return (sqh);
2197: }
2198:
2199: void
2200: ehci_free_sqh(ehci_softc_t *sc, ehci_soft_qh_t *sqh)
2201: {
2202: sqh->next = sc->sc_freeqhs;
2203: sc->sc_freeqhs = sqh;
2204: }
2205:
2206: ehci_soft_qtd_t *
2207: ehci_alloc_sqtd(ehci_softc_t *sc)
2208: {
2209: ehci_soft_qtd_t *sqtd;
2210: usbd_status err;
2211: int i, offs;
2212: usb_dma_t dma;
2213: int s;
2214:
2215: if (sc->sc_freeqtds == NULL) {
2216: DPRINTFN(2, ("ehci_alloc_sqtd: allocating chunk\n"));
2217: err = usb_allocmem(&sc->sc_bus, EHCI_SQTD_SIZE*EHCI_SQTD_CHUNK,
2218: EHCI_PAGE_SIZE, &dma);
1.25 augustss 2219: #ifdef EHCI_DEBUG
2220: if (err)
2221: printf("ehci_alloc_sqtd: usb_allocmem()=%d\n", err);
2222: #endif
1.9 augustss 2223: if (err)
2224: return (NULL);
2225: s = splusb();
2226: for(i = 0; i < EHCI_SQTD_CHUNK; i++) {
2227: offs = i * EHCI_SQTD_SIZE;
1.30 augustss 2228: sqtd = KERNADDR(&dma, offs);
1.31 augustss 2229: sqtd->physaddr = DMAADDR(&dma, offs);
1.9 augustss 2230: sqtd->nextqtd = sc->sc_freeqtds;
2231: sc->sc_freeqtds = sqtd;
2232: }
2233: splx(s);
2234: }
2235:
2236: s = splusb();
2237: sqtd = sc->sc_freeqtds;
2238: sc->sc_freeqtds = sqtd->nextqtd;
2239: memset(&sqtd->qtd, 0, sizeof(ehci_qtd_t));
2240: sqtd->nextqtd = NULL;
2241: sqtd->xfer = NULL;
2242: splx(s);
2243:
2244: return (sqtd);
2245: }
2246:
2247: void
2248: ehci_free_sqtd(ehci_softc_t *sc, ehci_soft_qtd_t *sqtd)
2249: {
2250: int s;
2251:
2252: s = splusb();
2253: sqtd->nextqtd = sc->sc_freeqtds;
2254: sc->sc_freeqtds = sqtd;
2255: splx(s);
2256: }
2257:
1.15 augustss 2258: usbd_status
1.25 augustss 2259: ehci_alloc_sqtd_chain(struct ehci_pipe *epipe, ehci_softc_t *sc,
1.15 augustss 2260: int alen, int rd, usbd_xfer_handle xfer,
2261: ehci_soft_qtd_t **sp, ehci_soft_qtd_t **ep)
2262: {
2263: ehci_soft_qtd_t *next, *cur;
1.22 augustss 2264: ehci_physaddr_t dataphys, dataphyspage, dataphyslastpage, nextphys;
1.15 augustss 2265: u_int32_t qtdstatus;
1.55 mycroft 2266: int len, curlen, mps;
2267: int i, tog;
1.15 augustss 2268: usb_dma_t *dma = &xfer->dmabuf;
1.102 augustss 2269: u_int16_t flags = xfer->flags;
1.15 augustss 2270:
1.25 augustss 2271: DPRINTFN(alen<4*4096,("ehci_alloc_sqtd_chain: start len=%d\n", alen));
1.15 augustss 2272:
2273: len = alen;
1.31 augustss 2274: dataphys = DMAADDR(dma, 0);
1.22 augustss 2275: dataphyslastpage = EHCI_PAGE(dataphys + len - 1);
1.67 mycroft 2276: qtdstatus = EHCI_QTD_ACTIVE |
1.15 augustss 2277: EHCI_QTD_SET_PID(rd ? EHCI_QTD_PID_IN : EHCI_QTD_PID_OUT) |
2278: EHCI_QTD_SET_CERR(3)
2279: /* IOC set below */
2280: /* BYTES set below */
1.67 mycroft 2281: ;
1.55 mycroft 2282: mps = UGETW(epipe->pipe.endpoint->edesc->wMaxPacketSize);
2283: tog = epipe->nexttoggle;
1.64 mycroft 2284: qtdstatus |= EHCI_QTD_SET_TOGGLE(tog);
1.15 augustss 2285:
2286: cur = ehci_alloc_sqtd(sc);
1.25 augustss 2287: *sp = cur;
1.15 augustss 2288: if (cur == NULL)
2289: goto nomem;
2290: for (;;) {
1.22 augustss 2291: dataphyspage = EHCI_PAGE(dataphys);
1.26 augustss 2292: /* The EHCI hardware can handle at most 5 pages. */
1.33 augustss 2293: if (dataphyslastpage - dataphyspage <
1.26 augustss 2294: EHCI_QTD_NBUFFERS * EHCI_PAGE_SIZE) {
1.15 augustss 2295: /* we can handle it in this QTD */
2296: curlen = len;
2297: } else {
2298: /* must use multiple TDs, fill as much as possible. */
1.33 augustss 2299: curlen = EHCI_QTD_NBUFFERS * EHCI_PAGE_SIZE -
1.22 augustss 2300: EHCI_PAGE_OFFSET(dataphys);
1.25 augustss 2301: #ifdef DIAGNOSTIC
2302: if (curlen > len) {
1.26 augustss 2303: printf("ehci_alloc_sqtd_chain: curlen=0x%x "
2304: "len=0x%x offs=0x%x\n", curlen, len,
2305: EHCI_PAGE_OFFSET(dataphys));
2306: printf("lastpage=0x%x page=0x%x phys=0x%x\n",
2307: dataphyslastpage, dataphyspage,
2308: dataphys);
1.25 augustss 2309: curlen = len;
2310: }
2311: #endif
1.15 augustss 2312: /* the length must be a multiple of the max size */
1.55 mycroft 2313: curlen -= curlen % mps;
1.25 augustss 2314: DPRINTFN(1,("ehci_alloc_sqtd_chain: multiple QTDs, "
2315: "curlen=%d\n", curlen));
1.15 augustss 2316: #ifdef DIAGNOSTIC
2317: if (curlen == 0)
1.103 augustss 2318: panic("ehci_alloc_sqtd_chain: curlen == 0");
1.15 augustss 2319: #endif
2320: }
1.25 augustss 2321: DPRINTFN(4,("ehci_alloc_sqtd_chain: dataphys=0x%08x "
1.22 augustss 2322: "dataphyslastpage=0x%08x len=%d curlen=%d\n",
2323: dataphys, dataphyslastpage,
1.15 augustss 2324: len, curlen));
2325: len -= curlen;
2326:
1.102 augustss 2327: /*
1.110 blymn 2328: * Allocate another transfer if there's more data left,
2329: * or if force last short transfer flag is set and we're
1.102 augustss 2330: * allocating a multiple of the max packet size.
2331: */
2332: if (len != 0 ||
2333: ((curlen % mps) == 0 && !rd && curlen != 0 &&
2334: (flags & USBD_FORCE_SHORT_XFER))) {
1.15 augustss 2335: next = ehci_alloc_sqtd(sc);
2336: if (next == NULL)
2337: goto nomem;
1.66 mycroft 2338: nextphys = htole32(next->physaddr);
1.15 augustss 2339: } else {
2340: next = NULL;
2341: nextphys = EHCI_NULL;
2342: }
2343:
1.110 blymn 2344: for (i = 0; i * EHCI_PAGE_SIZE <
1.103 augustss 2345: curlen + EHCI_PAGE_OFFSET(dataphys); i++) {
1.15 augustss 2346: ehci_physaddr_t a = dataphys + i * EHCI_PAGE_SIZE;
2347: if (i != 0) /* use offset only in first buffer */
2348: a = EHCI_PAGE(a);
2349: cur->qtd.qtd_buffer[i] = htole32(a);
1.48 mycroft 2350: cur->qtd.qtd_buffer_hi[i] = 0;
1.25 augustss 2351: #ifdef DIAGNOSTIC
2352: if (i >= EHCI_QTD_NBUFFERS) {
2353: printf("ehci_alloc_sqtd_chain: i=%d\n", i);
2354: goto nomem;
2355: }
2356: #endif
1.15 augustss 2357: }
2358: cur->nextqtd = next;
1.66 mycroft 2359: cur->qtd.qtd_next = cur->qtd.qtd_altnext = nextphys;
1.15 augustss 2360: cur->qtd.qtd_status =
1.67 mycroft 2361: htole32(qtdstatus | EHCI_QTD_SET_BYTES(curlen));
1.15 augustss 2362: cur->xfer = xfer;
1.18 augustss 2363: cur->len = curlen;
1.29 augustss 2364: DPRINTFN(10,("ehci_alloc_sqtd_chain: cbp=0x%08x end=0x%08x\n",
2365: dataphys, dataphys + curlen));
1.55 mycroft 2366: /* adjust the toggle based on the number of packets in this
2367: qtd */
2368: if (((curlen + mps - 1) / mps) & 1) {
2369: tog ^= 1;
1.64 mycroft 2370: qtdstatus ^= EHCI_QTD_TOGGLE_MASK;
1.55 mycroft 2371: }
1.102 augustss 2372: if (next == NULL)
1.15 augustss 2373: break;
1.25 augustss 2374: DPRINTFN(10,("ehci_alloc_sqtd_chain: extend chain\n"));
1.15 augustss 2375: dataphys += curlen;
2376: cur = next;
2377: }
2378: cur->qtd.qtd_status |= htole32(EHCI_QTD_IOC);
2379: *ep = cur;
1.55 mycroft 2380: epipe->nexttoggle = tog;
1.15 augustss 2381:
1.29 augustss 2382: DPRINTFN(10,("ehci_alloc_sqtd_chain: return sqtd=%p sqtdend=%p\n",
2383: *sp, *ep));
2384:
1.15 augustss 2385: return (USBD_NORMAL_COMPLETION);
2386:
2387: nomem:
2388: /* XXX free chain */
1.25 augustss 2389: DPRINTFN(-1,("ehci_alloc_sqtd_chain: no memory\n"));
1.15 augustss 2390: return (USBD_NOMEM);
2391: }
2392:
1.18 augustss 2393: Static void
1.25 augustss 2394: ehci_free_sqtd_chain(ehci_softc_t *sc, ehci_soft_qtd_t *sqtd,
1.18 augustss 2395: ehci_soft_qtd_t *sqtdend)
2396: {
2397: ehci_soft_qtd_t *p;
1.25 augustss 2398: int i;
1.18 augustss 2399:
1.29 augustss 2400: DPRINTFN(10,("ehci_free_sqtd_chain: sqtd=%p sqtdend=%p\n",
2401: sqtd, sqtdend));
2402:
1.25 augustss 2403: for (i = 0; sqtd != sqtdend; sqtd = p, i++) {
1.18 augustss 2404: p = sqtd->nextqtd;
2405: ehci_free_sqtd(sc, sqtd);
2406: }
2407: }
2408:
1.15 augustss 2409: /****************/
2410:
1.9 augustss 2411: /*
1.10 augustss 2412: * Close a reqular pipe.
2413: * Assumes that there are no pending transactions.
2414: */
2415: void
2416: ehci_close_pipe(usbd_pipe_handle pipe, ehci_soft_qh_t *head)
2417: {
2418: struct ehci_pipe *epipe = (struct ehci_pipe *)pipe;
2419: ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus;
2420: ehci_soft_qh_t *sqh = epipe->sqh;
2421: int s;
2422:
2423: s = splusb();
2424: ehci_rem_qh(sc, sqh, head);
2425: splx(s);
2426: ehci_free_sqh(sc, epipe->sqh);
2427: }
2428:
1.33 augustss 2429: /*
1.10 augustss 2430: * Abort a device request.
2431: * If this routine is called at splusb() it guarantees that the request
2432: * will be removed from the hardware scheduling and that the callback
2433: * for it will be called with USBD_CANCELLED status.
2434: * It's impossible to guarantee that the requested transfer will not
2435: * have happened since the hardware runs concurrently.
2436: * If the transaction has already happened we rely on the ordinary
2437: * interrupt processing to process it.
1.26 augustss 2438: * XXX This is most probably wrong.
1.10 augustss 2439: */
2440: void
2441: ehci_abort_xfer(usbd_xfer_handle xfer, usbd_status status)
2442: {
1.26 augustss 2443: #define exfer EXFER(xfer)
1.10 augustss 2444: struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;
1.17 augustss 2445: ehci_softc_t *sc = (ehci_softc_t *)epipe->pipe.device->bus;
1.26 augustss 2446: ehci_soft_qh_t *sqh = epipe->sqh;
2447: ehci_soft_qtd_t *sqtd;
2448: ehci_physaddr_t cur;
2449: u_int32_t qhstatus;
1.11 augustss 2450: int s;
1.26 augustss 2451: int hit;
1.96 augustss 2452: int wake;
1.10 augustss 2453:
1.24 augustss 2454: DPRINTF(("ehci_abort_xfer: xfer=%p pipe=%p\n", xfer, epipe));
1.10 augustss 2455:
1.17 augustss 2456: if (sc->sc_dying) {
2457: /* If we're dying, just do the software part. */
2458: s = splusb();
2459: xfer->status = status; /* make software ignore it */
2460: usb_uncallout(xfer->timeout_handle, ehci_timeout, xfer);
2461: usb_transfer_complete(xfer);
2462: splx(s);
2463: return;
2464: }
2465:
1.10 augustss 2466: if (xfer->device->bus->intr_context || !curproc)
1.37 provos 2467: panic("ehci_abort_xfer: not in process context");
1.10 augustss 2468:
1.11 augustss 2469: /*
1.96 augustss 2470: * If an abort is already in progress then just wait for it to
2471: * complete and return.
2472: */
2473: if (xfer->hcflags & UXFER_ABORTING) {
2474: DPRINTFN(2, ("ehci_abort_xfer: already aborting\n"));
2475: #ifdef DIAGNOSTIC
2476: if (status == USBD_TIMEOUT)
2477: printf("ehci_abort_xfer: TIMEOUT while aborting\n");
2478: #endif
2479: /* Override the status which might be USBD_TIMEOUT. */
2480: xfer->status = status;
2481: DPRINTFN(2, ("ehci_abort_xfer: waiting for abort to finish\n"));
2482: xfer->hcflags |= UXFER_ABORTWAIT;
2483: while (xfer->hcflags & UXFER_ABORTING)
2484: tsleep(&xfer->hcflags, PZERO, "ehciaw", 0);
2485: return;
2486: }
2487: xfer->hcflags |= UXFER_ABORTING;
2488:
2489: /*
1.11 augustss 2490: * Step 1: Make interrupt routine and hardware ignore xfer.
2491: */
2492: s = splusb();
2493: xfer->status = status; /* make software ignore it */
1.15 augustss 2494: usb_uncallout(xfer->timeout_handle, ehci_timeout, xfer);
1.26 augustss 2495: qhstatus = sqh->qh.qh_qtd.qtd_status;
2496: sqh->qh.qh_qtd.qtd_status = qhstatus | htole32(EHCI_QTD_HALTED);
2497: for (sqtd = exfer->sqtdstart; ; sqtd = sqtd->nextqtd) {
2498: sqtd->qtd.qtd_status |= htole32(EHCI_QTD_HALTED);
2499: if (sqtd == exfer->sqtdend)
2500: break;
2501: }
1.11 augustss 2502: splx(s);
2503:
1.33 augustss 2504: /*
1.11 augustss 2505: * Step 2: Wait until we know hardware has finished any possible
2506: * use of the xfer. Also make sure the soft interrupt routine
2507: * has run.
2508: */
1.26 augustss 2509: ehci_sync_hc(sc);
1.29 augustss 2510: s = splusb();
1.77 augustss 2511: #ifdef USB_USE_SOFTINTR
1.29 augustss 2512: sc->sc_softwake = 1;
1.77 augustss 2513: #endif /* USB_USE_SOFTINTR */
1.29 augustss 2514: usb_schedsoftintr(&sc->sc_bus);
1.77 augustss 2515: #ifdef USB_USE_SOFTINTR
1.29 augustss 2516: tsleep(&sc->sc_softwake, PZERO, "ehciab", 0);
1.77 augustss 2517: #endif /* USB_USE_SOFTINTR */
1.29 augustss 2518: splx(s);
1.33 augustss 2519:
2520: /*
1.11 augustss 2521: * Step 3: Remove any vestiges of the xfer from the hardware.
2522: * The complication here is that the hardware may have executed
2523: * beyond the xfer we're trying to abort. So as we're scanning
2524: * the TDs of this xfer we check if the hardware points to
2525: * any of them.
2526: */
2527: s = splusb(); /* XXX why? */
1.26 augustss 2528: cur = EHCI_LINK_ADDR(le32toh(sqh->qh.qh_curqtd));
2529: hit = 0;
2530: for (sqtd = exfer->sqtdstart; ; sqtd = sqtd->nextqtd) {
2531: hit |= cur == sqtd->physaddr;
2532: if (sqtd == exfer->sqtdend)
2533: break;
2534: }
2535: sqtd = sqtd->nextqtd;
2536: /* Zap curqtd register if hardware pointed inside the xfer. */
2537: if (hit && sqtd != NULL) {
2538: DPRINTFN(1,("ehci_abort_xfer: cur=0x%08x\n", sqtd->physaddr));
2539: sqh->qh.qh_curqtd = htole32(sqtd->physaddr); /* unlink qTDs */
2540: sqh->qh.qh_qtd.qtd_status = qhstatus;
2541: } else {
2542: DPRINTFN(1,("ehci_abort_xfer: no hit\n"));
2543: }
1.11 augustss 2544:
2545: /*
1.26 augustss 2546: * Step 4: Execute callback.
1.11 augustss 2547: */
1.18 augustss 2548: #ifdef DIAGNOSTIC
1.26 augustss 2549: exfer->isdone = 1;
1.18 augustss 2550: #endif
1.96 augustss 2551: wake = xfer->hcflags & UXFER_ABORTWAIT;
2552: xfer->hcflags &= ~(UXFER_ABORTING | UXFER_ABORTWAIT);
1.11 augustss 2553: usb_transfer_complete(xfer);
1.96 augustss 2554: if (wake)
2555: wakeup(&xfer->hcflags);
1.11 augustss 2556:
2557: splx(s);
1.26 augustss 2558: #undef exfer
1.10 augustss 2559: }
2560:
1.15 augustss 2561: void
2562: ehci_timeout(void *addr)
2563: {
2564: struct ehci_xfer *exfer = addr;
1.17 augustss 2565: struct ehci_pipe *epipe = (struct ehci_pipe *)exfer->xfer.pipe;
2566: ehci_softc_t *sc = (ehci_softc_t *)epipe->pipe.device->bus;
1.15 augustss 2567:
2568: DPRINTF(("ehci_timeout: exfer=%p\n", exfer));
1.22 augustss 2569: #ifdef USB_DEBUG
1.26 augustss 2570: if (ehcidebug > 1)
1.22 augustss 2571: usbd_dump_pipe(exfer->xfer.pipe);
2572: #endif
1.15 augustss 2573:
1.17 augustss 2574: if (sc->sc_dying) {
2575: ehci_abort_xfer(&exfer->xfer, USBD_TIMEOUT);
2576: return;
2577: }
2578:
1.15 augustss 2579: /* Execute the abort in a process context. */
2580: usb_init_task(&exfer->abort_task, ehci_timeout_task, addr);
1.114 joerg 2581: usb_add_task(exfer->xfer.pipe->device, &exfer->abort_task,
2582: USB_TASKQ_HC);
1.15 augustss 2583: }
2584:
2585: void
2586: ehci_timeout_task(void *addr)
2587: {
2588: usbd_xfer_handle xfer = addr;
2589: int s;
2590:
2591: DPRINTF(("ehci_timeout_task: xfer=%p\n", xfer));
2592:
2593: s = splusb();
2594: ehci_abort_xfer(xfer, USBD_TIMEOUT);
2595: splx(s);
2596: }
2597:
1.5 augustss 2598: /************************/
2599:
1.10 augustss 2600: Static usbd_status
2601: ehci_device_ctrl_transfer(usbd_xfer_handle xfer)
2602: {
2603: usbd_status err;
2604:
2605: /* Insert last in queue. */
2606: err = usb_insert_transfer(xfer);
2607: if (err)
2608: return (err);
2609:
2610: /* Pipe isn't running, start first */
2611: return (ehci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
2612: }
2613:
1.12 augustss 2614: Static usbd_status
2615: ehci_device_ctrl_start(usbd_xfer_handle xfer)
2616: {
1.15 augustss 2617: ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus;
2618: usbd_status err;
2619:
2620: if (sc->sc_dying)
2621: return (USBD_IOERROR);
2622:
2623: #ifdef DIAGNOSTIC
2624: if (!(xfer->rqflags & URQ_REQUEST)) {
2625: /* XXX panic */
2626: printf("ehci_device_ctrl_transfer: not a request\n");
2627: return (USBD_INVAL);
2628: }
2629: #endif
2630:
2631: err = ehci_device_request(xfer);
2632: if (err)
2633: return (err);
2634:
2635: if (sc->sc_bus.use_polling)
2636: ehci_waitintr(sc, xfer);
2637: return (USBD_IN_PROGRESS);
1.12 augustss 2638: }
1.10 augustss 2639:
2640: void
2641: ehci_device_ctrl_done(usbd_xfer_handle xfer)
2642: {
1.18 augustss 2643: struct ehci_xfer *ex = EXFER(xfer);
2644: ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus;
1.25 augustss 2645: /*struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;*/
1.18 augustss 2646:
1.10 augustss 2647: DPRINTFN(10,("ehci_ctrl_done: xfer=%p\n", xfer));
2648:
2649: #ifdef DIAGNOSTIC
2650: if (!(xfer->rqflags & URQ_REQUEST)) {
1.37 provos 2651: panic("ehci_ctrl_done: not a request");
1.10 augustss 2652: }
2653: #endif
1.18 augustss 2654:
1.44 augustss 2655: if (xfer->status != USBD_NOMEM && ehci_active_intr_list(ex)) {
1.25 augustss 2656: ehci_del_intr_list(ex); /* remove from active list */
2657: ehci_free_sqtd_chain(sc, ex->sqtdstart, NULL);
2658: }
1.18 augustss 2659:
1.25 augustss 2660: DPRINTFN(5, ("ehci_ctrl_done: length=%d\n", xfer->actlen));
1.10 augustss 2661: }
2662:
2663: /* Abort a device control request. */
2664: Static void
2665: ehci_device_ctrl_abort(usbd_xfer_handle xfer)
2666: {
2667: DPRINTF(("ehci_device_ctrl_abort: xfer=%p\n", xfer));
2668: ehci_abort_xfer(xfer, USBD_CANCELLED);
2669: }
2670:
2671: /* Close a device control pipe. */
2672: Static void
2673: ehci_device_ctrl_close(usbd_pipe_handle pipe)
2674: {
2675: ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus;
2676: /*struct ehci_pipe *epipe = (struct ehci_pipe *)pipe;*/
2677:
2678: DPRINTF(("ehci_device_ctrl_close: pipe=%p\n", pipe));
1.11 augustss 2679: ehci_close_pipe(pipe, sc->sc_async_head);
1.15 augustss 2680: }
2681:
2682: usbd_status
2683: ehci_device_request(usbd_xfer_handle xfer)
2684: {
1.18 augustss 2685: #define exfer EXFER(xfer)
1.15 augustss 2686: struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;
2687: usb_device_request_t *req = &xfer->request;
2688: usbd_device_handle dev = epipe->pipe.device;
2689: ehci_softc_t *sc = (ehci_softc_t *)dev->bus;
2690: int addr = dev->address;
2691: ehci_soft_qtd_t *setup, *stat, *next;
2692: ehci_soft_qh_t *sqh;
2693: int isread;
2694: int len;
2695: usbd_status err;
2696: int s;
2697:
2698: isread = req->bmRequestType & UT_READ;
2699: len = UGETW(req->wLength);
2700:
1.72 augustss 2701: DPRINTFN(3,("ehci_device_request: type=0x%02x, request=0x%02x, "
1.15 augustss 2702: "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n",
2703: req->bmRequestType, req->bRequest, UGETW(req->wValue),
1.33 augustss 2704: UGETW(req->wIndex), len, addr,
1.15 augustss 2705: epipe->pipe.endpoint->edesc->bEndpointAddress));
2706:
2707: setup = ehci_alloc_sqtd(sc);
2708: if (setup == NULL) {
2709: err = USBD_NOMEM;
2710: goto bad1;
2711: }
2712: stat = ehci_alloc_sqtd(sc);
2713: if (stat == NULL) {
2714: err = USBD_NOMEM;
2715: goto bad2;
2716: }
2717:
2718: sqh = epipe->sqh;
2719: epipe->u.ctl.length = len;
2720:
1.62 mycroft 2721: /* Update device address and length since they may have changed
2722: during the setup of the control pipe in usbd_new_device(). */
1.15 augustss 2723: /* XXX This only needs to be done once, but it's too early in open. */
2724: /* XXXX Should not touch ED here! */
1.33 augustss 2725: sqh->qh.qh_endp =
1.55 mycroft 2726: (sqh->qh.qh_endp & htole32(~(EHCI_QH_ADDRMASK | EHCI_QH_MPLMASK))) |
1.15 augustss 2727: htole32(
2728: EHCI_QH_SET_ADDR(addr) |
2729: EHCI_QH_SET_MPL(UGETW(epipe->pipe.endpoint->edesc->wMaxPacketSize))
2730: );
2731:
2732: /* Set up data transaction */
2733: if (len != 0) {
2734: ehci_soft_qtd_t *end;
2735:
1.55 mycroft 2736: /* Start toggle at 1. */
2737: epipe->nexttoggle = 1;
1.25 augustss 2738: err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer,
1.15 augustss 2739: &next, &end);
2740: if (err)
2741: goto bad3;
1.83 augustss 2742: end->qtd.qtd_status &= htole32(~EHCI_QTD_IOC);
1.15 augustss 2743: end->nextqtd = stat;
1.33 augustss 2744: end->qtd.qtd_next =
1.15 augustss 2745: end->qtd.qtd_altnext = htole32(stat->physaddr);
2746: } else {
2747: next = stat;
2748: }
2749:
1.30 augustss 2750: memcpy(KERNADDR(&epipe->u.ctl.reqdma, 0), req, sizeof *req);
1.15 augustss 2751:
1.55 mycroft 2752: /* Clear toggle */
1.15 augustss 2753: setup->qtd.qtd_status = htole32(
1.26 augustss 2754: EHCI_QTD_ACTIVE |
1.15 augustss 2755: EHCI_QTD_SET_PID(EHCI_QTD_PID_SETUP) |
2756: EHCI_QTD_SET_CERR(3) |
1.64 mycroft 2757: EHCI_QTD_SET_TOGGLE(0) |
1.15 augustss 2758: EHCI_QTD_SET_BYTES(sizeof *req)
2759: );
1.31 augustss 2760: setup->qtd.qtd_buffer[0] = htole32(DMAADDR(&epipe->u.ctl.reqdma, 0));
1.48 mycroft 2761: setup->qtd.qtd_buffer_hi[0] = 0;
1.15 augustss 2762: setup->nextqtd = next;
2763: setup->qtd.qtd_next = setup->qtd.qtd_altnext = htole32(next->physaddr);
2764: setup->xfer = xfer;
1.18 augustss 2765: setup->len = sizeof *req;
1.15 augustss 2766:
2767: stat->qtd.qtd_status = htole32(
1.26 augustss 2768: EHCI_QTD_ACTIVE |
1.15 augustss 2769: EHCI_QTD_SET_PID(isread ? EHCI_QTD_PID_OUT : EHCI_QTD_PID_IN) |
2770: EHCI_QTD_SET_CERR(3) |
1.64 mycroft 2771: EHCI_QTD_SET_TOGGLE(1) |
1.15 augustss 2772: EHCI_QTD_IOC
2773: );
2774: stat->qtd.qtd_buffer[0] = 0; /* XXX not needed? */
1.48 mycroft 2775: stat->qtd.qtd_buffer_hi[0] = 0; /* XXX not needed? */
1.15 augustss 2776: stat->nextqtd = NULL;
2777: stat->qtd.qtd_next = stat->qtd.qtd_altnext = EHCI_NULL;
2778: stat->xfer = xfer;
1.18 augustss 2779: stat->len = 0;
1.15 augustss 2780:
2781: #ifdef EHCI_DEBUG
1.23 augustss 2782: if (ehcidebug > 5) {
1.15 augustss 2783: DPRINTF(("ehci_device_request:\n"));
2784: ehci_dump_sqh(sqh);
2785: ehci_dump_sqtds(setup);
2786: }
2787: #endif
2788:
1.18 augustss 2789: exfer->sqtdstart = setup;
2790: exfer->sqtdend = stat;
2791: #ifdef DIAGNOSTIC
2792: if (!exfer->isdone) {
2793: printf("ehci_device_request: not done, exfer=%p\n", exfer);
2794: }
2795: exfer->isdone = 0;
2796: #endif
2797:
1.15 augustss 2798: /* Insert qTD in QH list. */
2799: s = splusb();
1.23 augustss 2800: ehci_set_qh_qtd(sqh, setup);
1.15 augustss 2801: if (xfer->timeout && !sc->sc_bus.use_polling) {
1.45 tsutsui 2802: usb_callout(xfer->timeout_handle, mstohz(xfer->timeout),
1.15 augustss 2803: ehci_timeout, xfer);
2804: }
1.18 augustss 2805: ehci_add_intr_list(sc, exfer);
2806: xfer->status = USBD_IN_PROGRESS;
1.15 augustss 2807: splx(s);
2808:
1.17 augustss 2809: #ifdef EHCI_DEBUG
1.15 augustss 2810: if (ehcidebug > 10) {
2811: DPRINTF(("ehci_device_request: status=%x\n",
2812: EOREAD4(sc, EHCI_USBSTS)));
1.23 augustss 2813: delay(10000);
1.18 augustss 2814: ehci_dump_regs(sc);
1.15 augustss 2815: ehci_dump_sqh(sc->sc_async_head);
2816: ehci_dump_sqh(sqh);
2817: ehci_dump_sqtds(setup);
2818: }
2819: #endif
2820:
2821: return (USBD_NORMAL_COMPLETION);
2822:
2823: bad3:
2824: ehci_free_sqtd(sc, stat);
2825: bad2:
2826: ehci_free_sqtd(sc, setup);
2827: bad1:
1.25 augustss 2828: DPRINTFN(-1,("ehci_device_request: no memory\n"));
2829: xfer->status = err;
2830: usb_transfer_complete(xfer);
1.15 augustss 2831: return (err);
1.18 augustss 2832: #undef exfer
1.10 augustss 2833: }
2834:
1.108 xtraeme 2835: /*
2836: * Some EHCI chips from VIA seem to trigger interrupts before writing back the
2837: * qTD status, or miss signalling occasionally under heavy load. If the host
2838: * machine is too fast, we we can miss transaction completion - when we scan
2839: * the active list the transaction still seems to be active. This generally
2840: * exhibits itself as a umass stall that never recovers.
2841: *
2842: * We work around this behaviour by setting up this callback after any softintr
2843: * that completes with transactions still pending, giving us another chance to
2844: * check for completion after the writeback has taken place.
2845: */
2846: void
2847: ehci_intrlist_timeout(void *arg)
2848: {
2849: ehci_softc_t *sc = arg;
2850: int s = splusb();
2851:
2852: DPRINTF(("ehci_intrlist_timeout\n"));
2853: usb_schedsoftintr(&sc->sc_bus);
2854:
2855: splx(s);
2856: }
2857:
1.10 augustss 2858: /************************/
1.5 augustss 2859:
1.19 augustss 2860: Static usbd_status
2861: ehci_device_bulk_transfer(usbd_xfer_handle xfer)
2862: {
2863: usbd_status err;
2864:
2865: /* Insert last in queue. */
2866: err = usb_insert_transfer(xfer);
2867: if (err)
2868: return (err);
2869:
2870: /* Pipe isn't running, start first */
2871: return (ehci_device_bulk_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
2872: }
2873:
2874: usbd_status
2875: ehci_device_bulk_start(usbd_xfer_handle xfer)
2876: {
2877: #define exfer EXFER(xfer)
2878: struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;
2879: usbd_device_handle dev = epipe->pipe.device;
2880: ehci_softc_t *sc = (ehci_softc_t *)dev->bus;
2881: ehci_soft_qtd_t *data, *dataend;
2882: ehci_soft_qh_t *sqh;
2883: usbd_status err;
2884: int len, isread, endpt;
2885: int s;
2886:
1.72 augustss 2887: DPRINTFN(2, ("ehci_device_bulk_start: xfer=%p len=%d flags=%d\n",
1.19 augustss 2888: xfer, xfer->length, xfer->flags));
2889:
2890: if (sc->sc_dying)
2891: return (USBD_IOERROR);
2892:
2893: #ifdef DIAGNOSTIC
2894: if (xfer->rqflags & URQ_REQUEST)
1.72 augustss 2895: panic("ehci_device_bulk_start: a request");
1.19 augustss 2896: #endif
2897:
2898: len = xfer->length;
2899: endpt = epipe->pipe.endpoint->edesc->bEndpointAddress;
2900: isread = UE_GET_DIR(endpt) == UE_DIR_IN;
2901: sqh = epipe->sqh;
2902:
2903: epipe->u.bulk.length = len;
2904:
1.25 augustss 2905: err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer, &data,
1.19 augustss 2906: &dataend);
1.25 augustss 2907: if (err) {
2908: DPRINTFN(-1,("ehci_device_bulk_transfer: no memory\n"));
2909: xfer->status = err;
2910: usb_transfer_complete(xfer);
1.19 augustss 2911: return (err);
1.25 augustss 2912: }
1.19 augustss 2913:
2914: #ifdef EHCI_DEBUG
1.23 augustss 2915: if (ehcidebug > 5) {
1.72 augustss 2916: DPRINTF(("ehci_device_bulk_start: data(1)\n"));
1.23 augustss 2917: ehci_dump_sqh(sqh);
1.19 augustss 2918: ehci_dump_sqtds(data);
2919: }
2920: #endif
2921:
2922: /* Set up interrupt info. */
2923: exfer->sqtdstart = data;
2924: exfer->sqtdend = dataend;
2925: #ifdef DIAGNOSTIC
2926: if (!exfer->isdone) {
1.72 augustss 2927: printf("ehci_device_bulk_start: not done, ex=%p\n", exfer);
1.19 augustss 2928: }
2929: exfer->isdone = 0;
2930: #endif
2931:
2932: s = splusb();
1.23 augustss 2933: ehci_set_qh_qtd(sqh, data);
1.19 augustss 2934: if (xfer->timeout && !sc->sc_bus.use_polling) {
1.45 tsutsui 2935: usb_callout(xfer->timeout_handle, mstohz(xfer->timeout),
1.19 augustss 2936: ehci_timeout, xfer);
2937: }
2938: ehci_add_intr_list(sc, exfer);
2939: xfer->status = USBD_IN_PROGRESS;
2940: splx(s);
2941:
2942: #ifdef EHCI_DEBUG
2943: if (ehcidebug > 10) {
1.72 augustss 2944: DPRINTF(("ehci_device_bulk_start: data(2)\n"));
1.23 augustss 2945: delay(10000);
1.72 augustss 2946: DPRINTF(("ehci_device_bulk_start: data(3)\n"));
1.23 augustss 2947: ehci_dump_regs(sc);
1.29 augustss 2948: #if 0
2949: printf("async_head:\n");
1.23 augustss 2950: ehci_dump_sqh(sc->sc_async_head);
1.29 augustss 2951: #endif
2952: printf("sqh:\n");
1.23 augustss 2953: ehci_dump_sqh(sqh);
1.19 augustss 2954: ehci_dump_sqtds(data);
2955: }
2956: #endif
2957:
2958: if (sc->sc_bus.use_polling)
2959: ehci_waitintr(sc, xfer);
2960:
2961: return (USBD_IN_PROGRESS);
2962: #undef exfer
2963: }
2964:
2965: Static void
2966: ehci_device_bulk_abort(usbd_xfer_handle xfer)
2967: {
2968: DPRINTF(("ehci_device_bulk_abort: xfer=%p\n", xfer));
2969: ehci_abort_xfer(xfer, USBD_CANCELLED);
2970: }
2971:
1.33 augustss 2972: /*
1.19 augustss 2973: * Close a device bulk pipe.
2974: */
2975: Static void
2976: ehci_device_bulk_close(usbd_pipe_handle pipe)
2977: {
2978: ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus;
2979:
2980: DPRINTF(("ehci_device_bulk_close: pipe=%p\n", pipe));
2981: ehci_close_pipe(pipe, sc->sc_async_head);
2982: }
2983:
2984: void
2985: ehci_device_bulk_done(usbd_xfer_handle xfer)
2986: {
2987: struct ehci_xfer *ex = EXFER(xfer);
2988: ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus;
2989: /*struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;*/
2990:
1.33 augustss 2991: DPRINTFN(10,("ehci_bulk_done: xfer=%p, actlen=%d\n",
1.19 augustss 2992: xfer, xfer->actlen));
2993:
1.44 augustss 2994: if (xfer->status != USBD_NOMEM && ehci_active_intr_list(ex)) {
1.25 augustss 2995: ehci_del_intr_list(ex); /* remove from active list */
1.44 augustss 2996: ehci_free_sqtd_chain(sc, ex->sqtdstart, NULL);
1.25 augustss 2997: }
1.19 augustss 2998:
2999: DPRINTFN(5, ("ehci_bulk_done: length=%d\n", xfer->actlen));
3000: }
1.5 augustss 3001:
1.10 augustss 3002: /************************/
3003:
1.78 augustss 3004: Static usbd_status
3005: ehci_device_setintr(ehci_softc_t *sc, ehci_soft_qh_t *sqh, int ival)
3006: {
3007: struct ehci_soft_islot *isp;
3008: int islot, lev;
3009:
3010: /* Find a poll rate that is large enough. */
3011: for (lev = EHCI_IPOLLRATES - 1; lev > 0; lev--)
3012: if (EHCI_ILEV_IVAL(lev) <= ival)
3013: break;
3014:
3015: /* Pick an interrupt slot at the right level. */
3016: /* XXX could do better than picking at random */
3017: sc->sc_rand = (sc->sc_rand + 191) % sc->sc_flsize;
3018: islot = EHCI_IQHIDX(lev, sc->sc_rand);
3019:
3020: sqh->islot = islot;
3021: isp = &sc->sc_islots[islot];
3022: ehci_add_qh(sqh, isp->sqh);
3023:
3024: return (USBD_NORMAL_COMPLETION);
3025: }
3026:
3027: Static usbd_status
3028: ehci_device_intr_transfer(usbd_xfer_handle xfer)
3029: {
3030: usbd_status err;
3031:
3032: /* Insert last in queue. */
3033: err = usb_insert_transfer(xfer);
3034: if (err)
3035: return (err);
3036:
3037: /*
3038: * Pipe isn't running (otherwise err would be USBD_INPROG),
3039: * so start it first.
3040: */
3041: return (ehci_device_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
3042: }
3043:
3044: Static usbd_status
3045: ehci_device_intr_start(usbd_xfer_handle xfer)
3046: {
3047: #define exfer EXFER(xfer)
3048: struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;
3049: usbd_device_handle dev = xfer->pipe->device;
3050: ehci_softc_t *sc = (ehci_softc_t *)dev->bus;
3051: ehci_soft_qtd_t *data, *dataend;
3052: ehci_soft_qh_t *sqh;
3053: usbd_status err;
3054: int len, isread, endpt;
3055: int s;
3056:
3057: DPRINTFN(2, ("ehci_device_intr_start: xfer=%p len=%d flags=%d\n",
3058: xfer, xfer->length, xfer->flags));
3059:
3060: if (sc->sc_dying)
3061: return (USBD_IOERROR);
3062:
3063: #ifdef DIAGNOSTIC
3064: if (xfer->rqflags & URQ_REQUEST)
3065: panic("ehci_device_intr_start: a request");
3066: #endif
3067:
3068: len = xfer->length;
3069: endpt = epipe->pipe.endpoint->edesc->bEndpointAddress;
3070: isread = UE_GET_DIR(endpt) == UE_DIR_IN;
3071: sqh = epipe->sqh;
3072:
3073: epipe->u.intr.length = len;
3074:
3075: err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer, &data,
3076: &dataend);
3077: if (err) {
3078: DPRINTFN(-1, ("ehci_device_intr_start: no memory\n"));
3079: xfer->status = err;
3080: usb_transfer_complete(xfer);
3081: return (err);
3082: }
3083:
3084: #ifdef EHCI_DEBUG
3085: if (ehcidebug > 5) {
3086: DPRINTF(("ehci_device_intr_start: data(1)\n"));
3087: ehci_dump_sqh(sqh);
3088: ehci_dump_sqtds(data);
3089: }
3090: #endif
3091:
3092: /* Set up interrupt info. */
3093: exfer->sqtdstart = data;
3094: exfer->sqtdend = dataend;
3095: #ifdef DIAGNOSTIC
3096: if (!exfer->isdone) {
3097: printf("ehci_device_intr_start: not done, ex=%p\n", exfer);
3098: }
3099: exfer->isdone = 0;
3100: #endif
3101:
3102: s = splusb();
3103: ehci_set_qh_qtd(sqh, data);
3104: if (xfer->timeout && !sc->sc_bus.use_polling) {
3105: usb_callout(xfer->timeout_handle, mstohz(xfer->timeout),
3106: ehci_timeout, xfer);
3107: }
3108: ehci_add_intr_list(sc, exfer);
3109: xfer->status = USBD_IN_PROGRESS;
3110: splx(s);
3111:
3112: #ifdef EHCI_DEBUG
3113: if (ehcidebug > 10) {
3114: DPRINTF(("ehci_device_intr_start: data(2)\n"));
3115: delay(10000);
3116: DPRINTF(("ehci_device_intr_start: data(3)\n"));
3117: ehci_dump_regs(sc);
3118: printf("sqh:\n");
3119: ehci_dump_sqh(sqh);
3120: ehci_dump_sqtds(data);
3121: }
3122: #endif
3123:
3124: if (sc->sc_bus.use_polling)
3125: ehci_waitintr(sc, xfer);
3126:
3127: return (USBD_IN_PROGRESS);
3128: #undef exfer
3129: }
3130:
3131: Static void
3132: ehci_device_intr_abort(usbd_xfer_handle xfer)
3133: {
3134: DPRINTFN(1, ("ehci_device_intr_abort: xfer=%p\n", xfer));
3135: if (xfer->pipe->intrxfer == xfer) {
3136: DPRINTFN(1, ("echi_device_intr_abort: remove\n"));
3137: xfer->pipe->intrxfer = NULL;
3138: }
3139: ehci_abort_xfer(xfer, USBD_CANCELLED);
3140: }
3141:
3142: Static void
3143: ehci_device_intr_close(usbd_pipe_handle pipe)
3144: {
3145: ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus;
3146: struct ehci_pipe *epipe = (struct ehci_pipe *)pipe;
3147: struct ehci_soft_islot *isp;
3148:
3149: isp = &sc->sc_islots[epipe->sqh->islot];
3150: ehci_close_pipe(pipe, isp->sqh);
3151: }
3152:
3153: Static void
3154: ehci_device_intr_done(usbd_xfer_handle xfer)
3155: {
3156: #define exfer EXFER(xfer)
3157: struct ehci_xfer *ex = EXFER(xfer);
3158: ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus;
3159: struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;
3160: ehci_soft_qtd_t *data, *dataend;
3161: ehci_soft_qh_t *sqh;
3162: usbd_status err;
3163: int len, isread, endpt, s;
3164:
3165: DPRINTFN(10, ("ehci_device_intr_done: xfer=%p, actlen=%d\n",
3166: xfer, xfer->actlen));
3167:
3168: if (xfer->pipe->repeat) {
3169: ehci_free_sqtd_chain(sc, ex->sqtdstart, NULL);
3170:
3171: len = epipe->u.intr.length;
3172: xfer->length = len;
3173: endpt = epipe->pipe.endpoint->edesc->bEndpointAddress;
3174: isread = UE_GET_DIR(endpt) == UE_DIR_IN;
3175: sqh = epipe->sqh;
3176:
3177: err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer,
3178: &data, &dataend);
3179: if (err) {
3180: DPRINTFN(-1, ("ehci_device_intr_done: no memory\n"));
3181: xfer->status = err;
3182: return;
3183: }
3184:
3185: /* Set up interrupt info. */
3186: exfer->sqtdstart = data;
3187: exfer->sqtdend = dataend;
3188: #ifdef DIAGNOSTIC
3189: if (!exfer->isdone) {
3190: printf("ehci_device_intr_done: not done, ex=%p\n",
3191: exfer);
3192: }
3193: exfer->isdone = 0;
3194: #endif
3195:
3196: s = splusb();
3197: ehci_set_qh_qtd(sqh, data);
3198: if (xfer->timeout && !sc->sc_bus.use_polling) {
3199: usb_callout(xfer->timeout_handle,
3200: mstohz(xfer->timeout), ehci_timeout, xfer);
3201: }
3202: splx(s);
3203:
3204: xfer->status = USBD_IN_PROGRESS;
3205: } else if (xfer->status != USBD_NOMEM && ehci_active_intr_list(ex)) {
3206: ehci_del_intr_list(ex); /* remove from active list */
3207: ehci_free_sqtd_chain(sc, ex->sqtdstart, NULL);
3208: }
3209: #undef exfer
3210: }
1.10 augustss 3211:
3212: /************************/
1.5 augustss 3213:
1.113 christos 3214: Static usbd_status
1.115 christos 3215: ehci_device_isoc_transfer(usbd_xfer_handle xfer)
1.113 christos 3216: {
3217: return USBD_IOERROR;
3218: }
3219: Static usbd_status
1.115 christos 3220: ehci_device_isoc_start(usbd_xfer_handle xfer)
1.113 christos 3221: {
3222: return USBD_IOERROR;
3223: }
3224: Static void
1.115 christos 3225: ehci_device_isoc_abort(usbd_xfer_handle xfer)
1.113 christos 3226: {
3227: }
3228: Static void
1.115 christos 3229: ehci_device_isoc_close(usbd_pipe_handle pipe)
1.113 christos 3230: {
3231: }
3232: Static void
1.115 christos 3233: ehci_device_isoc_done(usbd_xfer_handle xfer)
1.113 christos 3234: {
3235: }
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