version 1.2.8.2, 2019/06/10 22:07:33 |
version 1.2.8.3, 2020/04/13 08:04:49 |
Line 119 tprof_intel_start_cpu(void *arg1, void * |
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Line 119 tprof_intel_start_cpu(void *arg1, void * |
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wrmsr(MSR_PERFCTR0, counter_reset_val); |
wrmsr(MSR_PERFCTR0, counter_reset_val); |
wrmsr(MSR_EVNTSEL0, evtval); |
wrmsr(MSR_EVNTSEL0, evtval); |
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intel_lapic_saved[cpu_index(ci)] = lapic_readreg(LAPIC_PCINT); |
intel_lapic_saved[cpu_index(ci)] = lapic_readreg(LAPIC_LVT_PCINT); |
lapic_writereg(LAPIC_PCINT, LAPIC_DLMODE_NMI); |
lapic_writereg(LAPIC_LVT_PCINT, LAPIC_DLMODE_NMI); |
} |
} |
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static void |
static void |
Line 131 tprof_intel_stop_cpu(void *arg1, void *a |
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Line 131 tprof_intel_stop_cpu(void *arg1, void *a |
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wrmsr(MSR_EVNTSEL0, 0); |
wrmsr(MSR_EVNTSEL0, 0); |
wrmsr(MSR_PERFCTR0, 0); |
wrmsr(MSR_PERFCTR0, 0); |
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lapic_writereg(LAPIC_PCINT, intel_lapic_saved[cpu_index(ci)]); |
lapic_writereg(LAPIC_LVT_PCINT, intel_lapic_saved[cpu_index(ci)]); |
} |
} |
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static int |
static int |
Line 162 tprof_intel_nmi(const struct trapframe * |
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Line 162 tprof_intel_nmi(const struct trapframe * |
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wrmsr(MSR_PERFCTR0, counter_reset_val); |
wrmsr(MSR_PERFCTR0, counter_reset_val); |
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/* unmask PMI */ |
/* unmask PMI */ |
pcint = lapic_readreg(LAPIC_PCINT); |
pcint = lapic_readreg(LAPIC_LVT_PCINT); |
KASSERT((pcint & LAPIC_LVT_MASKED) != 0); |
KASSERT((pcint & LAPIC_LVT_MASKED) != 0); |
lapic_writereg(LAPIC_PCINT, pcint & ~LAPIC_LVT_MASKED); |
lapic_writereg(LAPIC_LVT_PCINT, pcint & ~LAPIC_LVT_MASKED); |
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return 1; |
return 1; |
} |
} |