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CVS log for src/sys/dev/tprof/tprof_armv7.c

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Default branch: MAIN


Revision 1.11.2.2 / (download) - annotate - [select for diffs], Wed Jun 21 22:34:51 2023 UTC (8 months ago) by martin
Branch: netbsd-10
CVS Tags: netbsd-10-0-RC4, netbsd-10-0-RC3, netbsd-10-0-RC2, netbsd-10-0-RC1
Changes since 1.11.2.1: +7 -7 lines
Diff to previous 1.11.2.1 (colored) to branchpoint 1.11 (colored) next main 1.12 (colored)

Pull up following revision(s) (requested by msaitoh in ticket #210):

	usr.sbin/tprof/tprof.8: revision 1.30
	sys/dev/tprof/tprof_x86_amd.c: revision 1.8
	sys/dev/tprof/tprof_armv8.c: revision 1.20
	sys/dev/tprof/tprof_types.h: revision 1.7
	sys/dev/tprof/tprof_x86_intel.c: revision 1.6
	sys/dev/tprof/tprof_x86_intel.c: revision 1.7
	sys/dev/tprof/tprof_x86_intel.c: revision 1.8
	sys/dev/tprof/tprof.c: revision 1.23
	usr.sbin/tprof/tprof.8: revision 1.25
	usr.sbin/tprof/tprof.8: revision 1.26
	usr.sbin/tprof/arch/tprof_x86.c: revision 1.16
	usr.sbin/tprof/tprof.8: revision 1.27
	usr.sbin/tprof/arch/tprof_x86.c: revision 1.17
	usr.sbin/tprof/tprof.8: revision 1.28
	usr.sbin/tprof/tprof.h: revision 1.5
	usr.sbin/tprof/tprof.8: revision 1.29
	sys/dev/tprof/tprof_armv7.c: revision 1.13
	usr.sbin/tprof/tprof_top.c: revision 1.9
	usr.sbin/tprof/tprof.c: revision 1.21

Add Cometlake support.

Obtain the number of general counters from CPUID 0xa.

Test cpuid_level in tprof_intel_ncounters().
This function is called before tprof_intel_ident().

KNF. No functional change.

Add two note to the tprof(8)'s manual page.
 - "list" command prints the maximum number of counters that can be used
   simultaneously.
 - multiple -e arguments can be specified.

Use the default counter if -e argument is not specified.
 monitor command:
     The default counter is selected if -e argument is not specified.
 list command:
     Print the name of the default counter for monitor and top command.

tprof.8: new sentence, new line

tprof(8): fix markup nits

tprof.8: fix typo, s/speficied/specified/

Revision 1.13 / (download) - annotate - [select for diffs], Tue Apr 11 10:07:12 2023 UTC (10 months, 2 weeks ago) by msaitoh
Branch: MAIN
CVS Tags: thorpej-ifq-base, thorpej-ifq, thorpej-altq-separation-base, thorpej-altq-separation, HEAD
Changes since 1.12: +7 -7 lines
Diff to previous 1.12 (colored)

KNF. No functional change.

Revision 1.11.2.1 / (download) - annotate - [select for diffs], Fri Dec 23 08:09:48 2022 UTC (14 months ago) by martin
Branch: netbsd-10
Changes since 1.11: +4 -4 lines
Diff to previous 1.11 (colored)

Pull up following revision(s) (requested by ryo in ticket #20):

	sys/arch/arm/arm/cpufunc.c: revision 1.185
	sys/dev/tprof/tprof.c: revision 1.22
	sys/arch/arm/arm32/arm32_boot.c: revision 1.45
	sys/dev/tprof/tprof_armv8.c: revision 1.19
	sys/dev/tprof/tprof_armv7.c: revision 1.12
	sys/arch/aarch64/aarch64/cpu.c: revision 1.71
	sys/arch/aarch64/aarch64/cpu.c: revision 1.72

tprof_lock is not a spin mutex. use mutex_{enter,exit}(). oops

Explicitly disable overflow interrupts before enabling the cycle counter.

PMCR_EL0.LC should be set. ARM deprecates use of PMCR_EL0.LC=0

Even if an overflow interrupt is occured for a counter outside tprof management,
the bit of onverflow status register must be cleared to prevent an interrupt storm.

Revision 1.12 / (download) - annotate - [select for diffs], Thu Dec 22 06:59:32 2022 UTC (14 months ago) by ryo
Branch: MAIN
Changes since 1.11: +4 -4 lines
Diff to previous 1.11 (colored)

Even if an overflow interrupt is occured for a counter outside tprof management,
the bit of onverflow status register must be cleared to prevent an interrupt storm.

Revision 1.11 / (download) - annotate - [select for diffs], Sat Dec 3 20:24:21 2022 UTC (14 months, 3 weeks ago) by ryo
Branch: MAIN
CVS Tags: netbsd-10-base
Branch point for: netbsd-10
Changes since 1.10: +2 -18 lines
Diff to previous 1.10 (colored)

move ARMv7 PMC register definitions to armreg.h from tprof_armv7.c

Revision 1.10 / (download) - annotate - [select for diffs], Thu Dec 1 00:32:52 2022 UTC (14 months, 3 weeks ago) by ryo
Branch: MAIN
Changes since 1.9: +146 -98 lines
Diff to previous 1.9 (colored)

Improve tprof(4)

- Multiple events can now be handled simultaneously.
- Counters should be configured with TPROF_IOC_CONFIGURE_EVENT in advance,
  instead of being configured at TPROF_IOC_START.
- The configured counters can be started and stopped repeatedly by
  PROF_IOC_START/TPROF_IOC_STOP.
- The value of the performance counter can be obtained at any timing as a 64bit
  value with TPROF_IOC_GETCOUNTS.
- Backend common parts are handled in tprof.c as much as possible, and functions
  on the tprof_backend side have been reimplemented to be more primitive.
- The reset value of counter overflows for profiling can now be adjusted.
  It is calculated by default from the CPU clock (speed of cycle counter) and
  TPROF_HZ, but for some events the value may be too large to be sufficient for
  profiling. The event counter can be specified as a ratio to the default or as
  an absolute value when configuring the event counter.
- Due to overall changes, API and ABI have been changed. TPROF_VERSION and
  TPROF_BACKEND_VERSION were updated.

Revision 1.9 / (download) - annotate - [select for diffs], Thu Dec 1 00:29:51 2022 UTC (14 months, 3 weeks ago) by ryo
Branch: MAIN
Changes since 1.8: +11 -4 lines
Diff to previous 1.8 (colored)

tprof_armv7 initializes on each CPUs, like tprof_armv8.

Revision 1.8 / (download) - annotate - [select for diffs], Thu Dec 1 00:29:10 2022 UTC (14 months, 3 weeks ago) by ryo
Branch: MAIN
Changes since 1.7: +9 -13 lines
Diff to previous 1.7 (colored)

PMCR.E should not be disabled from tprof.

PMCR.E controls not only performance event counters but also the cycle
counter operation, and the cycle counter may be used for cpu_counter.
Similarly, the 31st bit in PMINTENCLR and PMCNTENCLR controls the cycle
counter, not performance event counters, and should not be modified.

Revision 1.7 / (download) - annotate - [select for diffs], Tue Nov 1 11:03:01 2022 UTC (15 months, 3 weeks ago) by jmcneill
Branch: MAIN
Changes since 1.6: +46 -15 lines
Diff to previous 1.6 (colored)

Add support for Cortex-A9.

Revision 1.6 / (download) - annotate - [select for diffs], Fri Nov 26 13:24:28 2021 UTC (2 years, 2 months ago) by christos
Branch: MAIN
CVS Tags: bouyer-sunxi-drm-base, bouyer-sunxi-drm
Changes since 1.5: +3 -3 lines
Diff to previous 1.5 (colored)

declare xc

Revision 1.5 / (download) - annotate - [select for diffs], Thu Nov 25 09:36:21 2021 UTC (2 years, 2 months ago) by skrll
Branch: MAIN
Changes since 1.4: +7 -3 lines
Diff to previous 1.4 (colored)

Improve error handling.

Hypervisors can return a PMCR.N of 0.

Revision 1.4 / (download) - annotate - [select for diffs], Fri Oct 30 18:54:37 2020 UTC (3 years, 3 months ago) by skrll
Branch: MAIN
CVS Tags: thorpej-i2c-spi-conf2-base, thorpej-i2c-spi-conf2, thorpej-i2c-spi-conf-base, thorpej-i2c-spi-conf, thorpej-futex2-base, thorpej-futex2, thorpej-futex-base, thorpej-futex, thorpej-cfargs2-base, thorpej-cfargs2, thorpej-cfargs-base, thorpej-cfargs, cjep_sun2x-base1, cjep_sun2x-base, cjep_sun2x, cjep_staticlib_x-base1, cjep_staticlib_x-base, cjep_staticlib_x
Changes since 1.3: +4 -4 lines
Diff to previous 1.3 (colored)

Retire arm_[di]sb in favour of the isb() and dsb(sy) macro invocations.

Revision 1.2.8.3 / (download) - annotate - [select for diffs], Wed Apr 8 14:08:13 2020 UTC (3 years, 10 months ago) by martin
Branch: phil-wifi
Changes since 1.2.8.2: +3 -3 lines
Diff to previous 1.2.8.2 (colored) to branchpoint 1.2 (colored) next main 1.3 (colored)

Merge changes from current as of 20200406

Revision 1.2.12.1 / (download) - annotate - [select for diffs], Sat Feb 29 20:19:16 2020 UTC (3 years, 11 months ago) by ad
Branch: ad-namecache
Changes since 1.2: +3 -3 lines
Diff to previous 1.2 (colored) next main 1.3 (colored)

Sync with head.

Revision 1.3 / (download) - annotate - [select for diffs], Mon Feb 24 12:38:57 2020 UTC (4 years ago) by rin
Branch: MAIN
CVS Tags: phil-wifi-20200421, phil-wifi-20200411, phil-wifi-20200406, is-mlppp-base, is-mlppp, bouyer-xenpvh-base2, bouyer-xenpvh-base1, bouyer-xenpvh-base, bouyer-xenpvh, ad-namecache-base3
Changes since 1.2: +3 -3 lines
Diff to previous 1.2 (colored)

0x%#x --> %#x for non-external codes.
Also, stop mixing up 0x%x and %#x in single files as far as possible.

Revision 1.2.8.2 / (download) - annotate - [select for diffs], Mon Jun 10 22:07:33 2019 UTC (4 years, 8 months ago) by christos
Branch: phil-wifi
Changes since 1.2.8.1: +244 -0 lines
Diff to previous 1.2.8.1 (colored) to branchpoint 1.2 (colored)

Sync with HEAD

Revision 1.2.2.2 / (download) - annotate - [select for diffs], Sat Jul 28 04:37:57 2018 UTC (5 years, 6 months ago) by pgoyette
Branch: pgoyette-compat
CVS Tags: pgoyette-compat-merge-20190127
Changes since 1.2.2.1: +244 -0 lines
Diff to previous 1.2.2.1 (colored) to branchpoint 1.2 (colored) next main 1.3 (colored)

Sync with HEAD

Revision 1.2.8.1, Mon Jul 16 10:56:42 2018 UTC (5 years, 7 months ago) by christos
Branch: phil-wifi
Changes since 1.2: +0 -244 lines
FILE REMOVED

file tprof_armv7.c was added on branch phil-wifi on 2019-06-10 22:07:33 +0000

Revision 1.2.2.1, Mon Jul 16 10:56:42 2018 UTC (5 years, 7 months ago) by pgoyette
Branch: pgoyette-compat
Changes since 1.2: +0 -244 lines
FILE REMOVED

file tprof_armv7.c was added on branch pgoyette-compat on 2018-07-28 04:37:57 +0000

Revision 1.2 / (download) - annotate - [select for diffs], Mon Jul 16 10:56:42 2018 UTC (5 years, 7 months ago) by jmcneill
Branch: MAIN
CVS Tags: phil-wifi-20191119, phil-wifi-20190609, pgoyette-compat-20190127, pgoyette-compat-20190118, pgoyette-compat-1226, pgoyette-compat-1126, pgoyette-compat-1020, pgoyette-compat-0930, pgoyette-compat-0906, pgoyette-compat-0728, netbsd-9-base, netbsd-9-3-RELEASE, netbsd-9-2-RELEASE, netbsd-9-1-RELEASE, netbsd-9-0-RELEASE, netbsd-9-0-RC2, netbsd-9-0-RC1, netbsd-9, jdolecek-ncqfixes-base, jdolecek-ncqfixes, isaki-audio2-base, isaki-audio2, ad-namecache-base2, ad-namecache-base1, ad-namecache-base
Branch point for: phil-wifi, pgoyette-compat, ad-namecache
Changes since 1.1: +14 -2 lines
Diff to previous 1.1 (colored)

RW fields in performance monitor registers are reset to architecturally
UNKNOWN values. Initialize the PMU to a known state - all interrupts and
counters disabled, performance monitor disabled, and user access disabled.

Revision 1.1 / (download) - annotate - [select for diffs], Sun Jul 15 23:47:29 2018 UTC (5 years, 7 months ago) by jmcneill
Branch: MAIN

Add tprof backend for ARMv7 performance monitors.

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