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Annotation of src/sys/dev/pci/pcivar.h, Revision 1.50.2.3

1.50.2.3! gehenna     1: /*     $NetBSD: pcivar.h,v 1.50.2.2 2002/06/20 16:33:49 gehenna Exp $  */
1.50.2.2  gehenna     2:
                      3: /*
                      4:  * Copyright (c) 1996, 1997 Christopher G. Demetriou.  All rights reserved.
                      5:  * Copyright (c) 1994 Charles M. Hannum.  All rights reserved.
                      6:  *
                      7:  * Redistribution and use in source and binary forms, with or without
                      8:  * modification, are permitted provided that the following conditions
                      9:  * are met:
                     10:  * 1. Redistributions of source code must retain the above copyright
                     11:  *    notice, this list of conditions and the following disclaimer.
                     12:  * 2. Redistributions in binary form must reproduce the above copyright
                     13:  *    notice, this list of conditions and the following disclaimer in the
                     14:  *    documentation and/or other materials provided with the distribution.
                     15:  * 3. All advertising materials mentioning features or use of this software
                     16:  *    must display the following acknowledgement:
                     17:  *     This product includes software developed by Charles M. Hannum.
                     18:  * 4. The name of the author may not be used to endorse or promote products
                     19:  *    derived from this software without specific prior written permission.
                     20:  *
                     21:  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
                     22:  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
                     23:  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
                     24:  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
                     25:  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
                     26:  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
                     27:  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
                     28:  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
                     29:  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
                     30:  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
                     31:  */
                     32:
                     33: #ifndef _DEV_PCI_PCIVAR_H_
                     34: #define        _DEV_PCI_PCIVAR_H_
                     35:
                     36: /*
                     37:  * Definitions for PCI autoconfiguration.
                     38:  *
                     39:  * This file describes types and functions which are used for PCI
                     40:  * configuration.  Some of this information is machine-specific, and is
                     41:  * provided by pci_machdep.h.
                     42:  */
                     43:
                     44: #include <sys/device.h>
                     45: #include <machine/bus.h>
                     46: #include <dev/pci/pcireg.h>
                     47:
                     48: /*
                     49:  * Structures and definitions needed by the machine-dependent header.
                     50:  */
                     51: typedef u_int32_t pcireg_t;            /* configuration space register XXX */
                     52: struct pcibus_attach_args;
                     53: struct pci_softc;
                     54:
                     55: #ifdef _KERNEL
                     56: /*
                     57:  * Machine-dependent definitions.
                     58:  */
                     59: #include <machine/pci_machdep.h>
                     60:
                     61: /*
                     62:  * PCI bus attach arguments.
                     63:  */
                     64: struct pcibus_attach_args {
                     65:        char            *pba_busname;   /* XXX should be common */
                     66:        bus_space_tag_t pba_iot;        /* pci i/o space tag */
                     67:        bus_space_tag_t pba_memt;       /* pci mem space tag */
                     68:        bus_dma_tag_t pba_dmat;         /* DMA tag */
                     69:        pci_chipset_tag_t pba_pc;
                     70:        int             pba_flags;      /* flags; see below */
                     71:
                     72:        int             pba_bus;        /* PCI bus number */
                     73:
                     74:        /*
                     75:         * Pointer to the pcitag of our parent bridge.  If there is no
                     76:         * parent bridge, then we assume we are a root bus.
                     77:         */
                     78:        pcitag_t        *pba_bridgetag;
                     79:
                     80:        /*
                     81:         * Interrupt swizzling information.  These fields
                     82:         * are only used by secondary busses.
                     83:         */
                     84:        u_int           pba_intrswiz;   /* how to swizzle pins */
                     85:        pcitag_t        pba_intrtag;    /* intr. appears to come from here */
                     86: };
                     87:
                     88: /*
                     89:  * PCI device attach arguments.
                     90:  */
                     91: struct pci_attach_args {
                     92:        bus_space_tag_t pa_iot;         /* pci i/o space tag */
                     93:        bus_space_tag_t pa_memt;        /* pci mem space tag */
                     94:        bus_dma_tag_t pa_dmat;          /* DMA tag */
                     95:        pci_chipset_tag_t pa_pc;
                     96:        int             pa_flags;       /* flags; see below */
                     97:
                     98:        u_int           pa_bus;
                     99:        u_int           pa_device;
                    100:        u_int           pa_function;
                    101:        pcitag_t        pa_tag;
                    102:        pcireg_t        pa_id, pa_class;
                    103:
                    104:        /*
                    105:         * Interrupt information.
                    106:         *
                    107:         * "Intrline" is used on systems whose firmware puts
                    108:         * the right routing data into the line register in
                    109:         * configuration space.  The rest are used on systems
                    110:         * that do not.
                    111:         */
                    112:        u_int           pa_intrswiz;    /* how to swizzle pins if ppb */
                    113:        pcitag_t        pa_intrtag;     /* intr. appears to come from here */
                    114:        pci_intr_pin_t  pa_intrpin;     /* intr. appears on this pin */
                    115:        pci_intr_line_t pa_intrline;    /* intr. routing information */
                    116:        pci_intr_pin_t  pa_rawintrpin;  /* unswizzled pin */
                    117: };
                    118:
                    119: /*
                    120:  * Flags given in the bus and device attachment args.
                    121:  */
                    122: #define        PCI_FLAGS_IO_ENABLED    0x01            /* I/O space is enabled */
                    123: #define        PCI_FLAGS_MEM_ENABLED   0x02            /* memory space is enabled */
                    124: #define        PCI_FLAGS_MRL_OKAY      0x04            /* Memory Read Line okay */
                    125: #define        PCI_FLAGS_MRM_OKAY      0x08            /* Memory Read Multiple okay */
                    126: #define        PCI_FLAGS_MWI_OKAY      0x10            /* Memory Write and Invalidate
                    127:                                                   okay */
                    128:
                    129: /*
                    130:  * PCI device 'quirks'.
                    131:  *
                    132:  * In general strange behaviour which can be handled by a driver (e.g.
                    133:  * a bridge's inability to pass a type of access correctly) should be.
                    134:  * The quirks table should only contain information which impacts
                    135:  * the operation of the MI PCI code and which can't be pushed lower
                    136:  * (e.g. because it's unacceptable to require a driver to be present
                    137:  * for the information to be known).
                    138:  */
                    139: struct pci_quirkdata {
                    140:        pci_vendor_id_t         vendor;         /* Vendor ID */
                    141:        pci_product_id_t        product;        /* Product ID */
                    142:        int                     quirks;         /* quirks; see below */
                    143: };
                    144: #define        PCI_QUIRK_MULTIFUNCTION         1
                    145:
                    146: #include "locators.h"
                    147:
                    148: struct pci_softc {
                    149:        struct device sc_dev;
                    150:        bus_space_tag_t sc_iot, sc_memt;
                    151:        bus_dma_tag_t sc_dmat;
                    152:        pci_chipset_tag_t sc_pc;
                    153:        int sc_bus, sc_maxndevs;
                    154:        pcitag_t *sc_bridgetag;
                    155:        u_int sc_intrswiz;
                    156:        pcitag_t sc_intrtag;
                    157:        int sc_flags;
                    158: };
                    159:
                    160: extern struct cfdriver pci_cd;
                    161:
                    162: /*
                    163:  * Locators devices that attach to 'pcibus', as specified to config.
                    164:  */
                    165: #define        pcibuscf_bus            cf_loc[PCIBUSCF_BUS]
                    166: #define        PCIBUS_UNK_BUS          PCIBUSCF_BUS_DEFAULT    /* wildcarded 'bus' */
                    167:
                    168: /*
                    169:  * Locators for PCI devices, as specified to config.
                    170:  */
                    171: #define        pcicf_dev               cf_loc[PCICF_DEV]
                    172: #define        PCI_UNK_DEV             PCICF_DEV_DEFAULT       /* wildcarded 'dev' */
                    173:
                    174: #define        pcicf_function          cf_loc[PCICF_FUNCTION]
                    175: #define        PCI_UNK_FUNCTION        PCICF_FUNCTION_DEFAULT /* wildcarded 'function' */
                    176:
                    177: /*
                    178:  * Configuration space access and utility functions.  (Note that most,
                    179:  * e.g. make_tag, conf_read, conf_write are declared by pci_machdep.h.)
                    180:  */
1.50.2.3! gehenna   181: int    pci_mapreg_probe __P((pci_chipset_tag_t, pcitag_t, int, pcireg_t *));
1.50.2.2  gehenna   182: pcireg_t pci_mapreg_type __P((pci_chipset_tag_t, pcitag_t, int));
                    183: int    pci_mapreg_info __P((pci_chipset_tag_t, pcitag_t, int, pcireg_t,
                    184:            bus_addr_t *, bus_size_t *, int *));
                    185: int    pci_mapreg_map __P((struct pci_attach_args *, int, pcireg_t, int,
                    186:            bus_space_tag_t *, bus_space_handle_t *, bus_addr_t *,
                    187:            bus_size_t *));
                    188:
                    189: int pci_get_capability __P((pci_chipset_tag_t, pcitag_t, int,
                    190:                            int *, pcireg_t *));
                    191:
                    192: /*
                    193:  * Helper functions for autoconfiguration.
                    194:  */
                    195: int    pci_enumerate_bus_generic(struct pci_softc *,
                    196:            int (*)(struct pci_attach_args *), struct pci_attach_args *);
                    197: int    pci_probe_device(struct pci_softc *, pcitag_t tag,
                    198:            int (*)(struct pci_attach_args *), struct pci_attach_args *);
                    199: void   pci_devinfo __P((pcireg_t, pcireg_t, int, char *));
                    200: void   pci_conf_print __P((pci_chipset_tag_t, pcitag_t,
                    201:            void (*)(pci_chipset_tag_t, pcitag_t, const pcireg_t *)));
                    202: const struct pci_quirkdata *
                    203:        pci_lookup_quirkdata __P((pci_vendor_id_t, pci_product_id_t));
                    204:
                    205: /*
                    206:  * Helper functions for user access to the PCI bus.
                    207:  */
                    208: struct proc;
                    209: int    pci_devioctl __P((pci_chipset_tag_t, pcitag_t, u_long, caddr_t,
                    210:            int flag, struct proc *));
                    211:
                    212: /*
                    213:  * Misc.
                    214:  */
                    215: char   *pci_findvendor __P((pcireg_t));
                    216: int    pci_find_device(struct pci_attach_args *pa,
                    217:                        int (*match)(struct pci_attach_args *));
                    218:
                    219: #endif /* _KERNEL */
                    220:
                    221: #endif /* _DEV_PCI_PCIVAR_H_ */

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