CVS log for src/sys/dev/pci/pcivar.h

Up to [cvs.NetBSD.org] / src / sys / dev / pci

Request diff between arbitrary revisions

Keyword substitution: kv
Default branch: MAIN

Pull up following revision(s) (requested by rin in ticket #928):

	sys/external/bsd/drm2/dist/drm/drm_gem.c: revision 1.25
	sys/external/bsd/drm2/dist/drm/radeon/radeon_ci_dpm.c: revision 1.7
	sys/external/bsd/drm2/dist/drm/nouveau/nvkm/engine/device/priv.h: revision 1.4
	sys/external/bsd/drm2/dist/drm/nouveau/nvkm/engine/device/nouveau_nvkm_engine_device_acpi.c: revision 1.4
	sys/external/bsd/drm2/dist/drm/i915/display/intel_opregion.h: revision 1.6
	sys/external/bsd/drm2/dist/drm/i915/i915_drv.h: revision 1.49
	sys/external/bsd/drm2/include/linux/mxm-wmi.h: revision 1.1
	sys/external/bsd/drm2/dist/drm/nouveau/nvkm/subdev/pci/nouveau_nvkm_subdev_pci_pcie.c: revision 1.4
	sys/external/bsd/drm2/dist/drm/nouveau/nvkm/engine/device/nouveau_nvkm_engine_device_base.c: revision 1.13
	sys/external/bsd/common/include/linux/bitops.h: revision 1.17
	sys/external/bsd/drm2/nouveau/files.nouveau: revision 1.40
	sys/external/bsd/drm2/linux/linux_pci.c: revision 1.30
	sys/external/bsd/drm2/dist/drm/radeon/radeon_drv.h: revision 1.5
	sys/external/bsd/drm2/dist/drm/nouveau/nvkm/subdev/pci/nouveau_nvkm_subdev_pci_pcie.c: revision 1.5
	sys/external/bsd/drm2/dist/drm/nouveau/nvkm/subdev/mxm/nouveau_nvkm_subdev_mxm_base.c: revision 1.5
	sys/external/bsd/drm2/dist/drm/amd/amdgpu/amdgpu_gart.c: revision 1.12
	sys/external/bsd/drm2/dist/drm/radeon/radeon_rv770.c: revision 1.3
	sys/external/bsd/drm2/dist/drm/nouveau/nvkm/engine/disp/nouveau_nvkm_engine_disp_sorgm200.c: revision 1.3
	sys/external/bsd/common/include/linux/printk.h: revision 1.14
	sys/external/bsd/drm2/dist/drm/nouveau/nvkm/subdev/instmem/nouveau_nvkm_subdev_instmem_gk20a.c: revision 1.10
	sys/external/bsd/drm2/dist/drm/amd/amdgpu/amdgpu_vi.c: revision 1.4
	sys/external/bsd/drm2/include/linux/acpi.h: revision 1.11
	sys/external/bsd/drm2/drm/drm_cdevsw.c: revision 1.31
	sys/external/bsd/drm2/dist/drm/radeon/radeon_si.c: revision 1.6
	sys/external/bsd/drm2/dist/drm/nouveau/nouveau_acpi.c: revision 1.5
	sys/external/bsd/drm2/dist/drm/i915/display/intel_acpi.h: revision 1.5
	sys/external/bsd/drm2/include/acpi/video.h: revision 1.3
	sys/external/bsd/drm2/dist/drm/radeon/radeon_evergreen.c: revision 1.6
	sys/external/bsd/drm2/dist/drm/nouveau/nouveau_acpi.h: revision 1.4
	sys/arch/sparc64/include/pci_machdep.h: revision 1.31
	sys/arch/sparc64/dev/pci_machdep.c: revision 1.83
	sys/external/bsd/drm2/include/linux/kref.h: revision 1.14
	sys/external/bsd/drm2/dist/drm/nouveau/nvkm/engine/device/nouveau_nvkm_engine_device_pci.c: revision 1.12
	sys/external/bsd/drm2/linux/linux_dma_buf.c: revision 1.17
	sys/external/bsd/drm2/dist/drm/nouveau/nvkm/subdev/bios/nouveau_nvkm_subdev_bios_shadowacpi.c: revision 1.4
	sys/external/bsd/drm2/drm/drm_module.c: revision 1.32
	sys/external/bsd/drm2/dist/drm/i915/i915_gem.h: revision 1.8
	sys/external/bsd/drm2/dist/drm/i915/gem/i915_gem_dmabuf.c: revision 1.7
	sys/external/bsd/drm2/include/linux/smp.h: revision 1.5
	sys/external/bsd/drm2/dist/drm/amd/amdgpu/amdgpu_si.c: revision 1.5
	sys/external/bsd/drm2/dist/drm/amd/amdgpu/amdgpu_device.c: revision 1.20
	sys/arch/x86/x86/bus_dma.c: revision 1.91
	sys/external/bsd/drm2/radeon/files.radeon: revision 1.40
	sys/external/bsd/drm2/include/acpi/acpi_bus.h: revision 1.1
	sys/external/bsd/drm2/dist/drm/nouveau/nouveau_drv.h: revision 1.5
	sys/external/bsd/drm2/dist/drm/amd/amdgpu/amdgpu_device.c: revision 1.21
	sys/external/bsd/common/include/asm/barrier.h: revision 1.20
	sys/external/bsd/drm2/include/linux/nbsd-namespace-acpi.h: revision 1.2
	sys/external/bsd/common/include/asm/barrier.h: revision 1.21
	sys/modules/drmkms/drmkms_pci.h: revision 1.1
	sys/external/bsd/drm2/dist/drm/drm_dp_helper.c: revision 1.17
	sys/external/bsd/drm2/radeon/radeon_pci.c: revision 1.23
	sys/external/bsd/drm2/linux/linux_xa.c: revision 1.4
	sys/external/bsd/drm2/ttm/ttm_bo_vm.c: revision 1.23
	sys/external/bsd/drm2/ttm/ttm_bo_vm.c: revision 1.24
	sys/external/bsd/drm2/ttm/ttm_bo_vm.c: revision 1.25
	sys/external/bsd/drm2/linux/linux_pci.c: revision 1.26
	sys/dev/pci/pcivar.h: revision 1.120
	sys/arch/xen/include/pci_machdep.h: revision 1.24
	sys/external/bsd/drm2/ttm/ttm_bo_vm.c: revision 1.26
	sys/external/bsd/drm2/linux/linux_pci.c: revision 1.27
	sys/external/bsd/drm2/ttm/ttm_bo_vm.c: revision 1.27
	sys/external/bsd/drm2/linux/linux_pci.c: revision 1.28
	sys/external/bsd/drm2/dist/drm/radeon/radeon_cik.c: revision 1.8
	sys/external/bsd/drm2/ttm/ttm_bo_vm.c: revision 1.28
	sys/external/bsd/drm2/linux/linux_pci.c: revision 1.29
	sys/external/bsd/drm2/include/linux/pci.h: revision 1.57
	sys/external/bsd/drm2/include/linux/pci.h: revision 1.58
	sys/external/bsd/drm2/dist/drm/radeon/radeon_acpi.c: revision 1.5
	sys/external/bsd/drm2/dist/drm/nouveau/nouveau_display.c: revision 1.6
	sys/external/bsd/drm2/dist/drm/amd/powerplay/hwmgr/amdgpu_hwmgr.c: revision 1.3
	sys/external/bsd/drm2/dist/drm/amd/display/dc/core/amdgpu_dc_stream.c: revision 1.3
	share/man/man9/bus_dma.9: revision 1.69
	sys/external/bsd/drm2/drm/drm_gem_cma_helper.c: revision 1.15
	sys/external/bsd/drm2/dist/drm/radeon/radeon_acpi.c: revision 1.6
	sys/external/bsd/drm2/dist/drm/radeon/radeon.h: revision 1.12
	sys/external/bsd/drm2/dist/drm/amd/amdgpu/amdgpu_cik.c: revision 1.7
	sys/dev/acpi/acpi_mcfg.c: revision 1.29
	sys/external/bsd/drm2/dist/drm/amd/amdgpu/amdgpu_acpi.c: revision 1.6
	sys/external/bsd/drm2/dist/drm/radeon/radeon_r600.c: revision 1.7
	sys/external/bsd/drm2/dist/drm/radeon/radeon_bios.c: revision 1.13
	sys/modules/amdgpu/Makefile: revision 1.9
	sys/external/bsd/drm2/dist/drm/radeon/radeon_bios.c: revision 1.14
	sys/external/bsd/common/linux/linux_tasklet.c: revision 1.12
	sys/external/bsd/drm2/dist/drm/nouveau/include/nvkm/core/device.h: revision 1.10
	sys/external/bsd/drm2/dist/drm/i915/gem/i915_gem_mman.c: revision 1.23
	sys/external/bsd/drm2/dist/drm/amd/amdgpu/amdgpu.h: revision 1.9
	sys/external/bsd/drm2/include/linux/interval_tree.h: revision 1.14
	sys/external/bsd/drm2/dist/drm/i915/gem/i915_gem_mman.c: revision 1.26
	sys/external/bsd/drm2/dist/drm/amd/powerplay/hwmgr/amdgpu_smu7_hwmgr.c: revision 1.5
	sys/dev/pci/pci.c: revision 1.168
	sys/external/bsd/drm2/dist/drm/i915/gem/i915_gem_mman.c: revision 1.27
	sys/external/bsd/drm2/dist/drm/radeon/radeon_si_dpm.c: revision 1.9
	sys/external/bsd/drm2/pci/files.drmkms_pci: revision 1.18
	sys/external/bsd/drm2/linux/linux_sync_file.c: revision 1.3
	sys/external/bsd/drm2/amdgpu/files.amdgpu: revision 1.31
	sys/external/bsd/drm2/dist/drm/nouveau/nvkm/engine/device/nouveau_nvkm_engine_device_tegra.c: revision 1.4
	sys/external/bsd/drm2/dist/drm/drm_gem.c: revision 1.24
	sys/arch/xen/xen/xpci_xenbus.c: revision 1.29

drm: Eliminate __HAVE_ATOMIC_AS_MEMBAR conditionals.
Discussed on tech-kern:
https://mail-index.netbsd.org/tech-kern/2023/02/23/msg028729.html

linux asm/barrier.h: Fix !MULTIPROCESSOR build.

remove "nouveau" from a comment.  noted by jmcneill.

drm: KASSERT(A && B) -> KASSERT(A); KASSERT(B)
comment a function that has a clear overbounds read but it isn't used.
found by GCC 12.

nix the NetBSD specific GEM_BUG_ON().
avoids GCC 12 warnings, and matches upstream closer.
avoid uninitialised variable usage in drm_gem_cma_create_internal().
in the case nothing has returned 'error', 'nsegs' and the dma info
are (potentially) uninitialised, so consider this an error.
found by GCC 12.

avoid a GCC 12 warning.
there's a 1-element long array and a loop conditional that tries to see
if indexes for it are not identical.  as these indexes will always both
be 0, the only valid index, the condition is always false.  GCC 12
triggers a strange warning on this code that can never run (see below),
so simply assert the array size is 1 and comment the rest.
amdgpu_dc_stream.c:470:55: error: array subscript [0, 0] is outside array bounds of 'struct dc_writeback_info[1]' [-Werror=array-bounds]
  470 |                                 stream->writeback_info[j] = stream->writeback_info[i];

convert a KASSERT() into an if () panic() sequence to appease GCC 12.
OK riastradh@.

drm: Fix conditionals around drmkms_pci and agp.
Kernel should build now with all pci drm drivers stripped out but
DRM_LEGACY still enabled.  (Might not be very useful, but it'll
build.  Maybe we should also have DRM_LEGACY_PCI so those drivers can
be modloaded later.)

drmkms: Fix module build.
avoid an unlikely array bounds issue picked up by GCC 12.
nvkm_pcie_speed() can return -1, which is then used as an array index,
so make this default return PCIe 1.0 speeds.

drm: enable almost all PCIe functionality
linux_pci.c revisions 1.24 and 1.25 implemented most of the remaining
missing PCIe backends, but only enabled them for some amdgpu portions.
this enables all code marked with "XXX amdgpu pcie", "XXX radeon pcie",
and "XXX pcie speed".  for most of it, simply removing #ifndefs __NetBSD__
to enable compliation was required, once the new "bus->max_bus_speed"
member was added to struct pci_bus.  add an "always fails" backend for
pci_enable_atomic_ops_to_root() which seems to only be necessary
for virtual GPU functionality (and could be implemented if needed.)
tested on radeon 5450, 7750, R7 240 [radeon], and RX 550 [amdgpu], and
nvidia 750 and 1030 [nouveau].
this still does not quite work on nvidia cards.  there are two problems
that remain:
- the call to set the link speed is skipped because the speed is set
  to the default value of "-1".  nvkm_pcie_set_link() will actually
  determine the right value for this and for some cards, calling this
  function if the current speed is -1 helps set the link speed.  it
  may be that on linux other paths we don't have enabled properly
  would set this (there's one via debugfs, and a jetson specific one,
  though perhaps setting either AC or DC speed values as boot options
  (after hooking up these for netbsd) would currently work.
- worse, cards newer than kepler - geforce 900, 1000, and newer, are
  all lacking the backing support to set pcie link speed.  the GT 1030
  card i have been testing with remains at pcie 1.0.

radeon: fix and enable ACPI methods for getting ROM BIOS
The hacky way of getting the BIOS mapped only works on x86. ACPI
should be preferred if available. Makes BIOS reading though VFCT
work on aarch64 with EDK2. (But only if EDK2 has POSTed the GPU.)
XXX amdgpu should get the same treatment.

drm: put_cpu() should enable preemption, not disable it again

drm(4): make pr_debug equivalent to aprint_debug
significantly reduces the default spam from amdgpu(4).

drm: Set CONFIG_ACPI in linux/acpi.h and make it build.

Leave a little ACPI-related functionality disabled for now, like
getting EDID out of ACPI -- needs a bit more work to make this work,
and I don't have hardware to work on that.
Should help with failures of the forms:
- unable to locate a BIOS ROM
- bios: unable to locate usable image
on various machines.

radeon_acpi.c: ifdef out unused function on NetBSD.
Should fix syzkaller build.

drm(4): Fix st_rdev in stat.
dminor->index already has the 64*type adjustment, as allocated in
drm_minor_alloc.
PR kern/58180

linux_sync_file: Fix missing init/fini steps.
Noted by rjs@.
PR kern/58210

ttm: Sync ttm_bo_uvm_fault_idle better with Linux.
PR xsrc/58133
ttm: Undo mistake in previous.

PR xsrc/58133
linux: Add a few more cases to pci_get_class.
Should fix crash on boot with amdgpu now that the ACPI business is
enabled.

i915: Fix dmabuf mmap object.

drm: Fix missing bounds checks in dma buf mmap.

drm_gem.c: Fix sense of assertion.
This is the opposite of WARN_ON.
Noted by rjs@.

drm_gem.c: Enable drm_gem_fence_array_add now that we emulate xa.
linux_xa: Delete and replace collision in xa_store as intended.
Don't free the colliding node that's still in the tree.
Noted by rjs@.

i915_gem_mman.c: Apply mmap types via pmap flags.
This way, userland gets buffers mapped write-combining or uncached as
needed.
PR xsrc/58307

x86: Teach bus_dmamem_map about BUS_DMA_PREFETCHABLE.
PR port-amd64/58308

bus_dma(9): Document BUS_DMA_PREFETCHABLE.
Like BUS_DMA_NOCACHE.  Doesn't absolve you of the need for
bus_dmamap_sync, but if you later pass the vaddr to bus_dmamap_load,
the DMA map might notice the mapping is write-combining and use this
to make bus_dmamap_sync cheaper.
PR kern/58309

nouveau_nvkm_subdev_instmem_gk20a.c: Use BUS_DMA_PREFETCHABLE.
Matches Linux's pgprot_writecombine.
Unclear where the appropriate bus_dmamap_sync happens, or is supposed
to happen -- not using it would be wrong, but asking for a
prefetchable mapping may paper over symptoms, at least!

ttm: Sync more with Linux.
Add the original copyright and attribution since this is now,
intentionally, a modified copy of the original and not just roughly
the same algorithm.

ttm: Respect PGO_ALLPAGES.
Not sure this is useful but it reduces XXX's and makes this match
udv_fault better so it's easier to understand.

ttm: Sync cacheability flag logic with Linux.

ttm: Add XXX about readahead fault failures.

pci: Pass cookie through pci_find_device, pci_enumerate_bus, take 2.
New functions pci_find_device1 and pci_enumerate_bus1 have the cookie
argument.  Existing symbols pci_find_device and pci_enumerate_bus are
now wrappers for the cookieless version.
This will allow pci_find_device callers to pass a cookie through to
the match function so they can keep state or pass in extra parameters
like b/d/f numbers, which will allow us to nix some horrible kludges
in the Linux PCI API emulation for drm (and, perhaps, Intel wifi).
This change drops the symbol pci_probe_device, in favour of a new
pci_probe_device1 with the cookie argument.  But I don't think that
requires a revbump because it's only called by MD pci_enumerate_bus1
implementations, which don't live in modules anyway.
Take 2: Make sure to handle NULL match function.
linux_pci: Nix pci enumeration kludges.
Now that we can pass a cookie through, this stuff will be a little
less fragile.

i915: Omit needless i915_gem_object_pin/unpin_pages cycle in fault.
vm_fault_cpu and vm_fault_gtt, called by i915_gem_fault, already do
the pinning and unpinning internally, so there is no need for
i915_gem_fault to do it.
No functional change intended, except that the transient pin count
will be one lower than before during the fault routine (but it will
still be positive).

i915: Match Linux fault routine return code actions.
Omit needless EINTR interception -- this is now handled by
i915_error_to_vmf_fault.
Earlier revert was over a false alarm -- bisection shows the new
warnings arose from linux_pci.c 1.29 here:
https://mail-index.netbsd.org/source-changes/2024/06/23/msg151929.html

linux_pci: Fix shifto in pci_get_class.
It looks like Linux's pci_get_class also matches the interface part
of the PCI class register (but not the revision part), and I hadn't
noticed that in the previous shim structured differently.

With GCC12 kernel ALL/amd64 triggers "'sor' may be used uninitialized".
If "sublinks & 3" is zero GCC is right and sor[1] may be returned unitialized.
Fix by initializing "sor" to zero to return -1 instead of uninitialized value.
Ok: Taylor R Campbell <riastradh@>

amdgpu: Map BAR 2, not BAR 5, on pre-bonaire chips.
PR kern/58384

amdgpu: Map consecutive pages, not the same one over and over again.
PR kern/58385

linux/bitops: Fix overestimate for BITS_TO_LONGS(9)
Fortunately, this seems harmless except for allocating
excessive buffer memory.
Pointed out by nonaka@, OK riastradh@.

pci: Pass cookie through pci_find_device, pci_enumerate_bus, take 2.

New functions pci_find_device1 and pci_enumerate_bus1 have the cookie
argument.  Existing symbols pci_find_device and pci_enumerate_bus are
now wrappers for the cookieless version.

This will allow pci_find_device callers to pass a cookie through to
the match function so they can keep state or pass in extra parameters
like b/d/f numbers, which will allow us to nix some horrible kludges
in the Linux PCI API emulation for drm (and, perhaps, Intel wifi).

This change drops the symbol pci_probe_device, in favour of a new
pci_probe_device1 with the cookie argument.  But I don't think that
requires a revbump because it's only called by MD pci_enumerate_bus1
implementations, which don't live in modules anyway.

Take 2: Make sure to handle NULL match function.

Revert "pci: Pass cookie through pci_find_device, pci_enumerate_bus."

Evidently something is wrong with this, to be diagnosed and redone
once the builds and tests are in better shape.

pci: Pass cookie through pci_find_device, pci_enumerate_bus.

New functions pci_find_device1 and pci_enumerate_bus1 have the cookie
argument.  Existing symbols pci_find_device and pci_enumerate_bus are
now wrappers for the cookieless version.

This drops the symbol pci_probe_device, in favour of a new
pci_probe_device1 with the cookie argument.  But I don't think that
requires a revbump because it's only called by MD pci_enumerate_bus1
implementations, which don't live in modules anyway.

pci(9): Provide default definition of pci_get_segment, always zero.

pci_machdep.h can define __HAVE_PCI_GET_SEGMENT to provide a nonzero
definition.

Adjust the device_call() calling convention so as to provide type checking
of the arguments passed to the call, using auto-generated argument
structures and binding macros.

sync with head

Sync with HEAD.

- Define a device call for PCI bus instances to fetch a direct child's
  device handle given the device's device/function #s (extracted from
  a pcitag_t).  Use it to associate the handle with the child device
  at config_found() time.
- Implement this device call for ACPI and OpenFirmware.
- Enable the OpenFirmware variant for evbarm FDT, macppc, ofppc, sparc64.
- Obsolete acpi_device_register(); it is no longer needed.
- Obsolete setting the OpenFirmware handle in PCI devices in the
  sparc64 device_register(); it is no longer needed.

Sync with HEAD.

Introduce autoconfiguration helpers based around device_compatible_entry:
- pci_compatible_match(): matches against the PCI ID.
- pci_compatible_match_subsys(): matches against PCI SUBSYS ID.
- pci_compatible_lookup(): look up entry by PCI ID.
- pci_compatible_lookup_subsys(): look up entry by PCI SUBSYS ID.
- pci_compatible_lookup_id(): look up entry by an arbitrary ID using the
  PCI ID code conventions.

- Define PCI_COMPAT_EOL as a compat data array sentinel.

Sync with HEAD

Sync with HEAD, resolve a few conflicts

Pull up following revision(s) (requested by msaitoh in ticket #1128):

	sys/dev/pci/pcivar.h: revision 1.113
	sys/dev/pci/pci.c: revision 1.153

  Save control registers in PCI-X, PCIe, MSI and MSI-X capability area when
suspend and restore them when resume. For PCIe capabilities register, it's
required to check the existence of each register to not to write the next area.

  This change fixes a stability of suspend/resume.

 Save control registers in PCI-X, PCIe, MSI and MSI-X capability area when
suspend and restore them when resume. For PCIe cababilities register, it's
required to check the existence of each register to not to write the next area.

 This chagnge fixes a stability of suspend/resume.

Pull up following revision(s) (requested by jakllsch in ticket #832):

	sys/dev/pci/pcivar.h: revision 1.112
	sys/dev/pci/pci_map.c: revision 1.34,1.35
	sys/arch/x86/x86/efi.c: revision 1.15

Enable the appropriate memory or I/O space decode in the PCI
Command/Status Register upon mapping a BAR.

This should fix PR #53286.  It's also possible there are other similar
PRs that might be fixed by this.
 -
Refine previous change to enable PCI window decoding in Command
Register upon mapping; conditionalize on a global variable, that is set
to true on x86 machines booting under EFI.

For now, initialize the global variable at compile time to false.  This
is intended to limit potential problems for other NetBSD ports, should
this changeset be pulled up to netbsd-8.

Related to PR #53286.

Sync with HEAD

Refine previous change to enable PCI window decoding in Command
Register upon mapping; conditionalize on a global variable, that is set
to true on x86 machines booting under EFI.

For now, initialize the global variable at compile time to false.  This
is intended to limit potential problems for other NetBSD ports, should
this changeset be pulled up to netbsd-8.

Related to PR #53286.

Sync with HEAD

s/static inline/static __inline/g for consistency.

- Add new PCI quirk PCI_QUIRK_HASEXTCNF and PCI_QUIRK_NOEXTCNF. Some devices'
  extended configuration area may be broken or violate spec. If an extended
  configuration space is strange but it really exist, use PCI_QUIRK_HASEXTCNF.
  If an extended configuration space is plausible to exist but it really
  doesn't exist, use PCI_QUIRK_NOEXTCNF.
- Add PCI_PRODUCT_INTEL_XEOND_MEM_0_TTR_1(0x6fa8) and
  PCI_PRODUCT_INTEL_COREI76K_IMC_0(0x6f68) with PCI_QUIRK_HASEXTCNF. The
  document clearly states they violate spec and it support the extended
  configuration space.

update from HEAD

Sync with HEAD.  (Note that most of these changes are simply $NetBSD$
tag issues.)

Sync with HEAD

provide all PCI MSI/MSI-X manipulation stub functions.

"#ifdef __HAVE_PCI_MSI_MSIX" workaround such as nvme_pci(4) is not required
any more.
    http://mail-index.netbsd.org/source-changes/2016/09/17/msg077799.html

Sync with HEAD

pci_intr_type() is required pci_chipset_tag_t argument by other than x86.

pointed out by nonaka@n.o.

Sync with HEAD (as of 26th Dec)

 - Move PCI_INTRSTR_LEN from pcireg.h to pcivar.h.
 - In PCI-X cap, print 2nd bus's PCI-X mode, error protection type, Max clock
   frequency and Max clock period.
 - In SATA cap, print register location correctly.
 - In Virtual Channel cap, print reference clock with "ns".
 - In Root Complex Link Declaration, print Link Entry number.

add pci_intr_alloc related stubs to reduce ifdef from device drivers.

PCI Extended Configuration stuff written by nonaka@:
- Add PCI Extended Configuration Space support into x86.
- Check register offset of pci_conf_read() in MD part. It returns (pcireg_t)-1
  if it isn't accessible.
- Decode Extended Capability in PCI Extended Configuration Space.
  Currently the following extended capabilities are decoded:
   - Advanced Error Reporting
   - Virtual Channel
   - Device Serial Number
   - Power Budgeting
   - Root Complex Link Declaration
   - Root Complex Event Collector Association
   - Access Control Services
   - Alternative Routing-ID Interpretation
   - Address Translation Services
   - Single Root IO Virtualization
   - Page Request
   - TPH Requester
   - Latency Tolerance Reporting
   - Secondary PCI Express
   - Process Address Space ID
   - LN Requester
   - L1 PM Substates
  The following extended capabilities are not decoded yet:
   - Root Complex Internal Link Control
   - Multi-Function Virtual Channel
   - RCRB Header
   - Vendor Unique
   - Configuration Access Correction
   - Multiple Root IO Virtualization
   - Multicast
   - Resizable BAR
   - Dynamic Power Allocation
   - Protocol Multiplexing
   - Downstream Port Containment
   - Precision Time Management
   - M-PCIe
   - Function Reading Status Queueing
   - Readiness Time Reporting
   - Designated Vendor-Specific

Sync with HEAD

Add kernel code to support intrctl(8).

- Don't take pci_attach_args as an argument in pci_msi[x]_count().
- Move prototypes of pci_msi[x]_count() from x86/x86/pci_machdep_common to
  sys/dev/pci/pcivar.h.
- Move pci_msi[x]_count() from x86/pci/pci_msi_machdep.c to sys/dev/pci/pci.c

Sync with HEAD

add x86 MD MSI/MSI-X support code.

Sync with HEAD

Pull up following revision(s) (requested by msaitoh in ticket #1229):
	sys/arch/x86/pci/ichlpcib.c: revision 1.40, 1.45
	sys/dev/pci/pcivar.h: revision 1.101
	sys/dev/pci/pci_map.c: revision 1.32
	sys/dev/ic/i82801lpcreg.h: revision 1.12
Use '\n' at the end of all aprint_error_dev() format strings.
--
Fix a bug that ichlpcib(4) maps I/O area incorrectly and then fails to attach
gpio. It might also fixes ACPI related problem described in PR#48960:
 - The LPCIB_PCI_PMBASE and LPCIB_PCI_GPIO register are alike PCI BAR but not
   completely compatible with it. It's ok because the registers' addresses are
   out of BAR0-BAR5(0x10-0x24) and are located in the device-dependent header.
   The PMBASE and GPIO registers define the base address and the type but not
   describe the size. The size is fixed to 128bytes. So use
   pci_mapreg_submap().
 - Make pci_mapreg_submap() extern again.
 - Fix the calculation of the map size in pci_mapreg_submap().

Pull up following revision(s) (requested by msaitoh in ticket #394):
	sys/dev/pci/pcivar.h: revision 1.101
	sys/dev/pci/pci_map.c: revision 1.32
	sys/dev/ic/i82801lpcreg.h: revision 1.12
	sys/arch/x86/pci/ichlpcib.c: revision 1.45
Fix a bug that ichlpcib(4) maps I/O area incorrectly and then fails to attach
gpio. It might also fix ACPI related problem described in PR#48960:
  - The LPCIB_PCI_PMBASE and LPCIB_PCI_GPIO register are alike PCI BAR but not
    completely compatible with it. It's ok because the registers' addresses are
    out of BAR0-BAR5(0x10-0x24) and are located in the device-dependent header.
    The PMBASE and GPIO registers define the base address and the type but not
    describe the size. The size is fixed to 128bytes. So use
    pci_mapreg_submap().
  - Make pci_mapreg_submap() extern again.
  - Fix the calculation of the map size in pci_mapreg_submap().

Fix a bug that ichlpcib(4) maps I/O area incorrectly and then fails to attach
gpio. It might also fix ACPI related problem described in PR#48960:
 - The LPCIB_PCI_PMBASE and LPCIB_PCI_GPIO register are alike PCI BAR but not
   completely compatible with it. It's ok because the registers' addresses are
   out of BAR0-BAR5(0x10-0x24) and are located in the device-dependent header.
   The PMBASE and GPIO registers define the base address and the type but not
   describe the size. The size is fixed to 128bytes. So use
   pci_mapreg_submap().
 - Make pci_mapreg_submap() extern again.
 - Fix the calculation of the map size in pci_mapreg_submap().

Pull up following revision(s) (requested by riastradh in ticket #144):
	sys/dev/pci/radeonfb.c: revision 1.85
	sys/dev/pci/pcivar.h: revision 1.100
	sys/dev/pci/pci_map.c: revision 1.31
	sys/external/bsd/drm2/include/linux/pci.h: revision 1.9
Generalize pci_find_rom and use it to locate x86 video ROM in drm2.
- Make pci_find_rom take the ROM `BAR' size as a parameter, instead
  of using pci_find_mem with the ROM `BAR' to detect the size.
- Use it to find the x86 video ROM in [0xc0000, 0xe0000) in drm2,
  when nothing else reports that location.
- Adapt the one other caller in radeonfb, which already has the
  maximum ROM size handy (romsz).
XXX pullup to netbsd-7

Generalize pci_find_rom and use it to locate x86 video ROM in drm2.

- Make pci_find_rom take the ROM `BAR' size as a parameter, instead
  of using pci_find_mem with the ROM `BAR' to detect the size.

- Use it to find the x86 video ROM in [0xc0000, 0xe0000) in drm2,
  when nothing else reports that location.

- Adapt the one other caller in radeonfb, which already has the
  maximum ROM size handy (romsz).

XXX pullup to netbsd-7

Rebase to HEAD as of a few days ago.

sync with head.

for a reference, the tree before this commit was tagged
as yamt-pagecache-tag8.

this commit was splitted into small chunks to avoid
a limitation of cvs.  ("Protocol error: too many arguments")

sync with head

make pci_intr_string and eisa_intr_string take a buffer and a length
instead of relying in local static storage.

Add a few OKAY flags from HEAD

Pull in support for pci_aprint_devinfo_fancy

sync with head

merge to -current.

extend the pci_aprint_devinfo slightly to cover the cases commonly
used by drivers: a short name for the quiet/naive case and a string
to override the "pcidevs" based name by one provided by the driver,
ride on yesterday's kernel minor version bump

put printing of the pci_devinfo into its own function (not inlined
by purpose) - this is a stack hog, and with this change my uTCA amd64
system boots again
a lot of similar code can be eliminated from pci device drivers this way,
but before doing so (and making the new function part of the module API)
I'd like to consider a modification to make it work with drivers which
prefer to print names from other sources (like pciide)

Tell a pci(4) instance its subordinate PCI buses using a new member
in the pcibus_attach_args, pba_sub. pciN attaches to pba_bus itself.
If pba_bus < pba_sub, then [pba_bus + 1, pba_sub] are subordinate to
pba_bus.

On i386, make mainbus0 attach pci0 with pba_sub = 255 because all buses
1 and up must be subordinate to pci0.

XXX Deal with other architectures.

Add to pci_bus_devorder() an argument that tells the number of slots
available in the devs array.  Change the type of the devs array from
char to uint8_t.  Treat the return value of pci_bus_devorder() as the
number of slots that it filled.

Don't use the __PCI_BUS_DEVORDER #definition to configure the kernel
but let the linker do it.  Make pci_bus_devorder() available on all
architectures by adding a default implementation that will DTRT on
all architectures but hpcmips, the only architecture to #define
__PCI_BUS_DEVORDER.  On hpcmips, adapt the implementation to the new
calling convention.

XXX I can compile an hpcmips GENERIC kernel, but I don't have a
XXX hpcmips box to test it on.

Add inline accessors for pba_pc and pa_pc so that <machine/pci_machdep.h>
can use them in inline functions.

Sync with HEAD.

sync with head

PCI_FLAGS_IO_ENABLED and PCI_FLAGS_MEM_ENABLED changed their functional
role in NetBSD (drivers are no longer supposed to write these to
pa_flags) without changing name.  Correct that.

Rename PCI_FLAGS_IO_ENABLED to PCI_FLAGS_IO_OKAY and
PCI_FLAGS_MEM_ENABLED to PCI_FLAGS_MEM_OKAY, thus making their names
consistent with the other PCI flags and poisoning 3rd-party driver
sources that use the flags in the old bad way.

This patch produces no binary changes in this set of PCI kernels when
they are compiled w/o 'options DIAGNOSTIC' and w/ -V MKREPRO=yes:

algor P4032 P5064 P6032
alpha GENERIC
amd64 GENERIC XEN3_DOM0
arc GENERIC
atari HADES MILAN-PCIIDE
bebox GENERIC
cats GENERIC
cobalt GENERIC
evbarm-el ADI_BRH ARMADILLO9 CP3100 GEMINI GEMINI_MASTER GEMINI_SLAVE
evbarm-el GUMSTIX HDL_G IMX31LITE INTEGRATOR IQ31244 IQ80310 IQ80321
evbarm-el IXDP425 IXM1200 KUROBOX_PRO
evbarm-el LUBBOCK MARVELL_NAS NAPPI NSLU2 SHEEVAPLUG SMDK2800 TEAMASA_NPWR
evbarm-el TEAMASA_NPWR_FC TS7200 TWINTAIL ZAO425
evbmips-el AP30 DBAU1500 DBAU1550 MALTA MERAKI MTX-1 OMSAL400 RB153 WGT624V3
evbmips64-el XLSATX
evbppc EV64260 MPC8536DS MPC8548CDS OPENBLOCKS200 OPENBLOCKS266
evbppc OPENBLOCKS266_OPT P2020RDB PMPPC RB800 WALNUT
hp700 GENERIC
i386 ALL XEN3_DOM0 XEN3_DOMU
ibmnws GENERIC
iyonix GENERIC
landisk GENERIC
macppc GENERIC
mvmeppc GENERIC
netwinder GENERIC
ofppc GENERIC
prep GENERIC
sandpoint GENERIC
sbmips-el GENERIC
sgimips GENERIC32_IP2x GENERIC32_IP3x
sparc GENERIC_SUN4U KRUPS
sparc64 GENERIC

sync with head

Neither pci_dma64_available(), pci_probe_device(), pci_mapreg_map(9),
pci_find_rom(), pci_intr_map(9), pci_enumerate_bus(), nor the match
predicate passed to pciide_compat_intr_establish() should ever modify
their pci_attach_args argument, so make their pci_attach_args arguments
const and deal with the fallout throughout the kernel.

For the most part, these changes add a 'const' where there was no
'const' before, however, some drivers and MD code used to modify
pci_attach_args.  Now those drivers either copy their pci_attach_args
and modify the copy, or refrain from modifying pci_attach_args:

Xen: according to Manuel Bouyer, writing to pci_attach_args in
    pci_intr_map() was a leftover from Xen 2.  Probably a bug.  I
    stopped writing it.  I have not tested this change.

siside(4): sis_hostbr_match() needlessly wrote to pci_attach_args.
    Probably a bug.  I use a temporary variable.  I have not tested this
    change.

slide(4): sl82c105_chip_map() overwrote the caller's pci_attach_args.
    Probably a bug.  Use a local pci_attach_args.  I have not tested
    this change.

viaide(4): via_sata_chip_map() and via_sata_chip_map_new() overwrote the
    caller's pci_attach_args.  Probably a bug.  Make a local copy of the
    caller's pci_attach_args and modify the copy.  I have not tested
    this change.

While I'm here, make pci_mapreg_submap() static.

With these changes in place, I have tested the compilation of these
kernels:

alpha GENERIC
amd64 GENERIC XEN3_DOM0
arc GENERIC
atari HADES MILAN-PCIIDE
bebox GENERIC
cats GENERIC
cobalt GENERIC
evbarm-eb NSLU2
evbarm-el ADI_BRH ARMADILLO9 CP3100 GEMINI GEMINI_MASTER GEMINI_SLAVE GUMSTIX
	HDL_G IMX31LITE INTEGRATOR IQ31244 IQ80310 IQ80321 IXDP425 IXM1200
	KUROBOX_PRO LUBBOCK MARVELL_NAS NAPPI SHEEVAPLUG SMDK2800 TEAMASA_NPWR
	TEAMASA_NPWR_FC TS7200 TWINTAIL ZAO425
evbmips-el AP30 DBAU1500 DBAU1550 MALTA MERAKI MTX-1 OMSAL400 RB153 WGT624V3
evbmips64-el XLSATX
evbppc EV64260 MPC8536DS MPC8548CDS OPENBLOCKS200 OPENBLOCKS266
	OPENBLOCKS266_OPT P2020RDB PMPPC RB800 WALNUT
hp700 GENERIC
i386 ALL XEN3_DOM0 XEN3_DOMU
ibmnws GENERIC
macppc GENERIC
mvmeppc GENERIC
netwinder GENERIC
ofppc GENERIC
prep GENERIC
sandpoint GENERIC
sgimips GENERIC32_IP2x
sparc GENERIC_SUN4U KRUPS
sparc64 GENERIC

As of Sun Apr 3 15:26:26 CDT 2011, I could not compile these kernels
with or without my patches in place:

### evbmips-el GDIUM

nbmake: nbmake: don't know how to make /home/dyoung/pristine-nbsd/src/sys/arch/mips/mips/softintr.c. Stop

### evbarm-el MPCSA_GENERIC
src/sys/arch/evbarm/conf/MPCSA_GENERIC:318: ds1672rtc*: unknown device `ds1672rtc'

### ia64 GENERIC

/tmp/genassym.28085/assym.c: In function 'f111':
/tmp/genassym.28085/assym.c:67: error: invalid application of 'sizeof' to incomplete type 'struct pcb'
/tmp/genassym.28085/assym.c:76: error: dereferencing pointer to incomplete type

### sgimips GENERIC32_IP3x

crmfb.o: In function `crmfb_attach':
crmfb.c:(.text+0x2304): undefined reference to `ddc_read_edid'
crmfb.c:(.text+0x2304): relocation truncated to fit: R_MIPS_26 against `ddc_read_edid'
crmfb.c:(.text+0x234c): undefined reference to `edid_parse'
crmfb.c:(.text+0x234c): relocation truncated to fit: R_MIPS_26 against `edid_parse'
crmfb.c:(.text+0x2354): undefined reference to `edid_print'
crmfb.c:(.text+0x2354): relocation truncated to fit: R_MIPS_26 against `edid_print'

sync with head

Sync with HEAD

pcimmap: if the requested page is marked prefetchable in a child device's
BAR, pass the BUS_SPACE_MAP_PREFETCHABLE flag down to bus_space_mmap

Add/define some MSI support

Sync with HEAD.

sync with head.

sync with head

declare 'struct pci_attach_args' before it is used.  fixes ia64 build.

sync with head

Extract pci_verbose interface definitions into their own header file so
we don't need to include pcivar.h in the module.  pcivar.h tries to pull
in machine/pci_machdep.h which doesn't exist on all machine/architecture
combos.  Keeping track and building the module only for those that work
would have been a maintenance headache;  this change allows us to build
the module on all systems, regardless of whether the system has pci
support or not.

Rework the pciverbose module dispatch vectors to avoid renaming the
externally-visible entrypoint name.  Also this avoids a potential
need to bump kernel version.

Requested by dyoung@ and mrg@

Extract the vendor/product tables and related access routines into a
separate kernel module.  Update pci bus attach routine to load the
module (if available) when we're about to start scanning the bus, and
unload the module after the scan is finished.

On architectures which support loading of modules by the boot loader,
the 'pciverbose' module can be loaded and executed without needing to
rebuild the kernel.  On all architectures, using 'options PCIVERBOSE'
in the kernel configuration file will create a 'builtin' module which
is functionally equivalent to previous behavior.

XXX Although not nearly as large as the vendor and product tables,
XXX the PCI class and subclass tables might also be offloaded into
XXX the module at a future time.

XXX Cardbus (and possibly other) drivers should also be modified to
XXX load the module before scanning/attaching devices.

Sync with HEAD.

Add data types, function prototypes, and stub implementations
for pci_chipset_tag_create() and pci_chipset_tag_destroy().  On
architectures that support it, an MI PCI bus driver can override the
architecture's default pci(9) and pci_intr(9) implementation.

Coming up next: documentation.
After that: x86 implementation.
Last but not least: make cbb(4) use MI PCI overrides.

Add placeholdr flags indicating that the bus has MSI/MSI-X support.

sync with head

Remove unused functions pci_disable_retry() and cardbus_disable_retry().

sync with head.

Sync with HEAD.

Sync with HEAD.

Sync with wrstuden-revivesa-base-2.

Sync with head.

Add pci_mapreg_submap():  This function is pci_mapreg_map() with two
additional arguments, offset and maxsize.  This new functionality
eases handling certain tasks within the direct rendering manager, though
I hope others will also find it useful.

pci_mapreg_map() is now merely a wrapper around pci_mapreg_submap();
the latter contains all of the code from the former.

ok christos@

Sync w/ -current. 34 merge conflicts to follow.

sync with head

Sync with HEAD.

pci_intr_setattr(), allows PCI interrupts to be marked MPSAFE on x86, and
other platforms if the code is added.

pci_intr_map(...)
pci_intr_setattr(pc, ih, PCI_INTR_MPSAFE, 1);
pci_intr_establish(...)

sync with head.

sync with head.

Restore PCI devices to a state that is closer to the state that
NetBSD finds them in: save and restore power management state
(D0..D3) and PCI Configuration Registers 0x0 through 0x40 during
device attachment and detachment, respectively.  Among other things,
this will fix sip(4) detachment and re-attachment.

Export some PCI autoconf routines for use by elansc(4), for example.

Sync with HEAD.

sync with head.

sync with head.

Split device_t and softc for pci(4).

sync with HEAD

pci_activate() expects for its void * argument to be a device_t,
so change the type of the argument to device_t.  Update each use
of pci_activate().

Use device_t and accessors.  Use aprint_*_dev().

sync with head

sync with HEAD

Sync with HEAD.

Sync with head.

sync with head.

Merge jmcneill-pm branch.

Rename pnp(9) -> pmf(9), as requested by many.

GC struct ifnet.

Sync with HEAD.

sync with head.

Sync with HEAD

Merge pci_disable_retry function from jmcneill-pm as it is found in
various drivers.

sync with HEAD

Refactor PNP API:
- Make suspend/resume directly a device functionality. It consists of
  three layers (class logic, device logic, bus logic), all of them being
  optional. This replaces D0/D3 transitions.
- device_is_active returns true if the device was not disabled and was
  not suspended (even partially), device_is_enabled returns true if the
  device was enabled.
- Change pnp_global_transition into pnp_system_suspend and
  pnp_system_resume. Before running any suspend/resume handlers, check
  that all currently attached devices support power management and bail
  out otherwise. The latter is not done for the shutdown/panic case.
- Make the former bus-specific generic network handlers a class handler.
- Make PNP message like volume up/down/toogle PNP events. Each device
  can register what events they are interested in and whether the handler
  should be global or not.
- Introduce device_active API for devices to mark themselve in use from
  either the system or the device. Use this to implement the idle handling
  for audio and input devices. This is intended to replace most ad-hoc
  watchdogs as well.
- Fix somes situations in which audio resume would lose mixer settings.
- Make USB host controllers better deal with suspend in the light of
  shared interrupts.
- Flush filesystem cache on suspend.
- Flush disk caches on suspend. Put ATA disks into standby on suspend as
  well.
- Adopt drivers to use the new PNP API.
- Fix a critical bug in the generic cardbus layer that made D0->D3
  break.
- Fix ral(4) to set if_stop.
- Convert cbb(4) to the new PNP API.
- Apply the PCI Express SCI fix on resume again.

sync with head.

Sync with HEAD.

Follow the merge of pmap.c on i386 and amd64 and move
pmap_init_tmp_pgtbl into arch/x86/x86/pmap.c. Modify the ACPI wakeup
code to restore CR4 before jumping back into kernel space as the large
page option might cover that.

Sync with HEAD.

Sync with head.

machine/{bus,cpu,intr}.h -> sys/{bus,cpu,intr}.h

Extend device API by device_power_private and device_power_set_private.
The latter is a temporary mean until the pnp_register API itself is
overhault. This functions allow a generic power handler to store its
state independent of the driver.

Use this and revamp the PCI power handling. Pretty much all PCI devices
had power handlers that did the same thing, generalize this in
pci_generic_power_register/deregister and the handler. This interface
offers callbacks for the drivers to save and restore state on
transistions. After a long discussion with jmcneill@ it was considered
to be powerful enough until evidence is shown that devices can handle
D1/D2 with less code and higher speed than without the full
save/restore. The generic code is carefully written to handle device
without PCI-PM support and ensure that the correct registers are written
to when D3 loses all state.

Reimplement the generic PCI network device handling on
top of PCI generic power handling.

Introduce pci_disable_retry as used and implemented locally at least by
ath(4) and iwi(4). Use it in this drivers to restore behaviour from
before the introduction of generic PCI network handling.

Convert all PCI drivers that were using pnp_register to the new
framework. The only exception is vga(4) as it is commonly used as
console device. Add a note therein that this should be fixed later.

sync with head.

Introduce pci_net_generic_power, which should be enough for most
network drivers and be a good foundation for C&P for the rest.

For iwi(4), don't reset the PCI retry register again, pci_conf_restore
should take care of that already.

For bge(4), add a NetBSD style if_stop.

Pull in power management changes from private branch.

Sync with HEAD.

Kill caddr_t; there will be some MI fallout, but it will be fixed shortly.

sync with head.

Sync with head.

sync with head

Create a PCI bus powerhook to handle setting PCI D# power state transitions
on suspend/standby/resume.

sync with head

Merge from HEAD.

sync with head.

sync with head.

Sync with head.

re-factor the pci powestate api. reviewed by gimpy

Sync with head.

Add pci_find_rom() API as discussed on tech-kern.

merge ktrace-lwp.

sync with -current

sync with head.

Sync with HEAD.

de-__P

Add support functions for capturing and restoring PCI configuration
registers for power management code.

Fix the sync with head I botched.

Sync with HEAD.

remove macros which just hide cfdata internals
(and are used at one place only)

Sync with HEAD

Phase out the use of a string as first "attach args" member to control
which bustype should be attached with a specific call to config_found()
(from a "mainbus" or a bus bridge).
Do it for isa/eisa/mca and pci/agp for now. These buses all attach to
an mi interface attribute "isabus", "eisabus" etc., and the autoconf
framework now allows to specify an interface attribute on config_found()
and config_search(), which limits the search of matching config data
to these which attach to that specific attribute.
So we basically have to call config_found_ia(..., "foobus", ...) where
such a bus is attached.
As a consequence, where a "mainbus" or alike also attaches other
devices (eg CPUs) which do not attach to a specific attribute yet,
we need at least pass an attribute name (different from "foobus") so
that the foo bus is not found at these places. This made some minor
changes necessary which are not obviously related to the mentioned buses.

add centralized {eisa,isa,pci,agp,mca}busprint() functions which do
what tens of the bus' parents foo{...}bridge_print()s scattered around do

Sync with HEAD.

make PCI devices attachable/detachable (as far as the particular drivers
allow), and allow to rescan a bus selectively (ie only the device/
function I'm looking at)

Sync with HEAD

For the PCIVERBOSE case, separate vendors and products into separate tables.
Eliminating redundant pointers in the tables saves nearly 20K (20% of the table
size).  In the process, add a pci_findproduct() and make that and
pci_findvendor() return a "const char *".

make the "generic" PCI bus enumeration code the standard case which
gets used if nothing else is defined in MD headers,
introduce a "PCI_MACHDEP_ENUMERATE_BUS" CPP definition which can
be used by MD headers (just 1 port atm) to plug in special code

GC pci_{g,s}et_powerstate into pci_powerstate(). Idea from mycroft and gimpy.
Nothing uses them yet.

pass string length (= boundary info) to pci_devinfo so that we do not run over
the end of memory region

Pull up revision 1.59 (requested by itojun in ticket #1412):
- check HDRTYPE early, and ignore if it is not supported (n > 2).
- defer access to interrupt configuration register, as its existence depends on
  HDRTYPE.
- add "skip particular funtion in multifunction device" functionality
  to quirk table.
- add GEODE/NS SC1100 quirk (now boots on soekris Net4801).

- check HDRTYPE early, and ignore if it is not supported (n > 2).
- defer access to interrupt configuration register, as its existence depends on
  HDRTYPE.
- add "skip particular funtion in multifunction device" functionality
  to quirk table.
- add GEODE/NS SC1100 quirk (now boots on soekris Net4801).

Apply the aborted ktrace-lwp changes to a specific branch.  This is just for
others to review, I'm concerned that patch fuziness may have resulted in some
errant code being generated but I'll look at that later by comparing the diff
from the base to the branch with the file I attempt to apply to it.  This will,
at the very least, put the changes in a better context for others to review
them and attempt to tinker with removing passing of 'struct lwp' through
the kernel.

Back out the lwp/ktrace changes. They contained a lot of colateral damage,
and need to be examined and discussed more.

Pass lwp pointers throughtout the kernel, as required, so that the lwpid can
be inserted into ktrace records.  The general change has been to replace
"struct proc *" with "struct lwp *" in various function prototypes, pass
the lwp through and use l_proc to get the process pointer when needed.

Bump the kernel rev up to 1.6V

Handle 64bit DMA addresses on PCI for platforms that can (currently only
enabled on amd64). Add a dmat64 field to various PCI attach structures,
and pass it down where needed. Implement a simple new function called
pci_dma64_available(pa) to test if 64bit DMA addresses may be used.
This returns 1 iff _PCI_HAVE_DMA64 is defined in <machine/pci_machdep.h>,
and there is more than 4G of memory.

Add PCI VPD access routines.  From psi.cz!freza, PR kern/20889.

It is not appropriate for pcivar.h to include "locators.h"
The two files that need it, should include it themselves.

sync kqueue branch with HEAD

catch up with -current.

catch up with -current on kqueue branch

catch up with -current.

Catch up to -current.

add support for the per-device power management capability.

int pci_set_powerstate(pci_chipset_tag_t pc, pcitag_t tag, int newstate)
	set power state of the device to newstate.
int pci_get_powerstate(pci_chipset_tag_t pc, pcitag_t tag)
	get current power state of the device.

In the future, these functions will be used for ACPI support.

Catch up with -current.

implement a check whether a BAR is present at all at a given configuration
space address and use it where the mappings of the VGA card are registered
before descenting too deep into "memory" type specific code
(pci_mem_find() gets noisy if it doesn't like the register)

Add "pa_rawintrpin" containing unswizzled interrupt pin to pci_attach_args.

file pcivar.h was added on branch gehenna-devsw on 2002-05-30 14:46:31 +0000

* Add "pcitag_t *pba_bridgetag" to pci_attach_args.  This is set to
  NULL for root PCI busses.  For busses behind a bridge, it points to
  a persistent copy of the bridge's pcitag_t.  This can be very useful
  for machine-dependent PCI bus enumeration code.
* Implement a machine-dependent pci_enumerate_bus() for sparc64 which
  uses OFW device nodes to enumerate the bus.  When a PCI bus that is
  behind a bridge is attached, pci_attach_hook() allocates a new PCI
  chipset tag for the new bus and sets it's "curnode" to the OFW node
  of the bridge.  This is used as a starting point when enumerating
  that bus.  Root busses get the OFW node of the host bridge (psycho).
* Garbage-collect "ofpci" and "ofppb" from the sparc64 port.

Split the code that enumerates the PCI bus and that actually probes
for a device into two functions:

* pci_probe_device() actually probes/attaches the device specified
  by the provide pcitag_t.

* pci_enumerate_bus() enumerates the bus, and calls pci_probe_device()
  for each device on the bus.  A pci_enumerate_bus_generic() is provided
  which implements the old method of doing this: If something found at
  dev0/func0, determine number of functions and probe each one.

  Machine-dependent code will be able to specify the bus enumeration
  routine in the future.

Sync kqueue branch with -current.

Catch up with -current.

Catch up to -current.

Add an ioctl interface to the PCI bus.  Add ioctls to read/write
PCI configuration space registers, and to fetch bus info.

Update the kqueue branch to HEAD.

Add a pci_find_device function, to find a PCI device using a match
function on all (probed) PCI buses:

int     pci_find_device(struct pci_attach_args *pa,
                        int (*match)(struct pci_attach_args *));

The pci_attach_args structure pointed to by pa is filled in if the
device is found, and 1 is returned. Otherwise 0 is returned.

This function is, unfortunately, needed by the i810 agp code. It's
also of use for LKMs.

Also frob pci_probe_bus to take 2 extra args when used by pci_find_device.

Catch up to -current.

Pull up revision 1.46 (requested by bouyer):
  Add a pa_bus member to pci_attach_args, so that the PCI bus number
  can be used in pci device drivers.

Add pci bus number to pci_attach_args, as suggested by Jason on tech-kern
(needed for pciide)

Catch up with -current.

Sync with HEAD.

Only include "locators.h" is _KERNEL is defined.

backout the parts of the previous change (7 months ago) that were *not* part
of the sys/vm removal, but some (fortunately disabled) work-in-progress.

Update thorpej_scsipi to -current as of a month ago
A i386 GENERIC kernel compiles without the siop, ahc and bha drivers
(will be updated later). i386 IDE/ATAPI and ncr work, as well as
sparc/esp_sbus. alpha should work as well (untested yet).
siop, ahc and bha will be updated once I've updated the branch to current
-current, as well as machine-dependant code.

remove include of <vm/vm.h>. <vm/vm.h> -> <uvm/uvm_extern.h>

Add support for mapping 64-bit PCI memory space.  If the region
is mapped in a way that is inaccessible by a 32-bit bus_addr_t, then
print a message to that effect and return failure.

Original patches by Bill Studenmund, with a few small changes by me.

Define flags in pci_attach_args which indicate it's okay to use the
Memory Read Line, Memory Read Multiple, and Memory Write and Invalidate
PCI commands.

Sync w/ -current.

Back out previous.  Thanks to cgd for pointing out another way to do this.

Add a `bus' member to the pci_attach_args.  This is not normally used,
but some child drivers might need to know this information.

pull pci_machdep.h in from machine/

add support for "extended capabilities" (new in PCI spec 2.2)

Make copyright notices with my name consistent.

Add USB support.  Supported so far:
* UHCI and OHCI host controllers on PCI
* Hubs
* HID devices withe special drivers for mouse and keyboard
* Printers

Remove the PCI-ISA bridge callback mechanism; it's no longer needed.

add a PCI 'quirks' mechanism, meant to be used as the mechanism
of last resort when trying to communicate information about
bogus behaviour of PCI devices to the MI autoconfiguration code.
In general, bogus behaviour should be handled by drivers, but there
are some types of bogons which can't be addressed that way.  The
only quirk currently defined is one which indicates that the device
is multi-function even though the device's header says otherwise.
(Mmm, Intel 82371FB PCI-to-ISA Bridge (PIIX); you'd think that at least
Intel would have gotten it right...)

Include arm32/pci/pci_machdep.h if arm32 is defined.

largely reimplement pci_conf_print():
* print all configuration space registers.  Then, where possible,
  interpret them.  (That is, PRESENT ALL THE DATA, then interpret it --
  don't hide data behind interpretation.  Also, when interpreting
  fields, try to print out the specific value that's being interpreted.)
* handle different header types.
* allow caller to specify a function which can interpret the
  device-dependent header and is responsible for pretty-printing it.

It spews (use 'options MSGBUFSIZE=...' 8-), but when you want the data,
you really want _all_ of it.

Still needs some cleanup and additional code (e.g. interepretation
of PCI-PCI (type 1) and PCI-Cardbus (type 2(?)) bridge headers).

Add macppc support.

Add pci_conf_print(), a function to dump the PCI configuration space, useful
in driver debugging.  From Zubin D. Dittia <zubin@clouseau.arl.wustl.edu>,
PR #4249.

Update marc-pcmcia branch from trunk.

add bebox

Back out last change.  (Partially my fault, for not reviewing it close
enough.)

pci_mapreg_info() has been changed to take arguments like pci_mapreg_map()

Update marc-pcmcia branch from trunk.

Don't export pci_*_find() any more.

use "locators.h" defines for indices for cf_loc[] and default values

Pull thorpej-bus-dma branch into mainline.

Provide the bus dma tag to children.

create pci_mapreg_info() which simply gets mapping register information.
It's used by pci_mapreg_map() and can be used directly by drivers
with special needs (e.g. those being attached as console devices).

rename pci_map_register to pci_mapreg_map.  The latter name is more
descriptive, and allows for a sane name for a function which just digs
the info out of the mapping register but doesn't do the mapping.

implement pci_map_register(), which gets information about a device's
mapping register, maps it, and returns all of the relevant information.
deprecate use of pci_{io,mem}_find(), but leave them around (for a while)
for backward compatibility with third-party drivers.

pass memory- and i/o-enabled flags down via the PCI bus and device attach
arguments, so that a device can tell if its memory and I/O spaces are
enabled.  The flags are cleared, depending on the contents of devices CSR
registers, in the machine-independent PCI bus code.

The atari has a pci_machdep.h file.

Provide a routine so that ISA/EISA bridges can set up a callback so
that their child busses can be attached after the PCI bus
autoconfiguration for their parent bus is done.

This works because:
	(1) there can be at most one ISA/EISA bridge per PCI bus, and
	(2) any ISA/EISA bridges must be attached to primary PCI
	    busses (i.e. bus zero).

That boils down to: there can only be one of these outstanding
at a time, it is cleared when configuring PCI bus 0 before any
subdevices have been found, and it is run after all subdevices
of PCI bus 0 have been found.

This (or something like it) is needed because there are some (legacy)
PCI devices which can show up as ISA/EISA devices as well (the prime
example of which are VGA controllers).  If you attach ISA from a
PCI-ISA/EISA bridge, and the bridge is seen before the video board is,
the board can show up as an ISA device, and that can (bogusly)
complicate the PCI device's attach code, or make the PCI device not be
properly attached at all.

This could be done with machine-dependent code, but as more ports
add support for PCI (and PCI-ISA/EISA bridges) more will need it.
The i386 port could (perhaps should) be converted to use it as well.

New bus.h implementation/interface:
	- No more distinction between i/o-mapped and memory-mapped
	  devices.  It's all "bus space" now, and space tags
	  differentiate the space with finer grain than the
	  bus chipset tag.
	- Add memory barrier methods.
	- Implement space alloc/free methods.
	- Implement region read/write methods (like memcpy to/from
	  bus space).
This interface provides a better abstraction for dealing with
machine-independent chipset drivers.

remove inappropriate an potentially confusing comments ("unnecessary?") from
the pa_device and pa_function members of the pci_attach_args structure.

modify these to provide a new, better-specified PCI interface
(soon to be documented on mailing lists; eventually in section 9 manual
pages), most importantly:
	(1) support interrupt pin swizzling on non-i386 systems with
	    PCI-PCI bridges (per PPB spec; done, but meaningless, on i386).
	(2) provide pci_{io,mem}_find(), to determine what I/O or memory
	    space is described by a given PCI configuration space
	    mapping register.
	(3) provide pci_intr_map(), pci_intr_string(), and
	    pci_intr_{,dis}establish() to manipulate and print info about
	    PCI interrupts.
	(4) make pci functions take as an argument a machine-dependent
	    cookie, to allow more flexibility in implementation.

(1) provide #defines for cf_loc[] entries for devices that attach to
    pcibus and pci.
(2) remove the #ifdef i386 from pci.c, and provide a machine-dependent
    hook (pci_md_attach_hook()) to do any machine-dependent attachment
    gunk, e.g. on the i386 printing out the configuration mode (if bus 0)
(3) don't pass max device number for a given bus in, use
    PCI_MAX_DEVICE_NUMBER, which can be defined on a per-machine basis.
    (defaults to 32.  on i386, it's 32 if pci conf mode == 1, 16 if 2.)

pass a bus_chipset_tag_t (defined in <machine/bus.h>) to the bus when
attaching, and to the devices when attaching them.  #include <machine/bus.h>
to make this backward compatible with old #include requirements.
Also, clean up idempotency so that isa/eisa/pci "var.h" headers are
consistent (make them all idempotent).

make PCI bus match/attach and sub-device attachment machine-independent.

update PCIVERBOSE code in various ways:
	(1) remove the 'UNSUPP' keyword from the device list,
	    because it can't be reasonably used (becuase different
	    devices may be supported on different machines, for
	    good reason).
	(2) enhance pci_devinfo so that class/subclass information
	    is optional (so pci_devinfo can be used by drivers that
	    match classes of devices, and want to look up the
	    devices' names easily).
	(3) more known vendors and devices.

The IST_* and IPL_* constants are not bus-specific; don't treat them as such.
Change splimp -> splnet in Ethernet, ARCnet, and FDDI drivers.

prototype for pci_devinfo function

add include for the alpha, alphabetize

split single-subdevice lookup & attachment into a subroutine
(pci_attach_subdev()).  remove pciattach() function and the pcicd cfdriver
struct, the former because thre are a lot of attachment actions which really
are machine-dependent (perhaps even "most"), and the latter because now that
both pcimatch() and pciattach() are machine-dependent it's bad style to
declare them here and it gains nothing.

clean up several ISA device interfaces: autoconfiguration, header
inclusion, and interrupt configuration.  more work still needs to be done,
but it's getting better...

include files from the correct places.

Make a wrapper match function to check the bus and device numbers, rather
than insisting that every driver do it.

new RCS ID format.

Add PCI autoconfiguration support.