CVS log for src/sys/dev/pci/pciconf.h

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Keyword substitution: kv
Default branch: MAIN

Instead of trying to prevent pciconf from reconfiguring the firmware's
framebuffer, instead allow MD code to register callbacks. If a resource is
changed, the driver can unmap the old resource and remap the new. Do this
with simplefb so the console doesn't explode when the VGA device is
(potentially) reconfigured at boot.

Add pciconf_resource_reserve. This allows MD code to mark specific memory
and I/O regions as in use. When pciconf finds a device already configured
to use one of these regions, the device config is left as-is.

Overhaul the interface to pci_configure_bus():
- Don't expose how PCI bus configuration resource management is implemented.
  Provide a new resource provider API:

  ==> pciconf_resource_init() -- Initialize a PCI configuration resources
      container.
  ==> pciconf_resource_add() -- Add a PCI configuration resource to the
      container (I/O, MEM, or prefetchable MEM).  Multiple resources of
      each type may be added.
  ==> pciconf_resource_fini() -- Tear down the PCI configurtation resources
      container once the bus has been configured.

  This is much easier to use than the previous method of providing an
  extent map for each kind of resource, and works better for e.g. ACPI
  platforms that provide potentially multiple PCI resources in tables
  provided by firmware.

- Re-implement PCI configuration resource management using vmem arenas,
  rather than extent maps.

Explcitly include <sys/extent.h> here.

sync with head

Fix comment

sync with head

sync with head.

Sync with head.

sync with head.

PCI_NETBSD_CONFIGURE should allocate (but not map) address space expansion
ROMS by default.   Full discussion at
http://mail-index.netbsd.org/tech-kern/2005/12/16/0023.html
Closes PR kern/32467
Reviewed by briggs@

merge ktrace-lwp.

sync with -current

Sync with HEAD.

Pull up revision 1.9 (requested by tsutsui in ticket #67):
Allow MD PCI code to specify or disable PCI_COMMAND_PARITY_ENABLE
and PCI_CMMAND_SERR_ENABLE in MI pci_configure_bus(9).
Patch from PR kern/27423 by KIYOHARA Takashi with some changes by me,
approved by Allen Briggs.

sync with head.

Allow MD PCI code to specify or disable PCI_COMMAND_PARITY_ENABLE
and PCI_CMMAND_SERR_ENABLE in MI pci_configure_bus(9).
Patch from PR kern/27423 by KIYOHARA Takashi with some changes by me,
approved by Allen Briggs.

sync with head.

Sync with HEAD.

de-__P

Catch up to -current.

sync kqueue with -current; this includes merge of gehenna-devsw branch,
merge of i386 MP branch, and part of autoconf rototil work

Before declaring pci_conf_interrupt(), check to see if it's
already defined as a CPP macro, which is the case for SH5 at least.

Catch up with -current.

Catch up to -current.

Move the declaration of pci_conf_hook down to <machine/pci_machdep.h>;
a port may choose to implement it not as a function but i.e. as a
pci_chipset_tag_t function vector.

Sync kqueue branch with -current.

Catch up to -current.

Add a "cacheline_size" argument to pci_configure_bus().  It is used
to set the cacheline size in the BHLC register.  This should be the
size of the largest D-cache line on a system.

Catch up to -current.

Sync the thorpej-mips-cache branch with -current.

Add a "firstbus" argument to pci_configure_bus(), indicating the
first bus number to use, rather than always assuming that we should
start at bus #0.

Catch up to -current.

Update the kqueue branch to HEAD.

Respect __PCI_BUS_DEVORDER.
If all devices can handle 66MHz, then use 66MHz.
Triple the number of configured I/O ranges that we can handle on a bus
  (8 was insufficient--originally didn't consider multifunction devices)
Allow one to specify which types of memory to configure, I/O, ROM, or
  MEM--for example, one could configure only ROM or only non-ROM.
Ensure that the ROM is disabled if we're not configuring it.
Only set PCI_COMMAND_IO_ENABLE/PCI_COMMAND_MEM_ENABLE if there are valid
  memory ranges configured.

Catch up to -current.

Add a port to IBM's PPC405GP Reference Board (the "walnut")
by Eduardo Horvath and Simon Burge of Wasabi Systems.

IBM 4xx series CPU features:
 - New pmap and revised trap handler.
 - Support on-chip timers, PCI controller, UARTs
 - Framework for on-chip ethernet and watchdog timer.
General PowerPC features:
 - Add in-kernel PPC floating point emulation
 - New in{,4}_cksum that is between 1.5 and 5 times faster than the
   old version depending on CPU type.
General changes:
 - Kernel support for generic dbsym-style symbols.

Sync with HEAD.

file pciconf.h was added on branch thorpej_scsipi on 2001-02-11 19:16:00 +0000

Add an option (defopt) PCI_NETBSD_CONFIGURE that provides PCI bus
configuration (assignment of bus numbers, BARs, timer values,
interrupt lines, etc.).
The interface must be called from m.d. code prior to probing the bus.
It is meant to be called once for each primary (bus == 0) PCI bus in
the system.  It will configure any busses behind PCI-PCI bridges.
Section 9 man page for pci_configure_bus() will come soon.
In the meantime, sample usage is in arch/sandpoint/sandpoint/mainbus.c.
[ Reviewed by thorpej ]