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Diff for /src/sys/dev/pci/if_tireg.h between version 1.18 and 1.18.10.1

version 1.18, 2007/03/04 06:02:23 version 1.18.10.1, 2007/09/10 10:55:16
Line 834  struct ti_tx_desc {
Line 834  struct ti_tx_desc {
  * Tigon command structure.   * Tigon command structure.
  */   */
 struct ti_cmd_desc {  struct ti_cmd_desc {
 #if BYTE_ORDER == BIG_ENDIAN          u_int32_t               ti_cmdx;
         u_int32_t               ti_cmd:8;  
         u_int32_t               ti_code:12;  
         u_int32_t               ti_idx:12;  
 #else  
         u_int32_t               ti_idx:12;  
         u_int32_t               ti_code:12;  
         u_int32_t               ti_cmd:8;  
 #endif  
 };  };
   
   #define TI_CMD_CMD(cmd)         (((((cmd)->ti_cmdx)) >> 24) & 0xff)
   #define TI_CMD_CODE(cmd)        (((((cmd)->ti_cmdx)) >> 12) & 0xfff)
   #define TI_CMD_IDX(cmd)         ((((cmd)->ti_cmdx)) & 0xfff)
   
 #define TI_CMD_HOST_STATE               0x01  #define TI_CMD_HOST_STATE               0x01
 #define TI_CMD_CODE_STACK_UP            0x01  #define TI_CMD_CODE_STACK_UP            0x01
 #define TI_CMD_CODE_STACK_DOWN          0x02  #define TI_CMD_CODE_STACK_DOWN          0x02
Line 891  struct ti_cmd_desc {
Line 887  struct ti_cmd_desc {
  * Utility macros to make issuing commands a little simpler. Assumes   * Utility macros to make issuing commands a little simpler. Assumes
  * that 'sc' and 'cmd' are in local scope.   * that 'sc' and 'cmd' are in local scope.
  */   */
 #define TI_DO_CMD(x, y, z)              \  #define TI_DO_CMD(x, y, z)      do {                            \
         cmd.ti_cmd = x;                 \          cmd.ti_cmdx = (((x) << 24) | ((y) << 12) | ((z)));      \
         cmd.ti_code = y;                \          ti_cmd(sc, &cmd);                                       \
         cmd.ti_idx = z;                 \  } while(0)
         ti_cmd(sc, &cmd);  
   #define TI_DO_CMD_EXT(x, y, z, v, w)    do {                    \
 #define TI_DO_CMD_EXT(x, y, z, v, w)    \          cmd.ti_cmdx = (((x) << 24) | ((y) << 12) | ((z)));      \
         cmd.ti_cmd = x;                 \          ti_cmd_ext(sc, &cmd, (v), (w));                         \
         cmd.ti_code = y;                \  } while(0)
         cmd.ti_idx = z;                 \  
         ti_cmd_ext(sc, &cmd, v, w);  
   
 /*  /*
  * Other utility macros.   * Other utility macros.
  */   */
 #define TI_INC(x, y)    (x) = (x + 1) % y  #define TI_INC(x, y)    do { (x) = ((x) + 1) % (y); } while(0)
   
 #define TI_UPDATE_JUMBOPROD(x, y)                                       \  #define TI_UPDATE_JUMBOPROD(x, y)       do {                            \
         if (x->ti_hwrev == TI_HWREV_TIGON) {                            \          if ((x)->ti_hwrev == TI_HWREV_TIGON)                            \
                 TI_DO_CMD(TI_CMD_SET_RX_JUMBO_PROD_IDX, 0, y);  \                  TI_DO_CMD(TI_CMD_SET_RX_JUMBO_PROD_IDX, 0, y);  \
         } else {                                                        \          else                                                            \
                 CSR_WRITE_4(x, TI_MB_JUMBORXPROD_IDX, y);               \                  CSR_WRITE_4(x, TI_MB_JUMBORXPROD_IDX, y);               \
         }  } while(0)
   
 #define TI_UPDATE_MINIPROD(x, y)                                        \  #define TI_UPDATE_MINIPROD(x, y)                                        \
                 CSR_WRITE_4(x, TI_MB_MINIRXPROD_IDX, y);                  CSR_WRITE_4(x, TI_MB_MINIRXPROD_IDX, y)
   
 #define TI_UPDATE_STDPROD(x, y)                                         \  #define TI_UPDATE_STDPROD(x, y)         do {                            \
         if (x->ti_hwrev == TI_HWREV_TIGON) {                            \          if ((x)->ti_hwrev == TI_HWREV_TIGON)                            \
                 TI_DO_CMD(TI_CMD_SET_RX_PROD_IDX, 0, y);                \                  TI_DO_CMD(TI_CMD_SET_RX_PROD_IDX, 0, y);                \
         } else {                                                        \          else                                                            \
                 CSR_WRITE_4(x, TI_MB_STDRXPROD_IDX, y);                 \                  CSR_WRITE_4(x, TI_MB_STDRXPROD_IDX, y);                 \
         }  } while(0)
   
   
 /*  /*
  * Tigon event structure.   * Tigon event structure.
  */   */
 struct ti_event_desc {  struct ti_event_desc {
 #if BYTE_ORDER == BIG_ENDIAN          u_int32_t               ti_eventx;
         u_int32_t               ti_event:8;  
         u_int32_t               ti_code:12;  
         u_int32_t               ti_idx:12;  
 #else  
         u_int32_t               ti_idx:12;  
         u_int32_t               ti_code:12;  
         u_int32_t               ti_event:8;  
 #endif  
         u_int32_t               ti_rsvd;          u_int32_t               ti_rsvd;
 };  };
   
   #define TI_EVENT_EVENT(e)       (((((e)->ti_eventx)) >> 24) & 0xff)
   #define TI_EVENT_CODE(e)        (((((e)->ti_eventx)) >> 12) & 0xfff)
   #define TI_EVENT_IDX(e)         (((((e)->ti_eventx))) & 0xfff)
   
 /*  /*
  * Tigon events.   * Tigon events.
  */   */
Line 973  struct ti_event_desc {
Line 963  struct ti_event_desc {
   
 #ifdef __BUS_SPACE_HAS_STREAM_METHODS  #ifdef __BUS_SPACE_HAS_STREAM_METHODS
 #define CSR_WRITE_4(sc, reg, val)       \  #define CSR_WRITE_4(sc, reg, val)       \
         bus_space_write_stream_4(sc->ti_btag, sc->ti_bhandle, (reg), (val))          bus_space_write_stream_4((sc)->ti_btag, (sc)->ti_bhandle, reg, val)
   
 #define CSR_READ_4(sc, reg)             \  #define CSR_READ_4(sc, reg)             \
         bus_space_read_stream_4(sc->ti_btag, sc->ti_bhandle, (reg))          bus_space_read_stream_4((sc)->ti_btag, (sc)->ti_bhandle, reg)
 #else  #else
 #define CSR_WRITE_4(sc, reg, val)       \  #define CSR_WRITE_4(sc, reg, val)       \
         bus_space_write_4(sc->ti_btag, sc->ti_bhandle, (reg), (val))          bus_space_write_4((sc)->ti_btag, (sc)->ti_bhandle, reg, val)
   
 #define CSR_READ_4(sc, reg)             \  #define CSR_READ_4(sc, reg)             \
         bus_space_read_4(sc->ti_btag, sc->ti_bhandle, (reg))          bus_space_read_4((sc)->ti_btag, (sc)->ti_bhandle, reg)
 #endif  #endif
   
 #define TI_SETBIT(sc, reg, x)   \  #define TI_SETBIT(sc, reg, x)   \
         CSR_WRITE_4(sc, (reg), (CSR_READ_4(sc, (reg)) | (x)))          CSR_WRITE_4(sc, reg, (CSR_READ_4(sc, reg) | (x)))
 #define TI_CLRBIT(sc, reg, x)   \  #define TI_CLRBIT(sc, reg, x)   \
         CSR_WRITE_4(sc, (reg), (CSR_READ_4(sc, (reg)) & ~(x)))          CSR_WRITE_4(sc, reg, (CSR_READ_4(sc, reg) & ~(x)))
   
 /*  /*
  * Memory management stuff. Note: the SSLOTS, MSLOTS and JSLOTS   * Memory management stuff. Note: the SSLOTS, MSLOTS and JSLOTS
Line 1235  do {         \
Line 1225  do {         \
 /*  /*
  * Note that EEPROM_START leaves transmission enabled.   * Note that EEPROM_START leaves transmission enabled.
  */   */
 #define EEPROM_START                                                    \  #define EEPROM_START()  do {                                            \
         TI_SETBIT(sc, TI_MISC_LOCAL_CTL, TI_MLC_EE_CLK); /* Pull clock pin high */\          TI_SETBIT(sc, TI_MISC_LOCAL_CTL, TI_MLC_EE_CLK); /* Pull clock pin high */\
         TI_SETBIT(sc, TI_MISC_LOCAL_CTL, TI_MLC_EE_DOUT); /* Set DATA bit to 1 */       \          TI_SETBIT(sc, TI_MISC_LOCAL_CTL, TI_MLC_EE_DOUT); /* Set DATA bit to 1 */       \
         TI_SETBIT(sc, TI_MISC_LOCAL_CTL, TI_MLC_EE_TXEN); /* Enable xmit to write bit */\          TI_SETBIT(sc, TI_MISC_LOCAL_CTL, TI_MLC_EE_TXEN); /* Enable xmit to write bit */\
         TI_CLRBIT(sc, TI_MISC_LOCAL_CTL, TI_MLC_EE_DOUT); /* Pull DATA bit to 0 again */\          TI_CLRBIT(sc, TI_MISC_LOCAL_CTL, TI_MLC_EE_DOUT); /* Pull DATA bit to 0 again */\
         TI_CLRBIT(sc, TI_MISC_LOCAL_CTL, TI_MLC_EE_CLK); /* Pull clock low again */          TI_CLRBIT(sc, TI_MISC_LOCAL_CTL, TI_MLC_EE_CLK); /* Pull clock low again */     \
   } while(0)
   
 /*  /*
  * EEPROM_STOP ends access to the EEPROM and clears the ETXEN bit so   * EEPROM_STOP ends access to the EEPROM and clears the ETXEN bit so
  * that no further data can be written to the EEPROM I/O pin.   * that no further data can be written to the EEPROM I/O pin.
  */   */
 #define EEPROM_STOP                                                     \  #define EEPROM_STOP()   do {                                                    \
         TI_CLRBIT(sc, TI_MISC_LOCAL_CTL, TI_MLC_EE_TXEN); /* Disable xmit */    \          TI_CLRBIT(sc, TI_MISC_LOCAL_CTL, TI_MLC_EE_TXEN); /* Disable xmit */    \
         TI_CLRBIT(sc, TI_MISC_LOCAL_CTL, TI_MLC_EE_DOUT); /* Pull DATA to 0 */  \          TI_CLRBIT(sc, TI_MISC_LOCAL_CTL, TI_MLC_EE_DOUT); /* Pull DATA to 0 */  \
         TI_SETBIT(sc, TI_MISC_LOCAL_CTL, TI_MLC_EE_CLK); /* Pull clock high */  \          TI_SETBIT(sc, TI_MISC_LOCAL_CTL, TI_MLC_EE_CLK); /* Pull clock high */  \
         TI_SETBIT(sc, TI_MISC_LOCAL_CTL, TI_MLC_EE_TXEN); /* Enable xmit */     \          TI_SETBIT(sc, TI_MISC_LOCAL_CTL, TI_MLC_EE_TXEN); /* Enable xmit */     \
         TI_SETBIT(sc, TI_MISC_LOCAL_CTL, TI_MLC_EE_DOUT); /* Toggle DATA to 1 */        \          TI_SETBIT(sc, TI_MISC_LOCAL_CTL, TI_MLC_EE_DOUT); /* Toggle DATA to 1 */        \
         TI_CLRBIT(sc, TI_MISC_LOCAL_CTL, TI_MLC_EE_TXEN); /* Disable xmit. */   \          TI_CLRBIT(sc, TI_MISC_LOCAL_CTL, TI_MLC_EE_TXEN); /* Disable xmit. */   \
         TI_CLRBIT(sc, TI_MISC_LOCAL_CTL, TI_MLC_EE_CLK); /* Pull clock low again */          TI_CLRBIT(sc, TI_MISC_LOCAL_CTL, TI_MLC_EE_CLK); /* Pull clock low again */ \
   } while(0)
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Removed from v.1.18  
changed lines
  Added in v.1.18.10.1
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