CVS log for src/sys/dev/nvmm/x86/nvmm_x86_svm.c

Up to [cvs.NetBSD.org] / src / sys / dev / nvmm / x86

Request diff between arbitrary revisions

Default branch: MAIN

Revision 1.85 / (download) - annotate - [select for diffs], Thu Feb 23 02:54:02 2023 UTC (3 months, 2 weeks ago) by riastradh
Branch: MAIN
CVS Tags: HEAD
Changes since 1.84: +30 -2 lines
Diff to previous 1.84 (colored)

nvmm: Filter CR4 bits on x86 SVM (AMD).

In particular, prohibit PKE, Protection Key Enable, which requires
some additional management of CPU state by nvmm.

Revision 1.84 / (download) - annotate - [select for diffs], Sat Aug 20 23:48:51 2022 UTC (9 months, 2 weeks ago) by riastradh
Branch: MAIN
CVS Tags: netbsd-10-base, netbsd-10, bouyer-sunxi-drm-base, bouyer-sunxi-drm
Changes since 1.83: +3 -2 lines
Diff to previous 1.83 (colored)

x86: Split most of pmap.h into pmap_private.h or vmparam.h.

This way pmap.h only contains the MD definition of the MI pmap(9)
API, which loads of things in the kernel rely on, so changing x86
pmap internals no longer requires recompiling the entire kernel every
time.

Callers needing these internals must now use machine/pmap_private.h.
Note: This is not x86/pmap_private.h because it contains three parts:

1. CPU-specific (different for i386/amd64) definitions used by...

2. common definitions, including Xenisms like xpmap_ptetomach,
   further used by...

3. more CPU-specific inlines for pmap_pte_* operations

So {amd64,i386}/pmap_private.h defines 1, includes x86/pmap_private.h
for 2, and then defines 3.  Maybe we should split that out into a new
pmap_pte.h to reduce this trouble.

No functional change intended, other than that some .c files must
include machine/pmap_private.h when previously uvm/uvm_pmap.h
polluted the namespace with pmap internals.

Note: This migrates part of i386/pmap.h into i386/vmparam.h --
specifically the parts that are needed for several constants defined
in vmparam.h:

VM_MAXUSER_ADDRESS
VM_MAX_ADDRESS
VM_MAX_KERNEL_ADDRESS
VM_MIN_KERNEL_ADDRESS

Since i386 needs PDP_SIZE in vmparam.h, I added it there on amd64
too, just to keep things parallel.

Revision 1.82.2.1 / (download) - annotate - [select for diffs], Sat Apr 3 22:28:45 2021 UTC (2 years, 2 months ago) by thorpej
Branch: thorpej-futex
Changes since 1.82: +3 -3 lines
Diff to previous 1.82 (colored) next main 1.83 (colored)

Sync with HEAD.

Revision 1.82.4.1 / (download) - annotate - [select for diffs], Sat Apr 3 21:44:51 2021 UTC (2 years, 2 months ago) by thorpej
Branch: thorpej-cfargs
Changes since 1.82: +3 -3 lines
Diff to previous 1.82 (colored) next main 1.83 (colored)

Sync with HEAD.

Revision 1.83 / (download) - annotate - [select for diffs], Fri Mar 26 15:59:53 2021 UTC (2 years, 2 months ago) by reinoud
Branch: MAIN
CVS Tags: thorpej-i2c-spi-conf2-base, thorpej-i2c-spi-conf2, thorpej-i2c-spi-conf-base, thorpej-i2c-spi-conf, thorpej-futex2-base, thorpej-futex2, thorpej-futex-base, thorpej-cfargs2-base, thorpej-cfargs2, thorpej-cfargs-base, cjep_sun2x-base1, cjep_sun2x-base, cjep_sun2x, cjep_staticlib_x-base1, cjep_staticlib_x-base, cjep_staticlib_x
Changes since 1.82: +3 -3 lines
Diff to previous 1.82 (colored)

Implement nvmm_vcpu::stop, a race-free exit from nvmm_vcpu_run() without
signals. This introduces a new kernel and userland NVMM version indicating
this support.

Patch by Kamil Rytarowski <kamil@netbsd.org> and committed on his request.

Revision 1.82 / (download) - annotate - [select for diffs], Sat Oct 24 07:14:30 2020 UTC (2 years, 7 months ago) by mgorny
Branch: MAIN
Branch point for: thorpej-futex, thorpej-cfargs
Changes since 1.81: +6 -4 lines
Diff to previous 1.81 (colored)

Issue 64-bit versions of *XSAVE* for 64-bit amd64 programs

When calling FXSAVE, XSAVE, FXRSTOR, ... for 64-bit programs on amd64
use the 64-suffixed variant in order to include the complete FIP/FDP
registers in the x87 area.

The difference between the two variants is that the FXSAVE64 (new)
variant represents FIP/FDP as 64-bit fields (union fp_addr.fa_64),
while the legacy FXSAVE variant uses split fields: 32-bit offset,
16-bit segment and 16-bit reserved field (union fp_addr.fa_32).
The latter implies that the actual addresses are truncated to 32 bits
which is insufficient in modern programs.

The change is applied only to 64-bit programs on amd64.  Plain i386
and compat32 continue using plain FXSAVE.  Similarly, NVMM is not
changed as I am not familiar with that code.

This is a potentially breaking change.  However, I don't think it likely
to actually break anything because the data provided by the old variant
were not meaningful (because of the truncated pointer).

Revision 1.46.4.13 / (download) - annotate - [select for diffs], Sun Sep 13 11:56:44 2020 UTC (2 years, 8 months ago) by martin
Branch: netbsd-9
CVS Tags: netbsd-9-3-RELEASE, netbsd-9-2-RELEASE, netbsd-9-1-RELEASE
Changes since 1.46.4.12: +25 -6 lines
Diff to previous 1.46.4.12 (colored) to branchpoint 1.46 (colored) next main 1.47 (colored)

Pull up following revision(s) (requested by maxv in ticket #1078):

	sys/dev/nvmm/x86/nvmm_x86_svm.c: revision 1.73
	sys/dev/nvmm/x86/nvmm_x86_vmx.c: revision 1.73
	sys/dev/nvmm/x86/nvmm_x86_vmx.c: revision 1.74

nvmm-x86-vmx: improve the handling of CR4
 - Filter out certain features we don't want the guest to enable. This is
   for general correctness, and future-proofness.
 - Flush the guest TLB when certain flags change.

nvmm-x86: improve the handling of RFLAGS.RF
 - When injecting certain exceptions, set RF. For us to have an up-to-date
   view of RFLAGS, we commit the state before the event.
 - When advancing RIP, clear RF.

Revision 1.46.4.12 / (download) - annotate - [select for diffs], Sun Sep 13 11:54:10 2020 UTC (2 years, 8 months ago) by martin
Branch: netbsd-9
Changes since 1.46.4.11: +8 -3 lines
Diff to previous 1.46.4.11 (colored) to branchpoint 1.46 (colored)

Pull up following revision(s) (requested by maxv in ticket #1077):

	sys/dev/nvmm/x86/nvmm_x86_vmx.c: revision 1.68
	sys/dev/nvmm/x86/nvmm_x86_svm.c: revision 1.74
	sys/dev/nvmm/x86/nvmm_x86.c: revision 1.16

Improve emulation of MSR_IA32_ARCH_CAPABILITIES: publish only the *_NO
bits. Initially they were the only ones there, but Intel then added other
bits we aren't interested in, and they must be filtered out.

nvmm-x86-svm: improve the handling of MSR_EFER

Intercept reads of it as well, just to mask EFER_SVME, which the guest
doesn't need to see.

nvmm-x86: improve the CPUID emulation

 - Mask DTES64, DS_CPL, CID, SDBG, xTPR, PN.
 - B10, B20 and IA64 do not exist, so just remove them.

Revision 1.81 / (download) - annotate - [select for diffs], Tue Sep 8 17:02:03 2020 UTC (2 years, 8 months ago) by maxv
Branch: MAIN
Changes since 1.80: +4 -7 lines
Diff to previous 1.80 (colored)

nvmm-x86: avoid hogging behavior observed recently

When the FPU code got rewritten in NetBSD, the dependency on IPL_HIGH was
eliminated, and I took _vcpu_guest_fpu_enter() out of the VCPU loop since
there was no need to be in the splhigh window.

Later, the code was switched to use the kernel FPU API, API that works at
IPL_VM, not at IPL_NONE.

These two changes mean that the whole VCPU loop is now executing at IPL_VM,
which is not desired, because it introduces a delay in interrupt processing
on the host in certain cases.

Fix this by putting _vcpu_guest_fpu_enter() back inside the VCPU loop.

Revision 1.80 / (download) - annotate - [select for diffs], Tue Sep 8 16:58:38 2020 UTC (2 years, 8 months ago) by maxv
Branch: MAIN
Changes since 1.79: +3 -3 lines
Diff to previous 1.79 (colored)

nvmm: cosmetic changes

 - Style.
 - Explicitly include ioccom.h.

Revision 1.79 / (download) - annotate - [select for diffs], Sun Sep 6 02:18:53 2020 UTC (2 years, 9 months ago) by riastradh
Branch: MAIN
Changes since 1.78: +4 -3 lines
Diff to previous 1.78 (colored)

Fix fallout from previous uvm.h cleanup.

- pmap(9) needs uvm/uvm_extern.h.

- x86/pmap.h is not usable on its own; it is only usable if included
  via uvm/uvm_extern.h (-> uvm/uvm_pmap.h -> machine/pmap.h).

- Make nvmm.h and nvmm_internal.h standalone.

Revision 1.78 / (download) - annotate - [select for diffs], Sat Sep 5 16:30:11 2020 UTC (2 years, 9 months ago) by riastradh
Branch: MAIN
Changes since 1.77: +3 -4 lines
Diff to previous 1.77 (colored)

Round of uvm.h cleanup.

The poorly named uvm.h is generally supposed to be for uvm-internal
users only.

- Narrow it to files that actually need it -- mostly files that need
  to query whether curlwp is the pagedaemon, which should maybe be
  exposed by an external header.

- Use uvm_extern.h where feasible and uvm_*.h for things not exposed
  by it.  We should split up uvm_extern.h but this will serve for now
  to reduce the uvm.h dependencies.

- Use uvm_stat.h and #ifdef UVMHIST uvm.h for files that use
  UVMHIST(ubchist), since ubchist is declared in uvm.h but the
  reference evaporates if UVMHIST is not defined, so we reduce header
  file dependencies.

- Make uvm_device.h and uvm_swap.h independently includable while
  here.

ok chs@

Revision 1.77 / (download) - annotate - [select for diffs], Sat Sep 5 07:26:38 2020 UTC (2 years, 9 months ago) by maxv
Branch: MAIN
Changes since 1.76: +3 -3 lines
Diff to previous 1.76 (colored)

x86: rename PGEX_X -> PGEX_I

To match the x86 specification and the other OSes.

Revision 1.76 / (download) - annotate - [select for diffs], Sat Sep 5 07:22:26 2020 UTC (2 years, 9 months ago) by maxv
Branch: MAIN
Changes since 1.75: +15 -16 lines
Diff to previous 1.75 (colored)

nvmm: update copyright headers

Revision 1.46.4.11 / (download) - annotate - [select for diffs], Fri Sep 4 18:53:43 2020 UTC (2 years, 9 months ago) by martin
Branch: netbsd-9
Changes since 1.46.4.10: +8 -2 lines
Diff to previous 1.46.4.10 (colored) to branchpoint 1.46 (colored)

Pull up following revision(s) (requested by maxv in ticket #1076):

	sys/dev/nvmm/x86/nvmm_x86_svm.c: revision 1.75
	sys/arch/x86/include/specialreg.h: revision 1.172
	sys/dev/nvmm/x86/nvmm_x86_vmx.c: revision 1.72

nvmm-x86-vmx: fix detection of the BIOS lock

If it's locked, ensure it's locked with VMX enabled. If it's not locked,
then lock it ourselves with VMX enabled.

Should fix NetBSD PR/55596.

 -

Add a few more CPUID flags.

 -

nvmm-x86-svm: check the SVM revision
Only revision 1 exists, but check it, for future-proofness.

Revision 1.75 / (download) - annotate - [select for diffs], Fri Sep 4 17:06:23 2020 UTC (2 years, 9 months ago) by maxv
Branch: MAIN
Changes since 1.74: +8 -2 lines
Diff to previous 1.74 (colored)

nvmm-x86-svm: check the SVM revision

Only revision 1 exists, but check it, for future-proofness.

Revision 1.46.4.10 / (download) - annotate - [select for diffs], Sat Aug 29 17:00:28 2020 UTC (2 years, 9 months ago) by martin
Branch: netbsd-9
Changes since 1.46.4.9: +5 -12 lines
Diff to previous 1.46.4.9 (colored) to branchpoint 1.46 (colored)

Pull up following revision(s) (requested by maxv in ticket #1068):

	sys/dev/nvmm/x86/nvmm_x86_svm.c: revision 1.71
	sys/dev/nvmm/nvmm.c: revision 1.34
	sys/dev/nvmm/x86/nvmm_x86_svm.c: revision 1.72
	sys/dev/nvmm/nvmm.c: revision 1.35
	sys/dev/nvmm/nvmm.c: revision 1.36
	sys/dev/nvmm/x86/nvmm_x86_svmfunc.S: revision 1.5
	sys/dev/nvmm/nvmm.c: revision 1.37
	sys/dev/nvmm/x86/nvmm_x86_vmxfunc.S: revision 1.5
	sys/dev/nvmm/x86/nvmm_x86_vmx.c: revision 1.70
	sys/dev/nvmm/x86/nvmm_x86_svm.c: revision 1.68
	sys/dev/nvmm/x86/nvmm_x86.c: revision 1.15
	sys/dev/nvmm/nvmm_ioctl.h: revision 1.10

Micro-optimize: use pushq instead of pushw. To avoid LCP stalls and
unaligned stack accesses.

nvmm-x86: also flush the guest TLB when CR4.{PCIDE,SMEP} changes

nvmm: localify a variable that doesn't need to be global

nvmm: use relaxed atomics to read nmachines

nvmm-x86-svm: dedup code

nvmm-x86: hide more CPUID flags, mostly related to perf monitors

nvmm: misc improvements
 - use mach->ncpus to get the number of vcpus, now that we have it
 - don't forget to decrement mach->ncpus when a machine gets killed
 - add more __predict_false()

nvmm-x86-svm: don't forget to intercept INVD
INVD executed in the guest can be dangerous for the host, due to CPU
caches being flushed without write-back.

nvmm: slightly clarify

nvmm: explicitly include atomic.h

Revision 1.46.4.9 / (download) - annotate - [select for diffs], Wed Aug 26 17:55:48 2020 UTC (2 years, 9 months ago) by martin
Branch: netbsd-9
Changes since 1.46.4.8: +121 -6 lines
Diff to previous 1.46.4.8 (colored) to branchpoint 1.46 (colored)

Pull up following revision(s) (requested by maxv in ticket #1058):

	sys/dev/nvmm/x86/nvmm_x86_svm.c: revision 1.70
	sys/dev/nvmm/x86/nvmm_x86.h: revision 1.19
	sys/dev/nvmm/x86/nvmm_x86_vmx.c: revision 1.69
	sys/dev/nvmm/x86/nvmm_x86_vmx.c: revision 1.71
	sys/dev/nvmm/x86/nvmm_x86_svm.c: revision 1.69
	sys/dev/nvmm/x86/nvmm_x86.c: revision 1.11
	sys/dev/nvmm/x86/nvmm_x86.c: revision 1.12
	sys/dev/nvmm/x86/nvmm_x86.c: revision 1.13
	sys/dev/nvmm/x86/nvmm_x86.c: revision 1.14

Improve the CPUID emulation:
 - Hide SGX*, PKU, WAITPKG, and SKINIT, because they are not supported.
 - Hide HLE and RTM, part of TSX. Because TSX is just too buggy and we
   cannot guarantee that it remains enabled in the guest (if for example
   the host disables TSX while the guest is running). Nobody wants this
   crap anyway, so bye-bye.
 - Advertise FSREP_MOV, because no reason to hide it.

Hide OSPKE. NFC since the host never uses PKU, but still.

Improve the CPUID emulation on nvmm-intel:
 - Limit the highest extended leaf.
 - Limit 0x00000007 to ECX=0, for future-proofness.

nvmm-x86-svm: improve the CPUID emulation

Limit the hypervisor range, and properly handle each basic leaf until 0xD.

nvmm-x86: advertise the SERIALIZE instruction, available on future CPUs

nvmm-x86: improve the CPUID emulation
 - x86-svm: explicitly handle 0x80000007 and 0x80000008. The latter
   contains extended features we must filter out. Apply the same in
   x86-vmx for symmetry.
 - x86-svm: explicitly handle extended leaves until 0x8000001F, and
   truncate to it.

Revision 1.74 / (download) - annotate - [select for diffs], Wed Aug 26 16:33:03 2020 UTC (2 years, 9 months ago) by maxv
Branch: MAIN
Changes since 1.73: +8 -3 lines
Diff to previous 1.73 (colored)

nvmm-x86-svm: improve the handling of MSR_EFER

Intercept reads of it as well, just to mask EFER_SVME, which the guest
doesn't need to see.

Revision 1.73 / (download) - annotate - [select for diffs], Wed Aug 26 16:32:02 2020 UTC (2 years, 9 months ago) by maxv
Branch: MAIN
Changes since 1.72: +25 -6 lines
Diff to previous 1.72 (colored)

nvmm-x86: improve the handling of RFLAGS.RF

 - When injecting certain exceptions, set RF. For us to have an up-to-date
   view of RFLAGS, we commit the state before the event.
 - When advancing RIP, clear RF.

Revision 1.72 / (download) - annotate - [select for diffs], Wed Aug 26 16:29:19 2020 UTC (2 years, 9 months ago) by maxv
Branch: MAIN
Changes since 1.71: +3 -3 lines
Diff to previous 1.71 (colored)

nvmm-x86-svm: don't forget to intercept INVD

INVD executed in the guest can be dangerous for the host, due to CPU
caches being flushed without write-back.

Revision 1.71 / (download) - annotate - [select for diffs], Sat Aug 22 10:59:05 2020 UTC (2 years, 9 months ago) by maxv
Branch: MAIN
Changes since 1.70: +3 -10 lines
Diff to previous 1.70 (colored)

nvmm-x86-svm: dedup code

Revision 1.70 / (download) - annotate - [select for diffs], Thu Aug 20 11:09:56 2020 UTC (2 years, 9 months ago) by maxv
Branch: MAIN
Changes since 1.69: +75 -2 lines
Diff to previous 1.69 (colored)

nvmm-x86: improve the CPUID emulation

 - x86-svm: explicitly handle 0x80000007 and 0x80000008. The latter
   contains extended features we must filter out. Apply the same in
   x86-vmx for symmetry.
 - x86-svm: explicitly handle extended leaves until 0x8000001F, and
   truncate to it.

Revision 1.69 / (download) - annotate - [select for diffs], Tue Aug 18 17:08:05 2020 UTC (2 years, 9 months ago) by maxv
Branch: MAIN
Changes since 1.68: +48 -6 lines
Diff to previous 1.68 (colored)

nvmm-x86-svm: improve the CPUID emulation

Limit the hypervisor range, and properly handle each basic leaf until 0xD.

Revision 1.68 / (download) - annotate - [select for diffs], Tue Aug 18 17:03:10 2020 UTC (2 years, 9 months ago) by maxv
Branch: MAIN
Changes since 1.67: +3 -3 lines
Diff to previous 1.67 (colored)

nvmm-x86: also flush the guest TLB when CR4.{PCIDE,SMEP} changes

Revision 1.46.4.8 / (download) - annotate - [select for diffs], Tue Aug 18 09:29:52 2020 UTC (2 years, 9 months ago) by martin
Branch: netbsd-9
Changes since 1.46.4.7: +29 -4 lines
Diff to previous 1.46.4.7 (colored) to branchpoint 1.46 (colored)

Pull up following revision(s) (requested by maxv in ticket #1055):

	sys/dev/nvmm/nvmm.h: revision 1.13
	sys/dev/nvmm/nvmm.h: revision 1.14
	sys/dev/nvmm/nvmm.c: revision 1.33
	sys/dev/nvmm/x86/nvmm_x86_vmx.c: revision 1.67
	sys/dev/nvmm/nvmm_internal.h: revision 1.17
	sys/dev/nvmm/x86/nvmm_x86_svm.c: revision 1.67
	sys/dev/nvmm/x86/nvmm_x86.c: revision 1.10

Put the few x86-specific structures under #ifdef __x86_64__, for clarity.

Make it easier to understand what's going on, no functional change.

Add new field definitions.

Add new field definitions, and intercept everything, for future-proofness.

Add CTASSERT.

Revision 1.67 / (download) - annotate - [select for diffs], Wed Aug 5 15:22:25 2020 UTC (2 years, 10 months ago) by maxv
Branch: MAIN
Changes since 1.66: +29 -4 lines
Diff to previous 1.66 (colored)

Add new field definitions, and intercept everything, for future-proofness.

Revision 1.46.4.7 / (download) - annotate - [select for diffs], Wed Aug 5 15:18:24 2020 UTC (2 years, 10 months ago) by martin
Branch: netbsd-9
Changes since 1.46.4.6: +5 -5 lines
Diff to previous 1.46.4.6 (colored) to branchpoint 1.46 (colored)

Pull up following revision(s) (requested by maxv in ticket #1041):

	sys/dev/nvmm/x86/nvmm_x86_vmx.c: revision 1.66
	sys/dev/nvmm/x86/nvmm_x86_vmx.c: revision 1.50
	sys/dev/nvmm/x86/nvmm_x86_svm.c: revision 1.66
	sys/dev/nvmm/x86/nvmm_x86_vmx.c: revision 1.46
	sys/dev/nvmm/x86/nvmm_x86_vmx.c: revision 1.49
	sys/dev/nvmm/x86/nvmm_x86_svm.c: revision 1.55
	sys/dev/nvmm/x86/nvmm_x86_svm.c: revision 1.56

pg->phys_addr > VM_PAGE_TO_PHYS(pg)

Explicitly cast pointers to uintptr_t before casting to enums. They are
not necessarily the same size. Don't cast pointers to bool, check for
NULL instead.

vmx_vmptrst(): only used when DIAGNOSTIC

Simplify, remove unnecessary #ifdef DIAGNOSTIC around KASSERTs.

Use ULL, to make it clear we are unsigned.

Revision 1.66 / (download) - annotate - [select for diffs], Wed Aug 5 10:31:37 2020 UTC (2 years, 10 months ago) by maxv
Branch: MAIN
Changes since 1.65: +3 -3 lines
Diff to previous 1.65 (colored)

Use ULL, to make it clear we are unsigned.

Revision 1.46.4.6 / (download) - annotate - [select for diffs], Sun Aug 2 08:49:08 2020 UTC (2 years, 10 months ago) by martin
Branch: netbsd-9
Changes since 1.46.4.5: +4 -9 lines
Diff to previous 1.46.4.5 (colored) to branchpoint 1.46 (colored)

Pull up following revision(s) (requested by maxv in ticket #1032):

	sys/dev/nvmm/x86/nvmm_x86_vmx.c: revision 1.60 (patch)
	sys/dev/nvmm/x86/nvmm_x86_vmx.c: revision 1.61 (patch)
	sys/dev/nvmm/nvmm.c: revision 1.30
	sys/dev/nvmm/nvmm.c: revision 1.31
	sys/dev/nvmm/nvmm.c: revision 1.32
	sys/dev/nvmm/nvmm_internal.h: revision 1.15
	sys/dev/nvmm/nvmm_internal.h: revision 1.16
	sys/dev/nvmm/files.nvmm: revision 1.3
	sys/dev/nvmm/x86/nvmm_x86_svm.c: revision 1.62 (patch)
	sys/dev/nvmm/x86/nvmm_x86_svm.c: revision 1.63 (patch)
	sys/dev/nvmm/x86/nvmm_x86_vmx.c: revision 1.59 (patch)
	sys/modules/nvmm/nvmm.ioconf: revision 1.2

Gather the conditions to return from the VCPU loops in nvmm_return_needed(),
and use it in nvmm_do_vcpu_run() as well. This fixes two undesired behaviors:

 - When a VM initializes, the many nested page faults that need processing
   could cause the calling thread to occupy the CPU too much if we're unlucky
   and are only getting repeated nested page faults thousands of times in a
   row.

 - When the emulator calls nvmm_vcpu_run() and immediately sends a signal to
   stop the VCPU, it's better to check signals earlier and leave right away,
   rather than doing a round of VCPU run that could increase the time spent
   by the emulator waiting for the return.

style

Register NVMM as an actual pseudo-device. Without PMF handler, to
explicitly disallow ACPI suspend if NVMM is running.

Should fix PR/55406.

Print the backend name when attaching.

Revision 1.65 / (download) - annotate - [select for diffs], Sun Jul 19 06:56:09 2020 UTC (2 years, 10 months ago) by maxv
Branch: MAIN
Changes since 1.64: +4 -3 lines
Diff to previous 1.64 (colored)

Switch to fpu_kern_enter/leave, to prevent clobbering, now that the kernel
itself uses the fpu.

Revision 1.64 / (download) - annotate - [select for diffs], Sun Jul 19 06:36:37 2020 UTC (2 years, 10 months ago) by maxv
Branch: MAIN
Changes since 1.63: +17 -5 lines
Diff to previous 1.63 (colored)

The TLB flush IPIs do not respect the IPL, so enforcing IPL_HIGH has no
effect. Disable interrupts earlier instead. This prevents a possible race
against such IPIs.

Revision 1.63 / (download) - annotate - [select for diffs], Fri Jul 3 16:09:54 2020 UTC (2 years, 11 months ago) by maxv
Branch: MAIN
Changes since 1.62: +3 -2 lines
Diff to previous 1.62 (colored)

Print the backend name when attaching.

Revision 1.62 / (download) - annotate - [select for diffs], Sun May 24 08:08:49 2020 UTC (3 years ago) by maxv
Branch: MAIN
Changes since 1.61: +3 -6 lines
Diff to previous 1.61 (colored)

Gather the conditions to return from the VCPU loops in nvmm_return_needed(),
and use it in nvmm_do_vcpu_run() as well. This fixes two undesired behaviors:

 - When a VM initializes, the many nested page faults that need processing
   could cause the calling thread to occupy the CPU too much if we're unlucky
   and are only getting repeated nested page faults thousands of times in a
   row.

 - When the emulator calls nvmm_vcpu_run() and immediately sends a signal to
   stop the VCPU, it's better to check signals earlier and leave right away,
   rather than doing a round of VCPU run that could increase the time spent
   by the emulator waiting for the return.

Revision 1.46.4.5 / (download) - annotate - [select for diffs], Thu May 21 10:52:58 2020 UTC (3 years ago) by martin
Branch: netbsd-9
Changes since 1.46.4.4: +25 -7 lines
Diff to previous 1.46.4.4 (colored) to branchpoint 1.46 (colored)

Pull up following revision(s) (requested by maxv in ticket #919):

	sys/dev/nvmm/x86/nvmm_x86.c: revision 1.9
	sys/dev/nvmm/x86/nvmm_x86_svm.c: revision 1.60
	sys/dev/nvmm/x86/nvmm_x86_svm.c: revision 1.61
	sys/dev/nvmm/x86/nvmm_x86_vmx.c: revision 1.56
	sys/dev/nvmm/x86/nvmm_x86_vmx.c: revision 1.57
	sys/dev/nvmm/x86/nvmm_x86_vmx.c: revision 1.58
	sys/dev/nvmm/nvmm.c: revision 1.29

Improve the CPUID emulation of basic leaves:
 - Hide DCA and PQM, they cannot be used in guests.
 - On Intel, explicitly handle each basic leaf until 0x16.
 - On AMD, explicitly handle each basic leaf until 0x0D.

Respect the convention for the hypervisor information: return the highest
hypervisor leaf in 0x40000000.EAX.

Improve the CPUID emulation on nvmm-intel: limit the highest basic and
hypervisor leaves.

Complete rev1.26: reset nvmm_impl to NULL in nvmm_fini().

Revision 1.46.4.4 / (download) - annotate - [select for diffs], Wed May 13 12:21:56 2020 UTC (3 years ago) by martin
Branch: netbsd-9
Changes since 1.46.4.3: +7 -2 lines
Diff to previous 1.46.4.3 (colored) to branchpoint 1.46 (colored)

Pull up following revision(s) (requested by maxv in ticket #898):

	sys/dev/nvmm/x86/nvmm_x86_svm.c: revision 1.59
	sys/dev/nvmm/nvmm_internal.h: revision 1.14
	sys/dev/nvmm/x86/nvmm_x86_vmx.c: revision 1.53
	sys/dev/nvmm/x86/nvmm_x86_vmx.c: revision 1.54
	sys/dev/nvmm/x86/nvmm_x86_vmx.c: revision 1.55
	sys/dev/nvmm/nvmm.c: revision 1.27
	sys/dev/nvmm/nvmm.c: revision 1.28

When the identification fails, print the reason.

If we were processing a software int/excp, and got a VMEXIT in the middle,
we must also reflect the instruction length, otherwise the next VMENTER
fails and Qemu shuts the guest down.

On Intel CPUs, CPUID leaf 0xB, too, provides topology information, so
filter it correctly, to avoid inconsistencies if the host has SMT.

This fixes HaikuOS which fetches SMT information from there and would
panic because of the inconsistencies.

Revision 1.61 / (download) - annotate - [select for diffs], Sun May 10 06:24:16 2020 UTC (3 years ago) by maxv
Branch: MAIN
Changes since 1.60: +5 -2 lines
Diff to previous 1.60 (colored)

Respect the convention for the hypervisor information: return the highest
hypervisor leaf in 0x40000000.EAX.

Revision 1.60 / (download) - annotate - [select for diffs], Sat May 9 16:18:57 2020 UTC (3 years ago) by maxv
Branch: MAIN
Changes since 1.59: +22 -7 lines
Diff to previous 1.59 (colored)

Improve the CPUID emulation of basic leaves:
 - Hide DCA and PQM, they cannot be used in guests.
 - On Intel, explicitly handle each basic leaf until 0x16.
 - On AMD, explicitly handle each basic leaf until 0x0D.

Revision 1.59 / (download) - annotate - [select for diffs], Thu Apr 30 16:50:17 2020 UTC (3 years, 1 month ago) by maxv
Branch: MAIN
Changes since 1.58: +7 -2 lines
Diff to previous 1.58 (colored)

When the identification fails, print the reason.

Revision 1.46.2.3 / (download) - annotate - [select for diffs], Mon Apr 13 08:04:25 2020 UTC (3 years, 1 month ago) by martin
Branch: phil-wifi
Changes since 1.46.2.2: +252 -191 lines
Diff to previous 1.46.2.2 (colored) to branchpoint 1.46 (colored) next main 1.47 (colored)

Mostly merge changes from HEAD upto 20200411

Revision 1.58 / (download) - annotate - [select for diffs], Sun Mar 22 00:16:16 2020 UTC (3 years, 2 months ago) by ad
Branch: MAIN
CVS Tags: phil-wifi-20200421, phil-wifi-20200411, phil-wifi-20200406, bouyer-xenpvh-base2, bouyer-xenpvh-base1, bouyer-xenpvh-base, bouyer-xenpvh
Changes since 1.57: +3 -3 lines
Diff to previous 1.57 (colored)

x86 pmap:

- Give pmap_remove_all() its own version of pmap_remove_ptes() that on native
  x86 does the bare minimum needed to clear out PTPs.  Cuts ~4% sys time on
  'build.sh release' for me.

- pmap_sync_pv(): there's no need to issue a redundant TLB shootdown.  The
  caller waits for the competing operation to finish.

- Bring 'options TLBSTATS' up to date.

Revision 1.57 / (download) - annotate - [select for diffs], Sat Mar 14 18:08:39 2020 UTC (3 years, 2 months ago) by ad
Branch: MAIN
Changes since 1.56: +4 -7 lines
Diff to previous 1.56 (colored)

- Hide the details of SPCF_SHOULDYIELD and related behind a couple of small
  functions: preempt_point() and preempt_needed().

- preempt(): if the LWP has exceeded its timeslice in kernel, strip it of
  any priority boost gained earlier from blocking.

Revision 1.55.2.1 / (download) - annotate - [select for diffs], Sat Feb 29 20:19:09 2020 UTC (3 years, 3 months ago) by ad
Branch: ad-namecache
Changes since 1.55: +3 -3 lines
Diff to previous 1.55 (colored) next main 1.56 (colored)

Sync with head.

Revision 1.56 / (download) - annotate - [select for diffs], Fri Feb 21 00:26:22 2020 UTC (3 years, 3 months ago) by joerg
Branch: MAIN
CVS Tags: is-mlppp-base, is-mlppp, ad-namecache-base3
Changes since 1.55: +3 -3 lines
Diff to previous 1.55 (colored)

Explicitly cast pointers to uintptr_t before casting to enums. They are
not necessarily the same size. Don't cast pointers to bool, check for
NULL instead.

Revision 1.55 / (download) - annotate - [select for diffs], Tue Dec 10 18:06:50 2019 UTC (3 years, 5 months ago) by ad
Branch: MAIN
CVS Tags: ad-namecache-base2, ad-namecache-base1, ad-namecache-base
Branch point for: ad-namecache
Changes since 1.54: +3 -3 lines
Diff to previous 1.54 (colored)

pg->phys_addr > VM_PAGE_TO_PHYS(pg)

Revision 1.46.4.3 / (download) - annotate - [select for diffs], Mon Nov 25 16:39:30 2019 UTC (3 years, 6 months ago) by martin
Branch: netbsd-9
CVS Tags: netbsd-9-0-RELEASE, netbsd-9-0-RC2, netbsd-9-0-RC1
Changes since 1.46.4.2: +14 -3 lines
Diff to previous 1.46.4.2 (colored) to branchpoint 1.46 (colored)

Pull up following revision(s) (requested by maxv in ticket #475):

	tests/lib/libnvmm/h_mem_assist.c: revision 1.18
	sys/dev/nvmm/x86/nvmm_x86_vmx.c: revision 1.45
	sys/dev/nvmm/x86/nvmm_x86_svm.c: revision 1.54

Hide XSAVES-specific stuff and the masked extended states.

Several improvements. In particular, reduce CS.limit, because Intel CPUs
perform strict sanity checks, and the previous (too high) limit caused the
VM entry to fail.

Revision 1.54 / (download) - annotate - [select for diffs], Wed Nov 20 10:26:56 2019 UTC (3 years, 6 months ago) by maxv
Branch: MAIN
Changes since 1.53: +14 -3 lines
Diff to previous 1.53 (colored)

Hide XSAVES-specific stuff and the masked extended states.

Revision 1.46.4.2 / (download) - annotate - [select for diffs], Sun Nov 10 12:58:30 2019 UTC (3 years, 6 months ago) by martin
Branch: netbsd-9
Changes since 1.46.4.1: +219 -169 lines
Diff to previous 1.46.4.1 (colored) to branchpoint 1.46 (colored)

Pull up following revision(s) (requested by maxv in ticket #405):

	usr.sbin/nvmmctl/nvmmctl.8: revision 1.2
	lib/libnvmm/libnvmm.3: revision 1.24
	sys/dev/nvmm/nvmm.h: revision 1.11
	lib/libnvmm/libnvmm.3: revision 1.25
	sys/dev/nvmm/x86/nvmm_x86.h: revision 1.16
	sys/dev/nvmm/nvmm.h: revision 1.12
	sys/dev/nvmm/x86/nvmm_x86.h: revision 1.17
	tests/lib/libnvmm/h_mem_assist.c: revision 1.12
	sys/dev/nvmm/x86/nvmm_x86.h: revision 1.18
	share/mk/bsd.hostprog.mk: revision 1.82
	lib/libnvmm/libnvmm.c: revision 1.15
	distrib/sets/lists/base/md.amd64: revision 1.281
	tests/lib/libnvmm/h_mem_assist.c: revision 1.13
	lib/libnvmm/libnvmm.c: revision 1.16
	tests/lib/libnvmm/h_mem_assist.c: revision 1.14
	lib/libnvmm/libnvmm_x86.c: revision 1.32
	lib/libnvmm/libnvmm.c: revision 1.17
	tests/lib/libnvmm/h_mem_assist.c: revision 1.15
	lib/libnvmm/libnvmm_x86.c: revision 1.33
	lib/libnvmm/libnvmm.c: revision 1.18
	usr.sbin/nvmmctl/Makefile: revision 1.1
	tests/lib/libnvmm/h_mem_assist_asm.S: revision 1.7
	tests/lib/libnvmm/h_mem_assist.c: revision 1.16
	lib/libnvmm/libnvmm_x86.c: revision 1.34
	usr.sbin/nvmmctl/Makefile: revision 1.2
	tests/lib/libnvmm/h_mem_assist_asm.S: revision 1.8
	tests/lib/libnvmm/h_mem_assist.c: revision 1.17
	sys/dev/nvmm/nvmm_internal.h: revision 1.13
	lib/libnvmm/libnvmm_x86.c: revision 1.35
	lib/libnvmm/libnvmm_x86.c: revision 1.36
	usr.sbin/postinstall/postinstall.in: revision 1.8
	lib/libnvmm/libnvmm_x86.c: revision 1.37
	lib/libnvmm/libnvmm_x86.c: revision 1.38
	lib/libnvmm/libnvmm_x86.c: revision 1.39
	usr.sbin/Makefile: revision 1.282
	lib/libnvmm/nvmm.h: revision 1.13
	lib/libnvmm/nvmm.h: revision 1.14
	lib/libnvmm/nvmm.h: revision 1.15
	sys/dev/nvmm/nvmm.c: revision 1.23
	lib/libnvmm/nvmm.h: revision 1.16
	sys/dev/nvmm/nvmm.c: revision 1.24
	lib/libnvmm/nvmm.h: revision 1.17
	sys/dev/nvmm/nvmm.c: revision 1.25
	tests/lib/libnvmm/h_io_assist.c: revision 1.9
	etc/MAKEDEV.tmpl: revision 1.209
	tests/lib/libnvmm/h_io_assist.c: revision 1.10
	tests/lib/libnvmm/h_io_assist.c: revision 1.11
	etc/group: revision 1.35
	distrib/sets/lists/man/mi: revision 1.1660
	sys/dev/nvmm/x86/nvmm_x86_vmx.c: revision 1.40
	sys/dev/nvmm/x86/nvmm_x86_vmx.c: revision 1.41
	sys/dev/nvmm/x86/nvmm_x86_vmx.c: revision 1.42
	sys/dev/nvmm/x86/nvmm_x86_vmx.c: revision 1.43
	sys/dev/nvmm/x86/nvmm_x86_vmx.c: revision 1.44
	sys/dev/nvmm/x86/nvmm_x86_svm.c: revision 1.51
	sys/dev/nvmm/nvmm_ioctl.h: revision 1.8
	sys/dev/nvmm/x86/nvmm_x86_svm.c: revision 1.52
	sys/dev/nvmm/nvmm_ioctl.h: revision 1.9
	sys/dev/nvmm/x86/nvmm_x86_svm.c: revision 1.53
	usr.sbin/nvmmctl/nvmmctl.c: revision 1.1
	lib/libnvmm/libnvmm.3: revision 1.20
	distrib/sets/lists/debug/md.amd64: revision 1.106
	lib/libnvmm/libnvmm.3: revision 1.21
	lib/libnvmm/libnvmm.3: revision 1.22
	usr.sbin/nvmmctl/nvmmctl.8: revision 1.1
	lib/libnvmm/libnvmm.3: revision 1.23

Fix incorrect parsing: the R/M field uses a special GPR map when the
address size is 16 bits, regardless of the actual operating mode. With
this special map there can be two registers referenced at once, and
also disp16-only.
Implement this special behavior, and add associated tests. While here
simplify a few things.
With this in place, the Windows 95 installer initializes correctly.
Part of PR/54611.
add missing initializer
Implement XCHG, add associated tests, and add comments to explain. With
this in place the Windows 95 installer completes successfuly.
Part of PR/54611.
Improve nvmm_vcpu_dump().
Put back 'default', because llvm apparently doesn't realize that all cases
are covered in the switch.
Miscellaneous changes in NVMM, to address several inconsistencies and
issues in the libnvmm API.
 - Rename NVMM_CAPABILITY_VERSION to NVMM_KERN_VERSION, and check it in
   libnvmm. Introduce NVMM_USER_VERSION, for future use.
 - In libnvmm, open "/dev/nvmm" as read-only and with O_CLOEXEC. This is to
   avoid sharing the VMs with the children if the process forks. In the
   NVMM driver, force O_CLOEXEC on open().
 - Rename the following things for consistency:
       nvmm_exit*              -> nvmm_vcpu_exit*
       nvmm_event*             -> nvmm_vcpu_event*
       NVMM_EXIT_*             -> NVMM_VCPU_EXIT_*
       NVMM_EVENT_INTERRUPT_HW -> NVMM_VCPU_EVENT_INTR
       NVMM_EVENT_EXCEPTION    -> NVMM_VCPU_EVENT_EXCP
   Delete NVMM_EVENT_INTERRUPT_SW, unused already.
 - Slightly reorganize the MI/MD definitions, for internal clarity.
 - Split NVMM_VCPU_EXIT_MSR in two: NVMM_VCPU_EXIT_{RD,WR}MSR. Also provide
   separate u.rdmsr and u.wrmsr fields. This is more consistent with the
   other exit reasons.
 - Change the types of several variables:
       event.type                  enum -> u_int
       event.vector                uint64_t -> uint8_t
       exit.u.*msr.msr:            uint64_t -> uint32_t
       exit.u.io.type:             enum -> bool
       exit.u.io.seg:              int -> int8_t
       cap.arch.mxcsr_mask:        uint64_t -> uint32_t
       cap.arch.conf_cpuid_maxops: uint64_t -> uint32_t
 - Delete NVMM_VCPU_EXIT_MWAIT_COND, it is AMD-only and confusing, and we
   already intercept 'monitor' so it is never armed.
 - Introduce vmx_exit_insn() for NVMM-Intel, similar to svm_exit_insn().
   The 'npc' field wasn't getting filled properly during certain VMEXITs.
 - Introduce nvmm_vcpu_configure(). Similar to nvmm_machine_configure(),
   but as its name indicates, the configuration is per-VCPU and not per-VM.
   Migrate and rename NVMM_MACH_CONF_X86_CPUID to NVMM_VCPU_CONF_CPUID.
   This becomes per-VCPU, which makes more sense than per-VM.
 - Extend the NVMM_VCPU_CONF_CPUID conf to allow triggering VMEXITs on
   specific leaves. Until now we could only mask the leaves. An uint32_t
   is added in the structure:
        uint32_t mask:1;
        uint32_t exit:1;
        uint32_t rsvd:30;
   The two first bits select the desired behavior on the leaf. Specifying
   zero on both resets the leaf to the default behavior. The new
   NVMM_VCPU_EXIT_CPUID exit reason is added.
Three changes in libnvmm:
 - Add 'mach' and 'vcpu' backpointers in the nvmm_io and nvmm_mem
   structures.
 - Rename 'nvmm_callbacks' to 'nvmm_assist_callbacks'.
 - Rename and migrate NVMM_MACH_CONF_CALLBACKS to NVMM_VCPU_CONF_CALLBACKS,
   it now becomes per-VCPU.
Update the libnvmm man page:
 - Sync the naming with reality.
 - Replace "relevant" by "desired" and "virtualizer" by "emulator", closer
   to what I meant.
 - Add a "VCPU Configuration" section.
 - Add a "Machine Ownership" section.
Add the "nvmm" group, and make nvmm_init() public. Sent to tech-kern@ a few
days ago.
Use the new PTE naming, and define CR3_FRAME_* separately. No functional
change.
Add a new VCPU conf option, that allows userland to request VMEXITs after a
TPR change. This is supported on all Intel CPUs, and not-too-old AMD CPUs.
The reason for wanting this option is that certain OSes (like Win10 64bit)
manage interrupt priority in hardware via CR8 directly, and for these OSes,
the emulator may want to sync its internal TPR state on each change.
Add two new fields in cap.arch, to report the conf capabilities. Report TPR
only on Intel for now, not AMD, because I don't have a recent AMD CPU on
which to test.
Mask CPUID leaf 0x0A on Intel, because we don't want the guest to try (and
fail) to probe the PMC MSRs. This avoids "Unexpected WRMSR" warnings in
qemu-nvmm.
Add PCID support in the guests. This speeds up most 64bit guests, because
since Meltdown, everybody uses PCID (including NetBSD).
Change the way root_owner works: consider the calling process as root_owner
not if it has root privileges, but if the /dev/nvmm device was opened with
write permissions. Introduce the undocumented nvmm_root_init() function to
achieve that.
The goal is to simplify the logic and have more granularity, eg if we want
a monitoring agent to access VMs but don't want to give this agent real
root access on the system.
A few changes:
 - Use smaller types in struct nvmm_capability.
 - Use smaller type for nvmm_io.port.
 - Switch exitstate to a compacted structure.
Add nram in struct nvmm_ctl_mach_info.
Add nvmmctl, with two commands for now.
Macro tidyness.
Sort SEE ALSO.
should be fork(2), noticed by wiz
Add debug entry for newly introduced nvmmctl utility.
Annotate a covering switch as such to avoid warnings about missing
returns.
Forgot to put nvmmctl in the "nvmm" group.
Add nvmm group.

Revision 1.53 / (download) - annotate - [select for diffs], Mon Oct 28 08:30:49 2019 UTC (3 years, 7 months ago) by maxv
Branch: MAIN
CVS Tags: phil-wifi-20191119
Changes since 1.52: +8 -13 lines
Diff to previous 1.52 (colored)

A few changes:

 - Use smaller types in struct nvmm_capability.
 - Use smaller type for nvmm_io.port.
 - Switch exitstate to a compacted structure.

Revision 1.52 / (download) - annotate - [select for diffs], Sun Oct 27 10:28:55 2019 UTC (3 years, 7 months ago) by maxv
Branch: MAIN
Changes since 1.51: +25 -11 lines
Diff to previous 1.51 (colored)

Add a new VCPU conf option, that allows userland to request VMEXITs after a
TPR change. This is supported on all Intel CPUs, and not-too-old AMD CPUs.

The reason for wanting this option is that certain OSes (like Win10 64bit)
manage interrupt priority in hardware via CR8 directly, and for these OSes,
the emulator may want to sync its internal TPR state on each change.

Add two new fields in cap.arch, to report the conf capabilities. Report TPR
only on Intel for now, not AMD, because I don't have a recent AMD CPU on
which to test.

Revision 1.51 / (download) - annotate - [select for diffs], Wed Oct 23 07:01:11 2019 UTC (3 years, 7 months ago) by maxv
Branch: MAIN
Changes since 1.50: +199 -158 lines
Diff to previous 1.50 (colored)

Miscellaneous changes in NVMM, to address several inconsistencies and
issues in the libnvmm API.

 - Rename NVMM_CAPABILITY_VERSION to NVMM_KERN_VERSION, and check it in
   libnvmm. Introduce NVMM_USER_VERSION, for future use.

 - In libnvmm, open "/dev/nvmm" as read-only and with O_CLOEXEC. This is to
   avoid sharing the VMs with the children if the process forks. In the
   NVMM driver, force O_CLOEXEC on open().

 - Rename the following things for consistency:
       nvmm_exit*              -> nvmm_vcpu_exit*
       nvmm_event*             -> nvmm_vcpu_event*
       NVMM_EXIT_*             -> NVMM_VCPU_EXIT_*
       NVMM_EVENT_INTERRUPT_HW -> NVMM_VCPU_EVENT_INTR
       NVMM_EVENT_EXCEPTION    -> NVMM_VCPU_EVENT_EXCP
   Delete NVMM_EVENT_INTERRUPT_SW, unused already.

 - Slightly reorganize the MI/MD definitions, for internal clarity.

 - Split NVMM_VCPU_EXIT_MSR in two: NVMM_VCPU_EXIT_{RD,WR}MSR. Also provide
   separate u.rdmsr and u.wrmsr fields. This is more consistent with the
   other exit reasons.

 - Change the types of several variables:
       event.type                  enum -> u_int
       event.vector                uint64_t -> uint8_t
       exit.u.*msr.msr:            uint64_t -> uint32_t
       exit.u.io.type:             enum -> bool
       exit.u.io.seg:              int -> int8_t
       cap.arch.mxcsr_mask:        uint64_t -> uint32_t
       cap.arch.conf_cpuid_maxops: uint64_t -> uint32_t

 - Delete NVMM_VCPU_EXIT_MWAIT_COND, it is AMD-only and confusing, and we
   already intercept 'monitor' so it is never armed.

 - Introduce vmx_exit_insn() for NVMM-Intel, similar to svm_exit_insn().
   The 'npc' field wasn't getting filled properly during certain VMEXITs.

 - Introduce nvmm_vcpu_configure(). Similar to nvmm_machine_configure(),
   but as its name indicates, the configuration is per-VCPU and not per-VM.
   Migrate and rename NVMM_MACH_CONF_X86_CPUID to NVMM_VCPU_CONF_CPUID.
   This becomes per-VCPU, which makes more sense than per-VM.

 - Extend the NVMM_VCPU_CONF_CPUID conf to allow triggering VMEXITs on
   specific leaves. Until now we could only mask the leaves. An uint32_t
   is added in the structure:
	uint32_t mask:1;
	uint32_t exit:1;
	uint32_t rsvd:30;
   The two first bits select the desired behavior on the leaf. Specifying
   zero on both resets the leaf to the default behavior. The new
   NVMM_VCPU_EXIT_CPUID exit reason is added.

Revision 1.50 / (download) - annotate - [select for diffs], Sat Oct 12 06:31:04 2019 UTC (3 years, 7 months ago) by maxv
Branch: MAIN
Changes since 1.49: +8 -14 lines
Diff to previous 1.49 (colored)

Rewrite the FPU code on x86. This greatly simplifies the logic and removes
the dependency on IPL_HIGH. NVMM is updated accordingly. Posted on
port-amd64 a week ago.

Bump the kernel version to 9.99.16.

Revision 1.46.4.1 / (download) - annotate - [select for diffs], Sun Oct 6 11:04:55 2019 UTC (3 years, 8 months ago) by martin
Branch: netbsd-9
Changes since 1.46: +14 -5 lines
Diff to previous 1.46 (colored)

Pull up following revision(s) (requested by maxv in ticket #287):

	sys/dev/nvmm/x86/nvmm_x86_vmx.c: revision 1.38
	sys/dev/nvmm/x86/nvmm_x86_svm.c: revision 1.47
	sys/dev/nvmm/x86/nvmm_x86_svm.c: revision 1.48
	sys/dev/nvmm/x86/nvmm_x86_svm.c: revision 1.49

Add definitions for RDPRU, MCOMMIT, GMET and VTE.

Fix definition for MWAIT. It should be bit 11, not 12; 12 is the armed
version.

Switch to the new PTE naming.

Revision 1.49 / (download) - annotate - [select for diffs], Fri Oct 4 12:17:05 2019 UTC (3 years, 8 months ago) by maxv
Branch: MAIN
Changes since 1.48: +3 -3 lines
Diff to previous 1.48 (colored)

Switch to the new PTE naming.

Revision 1.48 / (download) - annotate - [select for diffs], Fri Oct 4 12:15:21 2019 UTC (3 years, 8 months ago) by maxv
Branch: MAIN
Changes since 1.47: +4 -3 lines
Diff to previous 1.47 (colored)

Fix definition for MWAIT. It should be bit 11, not 12; 12 is the armed
version.

Revision 1.47 / (download) - annotate - [select for diffs], Fri Oct 4 12:11:38 2019 UTC (3 years, 8 months ago) by maxv
Branch: MAIN
Changes since 1.46: +11 -3 lines
Diff to previous 1.46 (colored)

Add definitions for RDPRU, MCOMMIT, GMET and VTE.

Revision 1.46.2.2 / (download) - annotate - [select for diffs], Mon Jun 10 22:07:14 2019 UTC (3 years, 11 months ago) by christos
Branch: phil-wifi
Changes since 1.46.2.1: +2371 -0 lines
Diff to previous 1.46.2.1 (colored) to branchpoint 1.46 (colored)

Sync with HEAD

Revision 1.46.2.1, Sat May 11 07:31:56 2019 UTC (4 years ago) by christos
Branch: phil-wifi
Changes since 1.46: +0 -2371 lines
FILE REMOVED

file nvmm_x86_svm.c was added on branch phil-wifi on 2019-06-10 22:07:14 +0000

Revision 1.46 / (download) - annotate - [select for diffs], Sat May 11 07:31:56 2019 UTC (4 years ago) by maxv
Branch: MAIN
CVS Tags: phil-wifi-20190609, netbsd-9-base
Branch point for: phil-wifi, netbsd-9
Changes since 1.45: +10 -9 lines
Diff to previous 1.45 (colored)

Rework the machine configuration interface.

Provide three ranges in the conf space: <libnvmm:0-100>, <MI:100-200> and
<MD:200-...>. Remove nvmm_callbacks_register(), and replace it by the conf
op NVMM_MACH_CONF_CALLBACKS, handled by libnvmm. The callbacks are now
per-machine, and the emulators should now do:

-	nvmm_callbacks_register(&cbs);
+	nvmm_machine_configure(&mach, NVMM_MACH_CONF_CALLBACKS, &cbs);

This provides more granularity, for example if the process runs two VMs
and wants different callbacks for each.

Revision 1.45 / (download) - annotate - [select for diffs], Wed May 1 09:20:21 2019 UTC (4 years, 1 month ago) by maxv
Branch: MAIN
Changes since 1.44: +47 -29 lines
Diff to previous 1.44 (colored)

Use the comm page to inject events, rather than ioctls, and commit them in
vcpu_run. This saves a few syscalls and copyins.

For example on Windows 10, moving the mouse from the left to right sides of
the screen generates ~500 events, which now don't result in syscalls.

The error handling is done in vcpu_run and it is less precise, but this
doesn't matter a lot, and will be solved with future NVMM error codes.

Revision 1.44 / (download) - annotate - [select for diffs], Mon Apr 29 18:54:25 2019 UTC (4 years, 1 month ago) by maxv
Branch: MAIN
Changes since 1.43: +2 -13 lines
Diff to previous 1.43 (colored)

Stop taking care of the INT/NMI windows in the kernel, the emulator is
supposed to do that itself.

Revision 1.43 / (download) - annotate - [select for diffs], Sun Apr 28 14:22:13 2019 UTC (4 years, 1 month ago) by maxv
Branch: MAIN
Changes since 1.42: +57 -7 lines
Diff to previous 1.42 (colored)

Modify the communication layer between the kernel NVMM driver and libnvmm:
introduce a bidirectionnal "comm page", a page of memory shared between
the kernel and userland, and used to transfer data in and out in a more
performant manner than ioctls.

The comm page contains the VCPU state, plus three flags:

 - "wanted": the states the kernel must get/set when requested via ioctls
 - "cached": the states that are in the comm page
 - "commit": the states the kernel must set in vcpu_run

The idea is to avoid performing expensive syscalls, by using the VCPU
state cached, either explicitly or speculatively, in the comm page. For
example, if the state is cached we do a direct 1->5 with no syscall:

          +---------------------------------------------+
          |                    Qemu                     |
          +---------------------------------------------+
               |                                   ^
               | (0) nvmm_vcpu_getstate            | (6) Done
               |                                   |
               V                                   |
             +---------------------------------------+
             |                libnvmm                |
             +---------------------------------------+
                  |   ^          |               ^
        (1) State |   | (2) No   | (3) Ioctl:    | (5) Ok, state
        cached?   |   |          | "please cache | fetched
                  |   |          |  the state"   |
                  V   |          |               |
              +-----------+      |               |
              | Comm Page |------+---------------+
              +-----------+      |
                       ^         |
          (4) "Alright |         V
               babe"   |     +--------+
                       +-----| Kernel |
                             +--------+

The main changes in behavior are:

 - nvmm_vcpu_getstate(): won't emit a syscall if the state is already
   cached in the comm page, will just fetch from the comm page directly
 - nvmm_vcpu_setstate(): won't emit a syscall at all, will just cache
   the wanted state in the comm page
 - nvmm_vcpu_run(): will commit the to-be-set state in the comm page,
   as previously requested by nvmm_vcpu_setstate()

In addition to this, the kernel NVMM driver is changed to speculatively
cache certain states known to be of interest, so that the future
nvmm_vcpu_getstate() calls libnvmm or the emulator will perform will use
the comm page rather than expensive syscalls. For example, if an I/O
VMEXIT occurs, the I/O Assist in libnvmm will want GPRS+SEGS+CRS+MSRS,
and now the kernel caches all of that in the comm page before returning
to userland.

Overall, in a normal run of Windows 10, this saves several millions of
syscalls. Eg on a 4CPU Intel with 4VCPUs, booting the Win10 install ISO
goes from taking 1min35 to taking 1min16.

The libnvmm API is not changed, but the ABI is. If we changed the API it
would be possible to save expensive memcpys on libnvmm's side. This will
be avoided in a future version. The comm page can also be extended to
implement future services.

Revision 1.42 / (download) - annotate - [select for diffs], Sat Apr 27 15:45:21 2019 UTC (4 years, 1 month ago) by maxv
Branch: MAIN
Changes since 1.41: +5 -5 lines
Diff to previous 1.41 (colored)

Reorder the NVMM headers, to make a clear(er) distinction between MI and
MD. Also use #defines for the exit reasons rather than an union. No ABI
change, and no API change except 'cap->u.{}' renamed to 'cap->arch'.

Revision 1.41 / (download) - annotate - [select for diffs], Sat Apr 27 09:06:18 2019 UTC (4 years, 1 month ago) by maxv
Branch: MAIN
Changes since 1.40: +14 -3 lines
Diff to previous 1.40 (colored)

If guest events were being processed when a #VMEXIT occurred, reschedule
the events rather than dismissing them. This can happen for instance when a
guest wants to process an exception and an #NPF occurs on the guest IDT. In
practice it occurs only when the host swapped out specific guest pages.

Revision 1.40 / (download) - annotate - [select for diffs], Wed Apr 24 18:19:28 2019 UTC (4 years, 1 month ago) by maxv
Branch: MAIN
Changes since 1.39: +10 -3 lines
Diff to previous 1.39 (colored)

Provide the hardware error code for NVMM_EXIT_INVALID, useful when
debugging.

Revision 1.39 / (download) - annotate - [select for diffs], Sat Apr 20 08:45:30 2019 UTC (4 years, 1 month ago) by maxv
Branch: MAIN
CVS Tags: isaki-audio2-base, isaki-audio2
Changes since 1.38: +3 -3 lines
Diff to previous 1.38 (colored)

Ah, take XSAVE into account in ECX too, not just in EBX. Otherwise if the
guest relies only on ECX to initialize/copy the FPU state (like NetBSD
does), spurious #GPs can be encountered because the bitmap is clobbered.

Revision 1.38 / (download) - annotate - [select for diffs], Sun Apr 7 14:28:50 2019 UTC (4 years, 2 months ago) by maxv
Branch: MAIN
Changes since 1.37: +4 -5 lines
Diff to previous 1.37 (colored)

Invert the filtering priority: now the kernel-managed cpuid leaves are
overwritable by the virtualizer. This is useful to virtualizers that want
to 100% control every leaf.

Revision 1.37 / (download) - annotate - [select for diffs], Sat Apr 6 11:49:53 2019 UTC (4 years, 2 months ago) by maxv
Branch: MAIN
Changes since 1.36: +18 -13 lines
Diff to previous 1.36 (colored)

Replace the misc[] state by a new compressed nvmm_x64_state_intr structure,
which describes the interruptibility state of the guest.

Add evt_pending, read-only, that allows the virtualizer to know if an event
is pending.

Revision 1.36 / (download) - annotate - [select for diffs], Wed Apr 3 17:32:58 2019 UTC (4 years, 2 months ago) by maxv
Branch: MAIN
Changes since 1.35: +19 -12 lines
Diff to previous 1.35 (colored)

Add MSR_TSC.

Revision 1.35 / (download) - annotate - [select for diffs], Thu Mar 21 20:21:41 2019 UTC (4 years, 2 months ago) by maxv
Branch: MAIN
Changes since 1.34: +6 -5 lines
Diff to previous 1.34 (colored)

Make it possible for an emulator to set the protection of the guest pages.
For some reason I had initially concluded that it wasn't doable; verily it
is, so let's do it.

The reserved 'flags' argument of nvmm_gpa_map() becomes 'prot' and takes
mmap-like protection codes.

Revision 1.34 / (download) - annotate - [select for diffs], Thu Mar 14 19:15:26 2019 UTC (4 years, 2 months ago) by maxv
Branch: MAIN
Changes since 1.33: +3 -3 lines
Diff to previous 1.33 (colored)

Reduce the mask of the VTPR, only the first four bits matter.

Revision 1.33 / (download) - annotate - [select for diffs], Sun Mar 3 07:01:09 2019 UTC (4 years, 3 months ago) by maxv
Branch: MAIN
Changes since 1.32: +26 -4 lines
Diff to previous 1.32 (colored)

Choose which CPUID bits to allow, rather than which bits to disallow. This
is clearer, and also forward compatible with future CPUs.

While here be more consistent when allowing the bits, and sync between
nvmm-amd and nvmm-intel. Also make sure to disallow AVX, because the guest
state we provide is only x86+SSE. Fixes a CentOS panic when booting on
NVMM, reported by Jared McNeill, thanks.

Revision 1.32 / (download) - annotate - [select for diffs], Tue Feb 26 12:23:12 2019 UTC (4 years, 3 months ago) by maxv
Branch: MAIN
Changes since 1.31: +16 -24 lines
Diff to previous 1.31 (colored)

Change the layout of the SEG state:

 - Reorder it, to match the CPU encoding. This is the universal order,
   also used by Qemu. Drop the seg_to_nvmm[] tables.

 - Compress it. This divides its size by two.

 - Rename some of its fields, to better match the x86 spec. Also, take S
   out of Type, this was a NetBSD-ism that was likely confusing to other
   people.

Revision 1.31 / (download) - annotate - [select for diffs], Sat Feb 23 12:27:00 2019 UTC (4 years, 3 months ago) by maxv
Branch: MAIN
Changes since 1.30: +6 -7 lines
Diff to previous 1.30 (colored)

Install the x86 RESET state at VCPU creation time, for convenience, so
that the libnvmm users can expect a functional VCPU right away.

Revision 1.30 / (download) - annotate - [select for diffs], Sat Feb 23 08:19:16 2019 UTC (4 years, 3 months ago) by maxv
Branch: MAIN
Changes since 1.29: +254 -265 lines
Diff to previous 1.29 (colored)

Reorder the functions, and constify setstate. No functional change.

Revision 1.29 / (download) - annotate - [select for diffs], Thu Feb 21 12:17:52 2019 UTC (4 years, 3 months ago) by maxv
Branch: MAIN
Changes since 1.28: +57 -14 lines
Diff to previous 1.28 (colored)

Another locking issue in NVMM: the {svm,vmx}_tlb_flush functions take VCPU
mutexes which can sleep, but their context does not allow it.

Rewrite the TLB handling code to fix that. It becomes a bit complex. In
short, we use a per-VM generation number, which we increase on each TLB
flush, before sending a broadcast IPI to everybody. The IPIs cause a
#VMEXIT of each VCPU, and each VCPU Loop will synchronize the per-VM gen
with a per-VCPU copy, and apply the flushes as neededi lazily.

The behavior differs between AMD and Intel; in short, on Intel we don't
flush the hTLB (EPT cache) if a context switch of a VCPU occurs, so now,
we need to maintain a kcpuset to know which VCPU's hTLBs are active on
which hCPU. This creates some redundancy on Intel, ie there are cases
where we flush the hTLB several times unnecessarily; but hTLB flushes are
very rare, so there is no real performance regression.

The thing is lock-less and non-blocking, so it solves our problem.

Revision 1.28 / (download) - annotate - [select for diffs], Thu Feb 21 11:58:04 2019 UTC (4 years, 3 months ago) by maxv
Branch: MAIN
Changes since 1.27: +21 -13 lines
Diff to previous 1.27 (colored)

Clarify the gTLB code a little.

Revision 1.27 / (download) - annotate - [select for diffs], Mon Feb 18 12:17:45 2019 UTC (4 years, 3 months ago) by maxv
Branch: MAIN
Changes since 1.26: +13 -20 lines
Diff to previous 1.26 (colored)

Ah, finally found you. Fix scheduling bug in NVMM.

When processing guest page faults, we were calling uvm_fault with
preemption disabled. The thing is, uvm_fault may block, and if it does,
we land in sleepq_block which calls mi_switch; so we get switched away
while we explicitly asked not to be. From then on things could go really
wrong.

Fix that by processing such faults in MI, where we have preemption enabled
and are allowed to block.

A KASSERT in sleepq_block (or before) would have helped.

Revision 1.26 / (download) - annotate - [select for diffs], Sat Feb 16 12:58:13 2019 UTC (4 years, 3 months ago) by maxv
Branch: MAIN
Changes since 1.25: +4 -4 lines
Diff to previous 1.25 (colored)

Ah no, adapt previous, on AMD RAX is in the VMCB.

Revision 1.25 / (download) - annotate - [select for diffs], Sat Feb 16 12:40:31 2019 UTC (4 years, 3 months ago) by maxv
Branch: MAIN
Changes since 1.24: +28 -14 lines
Diff to previous 1.24 (colored)

Improve the FPU detection: hide XSAVES because we're not allowing it, and
don't set CPUID2_OSXSAVE if the guest didn't first set CR4_OSXSAVE.

With these changes in place, I can boot Windows 10 on NVMM.

Revision 1.24 / (download) - annotate - [select for diffs], Fri Feb 15 13:17:05 2019 UTC (4 years, 3 months ago) by maxv
Branch: MAIN
Changes since 1.23: +13 -5 lines
Diff to previous 1.23 (colored)

Initialize the guest TSC to zero at VCPU creation time, and handle guest
writes to MSR_TSC at run time.

This is imprecise, because the hardware does not provide a way to preserve
the TSC during #VMEXITs, but that's fine enough.

Revision 1.23 / (download) - annotate - [select for diffs], Thu Feb 14 14:30:20 2019 UTC (4 years, 3 months ago) by maxv
Branch: MAIN
Changes since 1.22: +6 -10 lines
Diff to previous 1.22 (colored)

Harmonize the handling of the CPL between AMD and Intel.

AMD has a separate guest CPL field, because on AMD, the SYSCALL/SYSRET
instructions do not force SS.DPL to predefined values. On Intel they do,
so the CPL on Intel is just the guest's SS.DPL value.

Even though technically possible on AMD, there is no sane reason for a
guest kernel to set a non-three SS.DPL, doing that would mess up several
common segmentation practices and wouldn't be compatible with Intel.

So, force the Intel behavior on AMD, by always setting SS.DPL<=>CPL.
Remove the now unused CPL field from nvmm_x64_state::misc[]. This actually
increases performance on AMD: to detect interrupt windows the virtualizer
has to modify some fields of misc[], and because CPL was there, we had to
flush the SEG set of the VMCB cache. Now there is no flush necessary.

While here remove the CPL check for XSETBV on Intel, contrary to AMD
Intel checks the CPL before the intercept, so if we receive an XSETBV
VMEXIT, we are certain that it was executed at CPL=0 in the guest. By the
way my check was wrong in the first place, it was reading SS.RPL instead
of SS.DPL.

Revision 1.22 / (download) - annotate - [select for diffs], Wed Feb 13 10:55:13 2019 UTC (4 years, 3 months ago) by maxv
Branch: MAIN
Changes since 1.21: +5 -5 lines
Diff to previous 1.21 (colored)

Drop support for software interrupts. I had initially added that to cover
the three event types available on AMD, but Intel has seven of them, all
with weird and twisted meanings, and they require extra parameters.

Software interrupts should not be used anyway.

Revision 1.21 / (download) - annotate - [select for diffs], Wed Feb 13 07:04:12 2019 UTC (4 years, 3 months ago) by maxv
Branch: MAIN
Changes since 1.20: +8 -6 lines
Diff to previous 1.20 (colored)

Micro optimization: the STAR/LSTAR/CSTAR/SFMASK MSRs are static, so rather
than saving them on each VMENTRY, save them only once, at VCPU creation
time.

Revision 1.20 / (download) - annotate - [select for diffs], Tue Feb 12 14:54:59 2019 UTC (4 years, 3 months ago) by maxv
Branch: MAIN
Changes since 1.19: +10 -11 lines
Diff to previous 1.19 (colored)

Optimize: the hardware does not clear the TLB flush command after a
VMENTRY, so clear it ourselves, to avoid uselessly flushing the guest
TLB. While here also fix the processing of EFER-induced flushes, they
shouldn't be delayed.

Revision 1.19 / (download) - annotate - [select for diffs], Mon Feb 4 12:11:18 2019 UTC (4 years, 4 months ago) by maxv
Branch: MAIN
Changes since 1.18: +15 -18 lines
Diff to previous 1.18 (colored)

Improvements:

 - Guest reads/writes to PAT land in gPAT, so no need to emulate them.

 - When emulating EFER, don't advance the RIP if a fault occurs, and don't
   forget to flush the VMCB cache accordingly.

Revision 1.6.2.5 / (download) - annotate - [select for diffs], Sat Jan 26 22:00:07 2019 UTC (4 years, 4 months ago) by pgoyette
Branch: pgoyette-compat
CVS Tags: pgoyette-compat-merge-20190127
Changes since 1.6.2.4: +61 -49 lines
Diff to previous 1.6.2.4 (colored) to branchpoint 1.6 (colored) next main 1.7 (colored)

Sync with HEAD

Revision 1.18 / (download) - annotate - [select for diffs], Sat Jan 26 15:12:20 2019 UTC (4 years, 4 months ago) by maxv
Branch: MAIN
CVS Tags: pgoyette-compat-20190127
Changes since 1.17: +2 -3 lines
Diff to previous 1.17 (colored)

Remove nvmm_exit_memory.npc, useless.

Revision 1.17 / (download) - annotate - [select for diffs], Thu Jan 24 13:05:59 2019 UTC (4 years, 4 months ago) by maxv
Branch: MAIN
Changes since 1.16: +33 -28 lines
Diff to previous 1.16 (colored)

Optimize: change the behavior of the HLT vmexit, make it a "change in vcpu
state" which occurs after the instruction executed, rather than an
instruction intercept which occurs before. Disable the shadow and the intr
window in kernel mode, and advance the RIP, so that the virtualizer doesn't
have to do it itself. This saves two syscalls and one VMCB cache flush.

Provide npc for other instruction intercepts, in case someone is
interested.

Revision 1.16 / (download) - annotate - [select for diffs], Sun Jan 20 16:55:21 2019 UTC (4 years, 4 months ago) by maxv
Branch: MAIN
Changes since 1.15: +30 -22 lines
Diff to previous 1.15 (colored)

Improvements in NVMM

 * Handle the FPU differently, limit the states via the given mask rather
   than via XCR0. Align to 64 bytes. Provide an initial gXCR0, to be sure
   that XCR0_X87 is set. Reset XSTATE_BV when the state is modified by
   the virtualizer, to force a reload from memory.

 * Hide RDTSCP.

 * Zero-extend RBX/RCX/RDX when handling the NVMM CPUID signature.

 * Take ECX and not RCX on MSR instructions.

Revision 1.6.2.4 / (download) - annotate - [select for diffs], Fri Jan 18 08:50:26 2019 UTC (4 years, 4 months ago) by pgoyette
Branch: pgoyette-compat
Changes since 1.6.2.3: +338 -219 lines
Diff to previous 1.6.2.3 (colored) to branchpoint 1.6 (colored)

Synch with HEAD

Revision 1.15 / (download) - annotate - [select for diffs], Sun Jan 13 10:07:50 2019 UTC (4 years, 4 months ago) by maxv
Branch: MAIN
CVS Tags: pgoyette-compat-20190118
Changes since 1.14: +4 -2 lines
Diff to previous 1.14 (colored)

Reset DR7 before loading DR0-3, to prevent a fault if the host process
has dbregs enabled.

Revision 1.14 / (download) - annotate - [select for diffs], Thu Jan 10 06:58:36 2019 UTC (4 years, 4 months ago) by maxv
Branch: MAIN
Changes since 1.13: +8 -11 lines
Diff to previous 1.13 (colored)

Optimize:

 * Don't save/restore the host CR2, we don't care because we're not in a
   #PF context (and preemption switches already handle CR2 safely).

 * Don't save/restore the host FS and GS, just reset them to zero after
   VMRUN. Note: DS and ES must be reset _before_ VMRUN, but that doesn't
   apply to FS and GS.

 * Handle FSBASE and KGSBASE outside of the VCPU loop, to avoid the cost
   of saving/restoring them when there's no reason to leave the loop.

Revision 1.13 / (download) - annotate - [select for diffs], Tue Jan 8 14:43:18 2019 UTC (4 years, 5 months ago) by maxv
Branch: MAIN
Changes since 1.12: +154 -178 lines
Diff to previous 1.12 (colored)

Optimize: don't keep a full copy of the guest state, rather take only what
is needed. This avoids expensive memcpy's.

Also flush the V_TPR as part of the CR-state, because there is CR8 in it.

Revision 1.12 / (download) - annotate - [select for diffs], Mon Jan 7 14:08:02 2019 UTC (4 years, 5 months ago) by maxv
Branch: MAIN
Changes since 1.11: +66 -21 lines
Diff to previous 1.11 (colored)

Optimize: cache the guest state entirely in the VMCB-cache, flush it on a
state-by-state basis when needed.

Revision 1.11 / (download) - annotate - [select for diffs], Sun Jan 6 18:32:54 2019 UTC (4 years, 5 months ago) by maxv
Branch: MAIN
Changes since 1.10: +14 -7 lines
Diff to previous 1.10 (colored)

Add more VMCB fields. Also remove debugging code I mistakenly committed
in the previous revision. No functional change.

Revision 1.10 / (download) - annotate - [select for diffs], Sun Jan 6 16:10:51 2019 UTC (4 years, 5 months ago) by maxv
Branch: MAIN
Changes since 1.9: +121 -25 lines
Diff to previous 1.9 (colored)

Improvements and fixes in NVMM.

Kernel driver:

 * Don't take an extra (unneeded) reference to the UAO.

 * Provide npc for HLT. I'm not really happy with it right now, will
   likely be revisited.

 * Add the INT_SHADOW, INT_WINDOW_EXIT and NMI_WINDOW_EXIT states. Provide
   them in the exitstate too.

 * Don't take the TPR into account when processing INTs. The virtualizer
   can do that itself (Qemu already does).

 * Provide a hypervisor signature in CPUID, and hide SVM.

 * Ignore certain MSRs. One special case is MSR_NB_CFG in which we set
   NB_CFG_INITAPICCPUIDLO. Allow reads of MSR_TSC.

 * If the LWP has pending signals or softints, leave, rather than waiting
   for a rescheduling to happen later. This reduces interrupt processing
   time in the guest (Qemu sends a signal to the thread, and now we leave
   right away). This could be improved even more by sending an actual IPI
   to the CPU, but I'll see later.

Libnvmm:

 * Fix the MMU translation of large pages, we need to add the lower bits
   too.

 * Change the IO and Mem structures to take a pointer rather than a
   static array. This provides more flexibility.

 * Batch together the str+rep IO transactions. We do one big memory
   read/write, and then send the IO commands to the hypervisor all at
   once. This considerably increases performance.

 * Decode MOVZX.

With these changes in place, Qemu+NVMM works. I can install NetBSD 8.0
in a VM with multiple VCPUs, connect to the network, etc.

Revision 1.9 / (download) - annotate - [select for diffs], Thu Jan 3 08:02:49 2019 UTC (4 years, 5 months ago) by maxv
Branch: MAIN
Changes since 1.8: +3 -3 lines
Diff to previous 1.8 (colored)

Fix another gross copy-pasto.

Revision 1.8 / (download) - annotate - [select for diffs], Wed Jan 2 12:18:08 2019 UTC (4 years, 5 months ago) by maxv
Branch: MAIN
Changes since 1.7: +3 -7 lines
Diff to previous 1.7 (colored)

When there's no DecodeAssist in hardware, decode manually in software. This
is needed on certain AMD CPUs (like mine): the segment base of OUTS can be
overridden, and it is wrong to just assume DS.

We fetch the instruction and look at the prefixes if any to determine the
correct segment.

Revision 1.6.2.3 / (download) - annotate - [select for diffs], Wed Dec 26 14:01:49 2018 UTC (4 years, 5 months ago) by pgoyette
Branch: pgoyette-compat
Changes since 1.6.2.2: +3 -2 lines
Diff to previous 1.6.2.2 (colored) to branchpoint 1.6 (colored)

Sync with HEAD, resolve a few conflicts

Revision 1.7 / (download) - annotate - [select for diffs], Thu Dec 13 16:28:10 2018 UTC (4 years, 5 months ago) by maxv
Branch: MAIN
CVS Tags: pgoyette-compat-1226
Changes since 1.6: +3 -2 lines
Diff to previous 1.6 (colored)

Don't forget to advance the RIP after an XSETBV emulation.

Revision 1.6.2.2 / (download) - annotate - [select for diffs], Mon Nov 26 01:52:32 2018 UTC (4 years, 6 months ago) by pgoyette
Branch: pgoyette-compat
Changes since 1.6.2.1: +2089 -0 lines
Diff to previous 1.6.2.1 (colored) to branchpoint 1.6 (colored)

Sync with HEAD, resolve a couple of conflicts

Revision 1.6.2.1, Sun Nov 25 14:09:57 2018 UTC (4 years, 6 months ago) by pgoyette
Branch: pgoyette-compat
Changes since 1.6: +0 -2089 lines
FILE REMOVED

file nvmm_x86_svm.c was added on branch pgoyette-compat on 2018-11-26 01:52:32 +0000

Revision 1.6 / (download) - annotate - [select for diffs], Sun Nov 25 14:09:57 2018 UTC (4 years, 6 months ago) by maxv
Branch: MAIN
CVS Tags: pgoyette-compat-1126
Branch point for: pgoyette-compat
Changes since 1.5: +3 -2 lines
Diff to previous 1.5 (colored)

Add RFLAGS in the exitstate.

Revision 1.5 / (download) - annotate - [select for diffs], Thu Nov 22 07:37:12 2018 UTC (4 years, 6 months ago) by maxv
Branch: MAIN
Changes since 1.4: +3 -2 lines
Diff to previous 1.4 (colored)

Add missing pmap_update after pmap_kenter_pa, noted by Kamil.

Revision 1.4 / (download) - annotate - [select for diffs], Mon Nov 19 17:35:12 2018 UTC (4 years, 6 months ago) by maxv
Branch: MAIN
Changes since 1.3: +4 -4 lines
Diff to previous 1.3 (colored)

Rename one constant, for clarity.

Revision 1.3 / (download) - annotate - [select for diffs], Wed Nov 14 19:14:40 2018 UTC (4 years, 6 months ago) by maxv
Branch: MAIN
Changes since 1.2: +4 -4 lines
Diff to previous 1.2 (colored)

Take RAX from the VMCB and not the VCPU state, the latter is not
synchronized and contains old values.

Revision 1.2 / (download) - annotate - [select for diffs], Sat Nov 10 09:42:42 2018 UTC (4 years, 6 months ago) by maxv
Branch: MAIN
Changes since 1.1: +2 -3 lines
Diff to previous 1.1 (colored)

Remove unused cpu_msr.h includes.

Revision 1.1 / (download) - annotate - [select for diffs], Wed Nov 7 07:43:08 2018 UTC (4 years, 7 months ago) by maxv
Branch: MAIN

Add NVMM - for NetBSD Virtual Machine Monitor -, a kernel driver that
provides support for hardware-accelerated virtualization on NetBSD.

It is made of an MI frontend, to which MD backends can be plugged. One
MD backend is implemented, x86-SVM, for x86 AMD CPUs.

We install

	/usr/include/dev/nvmm/nvmm.h
	/usr/include/dev/nvmm/nvmm_ioctl.h
	/usr/include/dev/nvmm/{arch}/nvmm_{arch}.h

And the kernel module. For now, the only architecture where we do that
is amd64 (arch=x86).

NVMM is not enabled by default in amd64-GENERIC, but is instead easily
modloadable.

Sent to tech-kern@ a month ago. Validated with kASan, and optimized
with tprof.

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