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Pull up following revision(s) (requested by msaitoh in ticket #1093): sys/dev/pci/if_wmreg.h: revision 1.120 sys/dev/pci/if_wmvar.h: revision 1.46 sys/dev/pci/if_wm.c: revision 1.686 sys/dev/pci/if_wm.c: revision 1.687 sys/dev/mii/inbmphyreg.h: revision 1.20 sys/dev/pci/if_wm.c: revision 1.688 sys/dev/pci/if_wm.c: revision 1.689 s/ressource/resource/. Found by knakahara. Add new flag named WM_F_CRC_STRIP and use it. No functional change. This change also sets the RCTL_SECRC bit on I211 but it doesn't change the behavior because I211 always strips CRC like I35[04] and I210. Add a workaround for jumbo frame on PCH2 and newer. Tested by chs@. - Add wm_lv_jumbo_workaround_ich8lan() and use it. From FreeBSD. XXX For KUMCTRLSTA_OFFSET_HD_CTRL register modification, it's doubtful. FreeBSD and Linux do the same thing that they set the same value on both jumbo frame's enable case and the disable case. It seems the default value is 0x0b0c and it's not changed on the enable case, so it might be a bug on the enable case or the modification is not required. - Rename I219_UNKNOWN1 to I82579_UNKNOWN1. Use 12K for packet buffer for jumbo frame on PCH2 and newer. XXX Note that Linux Use 14K.
Add a workaround for jumbo frame on PCH2 and newer. Tested by chs@. - Add wm_lv_jumbo_workaround_ich8lan() and use it. From FreeBSD. XXX For KUMCTRLSTA_OFFSET_HD_CTRL register modification, it's doubtful. FreeBSD and Linux do the same thing that they set the same value on both jumbo frame's enable case and the disable case. It seems the default value is 0x0b0c and it's not changed on the enable case, so it might be a bug on the enable case or the modification is not required. - Rename I219_UNKNOWN1 to I82579_UNKNOWN1.
Merge changes from current as of 20200406
s/enalbe/enable/
Sync with HEAD
Add yet another PHY workaround. Disable generation of early preamble on 82577 PHY rev. 1 or 2 and 82578 PHY rev. 1.
Pull up the following, requested by msaitoh in ticket #1179:
sys/dev/pci/if_wm.c 1.603-1.605,1.607-1.611,
1.613,1.615,1.618-1.620
via patch
sys/dev/pci/if_wmreg.h 1.110-1.111
sys/dev/pci/if_wmvar.h 1.40-1.42
sys/dev/mii/inbmphyreg.h 1.13-1.15
- Add some code for suspend/resume:
- Rename wm_smbustopci() to wm_init_phy_workarounds_pchlan(). It will
also called when resume.
- Call wm_phy_resetisblocked() after PHY reset in
wm_init_phy_workarounds_pchlan() to wait for the PHY to quiesce to
an accessible state.
- Add new wm_resume_workarounds_pchlan() function and use it in
wm_resume(). This workaround is only for PCH2 and newer.
- Don't call wm_disable_aspm() neither in wm_attach() nor in
wm_resume() but in wm_reset().
- Do some initialization in wm_resume() when IFF_UP is NOT set.
- Don't continue when it failed to acquire semaphore in
wm_ulp_disable().
- Print CLSEM workaround bit correctly.
- Fix availability detection of WoL on some chips.
- Print the WUS (WakeUp Status) register bits when resume.
- Don't setup WoL on non-WoL capable port.
- Setup PHY wakeup feature on PCH and newer. Tested on Thinkpad X220.
- Remove an extra register read in
wm_kmrn_lock_loss_workaround_ich8lan().
- Don't leave the MDICNFG register modified when the Power Management
capability offset can't get.
- Reduce indent level of wm_linkintr_gmii(). No functional change.
- 80003's SERDES is not the same as 82575's but the same as legacy
devices. Use the old methods on 80003.
- Use __nothing for null DPRINTF().
- Rename functions. Add comment.
Add some workarounds which use EMI register or EEE related: - PCH only: Add workaround for link disconnects on a busy hub in half duplex. - PCH and PCH2 only: Set MSE higher to enable link to stay up when noise is high. - PCH2 only: Drop link after 5 times MSE threshold was reached. - PCH2 only: Set EEE LPI Update Timer to 200usec. - For PCH2 and newer: When connected at 10Mbps half-duplex, some parts are excessively aggressive resulting in many collisions. To avoid this, increase the IPG and reduce Rx latency in the PHY. - For I21[789] and if EEE is enabled: Disable LPLU if both link partners support 100BaseT EEE and 100Full is advertised on both ends of the link, and enable Auto Enable LPI since there will be no driver to enable LPI while in Sx.
Synch with HEAD
Add EEE(802.3az) support for I350, I210, I211, PCH2 and newer. Not yet for I354(C2000). It'll be supported after implementing MI MII clause 45 register read/write API.
Sync with HEAD, resolve a few conflicts
- Don't setup WoL on non-WoL capable port. - Setup PHY wakeup feature on PCH and newer. Tested on Thinkpad X220.
Fix a wrong access to I217_PROXY_CTRL which was added in inbmphreg.h rev. 1.13 and if_wm.c rev. 1.603.
Add some code for suspend/resume: - Rename wm_smbustopci() to wm_init_phy_workarounds_pchlan(). It will also called when resume. - Call wm_phy_resetisblocked() after PHY reset in wm_init_phy_workarounds_pchlan() to wait for the PHY to quiesce to an accessible state. - Add new wm_resume_workarounds_pchlan() function and use it in wm_resume(). This workaround is only for PCH2 and newer. - Don't call wm_disable_aspm() neither in wm_attach() nor in wm_resume() but in wm_reset(). - Do some initialization in wm_resume() when IFF_UP is NOT set. - Don't continue when it failed to acquire semaphore in wm_ulp_disable(). - Add comment.
Pull up following revision(s) (requested by msaitoh in ticket #1117):
sys/dev/pci/if_wmreg.h: revision 1.109
sys/dev/pci/if_wm.c: revision 1.597
sys/dev/pci/if_wm.c: revision 1.598
sys/dev/mii/inbmphyreg.h: revision 1.12
sys/dev/pci/if_wm.c: revision 1.600
sys/dev/pci/if_wm.c: revision 1.601
sys/dev/pci/if_wm.c: revision 1.602
- Add new wm_gmii_{hv,i82544}_{read,write}reg_locked() and use them in
wm_gmii_{hv,i82544}_{read,write}reg(). *_locked() functions are not
mii(4) API functions, so it's not required to keep the mii API. Change
the PHY register type from int to uint16_t. It also change the usage of
return value. It returns zero on success and non-zero on error.
- Check the return value of *_locked() function and treat it.
- Use *writereg_locked() function to reduce race condition in
wm_init_lcd_from_nvm().
- Add comment.
- Control TX/RX descriptor snooping control bits on ICH8 and newer.
Only on ICH8, No-snoop bits are opposite polarity. On my Thinkpad X61,
the default value of this bits are all zero, so this commit changes
the snoop function enable on the machine. I tested with some other
PCH machines and those bits are all zero (enable snoop by default),
so this commit won't affect to some machines.
- Disable relax ordering on 82546GB(Device ID 0x1099 and 0x10b5) or >= ICH8.
Same as other OSes.
- Add wm_oem_bits_config_ich8lan() to control LPLU and GbE setting base on
the NVM's info.
- Modify wm_enable_wakeup() to reduce difference against FreeBSD and Linux.
This modification affects to ICH8 and newer devices. I217 Rapid Start
Technology support have not written yet (it's TODO).
- Add wm_k1_workaround_lv() from FreeBSD. It's PCH2 specific:
Workaround to set the K1 beacon duration for 82579 parts in 10Mbps.
Disable K1 for 1000 and 100 speeds.
- Make wm_link_stall_workaround_hv() and move an 82578 specific code into it.
Don't apply the workaround if BMCR_LOOP bit is set. Same as FreeBSD.
- Add comment. Modify comment.
Fix comment. No functional change.
Sync with HEAD, resolve a couple of conflicts
- Add wm_k1_workaround_lv() from FreeBSD. It's PCH2 specifc:
Workaround to set the K1 beacon duration for 82579 parts in 10Mbps.
Disable K1 for 1000 and 100 speeds.
- Make wm_link_stall_workaround_hv() and move an 82578 specific code into it.
Don't apply the workaround if BMCR_LOOP bit is set. Same as FreeBSD.
- Add comment. Modify comment.
Pull up the following revisions(s) (requested by msaitoh in ticket #1648): sys/dev/mii/inbmphyreg.h 1.11 sys/dev/pci/if_wm.c 1.586-1.588, 1.590-1.596 via patch sys/dev/pci/if_wmreg.h 1.108 - rename tu event counter to txunderrun. - Try m_defrag() to reduce the number of DMA segment if bus_dmamap_load_mbuf() returned EFBIG. When m_defrag() is called, txqNNdefrag event counter is incremented. If the 2nd try of bus_dmamap_load_mbuf() failed, txqNNtoomanyseg event counter is incremented. - Reduce the max number of DMA segments from 256 to 64 (it's the same value as other BSD's (EM_MAX_SCATTER) and more than before if_wm.c rev. 1.75's value (40)) because we do m_defrag() now. - 82574 and newer document says the status field has neither EC (Excessive Collision) bit nor LC (Late Collision) bit (reserved), so don't check the bit. - Add workaround for DMA hang problem which result in TX device timeout on PCH_LPT with I218. Same as FreeBSD and Linux. This workaround is only for device ID 0x155a, 0x15a2, 0x1559 and 0x15a3. - Fix a PCH2 specific bug that wrong PHY register value can be read when boot. Same as FreeBSD and Linux. - After writing MDIC register, don't read quickly the same register but do delay(50). Same as other OSes. - Add missing wm_gate_hw_phy_config_ich8lan(false) in wm_phy_post_reset() on PCH2. wm_gate_hw_phy_config_ich8lan(true) is called in wm_reset(), so wm_gate_hw_phy_config_ich8lan(false) should be called after reset in wm_phy_post_reset(). - On PCH2, set the phy config counter to 50msec after (PHY) reset. - KNF & Use macro.
Pull up the following, requested by msaitoh in tickt #1085: sys/dev/mii/inbmphyreg.h 1.11 sys/dev/pci/if_wmreg.h 1.108 sys/dev/pci/if_wm.c 1.590-1.596 via patch - 82574 and newer document says the status field has neither EC (Excessive Collision) bit nor LC (Late Collision) bit (reserved), so don't check the bit. - Add workaround for DMA hang problem which result in TX device timeout on PCH_LPT with I218. Same as FreeBSD and Linux. This workaround is only for device ID 0x155a, 0x15a2, 0x1559 and 0x15a3. - Fix a PCH2 specific bug that wrong PHY register value can be read when boot. Same as FreeBSD and Linux. - After writing MDIC register, don't read quickly the same register but do delay(50). Same as other OSes. - Add missing wm_gate_hw_phy_config_ich8lan(false) in wm_phy_post_reset() on PCH2. wm_gate_hw_phy_config_ich8lan(true) is called in wm_reset(), so wm_gate_hw_phy_config_ich8lan(false) should be called after reset in wm_phy_post_reset(). - On PCH2, set the phy config counter to 50msec after (PHY) reset. - KNF & Use macro.
Add workaround for DMA hang problem which result in TX device timeout on PCH_LPT with I218. Same as FreeBSD and Linux. This woraround is only for device ID 0x155a, 0x15a2, 0x1559 and 0x15a3. I observed this problem on my Shuttle DS57U's I218 port six times in two months.
Pull up the following, requested by msaitoh in ticket #1628:
share/man/man4/wm.4 1.40 via patch
sys/dev/mii/ihphyreg.h 1.2
sys/dev/mii/inbmphyreg.h 1.10
sys/dev/pci/if_wm.c 1.504, 1.506, 1.510-1.535, 1.539-1.540, 1.546, 1.548, 1.551-1.552, 1.558, 1.565-1.573, 1.575, 1.579, 1.582, 1.584 via patch
sys/dev/pci/if_wmreg.h 1.99-1.103, 1.106-1.107 via patch
sys/dev/pci/if_wmvar.h 1.34-1.39 via patch
sys/dev/pci/pcidevs 1.1327 via patch
sys/dev/pci/pcidevs.h regen
sys/dev/pci/pcidevs_data.h regen
sys/dev/pci/pcireg.h patch
Sync wm(4) up to 2018/08/08 except MSI/MSI-X and NET_MPSAFE:
- remove extra "+"
- Fix a bug that non-GMII devices don't send a routing message when
the link status is changed.
- Set WMREG_KABGTXD not in wm_init_locked() but in wm_reset(). Same as
other OSes.
- If a interrupt is a spurious interrupt, don't print debug message.
- Don't print the Image Unique ID if an NVM is iNVM (i210 and I211).
- Print sc_flags with snprintb().
- Fix a bug that a RAL was written at incorrect address when the index
number is more than 16 on 82544 and newer.
- The layout of RAL on PCH* are different from others. Fix it.
- Flush every MTA write. Same as Linux.
- Move the location of calling wm_set_filter. Same as some other OSes.
- Add CSR_WRITE_FLUSH() after writing WMREG_CTRL in
wm_gmii_mediachange().
- Add missing "else" in wm_nvm_release().
- Make new wm_phy_post_reset() and use this function at all location
after resetting phy.
- Move the location of calling wm_get_hw_control. Same as Linux.
- Add I219 specific wokaround for legacy interrupt. From OpenBSD.
- Move the location of calling wm_lplu_d0_disable().
- Fix latency calculation in wm_platform_pm_pch_lpt().
- Set OBFF water mark and enable OBFF on PCH_LPT and newer.
- Disable D0 LPLU on 8257[12356], 82580, I350 and I21[01], too. Before
this commit, above devices and non-PCIe devices accessed wrong
register.
- Use device_printf() instead of aprint_error_dev() for PHY read/write
functions because those are used not only in device attach.
- Fix a bug that wm_gmii_i82544_{read,write}reg() didn't take care of
page select. PHY access from igphy() automatically did it, but
accessing from wm(4) for wrokaround didn't work correctly. This
change affects 8254[17], 8257[12] ICH8, ICH9 and ICH10.
- Call wm_kmrn_lock_loss_workaround_ich8lan() before any PHY access in
wm_linkintr_gmii().
- Register access in wm_kmrn_lock_loss_workaround_ich8lan() now works
correctly. Enable this function.
- Configure the LCD with the extended configuration region in NVM if
it's required.
- If TX is not required to flush, RX is also not required to flush
in wm_flush_desc_rings(). Same as other OSes.
- Remove wrong semaphore access in wm_nvm_{read,write}_{ich8,spt} to
prevent hangup. A semaphore is get/put in wm_nvm_{read,write}.
- Move some initialization stuff in wm_attach() before wm_reset(). Some
flags and callback function are required to set correctly before
wm_reset() because wm_reset() and some helper functions refer them.
- Add wm_write_smbus_addr() to set SMBus address by software.
- Modify wm_gmii_hv_{read,write}reg_locked() to make them access
HV_SMB_ADDR correctly.
- Use new nvm.{acquire,release}() for semaphore.
- Our MII readreg/writereg API has not way to detect an error.
kmrn_{read,write}reg() are not used for MII API, so it's not required
for these functions to use the same API. So,
- Change return value as error code.
- Change register value from int to uint16_t.
- read: pass pointer for uint16_t as an argument.
- Check return value on caller side.
- Check whether it's required to use MDIC workaround for 80003 or not
in wm_reset(). If the workaround isn't required, don't use the
workaround code in wm_gmii_i80003_{read,write}reg.
- Add WM_F_WA_I210_CLSEM flag for a workaround. FreeBSD/Linux drivers
say "In rare circumstances, the SW semaphore may already be held
unintentionally on I21[01]". PXE boot is one of the case.
- Qemu's e1000e emulation (82574L)'s SPI has only 64 words. I've never
seen on real 82574 hardware with such small SPI ROM. Check
sc->sc_nvm_wordsize before accessing higher address words to prevent
timeout.
- Check some wm_nvm_read()'s return vale.
- Print NVM offset and word count when EERD polling failed.
- On I219, drop TARC0 bit 28 for DMA hang workaround (from Linux).
- 82583 supports jumbo frame. Fixes PR#52773 reported by
Shinichi Doyashiki.
- Fix typo in comment. Reported by Shinichi Doyashiki in PR#52885.
- Add ASPM workaround for 8257[1234] and 82583 to prevent device
timeout or hangup. Fixes PR#52818 reported by Shinichi Doyashiki.
- CID-1427779: Fix uninitialized variables.
- Fix a bug that wm_pll_workaround_i210() is not called when
a) Chip is I211 or b) Chip is I210 and it uses iNVM (not FLASH).
- Do wm_reset_mdicnfg_82580() on 82580 only.
- Fix FLASH access on PCH_SPT and newer. Their FLASH access should be
done by 32bit. Especially for ICH_FLASH_HSFCTL register, it's located
at 0x0006, so it must be accessed via ICH_FLASH_HSFSTS(0x0004) and
use shift or mask.
- Make wm_nvm_valid_bank_detect_ich8lan() the same as other OSes.
- If the extended configuration size in the EXTCNFSIZE register is 0,
don't continue in wm_init_lcd_from_nvm().
- Add PCH_CNP support (I219 with Intel 300 series chipset).
- Enable I219 support.
- I354 uses an external PHY, so don't use wm_set_eee_i350().
- Fix a bug that the link can't detect in link interrupt function for
non-SERDES fiber.
- Fix a bug that 82542 misunderstand fiber's signal detection.
- Add debug printf()s.
- Update comment.
- Rename functions and variables.
- Add diagnostic code.
- Sort registers.
- Lowercase hexadecimal values.
- KNF.
update from HEAD
Sync with HEAD
Pull up following revision(s) (requested by msaitoh in ticket #173):
sys/dev/pci/if_wmreg.h: 1.99-1.103
sys/dev/pci/if_wmvar.h: 1.34-1.37
sys/dev/pci/if_wm.c: 1.510-1.537
sys/dev/mii/ihphyreg.h: 1.2
sys/dev/mii/inbmphyreg.h: 1.10
sys/dev/mii/igphy.c: 1.27
Sync wm(4) up to if_wm.c rev. 1.537:
- Set WMREG_KABGTXD not in wm_init_locked() but in wm_reset().
- If a legacy interrupt is a spurious interrupt, don't print debug
message.
- Don't print the Image Unique ID if an NVM is iNVM (i210 and I211).
- Fix a bug that a RAL was written at incorrect address when the index
number is more than 16 on 82544 and newer.
- The layout of RAL on PCH* are different from others. Fix it.
- Flush every MTA write. Same as Linux.
- Move the location of calling wm_set_filter. Same as some other OSes.
- Flush writing WMREG_CTRL in wm_gmii_mediachange().
- Make new wm_phy_post_reset() and use this function at all location
after resetting phy.
- Add I219 specific workaround for legacy interrupt. From OpenBSD.
- Move the location of calling wm_lplu_d0_disable().
- Disable D0 LPLU on 8257[12356], 82580, I350 and I21[01], too. Before
this commit, above devices and non-PCIe devices accessed wrong
register.
- Fix latency calculation in wm_platform_pm_pch_lpt().
- Set OBFF water mark and enable OBFF on PCH_LPT and newer.
- Fix a bug that wm_gmii_i82544_{read,write}reg() didn't take care of
page select. PHY access from igphy() automatically did it, but
accessing from wm(4) for workaround didn't work correctly. This
change affects 8254[17], 8257[12] ICH8, ICH9 and ICH10.
- Call wm_kmrn_lock_loss_workaround_ich8lan() before any PHY access in
wm_linkintr_gmii().
- Register access in wm_kmrn_lock_loss_workaround_ich8lan() now works
correctly. Enable this function.
- IF TX is not required to flush, RX is also not required to flush in
wm_flush_desc_rings(). Same as other OSes.
- Remove wrong semaphore access in wm_nvm_{read,write}_{ich8,spt} to
prevent hangup. A semaphore is get/put in wm_nvm_{read,write}.
- Move some initialization stuff in wm_attach() before wm_reset().
Some flags and callback function is required to set correctly before
wm_reset() because wm_reset() and some helper functions refer them.
- Add wm_write_smbus_addr() to set SMBus address by software.
- Modify wm_gmii_hv_{read,write}reg_locked() to make them access
HV_SMB_ADDR correctly.
- Configure the LCD with the extended configuration region in NVM if
it's required. Tested with Thinkpad X220.
- 8257[12]: Don't directly access SPI but use EERD register.
- 82575-I354: If the size of SPI ROM >= 32K words, use direct SPI
access instead of EERD register access.
- Add wm_nvm_eec_clock_raise() and wm_nvm_eec_clock_lower() and use
them for Microwire/SPI bus control. Same as Linux and FreeBSD.
- Reduce timeout value for 80003 in wm_get_swfw_semaphore(). Same as
Linux and FreeBSD.
- Change API of kmrn_{read,write}reg() and check the return value.
- Check whether it's required to use MDIC workaround for 80003 or not
in wm_reset(). If the workaround isn't required, don't use the
workaround code in wm_gmii_i80003_{read,write}reg.
- Add WM_F_WA_I210_CLSEM flag for a workaround. FreeBSD/Linux drivers
say "In rare circumstances, the SW semaphore may already be held
unintentionally." on I21[01]. PXE boot is one of the case.
- Qemu's e1000e emulation (82574L)'s SPI has only 64 words. I've never
seen on real 82574 hardware with such small SPI ROM. Check
NVM word size before accessing higher address words to prevent
timeout.
- Check some wm_nvm_read()'s return vale.
- Use device_printf() instead of aprint_error_dev() for PHY read/write
functions because those are used not only in device attach.
- Print internal driver flags when attaching.
- Add debug printf()s.
- Rename variables.
- Add comment, update comment and remove wrong comment.
- Call wm_kmrn_lock_loss_workaround_ich8lan() before any PHY access in wm_linkintr_gmii(). - Register access in wm_kmrn_lock_loss_workaround_ich8lan() now works correctly. Enable this function. - Configure the LCD with the extended configuration region in NVM if it's required. - Add debug printf.
Sync with netbsd-5
Sync with HEAD. (Note that most of these changes are simply $NetBSD$ tag issues.)
Pull up following revision(s) (requested by msaitoh in ticket #1302):
sys/dev/mii/igphyreg.h: revisions 1.7-1.10
sys/dev/mii/ikphyreg.h: revisions 1.3
sys/dev/mii/inbmphyreg.h: revisions 1.4-1.9
sys/dev/mii/mii.h: revisions 1.19-1.20
sys/dev/pci/if_wm.c: revisions 1.390, 1.392-1.395, 1.397, 1.419-1.425, 1.427-1.428, 1.430-1.435, 1.437-1.453 via patch
sys/dev/pci/if_wmreg.: revisions 1.89-1.93 via patch
sys/dev/pci/if_wmvar.h: revisions 1.31-1.32
Update wm(4) up to if_wm.c rev. 1.453 except MSI/MSI-X, multiqueue and
NET_MPSAFE:
- Add I219 support. It's not stable so it's disabled by default.
- wm_gate_hw_phy_config_ich8lan() is for younger than PCH2.
- Drop the host wakeup bit after resetting PHY on PCH and newer
devices.
- Increase delay while toggling LANPHYPC
- Move call of wm_reset() in wm_attach() after setting PHY and NVM
related flags because those flags are used in wm_reset().
- Use mutex for NVM access on ICH8 and newer devices. Same as FreeBSD.
- Rewrite PHY related lock stuff. Almost the same as FreeBSD.
This change will fix a bug that PHY read/write fail on some cases.
- Increase delay in wm_phy_resetisblocked(). Same as FreeBSD.
- Use semaphore in wm_hv_phy_workaround_ich8lan() and
wm_k1_gig_workaround_hv()
- Use wm_gii_mdic_readreg/writereg() in wm_access_phy_wakeup_reg_bm()
because these functions are called with taking lock.
- 82567V_3 is BME1000_E_2(bm). Tested with Advantech AIMB-212 1st
Ethernet port.
- Use wm_gmii_82544_{read,write}reg() on non-82567 ICH8, 9 and 10.
- Remove an 82578 workaround which was for PCH rev < 3. FreeBSD
removed this workaround in r228386.
- Add an 82578 workaround which is for PHY rev < 2. From FreeBSD and
Linux.
- Fix wm(4) input drop packet counter. WMREG_RNBC is incremented when
there is no available buffers in host memory. However, ethernet
controller can receive packets in such case if there is space in
phy's FIFO. That is, ethernet controller drops packet only if there
is no available buffers *and* there is no space in phy's FIFO. So,
the number of dropped packets should be added WMREG_MPC only.
- Use MII_ADDRMASK.
- Define WMPHY_I217, WMPHY_VF and WMPHY_210.
- Use BME1000_PHY_PAGE_SELECT in wm_gmii_bm_{read,write}reg(). This
change has no effect because GG82563_PHY_PAGE_SELECT and
BME1000_PHY_PAGE_SELECT have the same value.
- Fix PHY access on 82567(ICH8 or ICH10), 82574 and 82583:
- Use wm_gmii_bm_{read,write}reg() on 82574 and 82573.
- Issue page select correctly on BM PHYs.
- Fix workaround which did dummy read BM_WUC register. This code was
changed to drop BM_WUC_HOST_WU_BIT of BM_PROT_GEN_CFG register in
FreeBSD r228386. The code was added rev. 1.149, but the location was
not the best.
- wm_gmii_hv_{read/write}reg*(): USE PHY address 1 for some special
registers.
- Add check code for an 82578 workaround. Not completed yet.
- wm_release_hw_control(): Remove extra line. No any effect.
- Add "10/100" into non-gigabit devices' name.
- Call wm_enable_wakeup() in wm_detach() and wm_suspend(). Now wake on
lan works on Thinkpad X61(ICH8).
- Fix wm_access_phy_wakeup_reg_bm(). This change has no effect because
this function is used for WUC register and our driver currenlty
doesn't access to it.
- Call wm_enable_phy_wakeup() on PCH2 and newer, too. Now these devices
can do WOL. Tested with Thinkpad X220(PCH2).
- Set CTRL_MEHE correctly (PCH_{LPT,SPT} only).
- Add three workarounds for PCH_{LPT,SPT}.
- Fix a bug that 8257[56], 82580, I35[04] and I21[01] didn't use
wm_{get,release}_hw_control() correctly.
- Sync wm_smbustopci() with Linux and FreeBSD. This change effects PCH
and newer devices.
- Move the location of wm_smbustopci() call.
- Fix flag check in wm_get_wakeup()
- 8254[17]* and 8257[124] should not set WM_F_ARC_SUBSYS_VALID.
- Add missing WM_T_82541_2 and WM_T_82547_2.
- Fix WOL related setting of the WUC register for other than PCH* in
wm_enable_wakeup(). Tested with 82567V(ICH8) and 82583V.
- Use common MII_ADDRMASK.
- igphy(4): No binary change:
- s/IGPPHY/IGPHY/
- Fix the definition of PLHR_VALID_CHANNEL_*
- Fix the definition of MSE_CHANNEL_*
- Add MII_IGPHY_POWER_MGMT.
- Add some KASSERT.
- Add comment. Modify comment.
- Add debug code.
Sync with HEAD
Sync wm_smbustopci() with Linux and FreeBSD. This change effects PCH and newer devices.
Fix wm_access_phy_wakeup_reg_bm(). This change has no effect because this function is used for WUC register and our driver currenlty doesn't access to it.
Sync with HEAD
- Use MII_ADDRMASK. - Remove debug printf().
- Drop the host wakeup bit after resetting PHY on PCH and newer devices. - Increase delay while toggling LANPHYPC
Sync with HEAD
Change page of the OEM_BITS register back to 0 again. The document (Intel Ethernet Connection I219 Datasheet) says its in page 0. FreeBSD/Linux code access page 768. WHY? This change will fix a bug that the LPLU function isn't disabled. See: http://mail-index.netbsd.org/source-changes-d/2016/09/19/msg008720.html
HV_OEM_BITS is not page 0 but page 768.
Pullup the following revisions via patch, requested by msaitoh in ticket #1850: sys/dev/pci/if_wm.c 1.201, 1.203-1.204, 1.207-1.212, 1.215, 1.217-1.218, 1.220-1.223, 1.228, 1.232-245 sys/dev/pci/if_wmreg.h 1.40-1.45, 1.47-1.48 sys/dev/pci/if_wmvar.h 1.11-1.13 sys/dev/pci/pcidevs 1.1074, 1.1077, 1.1117 sys/dev/pci/pcidevs.h regen sys/dev/pci/pcidevs_data.h regen sys/dev/mii/igphyreg.h 1.6 sys/dev/mii/ihphy.c 1.1-1.2 sys/dev/mii/ihphyreg.h 1.1 sys/dev/mii/inbmphyreg.h 1.3 sys/dev/mii/files.mii 1.47 via patch sys/dev/mii/miidevs 1.97 and 1.100 sys/dev/mii/miidevs.h regen sys/dev/mii/miidevs_data.h regen sys/arch/i386/conf/ALL 1.280 sys/arch/i386/conf/GENERIC 1.1001 sys/arch/i386/conf/INSTALL_FLOPPY 1.11 sys/arch/i386/conf/XEN2_DOM0 patch sys/arch/amd64/conf/GENERIC 1.293 sys/arch/amd64/conf/XEN3_DOM0 1.61 share/man/man4/wm.4 1.21-1.24 Apply almost all fixes and improvements from netbsd-6 except for the rev. 1.196's iqdrops' change. - Add the detach code. - Add code for WOL, ASF, IPMI and Intel AMT. WOL is disabled by default - Add Yet another workaround for ICH8. - 82576 is dual port, so check the FUNCID and increment the MAC address for the 2nd port. - Fix the names of 82577L[MC] LAN controllers (for mobile). - Fix CTRL_EXT_SWDPIN() and CTRL_EXT_SWDPIO() macros. The bit order of the SW definable pin is not 6543 but 3654!!! - Rewrite the code to read MAC address from eeprom. - Add 82580 support. - 82571 quirk. Only 82571 shares port 0 of EEMNGCTL_CFGDONE. - The document says that the TDH register must be set after TCL.EN is set on 82575 and newer devices. - Fix some register names. No functional change. - Omit U+00AE "REGISTERED SIGN" in a product name due to its non-ASCII nature. - Stop wm(4) from needlessly resetting when you add or delete a vlan(4). - Fix MAC address check on 8257[156] and 80003 case. Some cards have non 0xffff pointer but those don't use alternative MAC address in reality. So we check whether the broadcast bit is set or not like Intel's e1000 driver. Fixes PR kern/44072 reported by Jean-Yves Moulin. - Add PCH2(and 82579) support. Fixes PR#46487 - Add yet another 82567V support. - Add ICH10+HANKSVILL support. - Add support Intel I350 Ethernet. - Make vlan and all ip/ip6 checksum offload work for the I350. - Fix compile error with WM_DEBUG. - Fix a bug that PHY isn't set to low-power mode on PCH and PCH2. - Add WM_DEBUG_NVM. If WM_DEBUG_NVM is enabled, dump the FLASH ROM data. - Skip 64bit BAR correctly. - Fix RAL_TABSIZE for ICH8, 82576, 82580 and I350. - Use 82580(and I350) specific PHY read/write functions. Fixes PR#47542. - Style fix. Fix typo in comment. Fix comments. Add comments.
Sync with HEAD.
sync with head
82579 support.
Pull up revisions (requested by msaitoh in ticket #1358):
sys/dev/pci/if_wm.c 1.196-1.199,1.202,1.205
sys/dev/pci/if_wmvar.h 1.9
sys/dev/pci/if_wmreg.h 1.36-1.39
sys/dev/pci/pcireg.h 1.61-1.64
sys/dev/pci/pcidevs 1.1023
sys/dev/pci/pcidevs.h regen
sys/dev/pci/pcidevs_data.h regen
mii/igphy.c 1.21
mii/igphyvar.h 1.1
mii/inbmphyreg.h 1.2
- Count Receive error, CRC error, Alignment error, Symbol error, Sequence
error, Carrier extension error and Receive length error into ierror.
Fixes PR#30349 reported by UMEZAWA Takeshi.
- Add support for 82575, 82576 and 82580(ER).
- Apply the patch for 82575 from Wolfgang Stukenbrock (PR#42422). We use
only one RX ring and with the legacy mode.
- Add support for 82576.
- Partial support for 82580.
- Partial support for the serdes systems.
- Add two workarounds for ICH8 with igp3.
- Workaround for 82566 Kumeran PCS lock loss.
- WOL from S5 stops working.
- (pcireg.h) Add PCIe config register definitions.
- Note that the changes to count Missed packet (rx fifo overflow) and Receive
no buffers (rx ring full) into iqdrops in rev. 1.196 of if_wm.c is not
pulled up.
Sync with HEAD.
sync to netbsd-5
sync with head
file inbmphyreg.h was added on branch matt-nb5-mips64 on 2010-04-21 00:27:39 +0000
file inbmphyreg.h was added on branch yamt-nfs-mp on 2010-03-11 15:03:41 +0000
Add forgotten commit (IGP3_KMRN_DIAG_PCS_LOCK_LOSS).
Pull up the following revisions(s) (requested by msaitoh in ticket #1277):
sys/dev/pci/if_wm.c 1.184-1.192, 1.194
sys/dev/pci/if_wmreg.h 1.29-1.35
sys/dev/pci/if_wmvar.h 1.5-1.8
sys/dev/pci/pcidevs 1.1006,1.1009-1.1010, 1.1012-1.1013 via patch
sys/dev/pci/pcidevs.h regen
sys/dev/pci/pcidevs_data.h regen
sys/dev/mii/igphyreg.h 1.5
sys/dev/mii/inbmphyreg.h 1.1
- Add support for i82583V.
- Add some ICH9 and ICH10 devices.
- Add support for PCH.
- Fix the bug that ICH9 can't found a PHY. Fixes PR#42237
- Fix an incorrect test for WM_F_EEPROM_INVALID since rev. 1.183. Some old
chips don't set EECD_EE_PRES.
- Fix a bug that both WM_F_EEPROM_SPI and WM_F_EEPROM_FLASH are set.
- Add a missing decrement for a timeout reported by Wolfgang Stukenbrock
in PR#42422.
- PBA setting for i82574 is not 12K but 20K.
- Enable checking the management mode on 82574.
- Fix the length of the delay() in wm_gmii_reset(). It fixed the problem that
sometimes the driver misunderstood PHYs in mii_attach(). It was reported
by MATSUI Yoshihiro. We observed it on ICH9.
- Fix the checking of jumbo frame function
- Remove the extra macro definition for the offset 0x1a in EEPROM.
- Add missing break in wm_reset()...
- Fix the offset of WMREG_PBS...
- Make wm_reset() and wm_gmii_reset() close to e1000 driver.
At least, this change make wm_attach() stable on ICH9.
- Reset GMII interface after wm_reset() in wm_init().
- Rework for assigning mii_{read,write}reg(). Use PCI product ID to identify
the PHY.
- Add code about LPLU(Low Power Link Up) function. It seems that we have to
do the same work for ICH9.
- Fixes the rx stall problem on 82578 by MANY workaround code. We need more
work for 82577.
file inbmphyreg.h was added on branch netbsd-5 on 2010-01-27 22:27:41 +0000
Fixes the rx stall problem on 82578 by MANY workaround code. We need more work for 82577.