CVS log for src/sys/dev/mii/igphy.c

Up to [cvs.NetBSD.org] / src / sys / dev / mii

Request diff between arbitrary revisions

Keyword substitution: kv
Default branch: MAIN

Pull up following revision(s) (requested by msaitoh in ticket #1726):

	sys/dev/mii/igphy.c: revision 1.37
	sys/dev/mii/ihphy.c: revision 1.19
	sys/dev/mii/makphy.c: revision 1.68

  Fix a bug that "ifconfig xx0 media none" set LINK_STATE_UNKNOWN instead of
LINK_STATE_DOWN.

XXX We should check for other PHY drivers, too.

Pull up following revision(s) (requested by msaitoh in ticket #1409):

	sys/dev/mii/igphy.c: revision 1.37
	sys/dev/mii/ihphy.c: revision 1.19
	sys/dev/mii/makphy.c: revision 1.68

  Fix a bug that "ifconfig xx0 media none" set LINK_STATE_UNKNOWN instead of
LINK_STATE_DOWN.

XXX We should check for other PHY drivers, too.

Sync w/ HEAD.

 Fix a bug that "ifconfig xx0 media none" set LINK_STATE_UNKNOWN instead of
LINK_STATE_DOWN.

XXX We should check for other PHY drivers, too.

Pull up the following revisions, requested by msaitoh in ticket #1594:

	sys/dev/pci/if_wm.c			1.655-1.658, 1.660,
						1.662, 1.664-1.668,
						1.671-1.674, 1.678,
						1.680-1.685 via patch
	sys/dev/pci/if_wmreg.c			1.118-1.119 via patch
	sys/dev/pci/if_wmvar.c			1.45 via patch
	sys/dev/mii/igphy.c			1.35-1.36 via patch
	sys/dev/mii/igphyreg.h			1.12-1.13
	sys/dev/mii/makphy.c			1.66 via patch
	sys/dev/mii/makphyreg.h			1.11

- Add SFP support. Module insertion/removal is not supported yet.
  Currently, SFP detection is only done in the driver's attach phase.
- Detect the Media Auto Sense feature. Not supported yet.
- Fix SFF_SFP_ETH_FLAGS_100FX. It's not 0x10 but 0x20.
- Add extra delay in wm_serdes_power_up_link_82575().
- Add Intel I219 LM10-LM15 and V10-V14.
- wm(4) can use workqueue as deferred Rx/Tx handler).
  Set hw.wm*.txrx_workqueue=1 to use workqueue instead of softint.
  The default value of hw.wm*.txrx_workqueue is 0 which use softint
  as before.
- Unset RSS UDP flags like ixg(4) and other OSes. To handle IP
  fragmented UDP, first packet and second packet should be processed
  in the same Rx queue.
- It's useless to not to set PCI_PMCSR_PME_STS bit when writing because
  the bit is W1C. Instead, always write PCI_PMCSR_PME_STS bit to clear
  in case it's already set.
- Actually writing always the checksum offload context descriptor
  makes the HW do extra processing, avoid doing that if possible.
- Fix a bug that the WMREG_EEARBC_I210 register is incorrectly set if
  the system uses iNVM.
- "wmX: 0" on 82542 is difficult to understand, so don't print it.
- Explicitly cast from uint16_t to uint32_t before shifting 16bit left
  when printing Image Unique ID to avoid undefined behavior.
- Set if_baudrate for non-MII device.
- Rename some macros and function.
- KNF. Add comment.

Pull up following revision(s) (requested by msaitoh in ticket #1040):

	sys/dev/mii/igphy.c: revision 1.35
	sys/dev/mii/igphy.c: revision 1.36
	sys/dev/mii/igphyreg.h: revision 1.12
	sys/dev/mii/igphyreg.h: revision 1.13
	sys/dev/mii/makphyreg.h: revision 1.11
	sys/dev/pci/if_wm.c: revision 1.682
	sys/dev/pci/if_wm.c: revision 1.683
	sys/dev/pci/if_wm.c: revision 1.684
	sys/dev/pci/if_wm.c: revision 1.685
	sys/dev/mii/makphy.c: revision 1.66

s/MII_IGPHY_/IGPHY_/. No functional change.

Rename PSSR_* to MAKPHY_PSSR_* and IGPHY_PSSR_* to avoid conflict.
No functional change.

  Setup PCS and SGMII for SFP correctly. It still doesn't support SFP
insertion/removal.

Copper:
wm2: SGMII(SFP)
wm2: 0x1043c440<SPI,IOH_VALID,PCIE,SGMII,NEWQUEUE,ASF_FIRM,EEE,SFP>
makphy0 at wm2 phy 6: Marvell 88E1111 Gigabit PHY, rev. 1

Fiber:
wm3: SERDES(SFP)
wm3: 0x10034440<SPI,IOH_VALID,PCIE,NEWQUEUE,ASF_FIRM,SFP>
wm3: 1000baseSX, 1000baseSX-FDX, auto

  Explicitly cast from uint16_t to uint32_t before shifting 16bit left
when printing Image Unique ID. Found by kUBSan.

  Set if_baudrate for non-MII device. Before this commit, it was 0.

Rename PSSR_* to MAKPHY_PSSR_* and IGPHY_PSSR_* to avoid conflict.
No functional change.

s/MII_IGPHY_/IGPHY_/. No functional change.

- Remove the waitfor argument from mii_phy_auto().
- Whitespace fix.

Merge changes from current as of 20200406

Define and implement a locking protocol for the ifmedia / mii layers:
- MP-safe drivers provide a mutex to ifmedia that is used to serialize
  access to media-related structures / hardware regsiters.  Converted
  drivers use the new ifmedia_init_with_lock() function for this.  The
  new name is provided to ease the transition.
- Un-converted drivers continue to call ifmedia_init(), which will supply
  a compatibility lock to be used instead.  Several media-related entry
  points must be aware of this compatibility lock, and are able to acquire
  it recursively a limited number of times, if needed.  This is a SPIN
  mutex with priority IPL_NET.
- This same lock is used to serialize access to PHY registers and other
  MII-related data structures.

The PHY drivers are modified to acquire and release the lock, as needed,
and assert the lock is held as a diagnostic aid.

The "usbnet" framework has had an overhaul of its internal locking
protocols to fit in with the media / mii changes, and the drivers adapted.

USB wifi drivers have been changed to provide their own adaptive mutex
to the ifmedia later via a new ieee80211_media_init_with_lock() function.
This is required because the USB drivers need an adaptive mutex.

Besised "usbnet", a few other drivers are converted: vmx, wm, ixgbe / ixv.

mcx also now calls ifmedia_init_with_lock() because it needs to also use
an adaptive mutex.  The mcx driver still needs to be fully converted to
NET_MPSAFE.

- Simplify sc->mii_anegticks setting. Same as FreeBSD.

   Don't set the default value not in the attach function. Instead, set the
  default value (MII_ANEGTICKS) first in the beginning of the
  mii_phy_add_media(). The function already has the code to change the value to
  MII_ANEGTICKS_GIGE if it's gigabit capable.

- Remove extra pmf_device_register() call. It's done in mii_phy_add_media().

Sync with HEAD

 KNF. No functional change.

use a macro to tidy up the phydesc array initialization, from FreeBSD

Sync with HEAD

 Change MII PHY read/write API from:

	int (*mii_readreg_t)(device_t, int, int);
	void (*mii_writereg_t)(device_t, int, int, int);
to:

	int (*mii_readreg_t)(device_t, int, int, uint16_t *);
	int (*mii_writereg_t)(device_t, int, int, uint16_t);

Now we can test if a read/write operation failed or not by the return value.

 In 802.3 spec says that the PHY shall not respond to read/write transaction
to the unimplemented register(22.2.4.3). Detecting timeout can be used to
check whether a register is implemented or not (if the register conforms to
the spec). ukphy(4) can be used this for MII_MMDACR and MII_MMDAADR.

 Note that I noticed that the following code do infinite loop in the
read/wirte function. If it accesses unimplemented PHY register, it will hang.
It should be fixed:

	arm/at91/at91emac.c
	arm/ep93xx/epe.c
	arm/omap/omapl1x_emac.c
	mips/ralink/ralink_eth.c
	arch/powerpc/booke/dev/pq3etsec.c(read)
	dev/cadence/if_cemac.c <- hkenken
	dev/ic/lan9118.c


Tested with the following device:

	axe+ukphy
	axe+rgephy
	axen+rgephy	(tested by Andrius V)
	wm+atphy
	wm+ukphy
	wm+igphy
	wm+ihphy
	wm+makphy
	sk+makphy
	sk+brgphy
	sk+gentbi
	msk+makphy
	sip+icsphy
	sip+ukphy
	re+rgephy
	bge+brgphy
	bnx+brgphy
	gsip+gphyter
	rtk+rlphy
	fxp+inphy	(tested by Andrius V)
	tlp+acphy
	ex+exphy
	epic+qsphy
	vge+ciphy	(tested by Andrius V)
	vr+ukphy	(tested by Andrius V)
	vte+ukphy	(tested by Andrius V)

Not tested (MAC):
	arm:at91emac
	arm:cemac
	arm:epe
	arm:geminigmac
	arm:enet
	arm:cpsw
	arm:emac(omac)
	arm:emac(sunxi)
	arm:npe
	evbppc:temac
	macppc:bm
	macppc:gm
	mips:aumac
	mips:ae
	mips:cnmac
	mips:reth
	mips:sbmac
	playstation2:smap
	powerpc:tsec
	powerpc:emac(ibm4xx)
	sgimips:mec
	sparc:be
	sf
	ne(ax88190, dl10019)
	awge
	ep
	gem
	hme
	smsh
	mtd
	sm
	age
	alc
	ale
	bce
	cas
	et
	jme
	lii
	nfe
	pcn
	ste
	stge
	tl
	xi
	aue
	mue
	smsc
	udav
	url

Not tested (PHY):
	amhphy
	bmtphy
	dmphy
	etphy
	glxtphy
	ikphy
	iophy
	lxtphy
	nsphyter
	pnaphy
	rdcphy
	sqphy
	tlphy
	tqphy
	urlphy

Synch with HEAD

 Whitespace fixes. No functional change.

update from HEAD

Sync with HEAD

Pull up following revision(s) (requested by msaitoh in ticket #173):
	sys/dev/pci/if_wmreg.h: 1.99-1.103
	sys/dev/pci/if_wmvar.h: 1.34-1.37
	sys/dev/pci/if_wm.c: 1.510-1.537
	sys/dev/mii/ihphyreg.h: 1.2
	sys/dev/mii/inbmphyreg.h: 1.10
	sys/dev/mii/igphy.c: 1.27
Sync wm(4) up to if_wm.c rev. 1.537:
- Set WMREG_KABGTXD not in wm_init_locked() but in wm_reset().
- If a legacy interrupt is a spurious interrupt, don't print debug
  message.
- Don't print the Image Unique ID if an NVM is iNVM (i210 and I211).
- Fix a bug that a RAL was written at incorrect address when the index
  number is more than 16 on 82544 and newer.
- The layout of RAL on PCH* are different from others. Fix it.
- Flush every MTA write. Same as Linux.
- Move the location of calling wm_set_filter. Same as some other OSes.
- Flush writing WMREG_CTRL in wm_gmii_mediachange().
- Make new wm_phy_post_reset() and use this function at all location
  after resetting phy.
- Add I219 specific workaround for legacy interrupt. From OpenBSD.
- Move the location of calling wm_lplu_d0_disable().
- Disable D0 LPLU on 8257[12356], 82580, I350 and I21[01], too. Before
  this commit, above devices and non-PCIe devices accessed wrong
  register.
- Fix latency calculation in wm_platform_pm_pch_lpt().
- Set OBFF water mark and enable OBFF on PCH_LPT and newer.
- Fix a bug that wm_gmii_i82544_{read,write}reg() didn't take care of
  page select. PHY access from igphy() automatically did it, but
  accessing from wm(4) for workaround didn't work correctly. This
  change affects 8254[17], 8257[12] ICH8, ICH9 and ICH10.
- Call wm_kmrn_lock_loss_workaround_ich8lan() before any PHY access in
  wm_linkintr_gmii().
- Register access in wm_kmrn_lock_loss_workaround_ich8lan() now works
  correctly. Enable this function.
- IF TX is not required to flush, RX is also not required to flush in
  wm_flush_desc_rings(). Same as other OSes.
- Remove wrong semaphore access in wm_nvm_{read,write}_{ich8,spt} to
  prevent hangup. A semaphore is get/put in wm_nvm_{read,write}.
- Move some initialization stuff in wm_attach() before wm_reset().
  Some flags and callback function is required to set correctly before
  wm_reset() because wm_reset() and some helper functions refer them.
- Add wm_write_smbus_addr() to set SMBus address by software.
- Modify wm_gmii_hv_{read,write}reg_locked() to make them access
  HV_SMB_ADDR correctly.
- Configure the LCD with the extended configuration region in NVM if
  it's required. Tested with Thinkpad X220.
- 8257[12]: Don't directly access SPI but use EERD register.
- 82575-I354: If the size of SPI ROM >= 32K words, use direct SPI
  access instead of EERD register access.
- Add wm_nvm_eec_clock_raise() and wm_nvm_eec_clock_lower() and use
  them for Microwire/SPI bus control. Same as Linux and FreeBSD.
- Reduce timeout value for 80003 in wm_get_swfw_semaphore(). Same as
  Linux and FreeBSD.
- Change API of kmrn_{read,write}reg() and check the return value.
- Check whether it's required to use MDIC workaround for 80003 or not
  in wm_reset(). If the workaround isn't required, don't use the
  workaround code in wm_gmii_i80003_{read,write}reg.
- Add WM_F_WA_I210_CLSEM flag for a workaround. FreeBSD/Linux drivers
  say "In rare circumstances, the SW semaphore may already be held
  unintentionally." on I21[01]. PXE boot is one of the case.
- Qemu's e1000e emulation (82574L)'s SPI has only 64 words. I've never
  seen on real 82574 hardware with such small SPI ROM. Check
  NVM word size before accessing higher address words to prevent
  timeout.
- Check some wm_nvm_read()'s return vale.
- Use device_printf() instead of aprint_error_dev() for PHY read/write
  functions because those are used not only in device attach.
- Print internal driver flags when attaching.
- Add debug printf()s.
- Rename variables.
- Add comment, update comment and remove wrong comment.

 Update comment. SmartSpeed workaroud code was added in rev. 1.5. No functional
change.

Sync with HEAD

KNF. Remove extra spaces. No functional change.

Pull up following revision(s) (requested by msaitoh in ticket #1366):
	sys/dev/pci/if_wm.c: 1.281, 1.318, 1.320, 1.324-1.332, 1.334, 1.336, 1.343-1.344, 1.347-1.348, 1.350, 1.376-1.382, 1.386-1.387, 1.389 via patch
	sys/dev/pci/if_wmreg.h: 1.68-1.70, 1.73-1.77, 1.79-1.80, 1.82, 1.86-1.88 via patch
	sys/dev/pci/if_wmvar.h: 1.22-1.23, 1.25-1.30 via patch
	sys/dev/mii/igphy.c: 1.25
	sys/dev/mii/ukphy.c: 1.48
Sync wm(4) as of if_wm.c rev 1.389 except SERDES, MSI/MSI-X, multiqueue
and NET_MPSAFE:
- Set ICH9 and ICH10's PBA size to 14K if the RX buffer size is more
  than 4096. Almost the same as other OSes.
- For 82576 and newer devices, the PBA register is deleted. Don't write
  PBA for those chips. Also change the calculation of RX packet buffer
  size in new way.
- Print NVM image version and option ROM version.
- Add workaround for I210 Errata 25 and I211 Errata 10 (PLL bug). This
  workaround is required if the NVM image version < 3.25.
- Fix a bug that wm_detach() didn't unmap the FHASH's area. Now
  "drvctl -d wm0" -> "drvctl -r pci0" works on ICH* and PCH*.
- Add workaround for 82574 Errata 25 and 82583 Errata 12 "Dropped RX
  packets" and for 82573 (unknown). Set GCR_L1_ACT_WITHOUT_L0S_RX bit.
  The NVM Image version 2.1.4 and newer have this workaround.
- Check PHY type correctly. This change is required to use igphy(4)
  device correctly.
- Disable LPLU (Low Power Link Up) on D0 state on 82574, 82583 and ICH*
  too.
- Call wm_get_hw_control() correctly. This change fixes a bug that some
  AMT based systems doesn't linkup at 1000BaseT. The problem was
  observed on HP Compaq dc7700. A lot of fixes have been done for wm(4)
  and igphy(4), so now PR#44893 should be fixed.
- Call wm_get_wakeup(sc) before checking WM_F_HAS_AMT. It's required to
  check the existence of AMT correctly.
- Fix a problem that wm_gate_hw_phy_config_ich8lan() isn't called in
  wm_reset() on PCH2.
- Clear WMREG_WUC in wm_reset() if the chip >= 82544. This might fix
  the behavior on suspend/resume.
- Fix logic of wm_check_reset_block() on ICH* and PCH*. This change
  might fix a problem that PHY's read/write functions can't get
  semaphore.
- On ICH8, call wm_gig_downshift_workaround_ich8lan() when link changed
  down.
- Drop PHY_CTRL_GBE_DIS explicitly in wm_lplu_d0_disable() in case BIOS
  sets this bit.
- Fix two bugs in wm_kmrn_lock_loss_workaround_ich8lan(). Now the
  function checks the status correctly but it causes linkdown up to 10
  times, so it's disabled for the time being.
- PR/50527: David Binderman: Fix impossible code. Odd offsets need
  special treatment.
- Fix RAL table's size of PCH2 and PCH_LPT.
- PCH_LPT (and newer device) is required to check FWSM_WLOCK_MAC bit to
  determine the range of the RAL.
- Use sc->sc_itr instead of hard-coded number.
- Rename wm_tbi_check_link() to wm_tbi_tick() because this function
  acts as mii_tick().
- ACK Accelerate Disable in the RFCTL register is not bit 13 but 12.
  No binary change because this definition has not used yet.
- Add ACK data Disable bit's definition (not used yet).
- PHY_CTRL_GBE_DIS is not bit 4 but bit 6. This change has no any
  effect by default because WM_WOL is not defined yet and
  m_kmrn_lock_loss_workaround_ich8lan() is broken.
- Fix wm_check_mng_mode_ich8lan(). This function is used only when
  WM_WOL is defined and it's disabled by default.
- Rename wm_check_reset_block() to wm_phy_resetisblocked() and make it
  returns bool. No functional change.
- Reorder function definitions and macro definitions. No functional
  change.
- Fix comment. Add comment. Update comment.
- KNF.

Pull up following revision(s) (requested by msaitoh in ticket #1102):
	sys/dev/mii/igphy.c: 1.25
	sys/dev/mii/ukphy.c: 1.48
	sys/dev/pci/if_wm.c: revisions 1.308, 1.318, 1.320, 1.324-1.332, 1.334, 1.336, 1.343-1.344, 1.347-1.348, 1.350, 1.376-1.382, 1.386-1.389 via patch
	sys/dev/pci/if_wmreg.h: revisions 1.68-1.70, 1.73-1.77, 1.79-1.80, 1.82, 1.86-1.88 via patch
	sys/dev/pci/if_wmvar.h: revisions 1.22-1.23, 1.25-1.30 via patch
Sync wm(4) as of if_wm.c rev 1.389 except MSI/MSI-X, multiqueue and NET_MPSAFE:
- Add C2000 KX and 2.5G support.
- Set ICH9 and ICH10's PBA size to 14K if the RX buffer size is more than
  4096. Almost the same as other OSes.
- For 82576 and newer devices, the PBA register is deleted. Don't write PBA
  for those chips. Also change the calculation of RX packet buffer size in
  new way.
- Fix a lot of bugs to make 82575 and newer SERDES based systems work.
- Print NVM image version and option ROM version.
- Add workaround for I210 Errata 25 and I211 Errata 10 (PLL bug). This
  workaround is required if the NVM image version < 3.25.
- Fix a bug that wm_detach() didn't unmap the FHASH's area. Now
  "drvct -d wm0" -> "drvctl -r pci0" works on ICH* and PCH*.
- Add workaround for 82574 Errata 25 and 82583 Errata 12 "Dropped RX packets"
  and for 82573 (unknown). Set GCR_L1_ACT_WITHOUT_L0S_RX bit. The NVM Image
  version 2.1.4 and newer have this workaround.
- Check PHY type correctly. This change is required to use igphy(4) device
  correctly.
- Disable LPLU (Low Power Link Up) on D0 state on 82574, 82583 and ICH* too.
- Call wm_get_hw_control() correctly. This change fixes a bug that some AMT
  based systems doesn't linkup at 1000BaseT. The problem was observed on HP
  Compaq dc7700. A lot of fixes have been done for wm(4) and igphy(4), so now
  PR#44893 should be fixed.
- Call wm_get_wakeup(sc) before checking WM_F_HAS_AMT. It's required to
  check the existence of AMT correctly.
- Fix a problem that wm_gate_hw_phy_config_ich8lan() isn't called in
  wm_reset() on PCH2.
- Clear WMREG_WUC in wm_reset() if the chip >= 82544. This might fix the
  behavior on suspend/resume.
- Fix logic of wm_check_reset_block() on ICH* and PCH*. This change might fix
  a problem that PHY's read/write functions can't get semaphore.
- On ICH8, call wm_gig_downshift_workaround_ich8lan() when link changed down.
- Drop PHY_CTRL_GBE_DIS explicitly in wm_lplu_d0_disable() in case BIOS sets
  this bit.
- Fix two bugs in wm_kmrn_lock_loss_workaround_ich8lan(). Now the function
  checks the status correctly but it causes linkdown up to 10 times, so it's
  disabled for the time being.
- PR/50527: David Binderman: Fix impossible code. Odd offsets need special
  treatment.
- Fix RAL table's size of PCH2 and PCH_LPT.
- PCH_LPT (and newer device) is required to check FWSM_WLOCK_MAC bit to
  determine the range of the RAL.
- Use sc->sc_itr instead of hard-coded number.
- Rename wm_tbi_check_link() to wm_tbi_tick() because this function acts as
  mii_tick().
- ACK Accelerate Disable in the RFCTL register is not bit 13 but 12.
  No binary change because this definition has not used yet.
- Add ACK data Disable bit's definition (not used yet).
- PHY_CTRL_GBE_DIS is not bit 4 but bit 6. This change has no any effect by
  default because WM_WOL is not defined yet and
  m_kmrn_lock_loss_workaround_ich8lan() is broken.
- Fix wm_check_mng_mode_ich8lan(). This function is used only when WM_WOL is
  defined and it's disabled by default.
- Rename wm_check_reset_block() to wm_phy_resetisblocked() and make it returns
  bool. No functional change.
- Reorder function definitions and macro definitions. No functional change.
- Fix comment. Add comment. Update comment.
- KNF.

Sync with HEAD (as of 26th Dec)

igphy(4),ukphy(4): Set mii_mpd_* entries.
wm(4): check PHY type correctly.

Sync with HEAD

add some _KERNEL_OPT as the finishing touch

Pull up following revision(s) (requested by msaitoh in ticket #1189):
	sys/dev/pci/if_wm.c: revision 1.270
	sys/dev/mii/inphy.c: revision 1.53
	sys/dev/mii/glxtphy.c: revision 1.24
	sys/dev/mii/tlphy.c: revision 1.62
	sys/dev/mii/iophy.c: revision 1.37
	sys/dev/mii/brgphy.c: revision 1.70
	sys/dev/mii/ihphy.c: revision 1.8
	sys/dev/mii/bmtphy.c: revision 1.31
	sys/dev/mii/urlphy.c: revision 1.30
	sys/dev/mii/makphy.c: revision 1.40
	sys/dev/mii/qsphy.c: revision 1.48
	sys/dev/mii/igphy.c: revision 1.23
	sys/dev/mii/nsphy.c: revision 1.58
	sys/dev/mii/mvphy.c: revision 1.10
	sys/dev/pci/if_txp.c: revision 1.41
	sys/dev/mii/nsphy.c: revision 1.59
	sys/dev/mii/rlphy.c: revision 1.28
	sys/dev/mii/icsphy.c: revision 1.49
	sys/dev/mii/rlphy.c: revision 1.29
	sys/dev/mii/lxtphy.c: revision 1.49
	sys/dev/mii/ciphyreg.h: revision 1.5
	sys/dev/mii/nsphyter.c: revision 1.38
	sys/dev/mii/sqphy.c: revision 1.50
	sys/dev/mii/gentbi.c: revision 1.26
	sys/dev/mii/gentbi.c: revision 1.27
	sys/dev/mii/tqphy.c: revision 1.39
	sys/dev/mii/ikphy.c: revision 1.10
	sys/dev/mii/dmphy.c: revision 1.35
	sys/dev/mii/amhphy.c: revision 1.20
	sys/dev/mii/acphy.c: revision 1.24
	sys/dev/mii/ciphy.c: revision 1.25
	sys/dev/mii/brgphyreg.h: revision 1.8
	sys/dev/mii/ukphy_subr.c: revision 1.12
	sys/dev/ic/rtl80x9.c: revision 1.16
	sys/arch/mips/adm5120/dev/if_admsw.c: revision 1.12
	sys/dev/pci/if_kse.c: revision 1.28
	sys/dev/mii/ukphy_subr.c: revision 1.13
	sys/dev/mii/mii.h: revision 1.18
	sys/dev/mii/gphyter.c: revision 1.29
No functional change:
- Fix typo.
- Remove trailing white spaces.
- Capitalize comments.
- Tabify.
- KNF.
 IFM_FDX and IFM_HDX use different bit, so set IFM_HDX bit if it's not full
duplex. For many drivers, it recognize half duplex if IFM_FDX isn't set,
but not for others. Same as {Free|Open}BSD.

Rebase to HEAD as of a few days ago.

Rebase.

 IFM_FDX and IFM_HDX use different bit, so set IFM_HDX bit if it's not full
duplex. For many drivers, it recognize half duplex if IFM_FDX isn't set,
but not for others. Same as {Free|Open}BSD.

Resync to 2012-11-19 00:00:00 UTC

sync with head

Style fix. No functional change.

Pull up revisions (requested by msaitoh in ticket #1358):
	sys/dev/pci/if_wm.c		1.196-1.199,1.202,1.205
	sys/dev/pci/if_wmvar.h		1.9
	sys/dev/pci/if_wmreg.h		1.36-1.39
	sys/dev/pci/pcireg.h		1.61-1.64
	sys/dev/pci/pcidevs		1.1023
	sys/dev/pci/pcidevs.h		regen
	sys/dev/pci/pcidevs_data.h	regen
	mii/igphy.c			1.21
	mii/igphyvar.h			1.1
	mii/inbmphyreg.h		1.2

- Count Receive error, CRC error, Alignment error, Symbol error, Sequence
  error, Carrier extension error and Receive length error into ierror.
  Fixes PR#30349 reported by UMEZAWA Takeshi.
- Add support for 82575, 82576 and 82580(ER).
  - Apply the patch for 82575 from Wolfgang Stukenbrock (PR#42422). We use
    only one RX ring and with the legacy mode.
  - Add support for 82576.
  - Partial support for 82580.
  - Partial support for the serdes systems.
- Add two workarounds for ICH8 with igp3.
  - Workaround for 82566 Kumeran PCS lock loss.
  - WOL from S5 stops working.
- (pcireg.h) Add PCIe config register definitions.
- Note that the changes to count Missed packet (rx fifo overflow) and Receive
  no buffers (rx ring full) into iqdrops in rev. 1.196 of if_wm.c is not
  pulled up.

Sync with HEAD.

sync to netbsd-5

sync with head

Add two workarounds for ICH8 with igp3.
- Workaround for 82566 Kumeran PCS lock loss.
- WOL from S5 stops working.

Pull up the following revisions(s) (requested by msaitoh in ticket #1203):
	sys/dev/pci/if_wm.c:		1.176-1.179, 1.181-1.183
	sys/dev/pci/if_wmreg.h:		1.28
	sys/dev/pci/if_wmvar.h:		1.1-1.4
	sys/dev/mii/igphy.c:		1.18-1.20 via patch

Many bugfixes:
- Some fixes for i80003 and ICH{8,9,10} from e1000 driver and document:
  - Add setting for KABGTXD register for ICH{8,9,10}.
  - ICH9 and ICH10 has no FCAL, FCAH and FCT like ICH8.
  - Add special setting for FCTTV and TCTL_EXT register for i80003
  - The special setting for TIPG is only for i80003.
  - Some of kumeran settings are only for i80003's bugs.
  - Add some ICH10 fixes.
  - Fix the bug that another lock mechanism is used to access Kumeran
    registers on i80003 and ICHs.
  - Fix yet another i80003 ONLY workaround. The code to modifing TIPG
    register is only for i80003.
- Set the Re-Transmit on Late Collision(RTLC) flag for all devices.
- Fix a typo in a printf message.
- If the difference bettween last flag and new flag is only IFF_PROMISC
  or IFF_ALLMULTI, set multicast filter only to prevent link down.
  Tested by Mark Davies and me. Fixes PR#29126 for wm.
- Cleanup interrupt establish error messages. Do not mix
  aprint_error/aprint_normal/printf calls for a single line.
- Fix igphy's 82566 support.
  - Patch for the DSP code is only for 8254[17] and we have to apply
    the different patches between rev. 1 and rev. 2.
  - The workaround for analog fuse is only for 82547 rev. 1.
  - The workaround for smartspeed is only for 8254[17]
- Sync with Intel's original em driver:
  - Check PCI-X mode as e1000 driver.
  - Add dspcode for igp3 and use it when the EEPROM isn't available.
  - Add some delays.
  - Stop the PHY transmitter before patching the DSP code and
    restart it after writing.
  - Save and restore register 0x2f5b.

Sync with Intel's original em driver:
- Add dspcode for igp3 and use it when the EEPROM isn't available.
- Add some delays.
- Stop the PHY transmitter before patching the DSP code and restart it after wrote.
- Save and restore register 0x2f5b.

Re-enable igphy's 82566 support.
 - Patch for the DSP code is only for 8254[17] and we have to apply the
   different patches between rev. 1 and rev. 2.
 - The workaround for analog fuse is only for 82547 rev. 1.
 - The workaround for smartspeed is only for 8254[17]

see http://mail-index.netbsd.org/tech-net/2009/08/05/msg001546.html

sync with head.

Later generation 82566 IGP PHYs have problems with media changes to 100Mb and
10Mb; it appears that the SmartSpeed workaround and dspcode in this PHY are
aimed at earlier generation IGPs.  Remove reference to 82566s, allowing
them to fall through to choose other PHYs.

sync with head.

Sync with HEAD.

Sync with HEAD.

Update haad-dm branch to haad-dm-base2.

Reduce code duplication: most PHY drivers call mii_phy_add_media()
when they attach to the device tree, so call pmf_device_register(9)
once there instead of once in more than twenty drivers.

Sync with HEAD.

sync with head.

sync with head.

device_t/softc split for all mii(4) devices, and other related
cosmetic changes.

Remove clause 3 and 4 from TNF licenses

use aprint_*_dev and device_xname

sync with head

sync with HEAD

Sync with head.

sync with head.

Merge jmcneill-pm branch.

Rename pnp(9) -> pmf(9), as requested by many.

Register MII PHY drives with the PM framework. Nothing to do on suspend,
just reset the PHY on resume.

sync with HEAD

Sync with head.

Sync with HEAD.

sync with head.

Sync with HEAD.

Sync w/ NetBSD-4-RC_1

Pull up following revision(s) (requested by masanobu in ticket #850):

sys/dev/pci/if_wm.c		1.137
sys/dev/pci/if_wm.c		1.138
sys/dev/pci/if_wm.c		1.141
sys/dev/pci/if_wm.c		1.144
sys/dev/pci/if_wmreg.h		1.23
sys/dev/pci/pcidevs		1.893
sys/dev/pci/pcidevs.h		regen
sys/dev/pci/pcidevs_data.h	regen
sys/dev/mii/igphy.c		1.12
sys/dev/mii/miidevs		1.72
sys/dev/mii/miidevs.h		regen
sys/dev/mii/miidevs_data.h	regen
share/man/man4/wm.4		1.18

Fix for 82541 and 82547's reset bug.
Modify wm_reset() to make some device stable.
Add ICH9 support to wm.
Add I82566 support to igphy.

Pulled done via patch.

add I82566

pullup the following revisions (requested by msaitoh in ticket 1681):
	sys/dev/pci/if_wm.c			1.104-1.105, 1.116-1.121,
						1.127,1.133-1.134 via patch
	sys/dev/pci/if_wmreg.h			1.17-1.20
	sys/dev/pci/pcidevs			patch
	sys/dev/mii/igphy.c			1.11
	sys/dev/mii/makphy.c			1.20, 1.23
	sys/dev/mii/ikphy.c			patch
	sys/dev/mii/ikphyreg.h			patch
	sys/dev/mii/miidevs			1.68
	sys/dev/mii/files.mii			1.39
	sys/arch/i386/conf/GENERIC		1.788-1.789 via patch
	sys/arch/i386/conf/GENERIC.MPACPI	patch
	sys/arch/i386/conf/GENERIC_LAPTOP	1.209 via patch
	sys/arch/i386/conf/INSTALL		1.291 via patch
	sys/arch/i386/conf/INSTALL_LAPTOP	1.104 via patch
	sys/arch/i386/conf/XEN2_DOM0		1.13 via patch
	share/man/man4/wm.4			1.14-1.16
Add support for many cards (include PCI-express based chips).
Many bug fixes about auto negotiations (PR#30078, PR#30490,
PR#30906, PR#33429 and PR#35386).
Fix media link issues with fiber-based card (PR#35797).

Pull up revision 1.11 (requested by msaitoh in ticket #514).

fix some negotiation problems on wm(4).

will fix PR#30078, PR#30490, PR#30906, PR#33429, PR#35386.

- sync with head.
- move sched_changepri back to kern_synch.c as it doesn't know PPQ anymore.

sync with head.

fix some negotiation problems on wm(4).

will fix PR#30078, PR#30490, PR#30906, PR#33429, PR#35386.

sync with head.

sync with head.

Sync with head.

- don't hardcode 5, 10 define and use MII_ANEGTICKS{,_GIGE}
- instead of != limit, use <= limit (conservative)

__unused removal on arguments; approved by core.

sync with head

- sprinkle __unused on function decls.
- fix a couple of unused bugs
- no more -Wno-unused for i386

sync with head

sync with head.

Sync with head.

sync with head.

sync with head.

Merge 2006-03-31 NetBSD-current into the "peter-altq" branch.

Use device_private().

merge ktrace-lwp.

Pull up revision 1.5 (requested by thorpej in ticket #897)

Enable the SmartSpeed work-around code for the IGP phy, with some
minor adjustments.

Pull up revision 1.5 (requested by thorpej in ticket #897)

Enable the SmartSpeed work-around code for the IGP phy, with some
minor adjustments.

Sync with HEAD

Enable the SmartSpeed work-around code for the IGP phy, with some
minor adjustments.

Fix the sync with head I botched.

Sync with HEAD.

Sync with HEAD.

Make use of static.

Sync with HEAD

file igphy.c was added on branch ktrace-lwp on 2004-08-03 10:48:49 +0000

gmii_phy_getflowcontrol() -> mii_phy_flowstatus().  From HITOSHI Osada.

Fetch negotiated flow control parameters.  From HITOSHI Osada.

Add a driver for the Intel IGPE1000 PHY as found on 82541 and 82547 chips.
Not yet enabled anywhere.