Annotation of src/sys/dev/isa/gusreg.h, Revision 1.8.72.1
1.8.72.1! yamt 1: /* $NetBSD: gusreg.h,v 1.8 2005/12/11 12:22:02 christos Exp $ */
1.2 jtc 2:
1.1 brezak 3: /*-
1.2 jtc 4: * Copyright (c) 1996 The NetBSD Foundation, Inc.
1.1 brezak 5: * All rights reserved.
6: *
1.2 jtc 7: * This code is derived from software contributed to The NetBSD Foundation
8: * by Ken Hornstein and John Kohl.
1.1 brezak 9: *
10: * Redistribution and use in source and binary forms, with or without
11: * modification, are permitted provided that the following conditions
12: * are met:
13: * 1. Redistributions of source code must retain the above copyright
14: * notice, this list of conditions and the following disclaimer.
15: * 2. Redistributions in binary form must reproduce the above copyright
16: * notice, this list of conditions and the following disclaimer in the
17: * documentation and/or other materials provided with the distribution.
18: *
1.3 jtc 19: * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20: * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21: * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
1.6 jtc 22: * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23: * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
1.3 jtc 24: * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25: * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26: * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27: * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28: * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29: * POSSIBILITY OF SUCH DAMAGE.
1.1 brezak 30: */
31:
32: /*
33: * Register definitions of Gravis UltraSound card
34: */
35:
36: /*
37: * MIDI control registers. Essentially a MC6850 UART. Note the MC6850's
38: * "feature" of having read-only and write-only registers combined on one
39: * address.
40: */
41:
1.5 augustss 42: #define GUS_IOH4_OFFSET 0x100
43: #define GUS_NPORT4 2
44:
45: #define GUS_MIDI_CONTROL (0x100-GUS_IOH4_OFFSET)
46: #define GUS_MIDI_STATUS (0x100-GUS_IOH4_OFFSET)
47: #define GUS_MIDI_READ (0x101-GUS_IOH4_OFFSET)
48: #define GUS_MIDI_WRITE (0x101-GUS_IOH4_OFFSET)
1.1 brezak 49:
50: /*
51: * Joystick interface - note this is an absolute address, NOT an offset from
52: * the GUS base address.
53: */
54:
55: #define GUS_JOYSTICK 0x201
56:
57: /*
58: * GUS control registers
59: */
60:
61: #define GUS_MIX_CONTROL 0x000
62: #define GUS_IRQ_STATUS 0x006
63: #define GUS_TIMER_CONTROL 0x008
64: #define GUS_TIMER_DATA 0x009
65: #define GUS_REG_CONTROL 0x00f /* rev 3.4 or later only: select reg
66: at 2XB */
67: #define GUS_REG_NORMAL 0x00 /* IRQ/DMA as usual */
68: #define GUS_REG_IRQCTL 0x05 /* IRQ ctl: write 0 to clear IRQ state */
69: #define GUS_REG_JUMPER 0x06 /* jumper control: */
70: #define GUS_JUMPER_MIDIEN 0x02 /* bit: enable MIDI ports */
71: #define GUS_JUMPER_JOYEN 0x04 /* bit: enable joystick ports */
72:
73: #define GUS_IRQ_CONTROL 0x00b
74: #define GUS_DMA_CONTROL 0x00b
75: #define GUS_IRQCTL_CONTROL 0x00b
76: #define GUS_JUMPER_CONTROL 0x00b
1.5 augustss 77:
78: #define GUS_NPORT1 16
79:
80: #define GUS_IOH2_OFFSET 0x102
81: #define GUS_VOICE_SELECT (0x102-GUS_IOH2_OFFSET)
82: #define GUS_REG_SELECT (0x103-GUS_IOH2_OFFSET)
83: #define GUS_DATA_LOW (0x104-GUS_IOH2_OFFSET)
84: #define GUS_DATA_HIGH (0x105-GUS_IOH2_OFFSET)
85: /* GUS_MIXER_SELECT 106 */
86: #define GUS_DRAM_DATA (0x107-GUS_IOH2_OFFSET)
87:
88: #define GUS_NPORT2 6
1.1 brezak 89:
90: /*
91: * GUS on-board global registers
92: */
93:
94: #define GUSREG_DMA_CONTROL 0x41
95: #define GUSREG_DMA_START 0x42
96: #define GUSREG_DRAM_ADDR_LOW 0x43
97: #define GUSREG_DRAM_ADDR_HIGH 0x44
98: #define GUSREG_TIMER_CONTROL 0x45
99: #define GUSREG_TIMER1_COUNT 0x46 /* count-up, then interrupt, 80usec */
100: #define GUSREG_TIMER2_COUNT 0x47 /* count-up, then interrupt, 320usec */
101: #define GUSREG_SAMPLE_FREQ 0x48 /* 9878400/(16*(rate+2)) */
102: #define GUSREG_SAMPLE_CONTROL 0x49
103: #define GUSREG_JOYSTICK_TRIM 0x4b
104: #define GUSREG_RESET 0x4c
105:
106: /*
107: * GUS voice specific registers (some of which aren't!). Add 0x80 to these
108: * registers for reads
109: */
110:
111: #define GUSREG_READ 0x80
112: #define GUSREG_VOICE_CNTL 0x00
113: #define GUSREG_FREQ_CONTROL 0x01
114: #define GUSREG_START_ADDR_HIGH 0x02
115: #define GUSREG_START_ADDR_LOW 0x03
116: #define GUSREG_END_ADDR_HIGH 0x04
117: #define GUSREG_END_ADDR_LOW 0x05
118: #define GUSREG_VOLUME_RATE 0x06
119: #define GUSREG_START_VOLUME 0x07
120: #define GUSREG_END_VOLUME 0x08
121: #define GUSREG_CUR_VOLUME 0x09
122: #define GUSREG_CUR_ADDR_HIGH 0x0a
123: #define GUSREG_CUR_ADDR_LOW 0x0b
124: #define GUSREG_PAN_POS 0x0c
125: #define GUSREG_VOLUME_CONTROL 0x0d
126: #define GUSREG_ACTIVE_VOICES 0x0e /* voice-independent:set voice count */
127: #define GUSREG_IRQ_STATUS 0x8f /* voice-independent */
128:
129: #define GUS_PAN_FULL_LEFT 0x0
130: #define GUS_PAN_FULL_RIGHT 0xf
131:
132: /*
133: * GUS Bitmasks for reset register
134: */
135:
136: #define GUSMASK_MASTER_RESET 0x01
137: #define GUSMASK_DAC_ENABLE 0x02
138: #define GUSMASK_IRQ_ENABLE 0x04
139:
140: /*
141: * Bitmasks for IRQ status port
142: */
143:
144: #define GUSMASK_IRQ_MIDIXMIT 0x01 /* MIDI transmit IRQ */
145: #define GUSMASK_IRQ_MIDIRCVR 0x02 /* MIDI received IRQ */
146: #define GUSMASK_IRQ_TIMER1 0x04 /* timer 1 IRQ */
147: #define GUSMASK_IRQ_TIMER2 0x08 /* timer 2 IRQ */
148: #define GUSMASK_IRQ_RESERVED 0x10 /* Reserved (set to 0) */
149: #define GUSMASK_IRQ_VOICE 0x20 /* Wavetable IRQ (any voice) */
150: #define GUSMASK_IRQ_VOLUME 0x40 /* Volume ramp IRQ (any voc) */
151: #define GUSMASK_IRQ_DMATC 0x80 /* DMA transfer complete */
152:
153: /*
154: * Bitmasks for sampling control register
155: */
156: #define GUSMASK_SAMPLE_START 0x01 /* start sampling */
157: #define GUSMASK_SAMPLE_STEREO 0x02 /* mono or stereo */
158: #define GUSMASK_SAMPLE_DATA16 0x04 /* 16-bit DMA channel */
159: #define GUSMASK_SAMPLE_IRQ 0x20 /* enable IRQ */
160: #define GUSMASK_SAMPLE_DMATC 0x40 /* DMA transfer complete */
161: #define GUSMASK_SAMPLE_INVBIT 0x80 /* invert MSbit */
162:
163: /*
164: * Bitmasks for IRQ status register (different than IRQ status _port_ - the
165: * register is internal to the GUS)
166: */
167:
168: #define GUSMASK_WIRQ_VOLUME 0x40 /* Flag for volume interrupt */
169: #define GUSMASK_WIRQ_VOICE 0x80 /* Flag for voice interrupt */
170: #define GUSMASK_WIRQ_VOICEMASK 0x1f /* Bits holding voice # */
171:
172: /*
173: * GUS bitmasks for built-in mixer control (separate from the ICS or CS chips)
174: */
175:
176: #define GUSMASK_LINE_IN 0x01 /* 0=enable */
177: #define GUSMASK_LINE_OUT 0x02 /* 0=enable */
178: #define GUSMASK_MIC_IN 0x04 /* 1=enable */
179: #define GUSMASK_LATCHES 0x08 /* enable IRQ latches */
180: #define GUSMASK_COMBINE 0x10 /* combine Ch 1 IRQ & Ch 2 (MIDI) */
181: #define GUSMASK_MIDI_LOOPBACK 0x20 /* MIDI loopback */
182: #define GUSMASK_CONTROL_SEL 0x40 /* Select control register */
183:
184: #define GUSMASK_BOTH_RQ 0x40 /* Combine both RQ lines */
185:
186: /*
187: * GUS bitmaks for DMA control
188: */
189:
190: #define GUSMASK_DMA_ENABLE 0x01 /* Enable DMA transfer */
191: #define GUSMASK_DMA_READ 0x02 /* 1=read, 0=write */
192: #define GUSMASK_DMA_WRITE 0x00 /* for consistancy */
193: #define GUSMASK_DMA_WIDTH 0x04 /* Data transfer width */
194: #define GUSMASK_DMA_R0 0x00 /* Various DMA speeds */
195: #define GUSMASK_DMA_R1 0x08
196: #define GUSMASK_DMA_R2 0x10
197: #define GUSMASK_DMA_R3 0x18
198: #define GUSMASK_DMA_IRQ 0x20 /* Enable DMA to IRQ */
199: #define GUSMASK_DMA_IRQPEND 0x40 /* DMA IRQ pending */
200: #define GUSMASK_DMA_DATA_SIZE 0x40 /* 0=8 bit, 1=16 bit */
201: #define GUSMASK_DMA_INVBIT 0x80 /* invert high bit */
202:
203: /*
204: * GUS bitmasks for voice control
205: */
206:
207: #define GUSMASK_VOICE_STOPPED 0x01 /* The voice is stopped */
208: #define GUSMASK_STOP_VOICE 0x02 /* Force voice to stop */
209: #define GUSMASK_DATA_SIZE16 0x04 /* 1=16 bit, 0=8 bit data */
210: #define GUSMASK_LOOP_ENABLE 0x08 /* Loop voice at end */
211: #define GUSMASK_VOICE_BIDIR 0x10 /* Bi-directional looping */
212: #define GUSMASK_VOICE_IRQ 0x20 /* Enable the voice IRQ */
213: #define GUSMASK_INCR_DIR 0x40 /* Direction of address incr */
214: #define GUSMASK_VOICE_IRQPEND 0x80 /* Pending IRQ for voice */
215:
216: /*
217: * Bitmasks for volume control
218: */
219:
220: #define GUSMASK_VOLUME_STOPPED 0x01 /* Volume ramping stopped */
221: #define GUSMASK_STOP_VOLUME 0x02 /* Manually stop volume */
222: #define GUSMASK_VOICE_ROLL 0x04 /* Roll over/low water condition */
223: #define GUSMASK_VOLUME_LOOP 0x08 /* Volume ramp looping */
224: #define GUSMASK_VOLUME_BIDIR 0x10 /* Bi-dir volume looping */
225: #define GUSMASK_VOLUME_IRQ 0x20 /* IRQ on end of volume ramp */
226: #define GUSMASK_VOLUME_DIR 0x40 /* Direction of volume ramp */
227: #define GUSMASK_VOLUME_IRQPEND 0x80 /* Pending volume IRQ */
228: #define MIDI_RESET 0x03
229:
230: /*
231: * ICS Mixer registers
232: */
233:
1.5 augustss 234: #define GUS_IOH3_OFFSET 0x506
235: #define GUS_NPORT3 1
236:
237: #define GUS_MIXER_SELECT (0x506-GUS_IOH3_OFFSET) /* read=board rev, wr=mixer */
238: #define GUS_BOARD_REV (0x506-GUS_IOH3_OFFSET)
239: #define GUS_MIXER_DATA (0x106-GUS_IOH2_OFFSET) /* data for mixer control */
1.1 brezak 240:
241: #define GUSMIX_CHAN_MIC ICSMIX_CHAN_0
242: #define GUSMIX_CHAN_LINE ICSMIX_CHAN_1
243: #define GUSMIX_CHAN_CD ICSMIX_CHAN_2
244: #define GUSMIX_CHAN_DAC ICSMIX_CHAN_3
245: #define GUSMIX_CHAN_MASTER ICSMIX_CHAN_5
246:
247: /*
248: * Codec/Mixer registers
249: */
250:
1.4 mikel 251: #define GUS_MAX_CODEC_BASE 0x10C
252: #define GUS_DAUGHTER_CODEC_BASE 0x530
253: #define GUS_DAUGHTER_CODEC_BASE2 0x604
254: #define GUS_DAUGHTER_CODEC_BASE3 0xE80
255: #define GUS_DAUGHTER_CODEC_BASE4 0xF40
256:
257: #define GUS_CODEC_SELECT 0
258: #define GUS_CODEC_DATA 1
259: #define GUS_CODEC_STATUS 2
260: #define GUS_CODEC_PIO 3
1.1 brezak 261:
262: #define GUS_MAX_CTRL 0x106
263: #define GUS_MAX_BASEBITS 0xf /* sets middle nibble of 3X6 */
264: #define GUS_MAX_RECCHAN16 0x10 /* 0=8bit DMA read, 1=16bit DMA read */
265: #define GUS_MAX_PLAYCHAN16 0x20 /* 0=8bit, 1=16bit */
266: #define GUS_MAX_CODEC_ENABLE 0x40 /* 0=disable, 1=enable */
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