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Annotation of src/sys/dev/ic/wdc.c, Revision 1.66.2.3

1.66.2.3! he          1: /*     $NetBSD: wdc.c,v 1.66.2.2 1999/06/24 00:06:01 perry Exp $ */
1.31      bouyer      2:
                      3:
                      4: /*
                      5:  * Copyright (c) 1998 Manuel Bouyer.  All rights reserved.
                      6:  *
                      7:  * Redistribution and use in source and binary forms, with or without
                      8:  * modification, are permitted provided that the following conditions
                      9:  * are met:
                     10:  * 1. Redistributions of source code must retain the above copyright
                     11:  *    notice, this list of conditions and the following disclaimer.
                     12:  * 2. Redistributions in binary form must reproduce the above copyright
                     13:  *    notice, this list of conditions and the following disclaimer in the
                     14:  *    documentation and/or other materials provided with the distribution.
                     15:  * 3. All advertising materials mentioning features or use of this software
                     16:  *    must display the following acknowledgement:
                     17:  *  This product includes software developed by Manuel Bouyer.
                     18:  * 4. The name of the author may not be used to endorse or promote products
                     19:  *    derived from this software without specific prior written permission.
                     20:  *
                     21:  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
                     22:  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
                     23:  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
                     24:  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
                     25:  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
                     26:  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
                     27:  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
                     28:  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
                     29:  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
                     30:  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
                     31:  */
1.2       bouyer     32:
1.27      mycroft    33: /*-
                     34:  * Copyright (c) 1998 The NetBSD Foundation, Inc.
                     35:  * All rights reserved.
1.2       bouyer     36:  *
1.27      mycroft    37:  * This code is derived from software contributed to The NetBSD Foundation
                     38:  * by Charles M. Hannum, by Onno van der Linden and by Manuel Bouyer.
1.12      cgd        39:  *
1.2       bouyer     40:  * Redistribution and use in source and binary forms, with or without
                     41:  * modification, are permitted provided that the following conditions
                     42:  * are met:
                     43:  * 1. Redistributions of source code must retain the above copyright
                     44:  *    notice, this list of conditions and the following disclaimer.
                     45:  * 2. Redistributions in binary form must reproduce the above copyright
                     46:  *    notice, this list of conditions and the following disclaimer in the
                     47:  *    documentation and/or other materials provided with the distribution.
                     48:  * 3. All advertising materials mentioning features or use of this software
                     49:  *    must display the following acknowledgement:
1.27      mycroft    50:  *        This product includes software developed by the NetBSD
                     51:  *        Foundation, Inc. and its contributors.
                     52:  * 4. Neither the name of The NetBSD Foundation nor the names of its
                     53:  *    contributors may be used to endorse or promote products derived
                     54:  *    from this software without specific prior written permission.
1.2       bouyer     55:  *
1.27      mycroft    56:  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
                     57:  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
                     58:  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
                     59:  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
                     60:  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
                     61:  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
                     62:  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
                     63:  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
                     64:  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
                     65:  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
                     66:  * POSSIBILITY OF SUCH DAMAGE.
1.2       bouyer     67:  */
                     68:
1.12      cgd        69: /*
                     70:  * CODE UNTESTED IN THE CURRENT REVISION:
1.31      bouyer     71:  *
1.12      cgd        72:  */
                     73:
1.59      hubertf    74: #ifndef WDCDEBUG
1.31      bouyer     75: #define WDCDEBUG
1.59      hubertf    76: #endif /* WDCDEBUG */
1.31      bouyer     77:
1.2       bouyer     78: #include <sys/param.h>
                     79: #include <sys/systm.h>
                     80: #include <sys/kernel.h>
                     81: #include <sys/conf.h>
                     82: #include <sys/buf.h>
1.31      bouyer     83: #include <sys/device.h>
1.2       bouyer     84: #include <sys/malloc.h>
                     85: #include <sys/syslog.h>
                     86: #include <sys/proc.h>
                     87:
                     88: #include <vm/vm.h>
                     89:
                     90: #include <machine/intr.h>
                     91: #include <machine/bus.h>
                     92:
1.17      sakamoto   93: #ifndef __BUS_SPACE_HAS_STREAM_METHODS
1.31      bouyer     94: #define bus_space_write_multi_stream_2 bus_space_write_multi_2
                     95: #define bus_space_write_multi_stream_4 bus_space_write_multi_4
                     96: #define bus_space_read_multi_stream_2  bus_space_read_multi_2
                     97: #define bus_space_read_multi_stream_4  bus_space_read_multi_4
1.17      sakamoto   98: #endif /* __BUS_SPACE_HAS_STREAM_METHODS */
1.16      sakamoto   99:
1.31      bouyer    100: #include <dev/ata/atavar.h>
                    101: #include <dev/ata/atareg.h>
1.12      cgd       102: #include <dev/ic/wdcreg.h>
                    103: #include <dev/ic/wdcvar.h>
1.31      bouyer    104:
1.2       bouyer    105: #include "atapibus.h"
                    106:
1.31      bouyer    107: #define WDCDELAY  100 /* 100 microseconds */
                    108: #define WDCNDELAY_RST (WDC_RESET_WAIT * 1000 / WDCDELAY)
1.2       bouyer    109: #if 0
1.31      bouyer    110: /* If you enable this, it will report any delays more than WDCDELAY * N long. */
1.2       bouyer    111: #define WDCNDELAY_DEBUG        50
                    112: #endif
                    113:
                    114: LIST_HEAD(xfer_free_list, wdc_xfer) xfer_free_list;
                    115:
1.31      bouyer    116: static void  __wdcerror          __P((struct channel_softc*, char *));
                    117: static int   __wdcwait_reset  __P((struct channel_softc *, int));
                    118: void  __wdccommand_done __P((struct channel_softc *, struct wdc_xfer *));
                    119: void  __wdccommand_start __P((struct channel_softc *, struct wdc_xfer *));
1.66      bouyer    120: int   __wdccommand_intr __P((struct channel_softc *, struct wdc_xfer *, int));
1.31      bouyer    121: int   wdprint __P((void *, const char *));
                    122:
                    123:
                    124: #define DEBUG_INTR   0x01
                    125: #define DEBUG_XFERS  0x02
                    126: #define DEBUG_STATUS 0x04
                    127: #define DEBUG_FUNCS  0x08
                    128: #define DEBUG_PROBE  0x10
                    129: #ifdef WDCDEBUG
1.32      bouyer    130: int wdcdebug_mask = 0;
1.31      bouyer    131: int wdc_nxfer = 0;
                    132: #define WDCDEBUG_PRINT(args, level)  if (wdcdebug_mask & (level)) printf args
1.2       bouyer    133: #else
1.31      bouyer    134: #define WDCDEBUG_PRINT(args, level)
1.2       bouyer    135: #endif
                    136:
1.31      bouyer    137: int
                    138: wdprint(aux, pnp)
                    139:        void *aux;
                    140:        const char *pnp;
                    141: {
                    142:        struct ata_atapi_attach *aa_link = aux;
                    143:        if (pnp)
                    144:                printf("drive at %s", pnp);
                    145:        printf(" channel %d drive %d", aa_link->aa_channel,
                    146:            aa_link->aa_drv_data->drive);
                    147:        return (UNCONF);
                    148: }
1.2       bouyer    149:
1.31      bouyer    150: int
                    151: atapi_print(aux, pnp)
                    152:        void *aux;
                    153:        const char *pnp;
                    154: {
                    155:        struct ata_atapi_attach *aa_link = aux;
                    156:        if (pnp)
                    157:                printf("atapibus at %s", pnp);
                    158:        printf(" channel %d", aa_link->aa_channel);
                    159:        return (UNCONF);
                    160: }
                    161:
                    162: /* Test to see controller with at last one attached drive is there.
                    163:  * Returns a bit for each possible drive found (0x01 for drive 0,
                    164:  * 0x02 for drive 1).
                    165:  * Logic:
                    166:  * - If a status register is at 0xff, assume there is no drive here
                    167:  *   (ISA has pull-up resistors). If no drive at all -> return.
                    168:  * - reset the controller, wait for it to complete (may take up to 31s !).
                    169:  *   If timeout -> return.
                    170:  * - test ATA/ATAPI signatures. If at last one drive found -> return.
                    171:  * - try an ATA command on the master.
1.12      cgd       172:  */
1.31      bouyer    173:
1.2       bouyer    174: int
1.31      bouyer    175: wdcprobe(chp)
                    176:        struct channel_softc *chp;
1.12      cgd       177: {
1.31      bouyer    178:        u_int8_t st0, st1, sc, sn, cl, ch;
                    179:        u_int8_t ret_value = 0x03;
                    180:        u_int8_t drive;
                    181:
                    182:        /*
                    183:         * Sanity check to see if the wdc channel responds at all.
                    184:         */
                    185:
1.43      kenh      186:        if (chp->wdc == NULL ||
                    187:            (chp->wdc->cap & WDC_CAPABILITY_NO_EXTRA_RESETS) == 0) {
                    188:                bus_space_write_1(chp->cmd_iot, chp->cmd_ioh, wd_sdh,
                    189:                    WDSD_IBM);
1.65      bouyer    190:                delay(10);
1.43      kenh      191:                st0 = bus_space_read_1(chp->cmd_iot, chp->cmd_ioh, wd_status);
                    192:                bus_space_write_1(chp->cmd_iot, chp->cmd_ioh, wd_sdh,
                    193:                    WDSD_IBM | 0x10);
1.65      bouyer    194:                delay(10);
1.43      kenh      195:                st1 = bus_space_read_1(chp->cmd_iot, chp->cmd_ioh, wd_status);
                    196:
                    197:                WDCDEBUG_PRINT(("%s:%d: before reset, st0=0x%x, st1=0x%x\n",
                    198:                    chp->wdc ? chp->wdc->sc_dev.dv_xname : "wdcprobe",
                    199:                    chp->channel, st0, st1), DEBUG_PROBE);
                    200:
                    201:                if (st0 == 0xff)
                    202:                        ret_value &= ~0x01;
                    203:                if (st1 == 0xff)
                    204:                        ret_value &= ~0x02;
                    205:                if (ret_value == 0)
                    206:                        return 0;
                    207:        }
1.42      thorpej   208:
1.31      bouyer    209:        /* assert SRST, wait for reset to complete */
                    210:        bus_space_write_1(chp->cmd_iot, chp->cmd_ioh, wd_sdh,
                    211:            WDSD_IBM);
1.65      bouyer    212:        delay(10);
1.31      bouyer    213:        bus_space_write_1(chp->ctl_iot, chp->ctl_ioh, wd_aux_ctlr,
                    214:            WDCTL_RST | WDCTL_IDS);
                    215:        DELAY(1000);
                    216:        bus_space_write_1(chp->ctl_iot, chp->ctl_ioh, wd_aux_ctlr,
                    217:            WDCTL_IDS);
                    218:        delay(1000);
                    219:        (void) bus_space_read_1(chp->cmd_iot, chp->cmd_ioh, wd_error);
                    220:        bus_space_write_1(chp->ctl_iot, chp->ctl_ioh, wd_aux_ctlr, WDCTL_4BIT);
1.65      bouyer    221:        delay(10);
1.31      bouyer    222:
                    223:        ret_value = __wdcwait_reset(chp, ret_value);
                    224:        WDCDEBUG_PRINT(("%s:%d: after reset, ret_value=0x%d\n",
                    225:            chp->wdc ? chp->wdc->sc_dev.dv_xname : "wdcprobe", chp->channel,
                    226:            ret_value), DEBUG_PROBE);
1.26      drochner  227:
1.31      bouyer    228:        /* if reset failed, there's nothing here */
                    229:        if (ret_value == 0)
                    230:                return 0;
1.2       bouyer    231:
1.31      bouyer    232:        /*
                    233:         * Test presence of drives. First test register signatures looking for
1.66.2.1  bouyer    234:         * ATAPI devices. If it's not an ATAPI and reset said there may be
                    235:         * something here assume it's ATA or OLD. Ghost will be killed later in
                    236:         * attach routine.
1.31      bouyer    237:         */
                    238:        for (drive = 0; drive < 2; drive++) {
                    239:                if ((ret_value & (0x01 << drive)) == 0)
                    240:                        continue;
                    241:                bus_space_write_1(chp->cmd_iot, chp->cmd_ioh, wd_sdh,
                    242:                    WDSD_IBM | (drive << 4));
1.65      bouyer    243:                delay(10);
1.31      bouyer    244:                /* Save registers contents */
                    245:                sc = bus_space_read_1(chp->cmd_iot, chp->cmd_ioh, wd_seccnt);
                    246:                sn = bus_space_read_1(chp->cmd_iot, chp->cmd_ioh, wd_sector);
                    247:                cl = bus_space_read_1(chp->cmd_iot, chp->cmd_ioh, wd_cyl_lo);
                    248:                ch = bus_space_read_1(chp->cmd_iot, chp->cmd_ioh, wd_cyl_hi);
                    249:
                    250:                WDCDEBUG_PRINT(("%s:%d:%d: after reset, sc=0x%x sn=0x%x "
                    251:                    "cl=0x%x ch=0x%x\n",
                    252:                    chp->wdc ? chp->wdc->sc_dev.dv_xname : "wdcprobe",
                    253:                    chp->channel, drive, sc, sn, cl, ch), DEBUG_PROBE);
1.57      bouyer    254:                /*
                    255:                 * sc is supposted to be 0x1 for ATAPI but at last one drive
1.66.2.1  bouyer    256:                 * set it to 0x0 - or maybe it's the controller.
1.57      bouyer    257:                 */
                    258:                if ((sc == 0x00 || sc == 0x01) && sn == 0x01 &&
                    259:                    cl == 0x14 && ch == 0xeb) {
1.31      bouyer    260:                        chp->ch_drive[drive].drive_flags |= DRIVE_ATAPI;
1.7       bouyer    261:                } else {
1.66.2.1  bouyer    262:                        chp->ch_drive[drive].drive_flags |= DRIVE_ATA;
                    263:                        if (chp->wdc == NULL ||
                    264:                            (chp->wdc->cap & WDC_CAPABILITY_PREATA) != 0)
                    265:                                chp->ch_drive[drive].drive_flags |= DRIVE_OLD;
1.2       bouyer    266:                }
1.7       bouyer    267:        }
1.31      bouyer    268:        return (ret_value);
                    269: }
                    270:
                    271: void
                    272: wdcattach(chp)
                    273:        struct channel_softc *chp;
                    274: {
1.44      thorpej   275:        int channel_flags, ctrl_flags, i, error;
1.31      bouyer    276:        struct ata_atapi_attach aa_link;
1.62      bouyer    277:        struct ataparams params;
                    278:        static int inited = 0;
1.31      bouyer    279:
1.44      thorpej   280:        if ((error = wdc_addref(chp)) != 0) {
                    281:                printf("%s: unable to enable controller\n",
                    282:                    chp->wdc->sc_dev.dv_xname);
                    283:                return;
                    284:        }
                    285:
                    286:        if (wdcprobe(chp) == 0) {
                    287:                /* If no drives, abort attach here. */
                    288:                wdc_delref(chp);
                    289:                return;
                    290:        }
1.31      bouyer    291:
1.62      bouyer    292:        /* init list only once */
                    293:        if (inited == 0) {
                    294:                LIST_INIT(&xfer_free_list);
                    295:                inited++;
                    296:        }
1.31      bouyer    297:        TAILQ_INIT(&chp->ch_queue->sc_xfer);
1.62      bouyer    298:
                    299:        for (i = 0; i < 2; i++) {
                    300:                chp->ch_drive[i].chnl_softc = chp;
                    301:                chp->ch_drive[i].drive = i;
                    302:                /* If controller can't do 16bit flag the drives as 32bit */
                    303:                if ((chp->wdc->cap &
                    304:                    (WDC_CAPABILITY_DATA16 | WDC_CAPABILITY_DATA32)) ==
                    305:                    WDC_CAPABILITY_DATA32)
                    306:                        chp->ch_drive[i].drive_flags |= DRIVE_CAP32;
1.66.2.1  bouyer    307:                if ((chp->ch_drive[i].drive_flags & DRIVE) == 0)
                    308:                        continue;
1.62      bouyer    309:
                    310:                /* Issue a IDENTIFY command, to try to detect slave ghost */
1.66.2.1  bouyer    311:                if (ata_get_params(&chp->ch_drive[i], AT_POLL, &params) ==
1.62      bouyer    312:                    CMD_OK) {
1.66.2.1  bouyer    313:                        /* If IDENTIFY succeded, this is not an OLD ctrl */
                    314:                        chp->ch_drive[0].drive_flags &= ~DRIVE_OLD;
                    315:                        chp->ch_drive[1].drive_flags &= ~DRIVE_OLD;
                    316:                } else {
1.62      bouyer    317:                        chp->ch_drive[i].drive_flags &=
                    318:                            ~(DRIVE_ATA | DRIVE_ATAPI);
1.66.2.1  bouyer    319:                        WDCDEBUG_PRINT(("%s:%d:%d: IDENTIFY failed\n",
                    320:                            chp->wdc->sc_dev.dv_xname,
                    321:                            chp->channel, i), DEBUG_PROBE);
                    322:                        if ((chp->ch_drive[i].drive_flags & DRIVE_OLD) == 0)
                    323:                                continue;
1.66.2.2  perry     324:                        /*
                    325:                         * Pre-ATA drive ?
                    326:                         * Test registers writability (Error register not
                    327:                         * writable, but cyllo is), then try an ATA command.
                    328:                         */
                    329:                        bus_space_write_1(chp->cmd_iot, chp->cmd_ioh, wd_sdh,
                    330:                            WDSD_IBM | (i << 4));
                    331:                        delay(10);
                    332:                        bus_space_write_1(chp->cmd_iot, chp->cmd_ioh,
                    333:                            wd_error, 0x58);
                    334:                        bus_space_write_1(chp->cmd_iot, chp->cmd_ioh,
                    335:                            wd_cyl_lo, 0xa5);
                    336:                        if (bus_space_read_1(chp->cmd_iot, chp->cmd_ioh,
                    337:                                wd_error == 0x58) ||
                    338:                            bus_space_read_1(chp->cmd_iot, chp->cmd_ioh,
                    339:                                wd_cyl_lo) != 0xa5) {
                    340:                                WDCDEBUG_PRINT(("%s:%d:%d: register "
                    341:                                    "writability failed\n",
                    342:                                    chp->wdc->sc_dev.dv_xname,
                    343:                                    chp->channel, i), DEBUG_PROBE);
                    344:                                    chp->ch_drive[i].drive_flags &= ~DRIVE_OLD;
                    345:                        }
1.66.2.1  bouyer    346:                        bus_space_write_1(chp->cmd_iot, chp->cmd_ioh, wd_sdh,
                    347:                            WDSD_IBM | (i << 4));
                    348:                        delay(100);
                    349:                        if (wait_for_ready(chp, 10000) != 0) {
                    350:                                WDCDEBUG_PRINT(("%s:%d:%d: not ready\n",
                    351:                                    chp->wdc->sc_dev.dv_xname,
                    352:                                    chp->channel, i), DEBUG_PROBE);
                    353:                                chp->ch_drive[i].drive_flags &= ~DRIVE_OLD;
                    354:                                continue;
                    355:                        }
                    356:                        bus_space_write_1(chp->cmd_iot, chp->cmd_ioh,
                    357:                            wd_command, WDCC_RECAL);
                    358:                        if (wait_for_ready(chp, 10000) != 0) {
                    359:                                WDCDEBUG_PRINT(("%s:%d:%d: WDCC_RECAL failed\n",
                    360:                                    chp->wdc->sc_dev.dv_xname,
                    361:                                    chp->channel, i), DEBUG_PROBE);
                    362:                                chp->ch_drive[i].drive_flags &= ~DRIVE_OLD;
                    363:                        }
1.62      bouyer    364:                }
                    365:        }
1.31      bouyer    366:        ctrl_flags = chp->wdc->sc_dev.dv_cfdata->cf_flags;
                    367:        channel_flags = (ctrl_flags >> (NBBY * chp->channel)) & 0xff;
                    368:
                    369:        WDCDEBUG_PRINT(("wdcattach: ch_drive_flags 0x%x 0x%x\n",
                    370:            chp->ch_drive[0].drive_flags, chp->ch_drive[1].drive_flags),
                    371:            DEBUG_PROBE);
1.12      cgd       372:
1.66.2.1  bouyer    373:        /* If no drives, abort here */
                    374:        if ((chp->ch_drive[0].drive_flags & DRIVE) == 0 &&
                    375:            (chp->ch_drive[1].drive_flags & DRIVE) == 0)
                    376:                return;
                    377:
1.12      cgd       378:        /*
1.31      bouyer    379:         * Attach an ATAPI bus, if needed.
1.12      cgd       380:         */
1.31      bouyer    381:        if ((chp->ch_drive[0].drive_flags & DRIVE_ATAPI) ||
                    382:            (chp->ch_drive[1].drive_flags & DRIVE_ATAPI)) {
                    383: #if NATAPIBUS > 0
                    384:                wdc_atapibus_attach(chp);
                    385: #else
                    386:                /*
                    387:                 * Fills in a fake aa_link and call config_found, so that
                    388:                 * the config machinery will print
                    389:                 * "atapibus at xxx not configured"
                    390:                 */
                    391:                memset(&aa_link, 0, sizeof(struct ata_atapi_attach));
                    392:                aa_link.aa_type = T_ATAPI;
                    393:                aa_link.aa_channel = chp->channel;
                    394:                aa_link.aa_openings = 1;
                    395:                aa_link.aa_drv_data = 0;
                    396:                aa_link.aa_bus_private = NULL;
                    397:                (void)config_found(&chp->wdc->sc_dev, (void *)&aa_link,
                    398:                    atapi_print);
                    399: #endif
                    400:        }
                    401:
                    402:        for (i = 0; i < 2; i++) {
1.66.2.1  bouyer    403:                if ((chp->ch_drive[i].drive_flags &
                    404:                    (DRIVE_ATA | DRIVE_OLD)) == 0) {
1.31      bouyer    405:                        continue;
                    406:                }
                    407:                memset(&aa_link, 0, sizeof(struct ata_atapi_attach));
                    408:                aa_link.aa_type = T_ATA;
                    409:                aa_link.aa_channel = chp->channel;
                    410:                aa_link.aa_openings = 1;
                    411:                aa_link.aa_drv_data = &chp->ch_drive[i];
                    412:                if (config_found(&chp->wdc->sc_dev, (void *)&aa_link, wdprint))
                    413:                        wdc_probe_caps(&chp->ch_drive[i]);
1.32      bouyer    414:        }
                    415:
                    416:        /*
                    417:         * reset drive_flags for unnatached devices, reset state for attached
                    418:         *  ones
                    419:         */
                    420:        for (i = 0; i < 2; i++) {
                    421:                if (chp->ch_drive[i].drv_softc == NULL)
                    422:                        chp->ch_drive[i].drive_flags = 0;
                    423:                else
                    424:                        chp->ch_drive[i].state = 0;
1.2       bouyer    425:        }
1.12      cgd       426:
                    427:        /*
1.31      bouyer    428:         * Reset channel. The probe, with some combinations of ATA/ATAPI
                    429:         * devices keep it in a mostly working, but strange state (with busy
                    430:         * led on)
1.12      cgd       431:         */
1.31      bouyer    432:        if ((chp->wdc->cap & WDC_CAPABILITY_NO_EXTRA_RESETS) == 0) {
                    433:                wdcreset(chp, VERBOSE);
                    434:                /*
                    435:                 * Read status registers to avoid spurious interrupts.
                    436:                 */
                    437:                for (i = 1; i >= 0; i--) {
                    438:                        if (chp->ch_drive[i].drive_flags & DRIVE) {
                    439:                                bus_space_write_1(chp->cmd_iot, chp->cmd_ioh,
                    440:                                    wd_sdh, WDSD_IBM | (i << 4));
                    441:                                if (wait_for_unbusy(chp, 10000) < 0)
                    442:                                        printf("%s:%d:%d: device busy\n",
                    443:                                            chp->wdc->sc_dev.dv_xname,
                    444:                                            chp->channel, i);
                    445:                        }
                    446:                }
                    447:        }
1.44      thorpej   448:        wdc_delref(chp);
1.31      bouyer    449: }
                    450:
                    451: /*
                    452:  * Start I/O on a controller, for the given channel.
                    453:  * The first xfer may be not for our channel if the channel queues
                    454:  * are shared.
                    455:  */
                    456: void
1.45      drochner  457: wdcstart(chp)
                    458:        struct channel_softc *chp;
1.31      bouyer    459: {
                    460:        struct wdc_xfer *xfer;
1.38      bouyer    461:
                    462: #ifdef WDC_DIAGNOSTIC
                    463:        int spl1, spl2;
                    464:
                    465:        spl1 = splbio();
                    466:        spl2 = splbio();
                    467:        if (spl2 != spl1) {
                    468:                printf("wdcstart: not at splbio()\n");
                    469:                panic("wdcstart");
                    470:        }
                    471:        splx(spl2);
                    472:        splx(spl1);
                    473: #endif /* WDC_DIAGNOSTIC */
1.12      cgd       474:
1.31      bouyer    475:        /* is there a xfer ? */
1.45      drochner  476:        if ((xfer = chp->ch_queue->sc_xfer.tqh_first) == NULL)
1.31      bouyer    477:                return;
1.47      bouyer    478:
                    479:        /* adjust chp, in case we have a shared queue */
1.49      bouyer    480:        chp = xfer->chp;
1.47      bouyer    481:
1.31      bouyer    482:        if ((chp->ch_flags & WDCF_ACTIVE) != 0 ) {
                    483:                return; /* channel aleady active */
                    484:        }
                    485: #ifdef DIAGNOSTIC
                    486:        if ((chp->ch_flags & WDCF_IRQ_WAIT) != 0)
                    487:                panic("wdcstart: channel waiting for irq\n");
                    488: #endif
1.45      drochner  489:        if (chp->wdc->cap & WDC_CAPABILITY_HWLOCK)
                    490:                if (!(*chp->wdc->claim_hw)(chp, 0))
1.31      bouyer    491:                        return;
1.12      cgd       492:
1.31      bouyer    493:        WDCDEBUG_PRINT(("wdcstart: xfer %p channel %d drive %d\n", xfer,
1.49      bouyer    494:            chp->channel, xfer->drive), DEBUG_XFERS);
1.31      bouyer    495:        chp->ch_flags |= WDCF_ACTIVE;
1.37      bouyer    496:        if (chp->ch_drive[xfer->drive].drive_flags & DRIVE_RESET) {
                    497:                chp->ch_drive[xfer->drive].drive_flags &= ~DRIVE_RESET;
                    498:                chp->ch_drive[xfer->drive].state = 0;
                    499:        }
1.31      bouyer    500:        xfer->c_start(chp, xfer);
                    501: }
1.2       bouyer    502:
1.31      bouyer    503: /* restart an interrupted I/O */
                    504: void
                    505: wdcrestart(v)
                    506:        void *v;
                    507: {
                    508:        struct channel_softc *chp = v;
                    509:        int s;
1.2       bouyer    510:
1.31      bouyer    511:        s = splbio();
1.45      drochner  512:        wdcstart(chp);
1.31      bouyer    513:        splx(s);
1.2       bouyer    514: }
1.31      bouyer    515:
1.2       bouyer    516:
1.31      bouyer    517: /*
                    518:  * Interrupt routine for the controller.  Acknowledge the interrupt, check for
                    519:  * errors on the current operation, mark it done if necessary, and start the
                    520:  * next request.  Also check for a partially done transfer, and continue with
                    521:  * the next chunk if so.
                    522:  */
1.12      cgd       523: int
1.31      bouyer    524: wdcintr(arg)
                    525:        void *arg;
1.12      cgd       526: {
1.31      bouyer    527:        struct channel_softc *chp = arg;
                    528:        struct wdc_xfer *xfer;
1.12      cgd       529:
1.31      bouyer    530:        if ((chp->ch_flags & WDCF_IRQ_WAIT) == 0) {
                    531:                WDCDEBUG_PRINT(("wdcintr: inactive controller\n"), DEBUG_INTR);
                    532:                return 0;
                    533:        }
1.12      cgd       534:
1.31      bouyer    535:        WDCDEBUG_PRINT(("wdcintr\n"), DEBUG_INTR);
                    536:        chp->ch_flags &= ~WDCF_IRQ_WAIT;
                    537:        xfer = chp->ch_queue->sc_xfer.tqh_first;
1.66      bouyer    538:        return xfer->c_intr(chp, xfer, 1);
1.12      cgd       539: }
                    540:
1.31      bouyer    541: /* Put all disk in RESET state */
                    542: void wdc_reset_channel(drvp)
                    543:        struct ata_drive_datas *drvp;
1.2       bouyer    544: {
1.31      bouyer    545:        struct channel_softc *chp = drvp->chnl_softc;
1.2       bouyer    546:        int drive;
1.34      bouyer    547:        WDCDEBUG_PRINT(("ata_reset_channel %s:%d for drive %d\n",
                    548:            chp->wdc->sc_dev.dv_xname, chp->channel, drvp->drive),
                    549:            DEBUG_FUNCS);
1.31      bouyer    550:        (void) wdcreset(chp, VERBOSE);
                    551:        for (drive = 0; drive < 2; drive++) {
                    552:                chp->ch_drive[drive].state = 0;
1.12      cgd       553:        }
1.31      bouyer    554: }
1.12      cgd       555:
1.31      bouyer    556: int
                    557: wdcreset(chp, verb)
                    558:        struct channel_softc *chp;
                    559:        int verb;
                    560: {
                    561:        int drv_mask1, drv_mask2;
1.2       bouyer    562:
1.31      bouyer    563:        bus_space_write_1(chp->cmd_iot, chp->cmd_ioh, wd_sdh,
                    564:            WDSD_IBM); /* master */
                    565:        bus_space_write_1(chp->ctl_iot, chp->ctl_ioh, wd_aux_ctlr,
                    566:            WDCTL_RST | WDCTL_IDS);
                    567:        delay(1000);
                    568:        bus_space_write_1(chp->ctl_iot, chp->ctl_ioh, wd_aux_ctlr,
                    569:            WDCTL_IDS);
                    570:        delay(1000);
                    571:        (void) bus_space_read_1(chp->cmd_iot, chp->cmd_ioh, wd_error);
                    572:        bus_space_write_1(chp->ctl_iot, chp->ctl_ioh, wd_aux_ctlr,
                    573:            WDCTL_4BIT);
1.2       bouyer    574:
1.31      bouyer    575:        drv_mask1 = (chp->ch_drive[0].drive_flags & DRIVE) ? 0x01:0x00;
                    576:        drv_mask1 |= (chp->ch_drive[1].drive_flags & DRIVE) ? 0x02:0x00;
                    577:        drv_mask2 = __wdcwait_reset(chp, drv_mask1);
                    578:        if (verb && drv_mask2 != drv_mask1) {
                    579:                printf("%s channel %d: reset failed for",
                    580:                    chp->wdc->sc_dev.dv_xname, chp->channel);
                    581:                if ((drv_mask1 & 0x01) != 0 && (drv_mask2 & 0x01) == 0)
                    582:                        printf(" drive 0");
                    583:                if ((drv_mask1 & 0x02) != 0 && (drv_mask2 & 0x02) == 0)
                    584:                        printf(" drive 1");
                    585:                printf("\n");
                    586:        }
                    587:        return  (drv_mask1 != drv_mask2) ? 1 : 0;
                    588: }
                    589:
                    590: static int
                    591: __wdcwait_reset(chp, drv_mask)
                    592:        struct channel_softc *chp;
                    593:        int drv_mask;
                    594: {
                    595:        int timeout;
                    596:        u_int8_t st0, st1;
1.66.2.3! he        597: #ifdef WDCDEBUG
        !           598:        u_int8_t sc0, sn0, cl0, ch0;
        !           599:        u_int8_t sc1, sn1, cl1, ch1;
        !           600: #endif
1.31      bouyer    601:        /* wait for BSY to deassert */
                    602:        for (timeout = 0; timeout < WDCNDELAY_RST;timeout++) {
                    603:                bus_space_write_1(chp->cmd_iot, chp->cmd_ioh, wd_sdh,
                    604:                    WDSD_IBM); /* master */
1.65      bouyer    605:                delay(10);
1.31      bouyer    606:                st0 = bus_space_read_1(chp->cmd_iot, chp->cmd_ioh, wd_status);
1.66.2.3! he        607: #ifdef WDCDEBUG
        !           608:                sc0 = bus_space_read_1(chp->cmd_iot, chp->cmd_ioh, wd_seccnt);
        !           609:                sn0 = bus_space_read_1(chp->cmd_iot, chp->cmd_ioh, wd_sector);
        !           610:                cl0 = bus_space_read_1(chp->cmd_iot, chp->cmd_ioh, wd_cyl_lo);
        !           611:                ch0 = bus_space_read_1(chp->cmd_iot, chp->cmd_ioh, wd_cyl_hi);
        !           612: #endif
1.31      bouyer    613:                bus_space_write_1(chp->cmd_iot, chp->cmd_ioh, wd_sdh,
                    614:                    WDSD_IBM | 0x10); /* slave */
1.65      bouyer    615:                delay(10);
1.31      bouyer    616:                st1 = bus_space_read_1(chp->cmd_iot, chp->cmd_ioh, wd_status);
1.66.2.3! he        617: #ifdef WDCDEBUG
        !           618:                sc1 = bus_space_read_1(chp->cmd_iot, chp->cmd_ioh, wd_seccnt);
        !           619:                sn1 = bus_space_read_1(chp->cmd_iot, chp->cmd_ioh, wd_sector);
        !           620:                cl1 = bus_space_read_1(chp->cmd_iot, chp->cmd_ioh, wd_cyl_lo);
        !           621:                ch1 = bus_space_read_1(chp->cmd_iot, chp->cmd_ioh, wd_cyl_hi);
        !           622: #endif
1.31      bouyer    623:
                    624:                if ((drv_mask & 0x01) == 0) {
                    625:                        /* no master */
                    626:                        if ((drv_mask & 0x02) != 0 && (st1 & WDCS_BSY) == 0) {
                    627:                                /* No master, slave is ready, it's done */
1.65      bouyer    628:                                goto end;
1.31      bouyer    629:                        }
                    630:                } else if ((drv_mask & 0x02) == 0) {
                    631:                        /* no slave */
                    632:                        if ((drv_mask & 0x01) != 0 && (st0 & WDCS_BSY) == 0) {
                    633:                                /* No slave, master is ready, it's done */
1.65      bouyer    634:                                goto end;
1.31      bouyer    635:                        }
1.2       bouyer    636:                } else {
1.31      bouyer    637:                        /* Wait for both master and slave to be ready */
                    638:                        if ((st0 & WDCS_BSY) == 0 && (st1 & WDCS_BSY) == 0) {
1.65      bouyer    639:                                goto end;
1.2       bouyer    640:                        }
                    641:                }
1.31      bouyer    642:                delay(WDCDELAY);
1.2       bouyer    643:        }
1.31      bouyer    644:        /* Reset timed out. Maybe it's because drv_mask was not rigth */
                    645:        if (st0 & WDCS_BSY)
                    646:                drv_mask &= ~0x01;
                    647:        if (st1 & WDCS_BSY)
                    648:                drv_mask &= ~0x02;
1.65      bouyer    649: end:
1.66.2.3! he        650:        WDCDEBUG_PRINT(("%s:%d:0: after reset, sc=0x%x sn=0x%x "
        !           651:            "cl=0x%x ch=0x%x\n",
        !           652:             chp->wdc ? chp->wdc->sc_dev.dv_xname : "wdcprobe",
        !           653:             chp->channel, sc0, sn0, cl0, ch0), DEBUG_PROBE);
        !           654:        WDCDEBUG_PRINT(("%s:%d:1: after reset, sc=0x%x sn=0x%x "
        !           655:            "cl=0x%x ch=0x%x\n",
        !           656:             chp->wdc ? chp->wdc->sc_dev.dv_xname : "wdcprobe",
        !           657:             chp->channel, sc1, sn1, cl1, ch1), DEBUG_PROBE);
        !           658:
1.65      bouyer    659:        WDCDEBUG_PRINT(("%s:%d: wdcwait_reset() end, st0=0x%x, st1=0x%x\n",
                    660:            chp->wdc ? chp->wdc->sc_dev.dv_xname : "wdcprobe", chp->channel,
                    661:            st0, st1), DEBUG_PROBE);
                    662:
1.31      bouyer    663:        return drv_mask;
1.2       bouyer    664: }
                    665:
                    666: /*
1.31      bouyer    667:  * Wait for a drive to be !BSY, and have mask in its status register.
                    668:  * return -1 for a timeout after "timeout" ms.
1.2       bouyer    669:  */
1.31      bouyer    670: int
                    671: wdcwait(chp, mask, bits, timeout)
                    672:        struct channel_softc *chp;
                    673:        int mask, bits, timeout;
1.2       bouyer    674: {
1.31      bouyer    675:        u_char status;
                    676:        int time = 0;
                    677: #ifdef WDCNDELAY_DEBUG
                    678:        extern int cold;
                    679: #endif
1.60      abs       680:
                    681:        WDCDEBUG_PRINT(("wdcwait %s:%d\n", chp->wdc ?chp->wdc->sc_dev.dv_xname
                    682:            :"none", chp->channel), DEBUG_STATUS);
1.31      bouyer    683:        chp->ch_error = 0;
                    684:
                    685:        timeout = timeout * 1000 / WDCDELAY; /* delay uses microseconds */
1.2       bouyer    686:
1.31      bouyer    687:        for (;;) {
                    688:                chp->ch_status = status =
                    689:                    bus_space_read_1(chp->cmd_iot, chp->cmd_ioh, wd_status);
                    690:                if ((status & WDCS_BSY) == 0 && (status & mask) == bits)
                    691:                        break;
                    692:                if (++time > timeout) {
                    693:                        WDCDEBUG_PRINT(("wdcwait: timeout, status %x "
                    694:                            "error %x\n", status,
                    695:                            bus_space_read_1(chp->cmd_iot, chp->cmd_ioh,
                    696:                                wd_error)),
                    697:                            DEBUG_STATUS);
                    698:                        return -1;
                    699:                }
                    700:                delay(WDCDELAY);
1.2       bouyer    701:        }
1.31      bouyer    702:        if (status & WDCS_ERR)
                    703:                chp->ch_error = bus_space_read_1(chp->cmd_iot, chp->cmd_ioh,
                    704:                    wd_error);
                    705: #ifdef WDCNDELAY_DEBUG
                    706:        /* After autoconfig, there should be no long delays. */
                    707:        if (!cold && time > WDCNDELAY_DEBUG) {
                    708:                struct wdc_xfer *xfer = chp->ch_queue->sc_xfer.tqh_first;
                    709:                if (xfer == NULL)
                    710:                        printf("%s channel %d: warning: busy-wait took %dus\n",
                    711:                            chp->wdc->sc_dev.dv_xname, chp->channel,
                    712:                            WDCDELAY * time);
                    713:                else
                    714:                        printf("%s:%d:%d: warning: busy-wait took %dus\n",
1.49      bouyer    715:                            chp->wdc->sc_dev.dv_xname, chp->channel,
1.31      bouyer    716:                            xfer->drive,
                    717:                            WDCDELAY * time);
1.2       bouyer    718:        }
                    719: #endif
1.31      bouyer    720:        return 0;
1.2       bouyer    721: }
                    722:
1.31      bouyer    723: void
                    724: wdctimeout(arg)
                    725:        void *arg;
1.2       bouyer    726: {
1.31      bouyer    727:        struct channel_softc *chp = (struct channel_softc *)arg;
                    728:        struct wdc_xfer *xfer = chp->ch_queue->sc_xfer.tqh_first;
                    729:        int s;
1.2       bouyer    730:
1.31      bouyer    731:        WDCDEBUG_PRINT(("wdctimeout\n"), DEBUG_FUNCS);
                    732:
                    733:        s = splbio();
                    734:        if ((chp->ch_flags & WDCF_IRQ_WAIT) != 0) {
                    735:                __wdcerror(chp, "lost interrupt");
                    736:                printf("\ttype: %s\n", (xfer->c_flags & C_ATAPI) ?
                    737:                    "atapi":"ata");
                    738:                printf("\tc_bcount: %d\n", xfer->c_bcount);
                    739:                printf("\tc_skip: %d\n", xfer->c_skip);
                    740:                /*
                    741:                 * Call the interrupt routine. If we just missed and interrupt,
                    742:                 * it will do what's needed. Else, it will take the needed
                    743:                 * action (reset the device).
1.66.2.3! he        744:                 * Before that we need to reinstall the timeout callback,
        !           745:                 * in case it will miss another irq while in this transfer
        !           746:                 * We arbitray chose it to be 1s
1.31      bouyer    747:                 */
1.66.2.3! he        748:                timeout(wdctimeout, chp, hz);
1.31      bouyer    749:                xfer->c_flags |= C_TIMEOU;
                    750:                chp->ch_flags &= ~WDCF_IRQ_WAIT;
1.66      bouyer    751:                xfer->c_intr(chp, xfer, 1);
1.31      bouyer    752:        } else
                    753:                __wdcerror(chp, "missing untimeout");
                    754:        splx(s);
1.2       bouyer    755: }
                    756:
1.31      bouyer    757: /*
                    758:  * Probe drive's capabilites, for use by the controller later
                    759:  * Assumes drvp points to an existing drive.
                    760:  * XXX this should be a controller-indep function
                    761:  */
1.2       bouyer    762: void
1.31      bouyer    763: wdc_probe_caps(drvp)
                    764:        struct ata_drive_datas *drvp;
1.2       bouyer    765: {
1.31      bouyer    766:        struct ataparams params, params2;
                    767:        struct channel_softc *chp = drvp->chnl_softc;
                    768:        struct device *drv_dev = drvp->drv_softc;
                    769:        struct wdc_softc *wdc = chp->wdc;
                    770:        int i, printed;
                    771:        char *sep = "";
1.48      bouyer    772:        int cf_flags;
1.31      bouyer    773:
                    774:        if (ata_get_params(drvp, AT_POLL, &params) != CMD_OK) {
                    775:                /* IDENTIFY failed. Can't tell more about the device */
1.2       bouyer    776:                return;
                    777:        }
1.31      bouyer    778:        if ((wdc->cap & (WDC_CAPABILITY_DATA16 | WDC_CAPABILITY_DATA32)) ==
                    779:            (WDC_CAPABILITY_DATA16 | WDC_CAPABILITY_DATA32)) {
1.2       bouyer    780:                /*
1.39      bouyer    781:                 * Controller claims 16 and 32 bit transfers.
                    782:                 * Re-do an IDENTIFY with 32-bit transfers,
1.31      bouyer    783:                 * and compare results.
1.2       bouyer    784:                 */
1.31      bouyer    785:                drvp->drive_flags |= DRIVE_CAP32;
                    786:                ata_get_params(drvp, AT_POLL, &params2);
                    787:                if (memcmp(&params, &params2, sizeof(struct ataparams)) != 0) {
                    788:                        /* Not good. fall back to 16bits */
                    789:                        drvp->drive_flags &= ~DRIVE_CAP32;
                    790:                } else {
1.55      bouyer    791:                        printf("%s: 32-bits data port", drv_dev->dv_xname);
1.2       bouyer    792:                }
                    793:        }
1.55      bouyer    794: #if 0 /* Some ultra-DMA drives claims to only support ATA-3. sigh */
                    795:        if (params.atap_ata_major > 0x01 &&
                    796:            params.atap_ata_major != 0xffff) {
                    797:                for (i = 14; i > 0; i--) {
                    798:                        if (params.atap_ata_major & (1 << i)) {
                    799:                                if ((drvp->drive_flags & DRIVE_CAP32) == 0)
                    800:                                        printf("%s: ", drv_dev->dv_xname);
                    801:                                else
                    802:                                        printf(", ");
                    803:                                printf("ATA version %d\n", i);
                    804:                                drvp->ata_vers = i;
                    805:                                break;
                    806:                        }
                    807:                }
1.58      bouyer    808:        } else
1.55      bouyer    809: #endif
1.58      bouyer    810:        if (drvp->drive_flags & DRIVE_CAP32)
1.55      bouyer    811:                printf("\n");
1.2       bouyer    812:
1.31      bouyer    813:        /* An ATAPI device is at last PIO mode 3 */
                    814:        if (drvp->drive_flags & DRIVE_ATAPI)
                    815:                drvp->PIO_mode = 3;
1.2       bouyer    816:
                    817:        /*
1.31      bouyer    818:         * It's not in the specs, but it seems that some drive
                    819:         * returns 0xffff in atap_extensions when this field is invalid
1.2       bouyer    820:         */
1.31      bouyer    821:        if (params.atap_extensions != 0xffff &&
                    822:            (params.atap_extensions & WDC_EXT_MODES)) {
                    823:                printed = 0;
                    824:                /*
                    825:                 * XXX some drives report something wrong here (they claim to
                    826:                 * support PIO mode 8 !). As mode is coded on 3 bits in
                    827:                 * SET FEATURE, limit it to 7 (so limit i to 4).
1.39      bouyer    828:                 * If higther mode than 7 is found, abort.
1.31      bouyer    829:                 */
1.39      bouyer    830:                for (i = 7; i >= 0; i--) {
1.31      bouyer    831:                        if ((params.atap_piomode_supp & (1 << i)) == 0)
                    832:                                continue;
1.39      bouyer    833:                        if (i > 4)
                    834:                                return;
1.31      bouyer    835:                        /*
                    836:                         * See if mode is accepted.
                    837:                         * If the controller can't set its PIO mode,
                    838:                         * assume the defaults are good, so don't try
                    839:                         * to set it
                    840:                         */
                    841:                        if ((wdc->cap & WDC_CAPABILITY_MODE) != 0)
                    842:                                if (ata_set_mode(drvp, 0x08 | (i + 3),
                    843:                                   AT_POLL) != CMD_OK)
1.2       bouyer    844:                                        continue;
1.31      bouyer    845:                        if (!printed) {
1.39      bouyer    846:                                printf("%s: drive supports PIO mode %d",
                    847:                                    drv_dev->dv_xname, i + 3);
1.31      bouyer    848:                                sep = ",";
                    849:                                printed = 1;
                    850:                        }
                    851:                        /*
                    852:                         * If controller's driver can't set its PIO mode,
                    853:                         * get the highter one for the drive.
                    854:                         */
                    855:                        if ((wdc->cap & WDC_CAPABILITY_MODE) == 0 ||
1.52      bouyer    856:                            wdc->PIO_cap >= i + 3) {
1.31      bouyer    857:                                drvp->PIO_mode = i + 3;
1.48      bouyer    858:                                drvp->PIO_cap = i + 3;
1.2       bouyer    859:                                break;
                    860:                        }
                    861:                }
1.31      bouyer    862:                if (!printed) {
                    863:                        /*
                    864:                         * We didn't find a valid PIO mode.
                    865:                         * Assume the values returned for DMA are buggy too
                    866:                         */
                    867:                        return;
1.2       bouyer    868:                }
1.35      bouyer    869:                drvp->drive_flags |= DRIVE_MODE;
1.31      bouyer    870:                printed = 0;
                    871:                for (i = 7; i >= 0; i--) {
                    872:                        if ((params.atap_dmamode_supp & (1 << i)) == 0)
                    873:                                continue;
                    874:                        if ((wdc->cap & WDC_CAPABILITY_DMA) &&
                    875:                            (wdc->cap & WDC_CAPABILITY_MODE))
                    876:                                if (ata_set_mode(drvp, 0x20 | i, AT_POLL)
                    877:                                    != CMD_OK)
                    878:                                        continue;
                    879:                        if (!printed) {
                    880:                                printf("%s DMA mode %d", sep, i);
                    881:                                sep = ",";
                    882:                                printed = 1;
                    883:                        }
                    884:                        if (wdc->cap & WDC_CAPABILITY_DMA) {
                    885:                                if ((wdc->cap & WDC_CAPABILITY_MODE) &&
1.52      bouyer    886:                                    wdc->DMA_cap < i)
1.31      bouyer    887:                                        continue;
                    888:                                drvp->DMA_mode = i;
1.48      bouyer    889:                                drvp->DMA_cap = i;
1.31      bouyer    890:                                drvp->drive_flags |= DRIVE_DMA;
                    891:                        }
1.2       bouyer    892:                        break;
                    893:                }
1.31      bouyer    894:                if (params.atap_extensions & WDC_EXT_UDMA_MODES) {
                    895:                        for (i = 7; i >= 0; i--) {
                    896:                                if ((params.atap_udmamode_supp & (1 << i))
                    897:                                    == 0)
                    898:                                        continue;
                    899:                                if ((wdc->cap & WDC_CAPABILITY_MODE) &&
                    900:                                    (wdc->cap & WDC_CAPABILITY_UDMA))
                    901:                                        if (ata_set_mode(drvp, 0x40 | i,
                    902:                                            AT_POLL) != CMD_OK)
                    903:                                                continue;
1.51      bouyer    904:                                printf("%s Ultra-DMA mode %d", sep, i);
1.31      bouyer    905:                                sep = ",";
                    906:                                if (wdc->cap & WDC_CAPABILITY_UDMA) {
1.50      bouyer    907:                                        if ((wdc->cap & WDC_CAPABILITY_MODE) &&
1.52      bouyer    908:                                            wdc->UDMA_cap < i)
1.50      bouyer    909:                                                continue;
1.31      bouyer    910:                                        drvp->UDMA_mode = i;
1.48      bouyer    911:                                        drvp->UDMA_cap = i;
1.31      bouyer    912:                                        drvp->drive_flags |= DRIVE_UDMA;
                    913:                                }
                    914:                                break;
                    915:                        }
                    916:                }
                    917:                printf("\n");
1.55      bouyer    918:        }
                    919:
                    920:        /* Try to guess ATA version here, if it didn't get reported */
                    921:        if (drvp->ata_vers == 0) {
                    922:                if (drvp->drive_flags & DRIVE_UDMA)
                    923:                        drvp->ata_vers = 4; /* should be at last ATA-4 */
                    924:                else if (drvp->PIO_cap > 2)
                    925:                        drvp->ata_vers = 2; /* should be at last ATA-2 */
1.48      bouyer    926:        }
                    927:        cf_flags = drv_dev->dv_cfdata->cf_flags;
                    928:        if (cf_flags & ATA_CONFIG_PIO_SET) {
                    929:                drvp->PIO_mode =
                    930:                    (cf_flags & ATA_CONFIG_PIO_MODES) >> ATA_CONFIG_PIO_OFF;
                    931:                drvp->drive_flags |= DRIVE_MODE;
                    932:        }
                    933:        if ((wdc->cap & WDC_CAPABILITY_DMA) == 0) {
                    934:                /* don't care about DMA modes */
                    935:                return;
                    936:        }
                    937:        if (cf_flags & ATA_CONFIG_DMA_SET) {
                    938:                if ((cf_flags & ATA_CONFIG_DMA_MODES) ==
                    939:                    ATA_CONFIG_DMA_DISABLE) {
                    940:                        drvp->drive_flags &= ~DRIVE_DMA;
                    941:                } else {
                    942:                        drvp->DMA_mode = (cf_flags & ATA_CONFIG_DMA_MODES) >>
                    943:                            ATA_CONFIG_DMA_OFF;
                    944:                        drvp->drive_flags |= DRIVE_DMA | DRIVE_MODE;
                    945:                }
                    946:        }
                    947:        if (cf_flags & ATA_CONFIG_UDMA_SET) {
                    948:                if ((cf_flags & ATA_CONFIG_UDMA_MODES) ==
                    949:                    ATA_CONFIG_UDMA_DISABLE) {
                    950:                        drvp->drive_flags &= ~DRIVE_UDMA;
                    951:                } else {
                    952:                        drvp->UDMA_mode = (cf_flags & ATA_CONFIG_UDMA_MODES) >>
                    953:                            ATA_CONFIG_UDMA_OFF;
                    954:                        drvp->drive_flags |= DRIVE_UDMA | DRIVE_MODE;
                    955:                }
1.2       bouyer    956:        }
1.54      bouyer    957: }
                    958:
                    959: /*
1.56      bouyer    960:  * downgrade the transfer mode of a drive after an error. return 1 if
1.54      bouyer    961:  * downgrade was possible, 0 otherwise.
                    962:  */
                    963: int
                    964: wdc_downgrade_mode(drvp)
                    965:        struct ata_drive_datas *drvp;
                    966: {
                    967:        struct channel_softc *chp = drvp->chnl_softc;
                    968:        struct device *drv_dev = drvp->drv_softc;
                    969:        struct wdc_softc *wdc = chp->wdc;
                    970:        int cf_flags = drv_dev->dv_cfdata->cf_flags;
                    971:
                    972:        /* if drive or controller don't know its mode, we can't do much */
                    973:        if ((drvp->drive_flags & DRIVE_MODE) == 0 ||
                    974:            (wdc->cap & WDC_CAPABILITY_MODE) == 0)
                    975:                return 0;
                    976:        /* current drive mode was set by a config flag, let it this way */
                    977:        if ((cf_flags & ATA_CONFIG_PIO_SET) ||
                    978:            (cf_flags & ATA_CONFIG_DMA_SET) ||
                    979:            (cf_flags & ATA_CONFIG_UDMA_SET))
                    980:                return 0;
                    981:
1.61      bouyer    982:        /*
                    983:         * If we were using ultra-DMA, don't downgrade to multiword DMA
                    984:         * if we noticed a CRC error. It has been noticed that CRC errors
                    985:         * in ultra-DMA lead to silent data corruption in multiword DMA.
                    986:         * Data corruption is less likely to occur in PIO mode.
                    987:         */
                    988:
                    989:        if ((drvp->drive_flags & DRIVE_UDMA) &&
                    990:            (drvp->drive_flags & DRIVE_DMAERR) == 0) {
1.54      bouyer    991:                drvp->drive_flags &= ~DRIVE_UDMA;
                    992:                drvp->drive_flags |= DRIVE_DMA;
                    993:                drvp->DMA_mode = drvp->DMA_cap;
1.56      bouyer    994:                printf("%s: transfer error, downgrading to DMA mode %d\n",
1.54      bouyer    995:                    drv_dev->dv_xname, drvp->DMA_mode);
1.61      bouyer    996:        } else if (drvp->drive_flags & (DRIVE_DMA | DRIVE_UDMA)) {
                    997:                drvp->drive_flags &= ~(DRIVE_DMA | DRIVE_UDMA);
1.54      bouyer    998:                drvp->PIO_mode = drvp->PIO_cap;
1.56      bouyer    999:                printf("%s: transfer error, downgrading to PIO mode %d\n",
1.54      bouyer   1000:                    drv_dev->dv_xname, drvp->PIO_mode);
                   1001:        } else /* already using PIO, can't downgrade */
                   1002:                return 0;
                   1003:
                   1004:        wdc->set_modes(chp);
                   1005:        /* reset the channel, which will shedule all drives for setup */
                   1006:        wdc_reset_channel(drvp);
                   1007:        return 1;
1.2       bouyer   1008: }
                   1009:
                   1010: int
1.31      bouyer   1011: wdc_exec_command(drvp, wdc_c)
                   1012:        struct ata_drive_datas *drvp;
                   1013:        struct wdc_command *wdc_c;
                   1014: {
                   1015:        struct channel_softc *chp = drvp->chnl_softc;
1.2       bouyer   1016:        struct wdc_xfer *xfer;
1.31      bouyer   1017:        int s, ret;
1.2       bouyer   1018:
1.34      bouyer   1019:        WDCDEBUG_PRINT(("wdc_exec_command %s:%d:%d\n",
                   1020:            chp->wdc->sc_dev.dv_xname, chp->channel, drvp->drive),
                   1021:            DEBUG_FUNCS);
1.2       bouyer   1022:
1.31      bouyer   1023:        /* set up an xfer and queue. Wait for completion */
                   1024:        xfer = wdc_get_xfer(wdc_c->flags & AT_WAIT ? WDC_CANSLEEP :
                   1025:            WDC_NOSLEEP);
                   1026:        if (xfer == NULL) {
                   1027:                return WDC_TRY_AGAIN;
                   1028:         }
1.2       bouyer   1029:
1.31      bouyer   1030:        if (wdc_c->flags & AT_POLL)
                   1031:                xfer->c_flags |= C_POLL;
                   1032:        xfer->drive = drvp->drive;
                   1033:        xfer->databuf = wdc_c->data;
                   1034:        xfer->c_bcount = wdc_c->bcount;
                   1035:        xfer->cmd = wdc_c;
                   1036:        xfer->c_start = __wdccommand_start;
                   1037:        xfer->c_intr = __wdccommand_intr;
1.2       bouyer   1038:
1.31      bouyer   1039:        s = splbio();
                   1040:        wdc_exec_xfer(chp, xfer);
                   1041: #ifdef DIAGNOSTIC
                   1042:        if ((wdc_c->flags & AT_POLL) != 0 &&
                   1043:            (wdc_c->flags & AT_DONE) == 0)
                   1044:                panic("wdc_exec_command: polled command not done\n");
1.2       bouyer   1045: #endif
1.31      bouyer   1046:        if (wdc_c->flags & AT_DONE) {
                   1047:                ret = WDC_COMPLETE;
                   1048:        } else {
                   1049:                if (wdc_c->flags & AT_WAIT) {
                   1050:                        tsleep(wdc_c, PRIBIO, "wdccmd", 0);
                   1051:                        ret = WDC_COMPLETE;
                   1052:                } else {
                   1053:                        ret = WDC_QUEUED;
1.2       bouyer   1054:                }
                   1055:        }
1.31      bouyer   1056:        splx(s);
                   1057:        return ret;
1.2       bouyer   1058: }
                   1059:
                   1060: void
1.31      bouyer   1061: __wdccommand_start(chp, xfer)
                   1062:        struct channel_softc *chp;
1.2       bouyer   1063:        struct wdc_xfer *xfer;
1.31      bouyer   1064: {
                   1065:        int drive = xfer->drive;
                   1066:        struct wdc_command *wdc_c = xfer->cmd;
                   1067:
1.34      bouyer   1068:        WDCDEBUG_PRINT(("__wdccommand_start %s:%d:%d\n",
                   1069:            chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive),
                   1070:            DEBUG_FUNCS);
1.31      bouyer   1071:
                   1072:        bus_space_write_1(chp->cmd_iot, chp->cmd_ioh, wd_sdh,
                   1073:            WDSD_IBM | (drive << 4));
                   1074:        if (wdcwait(chp, wdc_c->r_st_bmask, wdc_c->r_st_bmask,
                   1075:            wdc_c->timeout) != 0) {
                   1076:                wdc_c->flags |= AT_TIMEOU;
                   1077:                __wdccommand_done(chp, xfer);
1.53      bouyer   1078:                return;
1.31      bouyer   1079:        }
                   1080:        wdccommand(chp, drive, wdc_c->r_command, wdc_c->r_cyl, wdc_c->r_head,
                   1081:            wdc_c->r_sector, wdc_c->r_count, wdc_c->r_precomp);
                   1082:        if ((wdc_c->flags & AT_POLL) == 0) {
                   1083:                chp->ch_flags |= WDCF_IRQ_WAIT; /* wait for interrupt */
                   1084:                timeout(wdctimeout, chp, wdc_c->timeout / 1000 * hz);
                   1085:                return;
1.2       bouyer   1086:        }
                   1087:        /*
1.31      bouyer   1088:         * Polled command. Wait for drive ready or drq. Done in intr().
                   1089:         * Wait for at last 400ns for status bit to be valid.
1.2       bouyer   1090:         */
1.31      bouyer   1091:        delay(10);
1.66      bouyer   1092:        __wdccommand_intr(chp, xfer, 0);
1.2       bouyer   1093: }
                   1094:
                   1095: int
1.66      bouyer   1096: __wdccommand_intr(chp, xfer, irq)
1.31      bouyer   1097:        struct channel_softc *chp;
                   1098:        struct wdc_xfer *xfer;
1.66      bouyer   1099:        int irq;
1.2       bouyer   1100: {
1.31      bouyer   1101:        struct wdc_command *wdc_c = xfer->cmd;
                   1102:        int bcount = wdc_c->bcount;
                   1103:        char *data = wdc_c->data;
                   1104:
1.34      bouyer   1105:        WDCDEBUG_PRINT(("__wdccommand_intr %s:%d:%d\n",
                   1106:            chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive), DEBUG_INTR);
1.31      bouyer   1107:        if (wdcwait(chp, wdc_c->r_st_pmask, wdc_c->r_st_pmask,
1.66      bouyer   1108:             (irq == 0)  ? wdc_c->timeout : 0)) {
                   1109:                if (irq && (xfer->c_flags & C_TIMEOU) == 0)
1.63      bouyer   1110:                        return 0; /* IRQ was not for us */
                   1111:                wdc_c->flags |= AT_TIMEOU;
1.31      bouyer   1112:                __wdccommand_done(chp, xfer);
1.2       bouyer   1113:                return 1;
                   1114:        }
1.31      bouyer   1115:        if (wdc_c->flags & AT_READ) {
                   1116:                if (chp->ch_drive[xfer->drive].drive_flags & DRIVE_CAP32) {
                   1117:                        bus_space_read_multi_4(chp->data32iot, chp->data32ioh,
                   1118:                            0, (u_int32_t*)data, bcount >> 2);
                   1119:                        data += bcount & 0xfffffffc;
                   1120:                        bcount = bcount & 0x03;
                   1121:                }
                   1122:                if (bcount > 0)
                   1123:                        bus_space_read_multi_2(chp->cmd_iot, chp->cmd_ioh,
                   1124:                            wd_data, (u_int16_t *)data, bcount >> 1);
                   1125:        } else if (wdc_c->flags & AT_WRITE) {
                   1126:                if (chp->ch_drive[xfer->drive].drive_flags & DRIVE_CAP32) {
                   1127:                        bus_space_write_multi_4(chp->data32iot, chp->data32ioh,
                   1128:                            0, (u_int32_t*)data, bcount >> 2);
                   1129:                        data += bcount & 0xfffffffc;
                   1130:                        bcount = bcount & 0x03;
                   1131:                }
                   1132:                if (bcount > 0)
                   1133:                        bus_space_write_multi_2(chp->cmd_iot, chp->cmd_ioh,
                   1134:                            wd_data, (u_int16_t *)data, bcount >> 1);
1.2       bouyer   1135:        }
1.31      bouyer   1136:        __wdccommand_done(chp, xfer);
                   1137:        return 1;
1.2       bouyer   1138: }
                   1139:
                   1140: void
1.31      bouyer   1141: __wdccommand_done(chp, xfer)
                   1142:        struct channel_softc *chp;
                   1143:        struct wdc_xfer *xfer;
1.2       bouyer   1144: {
1.31      bouyer   1145:        int needdone = xfer->c_flags & C_NEEDDONE;
                   1146:        struct wdc_command *wdc_c = xfer->cmd;
1.2       bouyer   1147:
1.34      bouyer   1148:        WDCDEBUG_PRINT(("__wdccommand_done %s:%d:%d\n",
                   1149:            chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive), DEBUG_FUNCS);
1.66.2.3! he       1150:
        !          1151:        untimeout(wdctimeout, chp);
        !          1152:
1.31      bouyer   1153:        if (chp->ch_status & WDCS_DWF)
                   1154:                wdc_c->flags |= AT_DF;
                   1155:        if (chp->ch_status & WDCS_ERR) {
                   1156:                wdc_c->flags |= AT_ERROR;
                   1157:                wdc_c->r_error = chp->ch_error;
                   1158:        }
                   1159:        wdc_c->flags |= AT_DONE;
1.46      kenh     1160:        if (wdc_c->flags & AT_READREG && (wdc_c->flags & (AT_ERROR | AT_DF))
                   1161:                                                                == 0) {
                   1162:                wdc_c->r_head = bus_space_read_1(chp->cmd_iot, chp->cmd_ioh,
                   1163:                                                 wd_sdh);
                   1164:                wdc_c->r_cyl = bus_space_read_1(chp->cmd_iot, chp->cmd_ioh,
                   1165:                                                wd_cyl_hi) << 8;
                   1166:                wdc_c->r_cyl |= bus_space_read_1(chp->cmd_iot, chp->cmd_ioh,
                   1167:                                                 wd_cyl_lo);
                   1168:                wdc_c->r_sector = bus_space_read_1(chp->cmd_iot, chp->cmd_ioh,
                   1169:                                                   wd_sector);
                   1170:                wdc_c->r_count = bus_space_read_1(chp->cmd_iot, chp->cmd_ioh,
                   1171:                                                  wd_seccnt);
                   1172:                wdc_c->r_error = bus_space_read_1(chp->cmd_iot, chp->cmd_ioh,
                   1173:                                                  wd_error);
                   1174:                wdc_c->r_precomp = bus_space_read_1(chp->cmd_iot, chp->cmd_ioh,
                   1175:                                                    wd_precomp);
                   1176:        }
1.31      bouyer   1177:        wdc_free_xfer(chp, xfer);
                   1178:        if (needdone) {
                   1179:                if (wdc_c->flags & AT_WAIT)
                   1180:                        wakeup(wdc_c);
                   1181:                else
                   1182:                        wdc_c->callback(wdc_c->callback_arg);
1.2       bouyer   1183:        }
1.45      drochner 1184:        wdcstart(chp);
1.31      bouyer   1185:        return;
1.2       bouyer   1186: }
                   1187:
                   1188: /*
1.31      bouyer   1189:  * Send a command. The drive should be ready.
1.2       bouyer   1190:  * Assumes interrupts are blocked.
                   1191:  */
1.31      bouyer   1192: void
                   1193: wdccommand(chp, drive, command, cylin, head, sector, count, precomp)
                   1194:        struct channel_softc *chp;
                   1195:        u_int8_t drive;
                   1196:        u_int8_t command;
                   1197:        u_int16_t cylin;
                   1198:        u_int8_t head, sector, count, precomp;
                   1199: {
                   1200:        WDCDEBUG_PRINT(("wdccommand %s:%d:%d: command=0x%x cylin=%d head=%d "
                   1201:            "sector=%d count=%d precomp=%d\n", chp->wdc->sc_dev.dv_xname,
                   1202:            chp->channel, drive, command, cylin, head, sector, count, precomp),
                   1203:            DEBUG_FUNCS);
                   1204:
                   1205:        /* Select drive, head, and addressing mode. */
                   1206:        bus_space_write_1(chp->cmd_iot, chp->cmd_ioh, wd_sdh,
                   1207:            WDSD_IBM | (drive << 4) | head);
                   1208:        /* Load parameters. wd_features(ATA/ATAPI) = wd_precomp(ST506) */
                   1209:        bus_space_write_1(chp->cmd_iot, chp->cmd_ioh, wd_precomp,
                   1210:            precomp);
                   1211:        bus_space_write_1(chp->cmd_iot, chp->cmd_ioh, wd_cyl_lo, cylin);
                   1212:        bus_space_write_1(chp->cmd_iot, chp->cmd_ioh, wd_cyl_hi, cylin >> 8);
                   1213:        bus_space_write_1(chp->cmd_iot, chp->cmd_ioh, wd_sector, sector);
                   1214:        bus_space_write_1(chp->cmd_iot, chp->cmd_ioh, wd_seccnt, count);
1.2       bouyer   1215:
1.31      bouyer   1216:        /* Send command. */
                   1217:        bus_space_write_1(chp->cmd_iot, chp->cmd_ioh, wd_command, command);
                   1218:        return;
1.2       bouyer   1219: }
                   1220:
                   1221: /*
1.31      bouyer   1222:  * Simplified version of wdccommand().  Unbusy/ready/drq must be
                   1223:  * tested by the caller.
1.2       bouyer   1224:  */
1.31      bouyer   1225: void
                   1226: wdccommandshort(chp, drive, command)
                   1227:        struct channel_softc *chp;
                   1228:        int drive;
                   1229:        int command;
1.2       bouyer   1230: {
                   1231:
1.31      bouyer   1232:        WDCDEBUG_PRINT(("wdccommandshort %s:%d:%d command 0x%x\n",
                   1233:            chp->wdc->sc_dev.dv_xname, chp->channel, drive, command),
                   1234:            DEBUG_FUNCS);
1.2       bouyer   1235:
1.31      bouyer   1236:        /* Select drive. */
                   1237:        bus_space_write_1(chp->cmd_iot, chp->cmd_ioh, wd_sdh,
                   1238:            WDSD_IBM | (drive << 4));
1.2       bouyer   1239:
1.31      bouyer   1240:        bus_space_write_1(chp->cmd_iot, chp->cmd_ioh, wd_command, command);
                   1241: }
1.2       bouyer   1242:
1.31      bouyer   1243: /* Add a command to the queue and start controller. Must be called at splbio */
1.2       bouyer   1244:
                   1245: void
1.31      bouyer   1246: wdc_exec_xfer(chp, xfer)
                   1247:        struct channel_softc *chp;
1.2       bouyer   1248:        struct wdc_xfer *xfer;
                   1249: {
1.33      bouyer   1250:        WDCDEBUG_PRINT(("wdc_exec_xfer %p channel %d drive %d\n", xfer,
                   1251:            chp->channel, xfer->drive), DEBUG_XFERS);
1.2       bouyer   1252:
1.31      bouyer   1253:        /* complete xfer setup */
1.49      bouyer   1254:        xfer->chp = chp;
1.2       bouyer   1255:
1.31      bouyer   1256:        /*
                   1257:         * If we are a polled command, and the list is not empty,
                   1258:         * we are doing a dump. Drop the list to allow the polled command
                   1259:         * to complete, we're going to reboot soon anyway.
                   1260:         */
                   1261:        if ((xfer->c_flags & C_POLL) != 0 &&
                   1262:            chp->ch_queue->sc_xfer.tqh_first != NULL) {
                   1263:                TAILQ_INIT(&chp->ch_queue->sc_xfer);
                   1264:        }
1.2       bouyer   1265:        /* insert at the end of command list */
1.31      bouyer   1266:        TAILQ_INSERT_TAIL(&chp->ch_queue->sc_xfer,xfer , c_xferchain);
                   1267:        WDCDEBUG_PRINT(("wdcstart from wdc_exec_xfer, flags 0x%x\n",
1.33      bouyer   1268:            chp->ch_flags), DEBUG_XFERS);
1.45      drochner 1269:        wdcstart(chp);
1.2       bouyer   1270:        xfer->c_flags |= C_NEEDDONE; /* we can now call upper level done() */
1.31      bouyer   1271: }
1.2       bouyer   1272:
                   1273: struct wdc_xfer *
                   1274: wdc_get_xfer(flags)
                   1275:        int flags;
                   1276: {
                   1277:        struct wdc_xfer *xfer;
                   1278:        int s;
                   1279:
                   1280:        s = splbio();
                   1281:        if ((xfer = xfer_free_list.lh_first) != NULL) {
                   1282:                LIST_REMOVE(xfer, free_list);
                   1283:                splx(s);
                   1284: #ifdef DIAGNOSTIC
                   1285:                if ((xfer->c_flags & C_INUSE) != 0)
                   1286:                        panic("wdc_get_xfer: xfer already in use\n");
                   1287: #endif
                   1288:        } else {
                   1289:                splx(s);
1.31      bouyer   1290:                WDCDEBUG_PRINT(("wdc:making xfer %d\n",wdc_nxfer), DEBUG_XFERS);
1.2       bouyer   1291:                xfer = malloc(sizeof(*xfer), M_DEVBUF,
1.31      bouyer   1292:                    ((flags & WDC_NOSLEEP) != 0 ? M_NOWAIT : M_WAITOK));
1.2       bouyer   1293:                if (xfer == NULL)
                   1294:                        return 0;
                   1295: #ifdef DIAGNOSTIC
                   1296:                xfer->c_flags &= ~C_INUSE;
                   1297: #endif
1.31      bouyer   1298: #ifdef WDCDEBUG
1.2       bouyer   1299:                wdc_nxfer++;
                   1300: #endif
                   1301:        }
                   1302: #ifdef DIAGNOSTIC
                   1303:        if ((xfer->c_flags & C_INUSE) != 0)
                   1304:                panic("wdc_get_xfer: xfer already in use\n");
                   1305: #endif
1.31      bouyer   1306:        memset(xfer, 0, sizeof(struct wdc_xfer));
1.2       bouyer   1307:        xfer->c_flags = C_INUSE;
                   1308:        return xfer;
                   1309: }
                   1310:
                   1311: void
1.31      bouyer   1312: wdc_free_xfer(chp, xfer)
                   1313:        struct channel_softc *chp;
1.2       bouyer   1314:        struct wdc_xfer *xfer;
                   1315: {
1.31      bouyer   1316:        struct wdc_softc *wdc = chp->wdc;
1.2       bouyer   1317:        int s;
                   1318:
1.31      bouyer   1319:        if (wdc->cap & WDC_CAPABILITY_HWLOCK)
                   1320:                (*wdc->free_hw)(chp);
1.2       bouyer   1321:        s = splbio();
1.31      bouyer   1322:        chp->ch_flags &= ~WDCF_ACTIVE;
                   1323:        TAILQ_REMOVE(&chp->ch_queue->sc_xfer, xfer, c_xferchain);
1.2       bouyer   1324:        xfer->c_flags &= ~C_INUSE;
                   1325:        LIST_INSERT_HEAD(&xfer_free_list, xfer, free_list);
                   1326:        splx(s);
                   1327: }
                   1328:
1.31      bouyer   1329: static void
                   1330: __wdcerror(chp, msg)
                   1331:        struct channel_softc *chp;
1.2       bouyer   1332:        char *msg;
                   1333: {
1.31      bouyer   1334:        struct wdc_xfer *xfer = chp->ch_queue->sc_xfer.tqh_first;
1.2       bouyer   1335:        if (xfer == NULL)
1.31      bouyer   1336:                printf("%s:%d: %s\n", chp->wdc->sc_dev.dv_xname, chp->channel,
                   1337:                    msg);
1.2       bouyer   1338:        else
1.31      bouyer   1339:                printf("%s:%d:%d: %s\n", chp->wdc->sc_dev.dv_xname,
1.49      bouyer   1340:                    chp->channel, xfer->drive, msg);
1.2       bouyer   1341: }
                   1342:
                   1343: /*
                   1344:  * the bit bucket
                   1345:  */
                   1346: void
1.31      bouyer   1347: wdcbit_bucket(chp, size)
                   1348:        struct channel_softc *chp;
1.2       bouyer   1349:        int size;
                   1350: {
                   1351:
1.12      cgd      1352:        for (; size >= 2; size -= 2)
1.31      bouyer   1353:                (void)bus_space_read_2(chp->cmd_iot, chp->cmd_ioh, wd_data);
1.12      cgd      1354:        if (size)
1.31      bouyer   1355:                (void)bus_space_read_1(chp->cmd_iot, chp->cmd_ioh, wd_data);
1.44      thorpej  1356: }
                   1357:
                   1358: int
                   1359: wdc_addref(chp)
                   1360:        struct channel_softc *chp;
                   1361: {
                   1362:        struct wdc_softc *wdc = chp->wdc;
                   1363:        struct scsipi_adapter *adapter = &wdc->sc_atapi_adapter;
                   1364:        int s, error = 0;
                   1365:
                   1366:        s = splbio();
                   1367:        if (adapter->scsipi_refcnt++ == 0 &&
                   1368:            adapter->scsipi_enable != NULL) {
                   1369:                error = (*adapter->scsipi_enable)(wdc, 1);
                   1370:                if (error)
                   1371:                        adapter->scsipi_refcnt--;
                   1372:        }
                   1373:        splx(s);
                   1374:        return (error);
                   1375: }
                   1376:
                   1377: void
                   1378: wdc_delref(chp)
                   1379:        struct channel_softc *chp;
                   1380: {
                   1381:        struct wdc_softc *wdc = chp->wdc;
                   1382:        struct scsipi_adapter *adapter = &wdc->sc_atapi_adapter;
                   1383:        int s;
                   1384:
                   1385:        s = splbio();
                   1386:        if (adapter->scsipi_refcnt-- == 1 &&
                   1387:            adapter->scsipi_enable != NULL)
                   1388:                (void) (*adapter->scsipi_enable)(wdc, 0);
                   1389:        splx(s);
1.2       bouyer   1390: }

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