Annotation of src/sys/dev/ic/wdc.c, Revision 1.243.2.1
1.243.2.1! pavel 1: /* $NetBSD$ */
1.31 bouyer 2:
3: /*
1.137 bouyer 4: * Copyright (c) 1998, 2001, 2003 Manuel Bouyer. All rights reserved.
1.31 bouyer 5: *
6: * Redistribution and use in source and binary forms, with or without
7: * modification, are permitted provided that the following conditions
8: * are met:
9: * 1. Redistributions of source code must retain the above copyright
10: * notice, this list of conditions and the following disclaimer.
11: * 2. Redistributions in binary form must reproduce the above copyright
12: * notice, this list of conditions and the following disclaimer in the
13: * documentation and/or other materials provided with the distribution.
14: * 3. All advertising materials mentioning features or use of this software
15: * must display the following acknowledgement:
16: * This product includes software developed by Manuel Bouyer.
17: * 4. The name of the author may not be used to endorse or promote products
18: * derived from this software without specific prior written permission.
19: *
20: * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
21: * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
22: * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
23: * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
24: * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
25: * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
26: * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
27: * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
28: * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
29: * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
30: */
1.2 bouyer 31:
1.27 mycroft 32: /*-
1.220 mycroft 33: * Copyright (c) 1998, 2003, 2004 The NetBSD Foundation, Inc.
1.27 mycroft 34: * All rights reserved.
1.2 bouyer 35: *
1.27 mycroft 36: * This code is derived from software contributed to The NetBSD Foundation
37: * by Charles M. Hannum, by Onno van der Linden and by Manuel Bouyer.
1.12 cgd 38: *
1.2 bouyer 39: * Redistribution and use in source and binary forms, with or without
40: * modification, are permitted provided that the following conditions
41: * are met:
42: * 1. Redistributions of source code must retain the above copyright
43: * notice, this list of conditions and the following disclaimer.
44: * 2. Redistributions in binary form must reproduce the above copyright
45: * notice, this list of conditions and the following disclaimer in the
46: * documentation and/or other materials provided with the distribution.
47: * 3. All advertising materials mentioning features or use of this software
48: * must display the following acknowledgement:
1.27 mycroft 49: * This product includes software developed by the NetBSD
50: * Foundation, Inc. and its contributors.
51: * 4. Neither the name of The NetBSD Foundation nor the names of its
52: * contributors may be used to endorse or promote products derived
53: * from this software without specific prior written permission.
1.2 bouyer 54: *
1.27 mycroft 55: * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
56: * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
57: * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
58: * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
59: * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
60: * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
61: * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
62: * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
63: * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
64: * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
65: * POSSIBILITY OF SUCH DAMAGE.
1.2 bouyer 66: */
67:
1.12 cgd 68: /*
69: * CODE UNTESTED IN THE CURRENT REVISION:
70: */
1.100 lukem 71:
72: #include <sys/cdefs.h>
1.243.2.1! pavel 73: __KERNEL_RCSID(0, "$NetBSD$");
1.12 cgd 74:
1.204 thorpej 75: #ifndef ATADEBUG
76: #define ATADEBUG
77: #endif /* ATADEBUG */
1.31 bouyer 78:
1.2 bouyer 79: #include <sys/param.h>
80: #include <sys/systm.h>
81: #include <sys/kernel.h>
82: #include <sys/conf.h>
83: #include <sys/buf.h>
1.31 bouyer 84: #include <sys/device.h>
1.2 bouyer 85: #include <sys/malloc.h>
86: #include <sys/syslog.h>
87: #include <sys/proc.h>
88:
89: #include <machine/intr.h>
90: #include <machine/bus.h>
91:
1.17 sakamoto 92: #ifndef __BUS_SPACE_HAS_STREAM_METHODS
1.31 bouyer 93: #define bus_space_write_multi_stream_2 bus_space_write_multi_2
94: #define bus_space_write_multi_stream_4 bus_space_write_multi_4
95: #define bus_space_read_multi_stream_2 bus_space_read_multi_2
96: #define bus_space_read_multi_stream_4 bus_space_read_multi_4
1.17 sakamoto 97: #endif /* __BUS_SPACE_HAS_STREAM_METHODS */
1.16 sakamoto 98:
1.103 bouyer 99: #include <dev/ata/atavar.h>
1.31 bouyer 100: #include <dev/ata/atareg.h>
1.239 bouyer 101: #include <dev/ata/satareg.h>
102: #include <dev/ata/satavar.h>
1.12 cgd 103: #include <dev/ic/wdcreg.h>
104: #include <dev/ic/wdcvar.h>
1.31 bouyer 105:
1.137 bouyer 106: #include "locators.h"
107:
1.2 bouyer 108: #include "atapibus.h"
1.106 bouyer 109: #include "wd.h"
1.240 bouyer 110: #include "sata.h"
1.2 bouyer 111:
1.31 bouyer 112: #define WDCDELAY 100 /* 100 microseconds */
113: #define WDCNDELAY_RST (WDC_RESET_WAIT * 1000 / WDCDELAY)
1.2 bouyer 114: #if 0
1.31 bouyer 115: /* If you enable this, it will report any delays more than WDCDELAY * N long. */
1.2 bouyer 116: #define WDCNDELAY_DEBUG 50
117: #endif
118:
1.137 bouyer 119: /* When polling wait that much and then tsleep for 1/hz seconds */
1.219 perry 120: #define WDCDELAY_POLL 1 /* ms */
1.137 bouyer 121:
122: /* timeout for the control commands */
123: #define WDC_CTRL_DELAY 10000 /* 10s, for the recall command */
124:
1.224 bouyer 125: /*
126: * timeout when waiting for BSY to deassert when probing.
127: * set to 5s. From the standards this could be up to 31, but we can't
128: * wait that much at boot time, and 5s seems to be enouth.
129: */
130: #define WDC_PROBE_WAIT 5
131:
132:
1.106 bouyer 133: #if NWD > 0
1.103 bouyer 134: extern const struct ata_bustype wdc_ata_bustype; /* in ata_wdc.c */
1.106 bouyer 135: #else
136: /* A fake one, the autoconfig will print "wd at foo ... not configured */
137: const struct ata_bustype wdc_ata_bustype = {
138: SCSIPI_BUSTYPE_ATA,
1.214 enami 139: NULL, /* wdc_ata_bio */
140: NULL, /* wdc_reset_drive */
141: wdc_reset_channel,
142: wdc_exec_command,
143: NULL, /* ata_get_params */
144: NULL, /* wdc_ata_addref */
145: NULL, /* wdc_ata_delref */
146: NULL /* ata_kill_pending */
1.106 bouyer 147: };
148: #endif
1.102 bouyer 149:
1.213 thorpej 150: /* Flags to wdcreset(). */
151: #define RESET_POLL 1
152: #define RESET_SLEEP 0 /* wdcreset() will use tsleep() */
153:
154: static int wdcprobe1(struct ata_channel *, int);
155: static int wdcreset(struct ata_channel *, int);
1.222 christos 156: static void __wdcerror(struct ata_channel *, const char *);
1.205 thorpej 157: static int __wdcwait_reset(struct ata_channel *, int, int);
158: static void __wdccommand_done(struct ata_channel *, struct ata_xfer *);
159: static void __wdccommand_done_end(struct ata_channel *, struct ata_xfer *);
160: static void __wdccommand_kill_xfer(struct ata_channel *,
1.182 bouyer 161: struct ata_xfer *, int);
1.205 thorpej 162: static void __wdccommand_start(struct ata_channel *, struct ata_xfer *);
163: static int __wdccommand_intr(struct ata_channel *, struct ata_xfer *, int);
164: static int __wdcwait(struct ata_channel *, int, int, int);
1.31 bouyer 165:
1.213 thorpej 166: static void wdc_datain_pio(struct ata_channel *, int, void *, size_t);
167: static void wdc_dataout_pio(struct ata_channel *, int, void *, size_t);
168:
1.31 bouyer 169: #define DEBUG_INTR 0x01
170: #define DEBUG_XFERS 0x02
171: #define DEBUG_STATUS 0x04
172: #define DEBUG_FUNCS 0x08
173: #define DEBUG_PROBE 0x10
1.74 enami 174: #define DEBUG_DETACH 0x20
1.87 bouyer 175: #define DEBUG_DELAY 0x40
1.204 thorpej 176: #ifdef ATADEBUG
177: extern int atadebug_mask; /* init'ed in ata.c */
1.31 bouyer 178: int wdc_nxfer = 0;
1.204 thorpej 179: #define ATADEBUG_PRINT(args, level) if (atadebug_mask & (level)) printf args
1.2 bouyer 180: #else
1.204 thorpej 181: #define ATADEBUG_PRINT(args, level)
1.2 bouyer 182: #endif
183:
1.162 thorpej 184: /*
1.176 thorpej 185: * Initialize the "shadow register" handles for a standard wdc controller.
186: */
187: void
1.205 thorpej 188: wdc_init_shadow_regs(struct ata_channel *chp)
1.176 thorpej 189: {
1.206 thorpej 190: struct wdc_regs *wdr = CHAN_TO_WDC_REGS(chp);
1.176 thorpej 191:
1.205 thorpej 192: wdr->cmd_iohs[wd_status] = wdr->cmd_iohs[wd_command];
193: wdr->cmd_iohs[wd_features] = wdr->cmd_iohs[wd_error];
194: }
195:
196: /*
197: * Allocate a wdc_regs array, based on the number of channels.
198: */
199: void
200: wdc_allocate_regs(struct wdc_softc *wdc)
201: {
202:
1.207 thorpej 203: wdc->regs = malloc(wdc->sc_atac.atac_nchannels *
204: sizeof(struct wdc_regs), M_DEVBUF, M_WAITOK);
1.176 thorpej 205: }
206:
1.240 bouyer 207: #if NSATA > 0
1.239 bouyer 208: /*
209: * probe drives on SATA controllers with standard SATA registers:
210: * bring the PHYs online, read the drive signature and set drive flags
211: * appropriately.
212: */
213: void
214: wdc_sataprobe(struct ata_channel *chp)
215: {
216: struct wdc_regs *wdr = CHAN_TO_WDC_REGS(chp);
217: uint16_t scnt, sn, cl, ch;
218: int i, s;
219:
220: /* XXX This should be done by other code. */
221: for (i = 0; i < chp->ch_ndrive; i++) {
222: chp->ch_drive[i].chnl_softc = chp;
223: chp->ch_drive[i].drive = i;
224: }
225:
1.242 bouyer 226: /* reset the PHY and bring online */
227: switch (sata_reset_interface(chp, wdr->sata_iot, wdr->sata_control,
228: wdr->sata_status)) {
1.239 bouyer 229: case SStatus_DET_DEV:
230: bus_space_write_1(wdr->cmd_iot, wdr->cmd_iohs[wd_sdh], 0,
231: WDSD_IBM);
232: delay(10); /* 400ns delay */
233: scnt = bus_space_read_2(wdr->cmd_iot,
234: wdr->cmd_iohs[wd_seccnt], 0);
235: sn = bus_space_read_2(wdr->cmd_iot,
236: wdr->cmd_iohs[wd_sector], 0);
237: cl = bus_space_read_2(wdr->cmd_iot,
238: wdr->cmd_iohs[wd_cyl_lo], 0);
239: ch = bus_space_read_2(wdr->cmd_iot,
240: wdr->cmd_iohs[wd_cyl_hi], 0);
241: ATADEBUG_PRINT(("%s: port %d: scnt=0x%x sn=0x%x "
242: "cl=0x%x ch=0x%x\n",
243: chp->ch_atac->atac_dev.dv_xname, chp->ch_channel,
244: scnt, sn, cl, ch), DEBUG_PROBE);
245: /*
246: * scnt and sn are supposed to be 0x1 for ATAPI, but in some
247: * cases we get wrong values here, so ignore it.
248: */
249: s = splbio();
250: if (cl == 0x14 && ch == 0xeb)
251: chp->ch_drive[0].drive_flags |= DRIVE_ATAPI;
252: else
253: chp->ch_drive[0].drive_flags |= DRIVE_ATA;
254: splx(s);
255:
1.241 bouyer 256: /*
257: * issue a reset in case only the interface part of the drive
258: * is up
259: */
260: if (wdcreset(chp, RESET_SLEEP) != 0)
261: chp->ch_drive[0].drive_flags = 0;
1.239 bouyer 262: break;
263:
264: default:
1.242 bouyer 265: break;
1.239 bouyer 266: }
267: }
1.240 bouyer 268: #endif /* NSATA > 0 */
1.239 bouyer 269:
270:
1.162 thorpej 271: /* Test to see controller with at last one attached drive is there.
272: * Returns a bit for each possible drive found (0x01 for drive 0,
273: * 0x02 for drive 1).
274: * Logic:
275: * - If a status register is at 0xff, assume there is no drive here
276: * (ISA has pull-up resistors). Similarly if the status register has
277: * the value we last wrote to the bus (for IDE interfaces without pullups).
278: * If no drive at all -> return.
279: * - reset the controller, wait for it to complete (may take up to 31s !).
280: * If timeout -> return.
281: * - test ATA/ATAPI signatures. If at last one drive found -> return.
282: * - try an ATA command on the master.
283: */
1.137 bouyer 284:
1.239 bouyer 285: void
1.205 thorpej 286: wdc_drvprobe(struct ata_channel *chp)
1.137 bouyer 287: {
288: struct ataparams params;
1.207 thorpej 289: struct atac_softc *atac = chp->ch_atac;
290: struct wdc_softc *wdc = CHAN_TO_WDC(chp);
1.205 thorpej 291: struct wdc_regs *wdr = &wdc->regs[chp->ch_channel];
1.145 christos 292: u_int8_t st0 = 0, st1 = 0;
1.232 bouyer 293: int i, j, error, s;
1.137 bouyer 294:
1.164 thorpej 295: if (wdcprobe1(chp, 0) == 0) {
296: /* No drives, abort the attach here. */
297: return;
1.161 thorpej 298: }
1.137 bouyer 299:
300: /* for ATA/OLD drives, wait for DRDY, 3s timeout */
301: for (i = 0; i < mstohz(3000); i++) {
1.174 bouyer 302: if (chp->ch_drive[0].drive_flags & (DRIVE_ATA|DRIVE_OLD)) {
1.207 thorpej 303: if (wdc->select)
1.174 bouyer 304: wdc->select(chp,0);
1.205 thorpej 305: bus_space_write_1(wdr->cmd_iot, wdr->cmd_iohs[wd_sdh],
1.174 bouyer 306: 0, WDSD_IBM);
307: delay(10); /* 400ns delay */
1.205 thorpej 308: st0 = bus_space_read_1(wdr->cmd_iot,
309: wdr->cmd_iohs[wd_status], 0);
1.174 bouyer 310: }
1.219 perry 311:
1.174 bouyer 312: if (chp->ch_drive[1].drive_flags & (DRIVE_ATA|DRIVE_OLD)) {
1.207 thorpej 313: if (wdc->select)
1.174 bouyer 314: wdc->select(chp,1);
1.205 thorpej 315: bus_space_write_1(wdr->cmd_iot, wdr->cmd_iohs[wd_sdh],
1.174 bouyer 316: 0, WDSD_IBM | 0x10);
317: delay(10); /* 400ns delay */
1.205 thorpej 318: st1 = bus_space_read_1(wdr->cmd_iot,
319: wdr->cmd_iohs[wd_status], 0);
1.174 bouyer 320: }
1.219 perry 321:
1.137 bouyer 322: if (((chp->ch_drive[0].drive_flags & (DRIVE_ATA|DRIVE_OLD))
323: == 0 ||
324: (st0 & WDCS_DRDY)) &&
325: ((chp->ch_drive[1].drive_flags & (DRIVE_ATA|DRIVE_OLD))
326: == 0 ||
327: (st1 & WDCS_DRDY)))
328: break;
1.164 thorpej 329: tsleep(¶ms, PRIBIO, "atadrdy", 1);
1.137 bouyer 330: }
1.212 thorpej 331: s = splbio();
1.137 bouyer 332: if ((st0 & WDCS_DRDY) == 0)
333: chp->ch_drive[0].drive_flags &= ~(DRIVE_ATA|DRIVE_OLD);
334: if ((st1 & WDCS_DRDY) == 0)
335: chp->ch_drive[1].drive_flags &= ~(DRIVE_ATA|DRIVE_OLD);
1.212 thorpej 336: splx(s);
1.137 bouyer 337:
1.204 thorpej 338: ATADEBUG_PRINT(("%s:%d: wait DRDY st0 0x%x st1 0x%x\n",
1.207 thorpej 339: atac->atac_dev.dv_xname,
1.169 thorpej 340: chp->ch_channel, st0, st1), DEBUG_PROBE);
1.137 bouyer 341:
342: /* Wait a bit, some devices are weird just after a reset. */
343: delay(5000);
344:
1.232 bouyer 345: for (i = 0; i < chp->ch_ndrive; i++) {
1.171 thorpej 346: /* XXX This should be done by other code. */
1.137 bouyer 347: chp->ch_drive[i].chnl_softc = chp;
348: chp->ch_drive[i].drive = i;
1.171 thorpej 349:
1.238 itohy 350: #if NATA_DMA
1.137 bouyer 351: /*
352: * Init error counter so that an error withing the first xfers
353: * will trigger a downgrade
354: */
355: chp->ch_drive[i].n_dmaerrs = NERRS_MAX-1;
1.238 itohy 356: #endif
1.137 bouyer 357:
358: /* If controller can't do 16bit flag the drives as 32bit */
1.207 thorpej 359: if ((atac->atac_cap &
1.212 thorpej 360: (ATAC_CAP_DATA16 | ATAC_CAP_DATA32)) == ATAC_CAP_DATA32) {
361: s = splbio();
1.137 bouyer 362: chp->ch_drive[i].drive_flags |= DRIVE_CAP32;
1.212 thorpej 363: splx(s);
364: }
1.137 bouyer 365: if ((chp->ch_drive[i].drive_flags & DRIVE) == 0)
366: continue;
367:
1.144 briggs 368: /* Shortcut in case we've been shutdown */
1.205 thorpej 369: if (chp->ch_flags & ATACH_SHUTDOWN)
1.164 thorpej 370: return;
1.144 briggs 371:
1.216 bouyer 372: /*
373: * Issue an identify, to try to detect ghosts.
374: * Note that we can't use interrupts here, because if there
375: * is no devices, we will get a command aborted without
376: * interrupts.
377: */
378: error = ata_get_params(&chp->ch_drive[i],
379: AT_WAIT | AT_POLL, ¶ms);
1.137 bouyer 380: if (error != CMD_OK) {
1.164 thorpej 381: tsleep(¶ms, PRIBIO, "atacnf", mstohz(1000));
1.144 briggs 382:
383: /* Shortcut in case we've been shutdown */
1.205 thorpej 384: if (chp->ch_flags & ATACH_SHUTDOWN)
1.164 thorpej 385: return;
1.144 briggs 386:
1.137 bouyer 387: error = ata_get_params(&chp->ch_drive[i],
1.216 bouyer 388: AT_WAIT | AT_POLL, ¶ms);
1.137 bouyer 389: }
390: if (error == CMD_OK) {
1.152 wiz 391: /* If IDENTIFY succeeded, this is not an OLD ctrl */
1.212 thorpej 392: s = splbio();
1.232 bouyer 393: for (j = 0; j < chp->ch_ndrive; j++)
394: chp->ch_drive[j].drive_flags &= ~DRIVE_OLD;
1.212 thorpej 395: splx(s);
1.137 bouyer 396: } else {
1.212 thorpej 397: s = splbio();
1.155 bouyer 398: chp->ch_drive[i].drive_flags &=
1.137 bouyer 399: ~(DRIVE_ATA | DRIVE_ATAPI);
1.212 thorpej 400: splx(s);
1.204 thorpej 401: ATADEBUG_PRINT(("%s:%d:%d: IDENTIFY failed (%d)\n",
1.207 thorpej 402: atac->atac_dev.dv_xname,
1.169 thorpej 403: chp->ch_channel, i, error), DEBUG_PROBE);
1.137 bouyer 404: if ((chp->ch_drive[i].drive_flags & DRIVE_OLD) == 0)
405: continue;
406: /*
407: * Pre-ATA drive ?
408: * Test registers writability (Error register not
409: * writable, but cyllo is), then try an ATA command.
410: */
1.203 thorpej 411: if (wdc->select)
1.169 thorpej 412: wdc->select(chp,i);
1.205 thorpej 413: bus_space_write_1(wdr->cmd_iot,
414: wdr->cmd_iohs[wd_sdh], 0, WDSD_IBM | (i << 4));
1.137 bouyer 415: delay(10); /* 400ns delay */
1.205 thorpej 416: bus_space_write_1(wdr->cmd_iot, wdr->cmd_iohs[wd_error],
1.157 fvdl 417: 0, 0x58);
1.205 thorpej 418: bus_space_write_1(wdr->cmd_iot,
419: wdr->cmd_iohs[wd_cyl_lo], 0, 0xa5);
420: if (bus_space_read_1(wdr->cmd_iot,
421: wdr->cmd_iohs[wd_error], 0) == 0x58 ||
422: bus_space_read_1(wdr->cmd_iot,
423: wdr->cmd_iohs[wd_cyl_lo], 0) != 0xa5) {
1.204 thorpej 424: ATADEBUG_PRINT(("%s:%d:%d: register "
1.137 bouyer 425: "writability failed\n",
1.207 thorpej 426: atac->atac_dev.dv_xname,
1.169 thorpej 427: chp->ch_channel, i), DEBUG_PROBE);
1.212 thorpej 428: s = splbio();
1.137 bouyer 429: chp->ch_drive[i].drive_flags &= ~DRIVE_OLD;
1.212 thorpej 430: splx(s);
1.155 bouyer 431: continue;
1.137 bouyer 432: }
1.166 thorpej 433: if (wdc_wait_for_ready(chp, 10000, 0) == WDCWAIT_TOUT) {
1.204 thorpej 434: ATADEBUG_PRINT(("%s:%d:%d: not ready\n",
1.207 thorpej 435: atac->atac_dev.dv_xname,
1.169 thorpej 436: chp->ch_channel, i), DEBUG_PROBE);
1.212 thorpej 437: s = splbio();
1.137 bouyer 438: chp->ch_drive[i].drive_flags &= ~DRIVE_OLD;
1.212 thorpej 439: splx(s);
1.137 bouyer 440: continue;
441: }
1.205 thorpej 442: bus_space_write_1(wdr->cmd_iot,
443: wdr->cmd_iohs[wd_command], 0, WDCC_RECAL);
1.137 bouyer 444: delay(10); /* 400ns delay */
1.166 thorpej 445: if (wdc_wait_for_ready(chp, 10000, 0) == WDCWAIT_TOUT) {
1.204 thorpej 446: ATADEBUG_PRINT(("%s:%d:%d: WDCC_RECAL failed\n",
1.207 thorpej 447: atac->atac_dev.dv_xname,
1.169 thorpej 448: chp->ch_channel, i), DEBUG_PROBE);
1.212 thorpej 449: s = splbio();
1.137 bouyer 450: chp->ch_drive[i].drive_flags &= ~DRIVE_OLD;
1.212 thorpej 451: splx(s);
1.155 bouyer 452: } else {
1.212 thorpej 453: s = splbio();
1.232 bouyer 454: for (j = 0; j < chp->ch_ndrive; j++)
455: chp->ch_drive[j].drive_flags &=
456: ~(DRIVE_ATA | DRIVE_ATAPI);
1.212 thorpej 457: splx(s);
1.137 bouyer 458: }
459: }
460: }
1.164 thorpej 461: }
462:
1.2 bouyer 463: int
1.205 thorpej 464: wdcprobe(struct ata_channel *chp)
1.12 cgd 465: {
1.228 bouyer 466: struct wdc_softc *wdc = CHAN_TO_WDC(chp);
1.227 bouyer 467: /* default reset method */
468: if (wdc->reset == NULL)
469: wdc->reset = wdc_do_reset;
1.163 thorpej 470:
471: return (wdcprobe1(chp, 1));
1.137 bouyer 472: }
473:
1.167 thorpej 474: static int
1.205 thorpej 475: wdcprobe1(struct ata_channel *chp, int poll)
1.137 bouyer 476: {
1.207 thorpej 477: struct atac_softc *atac = chp->ch_atac;
478: struct wdc_softc *wdc = CHAN_TO_WDC(chp);
1.205 thorpej 479: struct wdc_regs *wdr = &wdc->regs[chp->ch_channel];
1.224 bouyer 480: u_int8_t st0 = 0, st1 = 0, sc, sn, cl, ch;
1.31 bouyer 481: u_int8_t ret_value = 0x03;
482: u_int8_t drive;
1.156 bouyer 483: int s;
1.224 bouyer 484: int wdc_probe_count =
485: poll ? (WDC_PROBE_WAIT / WDCDELAY) : (WDC_PROBE_WAIT * hz);
1.31 bouyer 486:
487: /*
488: * Sanity check to see if the wdc channel responds at all.
489: */
490:
1.174 bouyer 491: s = splbio();
1.207 thorpej 492: if ((wdc->cap & WDC_CAPABILITY_NO_EXTRA_RESETS) == 0) {
1.224 bouyer 493: while (wdc_probe_count-- > 0) {
494: if (wdc->select)
495: wdc->select(chp,0);
1.107 dbj 496:
1.224 bouyer 497: bus_space_write_1(wdr->cmd_iot, wdr->cmd_iohs[wd_sdh],
498: 0, WDSD_IBM);
499: delay(10); /* 400ns delay */
500: st0 = bus_space_read_1(wdr->cmd_iot,
501: wdr->cmd_iohs[wd_status], 0);
1.137 bouyer 502:
1.224 bouyer 503: if (wdc->select)
504: wdc->select(chp,1);
1.219 perry 505:
1.224 bouyer 506: bus_space_write_1(wdr->cmd_iot, wdr->cmd_iohs[wd_sdh],
507: 0, WDSD_IBM | 0x10);
508: delay(10); /* 400ns delay */
509: st1 = bus_space_read_1(wdr->cmd_iot,
510: wdr->cmd_iohs[wd_status], 0);
511: if ((st0 & WDCS_BSY) == 0)
512: break;
513: }
1.43 kenh 514:
1.204 thorpej 515: ATADEBUG_PRINT(("%s:%d: before reset, st0=0x%x, st1=0x%x\n",
1.207 thorpej 516: atac->atac_dev.dv_xname,
1.169 thorpej 517: chp->ch_channel, st0, st1), DEBUG_PROBE);
1.43 kenh 518:
1.142 bouyer 519: if (st0 == 0xff || st0 == WDSD_IBM)
1.43 kenh 520: ret_value &= ~0x01;
1.142 bouyer 521: if (st1 == 0xff || st1 == (WDSD_IBM | 0x10))
1.43 kenh 522: ret_value &= ~0x02;
1.125 mycroft 523: /* Register writability test, drive 0. */
524: if (ret_value & 0x01) {
1.207 thorpej 525: if (wdc->select)
1.169 thorpej 526: wdc->select(chp,0);
1.205 thorpej 527: bus_space_write_1(wdr->cmd_iot, wdr->cmd_iohs[wd_sdh],
1.157 fvdl 528: 0, WDSD_IBM);
1.205 thorpej 529: bus_space_write_1(wdr->cmd_iot,
530: wdr->cmd_iohs[wd_cyl_lo], 0, 0x02);
531: cl = bus_space_read_1(wdr->cmd_iot,
532: wdr->cmd_iohs[wd_cyl_lo], 0);
1.174 bouyer 533: if (cl != 0x02) {
1.204 thorpej 534: ATADEBUG_PRINT(("%s:%d drive 0 wd_cyl_lo: "
1.174 bouyer 535: "got 0x%x != 0x02\n",
1.207 thorpej 536: atac->atac_dev.dv_xname,
1.174 bouyer 537: chp->ch_channel, cl),
538: DEBUG_PROBE);
1.125 mycroft 539: ret_value &= ~0x01;
1.174 bouyer 540: }
1.205 thorpej 541: bus_space_write_1(wdr->cmd_iot,
542: wdr->cmd_iohs[wd_cyl_lo], 0, 0x01);
543: cl = bus_space_read_1(wdr->cmd_iot,
544: wdr->cmd_iohs[wd_cyl_lo], 0);
1.174 bouyer 545: if (cl != 0x01) {
1.204 thorpej 546: ATADEBUG_PRINT(("%s:%d drive 0 wd_cyl_lo: "
1.174 bouyer 547: "got 0x%x != 0x01\n",
1.207 thorpej 548: atac->atac_dev.dv_xname,
1.174 bouyer 549: chp->ch_channel, cl),
550: DEBUG_PROBE);
1.125 mycroft 551: ret_value &= ~0x01;
1.174 bouyer 552: }
1.205 thorpej 553: bus_space_write_1(wdr->cmd_iot,
554: wdr->cmd_iohs[wd_sector], 0, 0x01);
555: cl = bus_space_read_1(wdr->cmd_iot,
556: wdr->cmd_iohs[wd_sector], 0);
1.174 bouyer 557: if (cl != 0x01) {
1.204 thorpej 558: ATADEBUG_PRINT(("%s:%d drive 0 wd_sector: "
1.174 bouyer 559: "got 0x%x != 0x01\n",
1.207 thorpej 560: atac->atac_dev.dv_xname,
1.174 bouyer 561: chp->ch_channel, cl),
562: DEBUG_PROBE);
1.125 mycroft 563: ret_value &= ~0x01;
1.174 bouyer 564: }
1.205 thorpej 565: bus_space_write_1(wdr->cmd_iot,
566: wdr->cmd_iohs[wd_sector], 0, 0x02);
567: cl = bus_space_read_1(wdr->cmd_iot,
568: wdr->cmd_iohs[wd_sector], 0);
1.174 bouyer 569: if (cl != 0x02) {
1.204 thorpej 570: ATADEBUG_PRINT(("%s:%d drive 0 wd_sector: "
1.174 bouyer 571: "got 0x%x != 0x02\n",
1.207 thorpej 572: atac->atac_dev.dv_xname,
1.174 bouyer 573: chp->ch_channel, cl),
574: DEBUG_PROBE);
1.125 mycroft 575: ret_value &= ~0x01;
1.174 bouyer 576: }
1.205 thorpej 577: cl = bus_space_read_1(wdr->cmd_iot,
578: wdr->cmd_iohs[wd_cyl_lo], 0);
1.174 bouyer 579: if (cl != 0x01) {
1.204 thorpej 580: ATADEBUG_PRINT(("%s:%d drive 0 wd_cyl_lo(2): "
1.174 bouyer 581: "got 0x%x != 0x01\n",
1.207 thorpej 582: atac->atac_dev.dv_xname,
1.174 bouyer 583: chp->ch_channel, cl),
584: DEBUG_PROBE);
1.131 mycroft 585: ret_value &= ~0x01;
1.174 bouyer 586: }
1.125 mycroft 587: }
588: /* Register writability test, drive 1. */
589: if (ret_value & 0x02) {
1.207 thorpej 590: if (wdc->select)
1.169 thorpej 591: wdc->select(chp,1);
1.205 thorpej 592: bus_space_write_1(wdr->cmd_iot, wdr->cmd_iohs[wd_sdh],
1.157 fvdl 593: 0, WDSD_IBM | 0x10);
1.205 thorpej 594: bus_space_write_1(wdr->cmd_iot,
595: wdr->cmd_iohs[wd_cyl_lo], 0, 0x02);
596: cl = bus_space_read_1(wdr->cmd_iot,
597: wdr->cmd_iohs[wd_cyl_lo], 0);
1.174 bouyer 598: if (cl != 0x02) {
1.204 thorpej 599: ATADEBUG_PRINT(("%s:%d drive 1 wd_cyl_lo: "
1.174 bouyer 600: "got 0x%x != 0x02\n",
1.207 thorpej 601: atac->atac_dev.dv_xname,
1.174 bouyer 602: chp->ch_channel, cl),
603: DEBUG_PROBE);
1.125 mycroft 604: ret_value &= ~0x02;
1.174 bouyer 605: }
1.205 thorpej 606: bus_space_write_1(wdr->cmd_iot,
607: wdr->cmd_iohs[wd_cyl_lo], 0, 0x01);
608: cl = bus_space_read_1(wdr->cmd_iot,
609: wdr->cmd_iohs[wd_cyl_lo], 0);
1.174 bouyer 610: if (cl != 0x01) {
1.204 thorpej 611: ATADEBUG_PRINT(("%s:%d drive 1 wd_cyl_lo: "
1.174 bouyer 612: "got 0x%x != 0x01\n",
1.207 thorpej 613: atac->atac_dev.dv_xname,
1.174 bouyer 614: chp->ch_channel, cl),
615: DEBUG_PROBE);
1.125 mycroft 616: ret_value &= ~0x02;
1.174 bouyer 617: }
1.205 thorpej 618: bus_space_write_1(wdr->cmd_iot,
619: wdr->cmd_iohs[wd_sector], 0, 0x01);
620: cl = bus_space_read_1(wdr->cmd_iot,
621: wdr->cmd_iohs[wd_sector], 0);
1.174 bouyer 622: if (cl != 0x01) {
1.204 thorpej 623: ATADEBUG_PRINT(("%s:%d drive 1 wd_sector: "
1.174 bouyer 624: "got 0x%x != 0x01\n",
1.207 thorpej 625: atac->atac_dev.dv_xname,
1.174 bouyer 626: chp->ch_channel, cl),
627: DEBUG_PROBE);
1.125 mycroft 628: ret_value &= ~0x02;
1.174 bouyer 629: }
1.205 thorpej 630: bus_space_write_1(wdr->cmd_iot,
631: wdr->cmd_iohs[wd_sector], 0, 0x02);
632: cl = bus_space_read_1(wdr->cmd_iot,
633: wdr->cmd_iohs[wd_sector], 0);
1.174 bouyer 634: if (cl != 0x02) {
1.204 thorpej 635: ATADEBUG_PRINT(("%s:%d drive 1 wd_sector: "
1.174 bouyer 636: "got 0x%x != 0x02\n",
1.207 thorpej 637: atac->atac_dev.dv_xname,
1.174 bouyer 638: chp->ch_channel, cl),
639: DEBUG_PROBE);
1.125 mycroft 640: ret_value &= ~0x02;
1.174 bouyer 641: }
1.205 thorpej 642: cl = bus_space_read_1(wdr->cmd_iot,
643: wdr->cmd_iohs[wd_cyl_lo], 0);
1.174 bouyer 644: if (cl != 0x01) {
1.204 thorpej 645: ATADEBUG_PRINT(("%s:%d drive 1 wd_cyl_lo(2): "
1.174 bouyer 646: "got 0x%x != 0x01\n",
1.207 thorpej 647: atac->atac_dev.dv_xname,
1.174 bouyer 648: chp->ch_channel, cl),
649: DEBUG_PROBE);
1.131 mycroft 650: ret_value &= ~0x02;
1.174 bouyer 651: }
1.125 mycroft 652: }
1.137 bouyer 653:
1.174 bouyer 654: if (ret_value == 0) {
655: splx(s);
1.137 bouyer 656: return 0;
1.174 bouyer 657: }
1.62 bouyer 658: }
1.31 bouyer 659:
1.174 bouyer 660:
1.181 bouyer 661: #if 0 /* XXX this break some ATA or ATAPI devices */
1.174 bouyer 662: /*
663: * reset bus. Also send an ATAPI_RESET to devices, in case there are
664: * ATAPI device out there which don't react to the bus reset
665: */
666: if (ret_value & 0x01) {
1.207 thorpej 667: if (wdc->select)
1.174 bouyer 668: wdc->select(chp,0);
1.205 thorpej 669: bus_space_write_1(wdr->cmd_iot, wdr->cmd_iohs[wd_sdh],
1.174 bouyer 670: 0, WDSD_IBM);
1.205 thorpej 671: bus_space_write_1(wdr->cmd_iot, wdr->cmd_iohs[wd_command], 0,
1.174 bouyer 672: ATAPI_SOFT_RESET);
673: }
674: if (ret_value & 0x02) {
1.207 thorpej 675: if (wdc->select)
1.174 bouyer 676: wdc->select(chp,0);
1.205 thorpej 677: bus_space_write_1(wdr->cmd_iot, wdr->cmd_iohs[wd_sdh],
1.174 bouyer 678: 0, WDSD_IBM | 0x10);
1.205 thorpej 679: bus_space_write_1(wdr->cmd_iot, wdr->cmd_iohs[wd_command], 0,
1.174 bouyer 680: ATAPI_SOFT_RESET);
681: }
1.156 bouyer 682:
1.175 bouyer 683: delay(5000);
1.181 bouyer 684: #endif
1.175 bouyer 685:
1.225 bouyer 686: wdc->reset(chp, RESET_POLL);
1.137 bouyer 687: DELAY(2000);
1.205 thorpej 688: (void) bus_space_read_1(wdr->cmd_iot, wdr->cmd_iohs[wd_error], 0);
689: bus_space_write_1(wdr->ctl_iot, wdr->ctl_ioh, wd_aux_ctlr, WDCTL_4BIT);
1.156 bouyer 690: splx(s);
1.137 bouyer 691:
692: ret_value = __wdcwait_reset(chp, ret_value, poll);
1.204 thorpej 693: ATADEBUG_PRINT(("%s:%d: after reset, ret_value=0x%d\n",
1.207 thorpej 694: atac->atac_dev.dv_xname, chp->ch_channel,
1.137 bouyer 695: ret_value), DEBUG_PROBE);
1.12 cgd 696:
1.137 bouyer 697: /* if reset failed, there's nothing here */
698: if (ret_value == 0)
699: return 0;
1.67 bouyer 700:
1.12 cgd 701: /*
1.167 thorpej 702: * Test presence of drives. First test register signatures looking
703: * for ATAPI devices. If it's not an ATAPI and reset said there may
704: * be something here assume it's ATA or OLD. Ghost will be killed
705: * later in attach routine.
1.12 cgd 706: */
1.232 bouyer 707: for (drive = 0; drive < chp->ch_ndrive; drive++) {
1.137 bouyer 708: if ((ret_value & (0x01 << drive)) == 0)
709: continue;
1.207 thorpej 710: if (wdc->select)
1.169 thorpej 711: wdc->select(chp,drive);
1.205 thorpej 712: bus_space_write_1(wdr->cmd_iot, wdr->cmd_iohs[wd_sdh], 0,
1.137 bouyer 713: WDSD_IBM | (drive << 4));
714: delay(10); /* 400ns delay */
715: /* Save registers contents */
1.205 thorpej 716: sc = bus_space_read_1(wdr->cmd_iot,
717: wdr->cmd_iohs[wd_seccnt], 0);
718: sn = bus_space_read_1(wdr->cmd_iot,
719: wdr->cmd_iohs[wd_sector], 0);
720: cl = bus_space_read_1(wdr->cmd_iot,
721: wdr->cmd_iohs[wd_cyl_lo], 0);
722: ch = bus_space_read_1(wdr->cmd_iot,
723: wdr->cmd_iohs[wd_cyl_hi], 0);
1.137 bouyer 724:
1.204 thorpej 725: ATADEBUG_PRINT(("%s:%d:%d: after reset, sc=0x%x sn=0x%x "
1.137 bouyer 726: "cl=0x%x ch=0x%x\n",
1.207 thorpej 727: atac->atac_dev.dv_xname,
1.169 thorpej 728: chp->ch_channel, drive, sc, sn, cl, ch), DEBUG_PROBE);
1.31 bouyer 729: /*
1.137 bouyer 730: * sc & sn are supposted to be 0x1 for ATAPI but in some cases
731: * we get wrong values here, so ignore it.
1.31 bouyer 732: */
1.212 thorpej 733: s = splbio();
1.137 bouyer 734: if (cl == 0x14 && ch == 0xeb) {
735: chp->ch_drive[drive].drive_flags |= DRIVE_ATAPI;
736: } else {
737: chp->ch_drive[drive].drive_flags |= DRIVE_ATA;
1.223 bouyer 738: if ((wdc->cap & WDC_CAPABILITY_PREATA) != 0)
1.137 bouyer 739: chp->ch_drive[drive].drive_flags |= DRIVE_OLD;
740: }
1.212 thorpej 741: splx(s);
1.31 bouyer 742: }
1.219 perry 743: return (ret_value);
1.137 bouyer 744: }
1.31 bouyer 745:
1.137 bouyer 746: void
1.205 thorpej 747: wdcattach(struct ata_channel *chp)
1.137 bouyer 748: {
1.207 thorpej 749: struct atac_softc *atac = chp->ch_atac;
750: struct wdc_softc *wdc = CHAN_TO_WDC(chp);
1.32 bouyer 751:
1.232 bouyer 752: KASSERT(chp->ch_ndrive > 0 && chp->ch_ndrive < 3);
1.205 thorpej 753:
1.191 mycroft 754: /* default data transfer methods */
1.210 thorpej 755: if (wdc->datain_pio == NULL)
1.191 mycroft 756: wdc->datain_pio = wdc_datain_pio;
1.210 thorpej 757: if (wdc->dataout_pio == NULL)
1.191 mycroft 758: wdc->dataout_pio = wdc_dataout_pio;
1.225 bouyer 759: /* default reset method */
760: if (wdc->reset == NULL)
761: wdc->reset = wdc_do_reset;
1.191 mycroft 762:
1.137 bouyer 763: /* initialise global data */
1.208 thorpej 764: if (atac->atac_bustype_ata == NULL)
765: atac->atac_bustype_ata = &wdc_ata_bustype;
1.207 thorpej 766: if (atac->atac_probe == NULL)
767: atac->atac_probe = wdc_drvprobe;
1.208 thorpej 768: #if NATAPIBUS > 0
769: if (atac->atac_atapibus_attach == NULL)
770: atac->atac_atapibus_attach = wdc_atapibus_attach;
771: #endif
1.198 thorpej 772:
1.210 thorpej 773: ata_channel_attach(chp);
1.74 enami 774: }
775:
1.163 thorpej 776: int
777: wdcactivate(struct device *self, enum devact act)
1.137 bouyer 778: {
1.207 thorpej 779: struct atac_softc *atac = (struct atac_softc *) self;
1.137 bouyer 780: int s, i, error = 0;
781:
782: s = splbio();
783: switch (act) {
784: case DVACT_ACTIVATE:
785: error = EOPNOTSUPP;
786: break;
787:
788: case DVACT_DEACTIVATE:
1.207 thorpej 789: for (i = 0; i < atac->atac_nchannels; i++) {
790: error =
791: config_deactivate(atac->atac_channels[i]->atabus);
1.137 bouyer 792: if (error)
793: break;
794: }
795: break;
796: }
797: splx(s);
798: return (error);
799: }
1.219 perry 800:
1.137 bouyer 801: int
1.163 thorpej 802: wdcdetach(struct device *self, int flags)
1.137 bouyer 803: {
1.207 thorpej 804: struct atac_softc *atac = (struct atac_softc *) self;
1.205 thorpej 805: struct ata_channel *chp;
1.207 thorpej 806: struct scsipi_adapter *adapt = &atac->atac_atapi_adapter._generic;
1.137 bouyer 807: int i, error = 0;
808:
1.207 thorpej 809: for (i = 0; i < atac->atac_nchannels; i++) {
810: chp = atac->atac_channels[i];
1.204 thorpej 811: ATADEBUG_PRINT(("wdcdetach: %s: detaching %s\n",
1.207 thorpej 812: atac->atac_dev.dv_xname, chp->atabus->dv_xname),
813: DEBUG_DETACH);
1.137 bouyer 814: error = config_detach(chp->atabus, flags);
815: if (error)
816: break;
817: }
1.188 mycroft 818: if (adapt->adapt_refcnt != 0) {
819: #ifdef DIAGNOSTIC
820: printf("wdcdetach: refcnt should be 0 here??\n");
821: #endif
1.207 thorpej 822: (void) (*adapt->adapt_enable)(&atac->atac_dev, 0);
1.188 mycroft 823: }
1.137 bouyer 824: return (error);
825: }
826:
1.31 bouyer 827: /* restart an interrupted I/O */
828: void
1.163 thorpej 829: wdcrestart(void *v)
1.31 bouyer 830: {
1.205 thorpej 831: struct ata_channel *chp = v;
1.31 bouyer 832: int s;
1.2 bouyer 833:
1.31 bouyer 834: s = splbio();
1.202 thorpej 835: atastart(chp);
1.31 bouyer 836: splx(s);
1.2 bouyer 837: }
1.219 perry 838:
1.2 bouyer 839:
1.31 bouyer 840: /*
841: * Interrupt routine for the controller. Acknowledge the interrupt, check for
842: * errors on the current operation, mark it done if necessary, and start the
843: * next request. Also check for a partially done transfer, and continue with
844: * the next chunk if so.
845: */
1.12 cgd 846: int
1.163 thorpej 847: wdcintr(void *arg)
1.12 cgd 848: {
1.205 thorpej 849: struct ata_channel *chp = arg;
1.207 thorpej 850: struct atac_softc *atac = chp->ch_atac;
851: struct wdc_softc *wdc = CHAN_TO_WDC(chp);
1.205 thorpej 852: struct wdc_regs *wdr = &wdc->regs[chp->ch_channel];
1.165 thorpej 853: struct ata_xfer *xfer;
1.76 bouyer 854: int ret;
1.12 cgd 855:
1.235 thorpej 856: if (!device_is_active(&atac->atac_dev)) {
1.204 thorpej 857: ATADEBUG_PRINT(("wdcintr: deactivated controller\n"),
1.80 enami 858: DEBUG_INTR);
859: return (0);
860: }
1.205 thorpej 861: if ((chp->ch_flags & ATACH_IRQ_WAIT) == 0) {
1.204 thorpej 862: ATADEBUG_PRINT(("wdcintr: inactive controller\n"), DEBUG_INTR);
1.113 bouyer 863: /* try to clear the pending interrupt anyway */
1.205 thorpej 864: (void)bus_space_read_1(wdr->cmd_iot,
865: wdr->cmd_iohs[wd_status], 0);
1.80 enami 866: return (0);
1.31 bouyer 867: }
1.12 cgd 868:
1.204 thorpej 869: ATADEBUG_PRINT(("wdcintr\n"), DEBUG_INTR);
1.186 bouyer 870: xfer = chp->ch_queue->active_xfer;
871: #ifdef DIAGNOSTIC
872: if (xfer == NULL)
873: panic("wdcintr: no xfer");
1.233 bouyer 874: if (xfer->c_chp != chp) {
875: printf("channel %d expected %d\n", xfer->c_chp->ch_channel,
876: chp->ch_channel);
877: panic("wdcintr: wrong channel");
878: }
1.186 bouyer 879: #endif
1.238 itohy 880: #if NATA_DMA || NATA_PIOBM
1.205 thorpej 881: if (chp->ch_flags & ATACH_DMA_WAIT) {
1.169 thorpej 882: wdc->dma_status =
883: (*wdc->dma_finish)(wdc->dma_arg, chp->ch_channel,
1.185 bouyer 884: xfer->c_drive, WDC_DMAEND_END);
1.169 thorpej 885: if (wdc->dma_status & WDC_DMAST_NOIRQ) {
1.84 bouyer 886: /* IRQ not for us, not detected by DMA engine */
887: return 0;
888: }
1.205 thorpej 889: chp->ch_flags &= ~ATACH_DMA_WAIT;
1.84 bouyer 890: }
1.238 itohy 891: #endif
1.205 thorpej 892: chp->ch_flags &= ~ATACH_IRQ_WAIT;
1.76 bouyer 893: ret = xfer->c_intr(chp, xfer, 1);
894: if (ret == 0) /* irq was not for us, still waiting for irq */
1.205 thorpej 895: chp->ch_flags |= ATACH_IRQ_WAIT;
1.76 bouyer 896: return (ret);
1.12 cgd 897: }
898:
1.31 bouyer 899: /* Put all disk in RESET state */
1.125 mycroft 900: void
1.183 bouyer 901: wdc_reset_drive(struct ata_drive_datas *drvp, int flags)
1.2 bouyer 902: {
1.205 thorpej 903: struct ata_channel *chp = drvp->chnl_softc;
1.207 thorpej 904: struct atac_softc *atac = chp->ch_atac;
905:
1.211 thorpej 906: ATADEBUG_PRINT(("wdc_reset_drive %s:%d for drive %d\n",
1.207 thorpej 907: atac->atac_dev.dv_xname, chp->ch_channel, drvp->drive),
1.34 bouyer 908: DEBUG_FUNCS);
1.182 bouyer 909:
1.211 thorpej 910: ata_reset_channel(chp, flags);
1.182 bouyer 911: }
912:
1.183 bouyer 913: void
1.205 thorpej 914: wdc_reset_channel(struct ata_channel *chp, int flags)
1.182 bouyer 915: {
1.186 bouyer 916: TAILQ_HEAD(, ata_xfer) reset_xfer;
1.183 bouyer 917: struct ata_xfer *xfer, *next_xfer;
1.238 itohy 918: #if NATA_DMA || NATA_PIOBM
1.207 thorpej 919: struct wdc_softc *wdc = CHAN_TO_WDC(chp);
1.238 itohy 920: #endif
1.182 bouyer 921:
1.186 bouyer 922: TAILQ_INIT(&reset_xfer);
1.184 bouyer 923:
1.211 thorpej 924: chp->ch_flags &= ~ATACH_IRQ_WAIT;
1.184 bouyer 925:
1.186 bouyer 926: /*
927: * if the current command if on an ATAPI device, issue a
928: * ATAPI_SOFT_RESET
929: */
930: xfer = chp->ch_queue->active_xfer;
931: if (xfer && xfer->c_chp == chp && (xfer->c_flags & C_ATAPI)) {
932: wdccommandshort(chp, xfer->c_drive, ATAPI_SOFT_RESET);
933: if (flags & AT_WAIT)
934: tsleep(&flags, PRIBIO, "atardl", mstohz(1) + 1);
1.219 perry 935: else
1.186 bouyer 936: delay(1000);
937: }
938:
1.184 bouyer 939: /* reset the channel */
1.186 bouyer 940: if (flags & AT_WAIT)
941: (void) wdcreset(chp, RESET_SLEEP);
942: else
1.184 bouyer 943: (void) wdcreset(chp, RESET_POLL);
944:
945: /*
1.186 bouyer 946: * wait a bit after reset; in case the DMA engines needs some time
1.184 bouyer 947: * to recover.
948: */
949: if (flags & AT_WAIT)
1.186 bouyer 950: tsleep(&flags, PRIBIO, "atardl", mstohz(1) + 1);
1.219 perry 951: else
1.184 bouyer 952: delay(1000);
1.182 bouyer 953: /*
954: * look for pending xfers. If we have a shared queue, we'll also reset
955: * the other channel if the current xfer is running on it.
1.184 bouyer 956: * Then we'll dequeue only the xfers for this channel.
1.182 bouyer 957: */
958: if ((flags & AT_RST_NOCMD) == 0) {
1.186 bouyer 959: /*
960: * move all xfers queued for this channel to the reset queue,
961: * and then process the current xfer and then the reset queue.
962: * We have to use a temporary queue because c_kill_xfer()
963: * may requeue commands.
964: */
965: for (xfer = TAILQ_FIRST(&chp->ch_queue->queue_xfer);
966: xfer != NULL; xfer = next_xfer) {
967: next_xfer = TAILQ_NEXT(xfer, c_xferchain);
968: if (xfer->c_chp != chp)
969: continue;
970: TAILQ_REMOVE(&chp->ch_queue->queue_xfer,
971: xfer, c_xferchain);
972: TAILQ_INSERT_TAIL(&reset_xfer, xfer, c_xferchain);
973: }
974: xfer = chp->ch_queue->active_xfer;
1.184 bouyer 975: if (xfer) {
976: if (xfer->c_chp != chp)
1.211 thorpej 977: ata_reset_channel(xfer->c_chp, flags);
1.184 bouyer 978: else {
1.186 bouyer 979: callout_stop(&chp->ch_callout);
1.238 itohy 980: #if NATA_DMA || NATA_PIOBM
1.184 bouyer 981: /*
982: * If we're waiting for DMA, stop the
983: * DMA engine
984: */
1.205 thorpej 985: if (chp->ch_flags & ATACH_DMA_WAIT) {
1.207 thorpej 986: (*wdc->dma_finish)(
987: wdc->dma_arg,
1.184 bouyer 988: chp->ch_channel,
989: xfer->c_drive,
1.185 bouyer 990: WDC_DMAEND_ABRT_QUIET);
1.205 thorpej 991: chp->ch_flags &= ~ATACH_DMA_WAIT;
1.184 bouyer 992: }
1.238 itohy 993: #endif
1.186 bouyer 994: chp->ch_queue->active_xfer = NULL;
995: if ((flags & AT_RST_EMERG) == 0)
996: xfer->c_kill_xfer(
997: chp, xfer, KILL_RESET);
1.184 bouyer 998: }
999: }
1.186 bouyer 1000:
1001: for (xfer = TAILQ_FIRST(&reset_xfer);
1.183 bouyer 1002: xfer != NULL; xfer = next_xfer) {
1003: next_xfer = TAILQ_NEXT(xfer, c_xferchain);
1.186 bouyer 1004: TAILQ_REMOVE(&reset_xfer, xfer, c_xferchain);
1.182 bouyer 1005: if ((flags & AT_RST_EMERG) == 0)
1006: xfer->c_kill_xfer(chp, xfer, KILL_RESET);
1007: }
1008: }
1.31 bouyer 1009: }
1.12 cgd 1010:
1.213 thorpej 1011: static int
1.205 thorpej 1012: wdcreset(struct ata_channel *chp, int poll)
1.31 bouyer 1013: {
1.207 thorpej 1014: struct atac_softc *atac = chp->ch_atac;
1015: struct wdc_softc *wdc = CHAN_TO_WDC(chp);
1.205 thorpej 1016: struct wdc_regs *wdr = &wdc->regs[chp->ch_channel];
1.31 bouyer 1017: int drv_mask1, drv_mask2;
1.225 bouyer 1018:
1019: wdc->reset(chp, poll);
1020:
1021: drv_mask1 = (chp->ch_drive[0].drive_flags & DRIVE) ? 0x01:0x00;
1022: drv_mask1 |= (chp->ch_drive[1].drive_flags & DRIVE) ? 0x02:0x00;
1023: drv_mask2 = __wdcwait_reset(chp, drv_mask1,
1024: (poll == RESET_SLEEP) ? 0 : 1);
1025: if (drv_mask2 != drv_mask1) {
1026: printf("%s channel %d: reset failed for",
1027: atac->atac_dev.dv_xname, chp->ch_channel);
1028: if ((drv_mask1 & 0x01) != 0 && (drv_mask2 & 0x01) == 0)
1029: printf(" drive 0");
1030: if ((drv_mask1 & 0x02) != 0 && (drv_mask2 & 0x02) == 0)
1031: printf(" drive 1");
1032: printf("\n");
1033: }
1034: bus_space_write_1(wdr->ctl_iot, wdr->ctl_ioh, wd_aux_ctlr, WDCTL_4BIT);
1035: return (drv_mask1 != drv_mask2) ? 1 : 0;
1036: }
1037:
1038: void
1039: wdc_do_reset(struct ata_channel *chp, int poll)
1040: {
1041: struct wdc_softc *wdc = CHAN_TO_WDC(chp);
1042: struct wdc_regs *wdr = &wdc->regs[chp->ch_channel];
1.156 bouyer 1043: int s = 0;
1.2 bouyer 1044:
1.225 bouyer 1045: if (poll != RESET_SLEEP)
1046: s = splbio();
1.203 thorpej 1047: if (wdc->select)
1.169 thorpej 1048: wdc->select(chp,0);
1.157 fvdl 1049: /* master */
1.205 thorpej 1050: bus_space_write_1(wdr->cmd_iot, wdr->cmd_iohs[wd_sdh], 0, WDSD_IBM);
1.131 mycroft 1051: delay(10); /* 400ns delay */
1.225 bouyer 1052: /* assert SRST, wait for reset to complete */
1.205 thorpej 1053: bus_space_write_1(wdr->ctl_iot, wdr->ctl_ioh, wd_aux_ctlr,
1.131 mycroft 1054: WDCTL_RST | WDCTL_IDS | WDCTL_4BIT);
1055: delay(2000);
1.205 thorpej 1056: (void) bus_space_read_1(wdr->cmd_iot, wdr->cmd_iohs[wd_error], 0);
1057: bus_space_write_1(wdr->ctl_iot, wdr->ctl_ioh, wd_aux_ctlr,
1.137 bouyer 1058: WDCTL_4BIT | WDCTL_IDS);
1.131 mycroft 1059: delay(10); /* 400ns delay */
1.156 bouyer 1060: if (poll != RESET_SLEEP) {
1.233 bouyer 1061: /* ACK interrupt in case there is one pending left */
1.203 thorpej 1062: if (wdc->irqack)
1.169 thorpej 1063: wdc->irqack(chp);
1.156 bouyer 1064: splx(s);
1065: }
1.31 bouyer 1066: }
1067:
1068: static int
1.205 thorpej 1069: __wdcwait_reset(struct ata_channel *chp, int drv_mask, int poll)
1.31 bouyer 1070: {
1.207 thorpej 1071: struct atac_softc *atac = chp->ch_atac;
1072: struct wdc_softc *wdc = CHAN_TO_WDC(chp);
1.205 thorpej 1073: struct wdc_regs *wdr = &wdc->regs[chp->ch_channel];
1.137 bouyer 1074: int timeout, nloop;
1.149 bouyer 1075: u_int8_t st0 = 0, st1 = 0;
1.204 thorpej 1076: #ifdef ATADEBUG
1.146 christos 1077: u_int8_t sc0 = 0, sn0 = 0, cl0 = 0, ch0 = 0;
1078: u_int8_t sc1 = 0, sn1 = 0, cl1 = 0, ch1 = 0;
1.70 bouyer 1079: #endif
1.137 bouyer 1080:
1081: if (poll)
1082: nloop = WDCNDELAY_RST;
1083: else
1084: nloop = WDC_RESET_WAIT * hz / 1000;
1.31 bouyer 1085: /* wait for BSY to deassert */
1.137 bouyer 1086: for (timeout = 0; timeout < nloop; timeout++) {
1.174 bouyer 1087: if ((drv_mask & 0x01) != 0) {
1.236 bouyer 1088: if (wdc->select)
1.174 bouyer 1089: wdc->select(chp,0);
1.205 thorpej 1090: bus_space_write_1(wdr->cmd_iot, wdr->cmd_iohs[wd_sdh],
1.174 bouyer 1091: 0, WDSD_IBM); /* master */
1092: delay(10);
1.205 thorpej 1093: st0 = bus_space_read_1(wdr->cmd_iot,
1094: wdr->cmd_iohs[wd_status], 0);
1.204 thorpej 1095: #ifdef ATADEBUG
1.205 thorpej 1096: sc0 = bus_space_read_1(wdr->cmd_iot,
1097: wdr->cmd_iohs[wd_seccnt], 0);
1098: sn0 = bus_space_read_1(wdr->cmd_iot,
1099: wdr->cmd_iohs[wd_sector], 0);
1100: cl0 = bus_space_read_1(wdr->cmd_iot,
1101: wdr->cmd_iohs[wd_cyl_lo], 0);
1102: ch0 = bus_space_read_1(wdr->cmd_iot,
1103: wdr->cmd_iohs[wd_cyl_hi], 0);
1.70 bouyer 1104: #endif
1.174 bouyer 1105: }
1106: if ((drv_mask & 0x02) != 0) {
1.236 bouyer 1107: if (wdc->select)
1.174 bouyer 1108: wdc->select(chp,1);
1.205 thorpej 1109: bus_space_write_1(wdr->cmd_iot, wdr->cmd_iohs[wd_sdh],
1.174 bouyer 1110: 0, WDSD_IBM | 0x10); /* slave */
1111: delay(10);
1.205 thorpej 1112: st1 = bus_space_read_1(wdr->cmd_iot,
1113: wdr->cmd_iohs[wd_status], 0);
1.204 thorpej 1114: #ifdef ATADEBUG
1.205 thorpej 1115: sc1 = bus_space_read_1(wdr->cmd_iot,
1116: wdr->cmd_iohs[wd_seccnt], 0);
1117: sn1 = bus_space_read_1(wdr->cmd_iot,
1118: wdr->cmd_iohs[wd_sector], 0);
1119: cl1 = bus_space_read_1(wdr->cmd_iot,
1120: wdr->cmd_iohs[wd_cyl_lo], 0);
1121: ch1 = bus_space_read_1(wdr->cmd_iot,
1122: wdr->cmd_iohs[wd_cyl_hi], 0);
1.70 bouyer 1123: #endif
1.174 bouyer 1124: }
1.31 bouyer 1125:
1126: if ((drv_mask & 0x01) == 0) {
1127: /* no master */
1128: if ((drv_mask & 0x02) != 0 && (st1 & WDCS_BSY) == 0) {
1129: /* No master, slave is ready, it's done */
1.65 bouyer 1130: goto end;
1.31 bouyer 1131: }
1.231 bouyer 1132: if ((drv_mask & 0x02) == 0) {
1133: /* No master, no slave: it's done */
1134: goto end;
1135: }
1.31 bouyer 1136: } else if ((drv_mask & 0x02) == 0) {
1137: /* no slave */
1138: if ((drv_mask & 0x01) != 0 && (st0 & WDCS_BSY) == 0) {
1139: /* No slave, master is ready, it's done */
1.65 bouyer 1140: goto end;
1.31 bouyer 1141: }
1.2 bouyer 1142: } else {
1.31 bouyer 1143: /* Wait for both master and slave to be ready */
1144: if ((st0 & WDCS_BSY) == 0 && (st1 & WDCS_BSY) == 0) {
1.65 bouyer 1145: goto end;
1.2 bouyer 1146: }
1147: }
1.137 bouyer 1148: if (poll)
1149: delay(WDCDELAY);
1150: else
1151: tsleep(&nloop, PRIBIO, "atarst", 1);
1.2 bouyer 1152: }
1.116 wiz 1153: /* Reset timed out. Maybe it's because drv_mask was not right */
1.31 bouyer 1154: if (st0 & WDCS_BSY)
1155: drv_mask &= ~0x01;
1156: if (st1 & WDCS_BSY)
1157: drv_mask &= ~0x02;
1.65 bouyer 1158: end:
1.204 thorpej 1159: ATADEBUG_PRINT(("%s:%d:0: after reset, sc=0x%x sn=0x%x "
1.70 bouyer 1160: "cl=0x%x ch=0x%x\n",
1.207 thorpej 1161: atac->atac_dev.dv_xname,
1.169 thorpej 1162: chp->ch_channel, sc0, sn0, cl0, ch0), DEBUG_PROBE);
1.204 thorpej 1163: ATADEBUG_PRINT(("%s:%d:1: after reset, sc=0x%x sn=0x%x "
1.70 bouyer 1164: "cl=0x%x ch=0x%x\n",
1.207 thorpej 1165: atac->atac_dev.dv_xname,
1.169 thorpej 1166: chp->ch_channel, sc1, sn1, cl1, ch1), DEBUG_PROBE);
1.70 bouyer 1167:
1.204 thorpej 1168: ATADEBUG_PRINT(("%s:%d: wdcwait_reset() end, st0=0x%x st1=0x%x\n",
1.207 thorpej 1169: atac->atac_dev.dv_xname, chp->ch_channel,
1.149 bouyer 1170: st0, st1), DEBUG_PROBE);
1.65 bouyer 1171:
1.31 bouyer 1172: return drv_mask;
1.2 bouyer 1173: }
1174:
1175: /*
1.31 bouyer 1176: * Wait for a drive to be !BSY, and have mask in its status register.
1177: * return -1 for a timeout after "timeout" ms.
1.2 bouyer 1178: */
1.167 thorpej 1179: static int
1.205 thorpej 1180: __wdcwait(struct ata_channel *chp, int mask, int bits, int timeout)
1.2 bouyer 1181: {
1.207 thorpej 1182: struct atac_softc *atac = chp->ch_atac;
1183: struct wdc_softc *wdc = CHAN_TO_WDC(chp);
1.205 thorpej 1184: struct wdc_regs *wdr = &wdc->regs[chp->ch_channel];
1.31 bouyer 1185: u_char status;
1.222 christos 1186: int xtime = 0;
1.60 abs 1187:
1.207 thorpej 1188: ATADEBUG_PRINT(("__wdcwait %s:%d\n",
1189: atac->atac_dev.dv_xname,
1.169 thorpej 1190: chp->ch_channel), DEBUG_STATUS);
1.31 bouyer 1191: chp->ch_error = 0;
1192:
1193: timeout = timeout * 1000 / WDCDELAY; /* delay uses microseconds */
1.2 bouyer 1194:
1.31 bouyer 1195: for (;;) {
1196: chp->ch_status = status =
1.205 thorpej 1197: bus_space_read_1(wdr->cmd_iot, wdr->cmd_iohs[wd_status], 0);
1.131 mycroft 1198: if ((status & (WDCS_BSY | mask)) == bits)
1.31 bouyer 1199: break;
1.222 christos 1200: if (++xtime > timeout) {
1.204 thorpej 1201: ATADEBUG_PRINT(("__wdcwait: timeout (time=%d), "
1.87 bouyer 1202: "status %x error %x (mask 0x%x bits 0x%x)\n",
1.222 christos 1203: xtime, status,
1.205 thorpej 1204: bus_space_read_1(wdr->cmd_iot,
1205: wdr->cmd_iohs[wd_error], 0), mask, bits),
1.87 bouyer 1206: DEBUG_STATUS | DEBUG_PROBE | DEBUG_DELAY);
1.137 bouyer 1207: return(WDCWAIT_TOUT);
1.31 bouyer 1208: }
1209: delay(WDCDELAY);
1.2 bouyer 1210: }
1.204 thorpej 1211: #ifdef ATADEBUG
1.222 christos 1212: if (xtime > 0 && (atadebug_mask & DEBUG_DELAY))
1213: printf("__wdcwait: did busy-wait, time=%d\n", xtime);
1.87 bouyer 1214: #endif
1.31 bouyer 1215: if (status & WDCS_ERR)
1.205 thorpej 1216: chp->ch_error = bus_space_read_1(wdr->cmd_iot,
1217: wdr->cmd_iohs[wd_error], 0);
1.31 bouyer 1218: #ifdef WDCNDELAY_DEBUG
1219: /* After autoconfig, there should be no long delays. */
1.222 christos 1220: if (!cold && xtime > WDCNDELAY_DEBUG) {
1.186 bouyer 1221: struct ata_xfer *xfer = chp->ch_queue->active_xfer;
1.31 bouyer 1222: if (xfer == NULL)
1223: printf("%s channel %d: warning: busy-wait took %dus\n",
1.207 thorpej 1224: atac->atac_dev.dv_xname, chp->ch_channel,
1.222 christos 1225: WDCDELAY * xtime);
1.219 perry 1226: else
1.31 bouyer 1227: printf("%s:%d:%d: warning: busy-wait took %dus\n",
1.207 thorpej 1228: atac->atac_dev.dv_xname, chp->ch_channel,
1.237 christos 1229: xfer->c_drive,
1.222 christos 1230: WDCDELAY * xtime);
1.2 bouyer 1231: }
1232: #endif
1.137 bouyer 1233: return(WDCWAIT_OK);
1234: }
1235:
1236: /*
1237: * Call __wdcwait(), polling using tsleep() or waking up the kernel
1238: * thread if possible
1239: */
1240: int
1.205 thorpej 1241: wdcwait(struct ata_channel *chp, int mask, int bits, int timeout, int flags)
1.137 bouyer 1242: {
1243: int error, i, timeout_hz = mstohz(timeout);
1244:
1245: if (timeout_hz == 0 ||
1246: (flags & (AT_WAIT | AT_POLL)) == AT_POLL)
1247: error = __wdcwait(chp, mask, bits, timeout);
1248: else {
1249: error = __wdcwait(chp, mask, bits, WDCDELAY_POLL);
1250: if (error != 0) {
1.205 thorpej 1251: if ((chp->ch_flags & ATACH_TH_RUN) ||
1.147 bouyer 1252: (flags & AT_WAIT)) {
1.137 bouyer 1253: /*
1.147 bouyer 1254: * we're running in the channel thread
1255: * or some userland thread context
1.137 bouyer 1256: */
1257: for (i = 0; i < timeout_hz; i++) {
1258: if (__wdcwait(chp, mask, bits,
1259: WDCDELAY_POLL) == 0) {
1260: error = 0;
1261: break;
1262: }
1263: tsleep(&chp, PRIBIO, "atapoll", 1);
1264: }
1265: } else {
1266: /*
1267: * we're probably in interrupt context,
1268: * ask the thread to come back here
1269: */
1.147 bouyer 1270: #ifdef DIAGNOSTIC
1.148 bouyer 1271: if (chp->ch_queue->queue_freeze > 0)
1272: panic("wdcwait: queue_freeze");
1.147 bouyer 1273: #endif
1.148 bouyer 1274: chp->ch_queue->queue_freeze++;
1.170 thorpej 1275: wakeup(&chp->ch_thread);
1.137 bouyer 1276: return(WDCWAIT_THR);
1277: }
1278: }
1279: }
1.163 thorpej 1280: return (error);
1.2 bouyer 1281: }
1282:
1.137 bouyer 1283:
1.238 itohy 1284: #if NATA_DMA
1.84 bouyer 1285: /*
1286: * Busy-wait for DMA to complete
1287: */
1288: int
1.205 thorpej 1289: wdc_dmawait(struct ata_channel *chp, struct ata_xfer *xfer, int timeout)
1.84 bouyer 1290: {
1.207 thorpej 1291: struct wdc_softc *wdc = CHAN_TO_WDC(chp);
1.222 christos 1292: int xtime;
1.169 thorpej 1293:
1.222 christos 1294: for (xtime = 0; xtime < timeout * 1000 / WDCDELAY; xtime++) {
1.169 thorpej 1295: wdc->dma_status =
1296: (*wdc->dma_finish)(wdc->dma_arg,
1.185 bouyer 1297: chp->ch_channel, xfer->c_drive, WDC_DMAEND_END);
1.169 thorpej 1298: if ((wdc->dma_status & WDC_DMAST_NOIRQ) == 0)
1.84 bouyer 1299: return 0;
1300: delay(WDCDELAY);
1301: }
1302: /* timeout, force a DMA halt */
1.169 thorpej 1303: wdc->dma_status = (*wdc->dma_finish)(wdc->dma_arg,
1.185 bouyer 1304: chp->ch_channel, xfer->c_drive, WDC_DMAEND_ABRT);
1.84 bouyer 1305: return 1;
1306: }
1.238 itohy 1307: #endif
1.84 bouyer 1308:
1.31 bouyer 1309: void
1.163 thorpej 1310: wdctimeout(void *arg)
1.2 bouyer 1311: {
1.205 thorpej 1312: struct ata_channel *chp = (struct ata_channel *)arg;
1.238 itohy 1313: #if NATA_DMA || NATA_PIOBM
1.207 thorpej 1314: struct wdc_softc *wdc = CHAN_TO_WDC(chp);
1.238 itohy 1315: #endif
1.186 bouyer 1316: struct ata_xfer *xfer = chp->ch_queue->active_xfer;
1.31 bouyer 1317: int s;
1.2 bouyer 1318:
1.204 thorpej 1319: ATADEBUG_PRINT(("wdctimeout\n"), DEBUG_FUNCS);
1.31 bouyer 1320:
1321: s = splbio();
1.205 thorpej 1322: if ((chp->ch_flags & ATACH_IRQ_WAIT) != 0) {
1.31 bouyer 1323: __wdcerror(chp, "lost interrupt");
1.88 mrg 1324: printf("\ttype: %s tc_bcount: %d tc_skip: %d\n",
1325: (xfer->c_flags & C_ATAPI) ? "atapi" : "ata",
1326: xfer->c_bcount,
1327: xfer->c_skip);
1.238 itohy 1328: #if NATA_DMA || NATA_PIOBM
1.205 thorpej 1329: if (chp->ch_flags & ATACH_DMA_WAIT) {
1.169 thorpej 1330: wdc->dma_status =
1331: (*wdc->dma_finish)(wdc->dma_arg,
1.185 bouyer 1332: chp->ch_channel, xfer->c_drive,
1333: WDC_DMAEND_ABRT);
1.205 thorpej 1334: chp->ch_flags &= ~ATACH_DMA_WAIT;
1.84 bouyer 1335: }
1.238 itohy 1336: #endif
1.31 bouyer 1337: /*
1.119 drochner 1338: * Call the interrupt routine. If we just missed an interrupt,
1.31 bouyer 1339: * it will do what's needed. Else, it will take the needed
1340: * action (reset the device).
1.70 bouyer 1341: * Before that we need to reinstall the timeout callback,
1342: * in case it will miss another irq while in this transfer
1343: * We arbitray chose it to be 1s
1.31 bouyer 1344: */
1.81 thorpej 1345: callout_reset(&chp->ch_callout, hz, wdctimeout, chp);
1.31 bouyer 1346: xfer->c_flags |= C_TIMEOU;
1.205 thorpej 1347: chp->ch_flags &= ~ATACH_IRQ_WAIT;
1.66 bouyer 1348: xfer->c_intr(chp, xfer, 1);
1.31 bouyer 1349: } else
1350: __wdcerror(chp, "missing untimeout");
1351: splx(s);
1.2 bouyer 1352: }
1353:
1354: int
1.192 thorpej 1355: wdc_exec_command(struct ata_drive_datas *drvp, struct ata_command *ata_c)
1.31 bouyer 1356: {
1.205 thorpej 1357: struct ata_channel *chp = drvp->chnl_softc;
1.207 thorpej 1358: struct atac_softc *atac = chp->ch_atac;
1.165 thorpej 1359: struct ata_xfer *xfer;
1.31 bouyer 1360: int s, ret;
1.2 bouyer 1361:
1.204 thorpej 1362: ATADEBUG_PRINT(("wdc_exec_command %s:%d:%d\n",
1.207 thorpej 1363: atac->atac_dev.dv_xname, chp->ch_channel, drvp->drive),
1.34 bouyer 1364: DEBUG_FUNCS);
1.2 bouyer 1365:
1.31 bouyer 1366: /* set up an xfer and queue. Wait for completion */
1.198 thorpej 1367: xfer = ata_get_xfer(ata_c->flags & AT_WAIT ? ATAXF_CANSLEEP :
1368: ATAXF_NOSLEEP);
1.31 bouyer 1369: if (xfer == NULL) {
1.193 thorpej 1370: return ATACMD_TRY_AGAIN;
1.31 bouyer 1371: }
1.2 bouyer 1372:
1.207 thorpej 1373: if (atac->atac_cap & ATAC_CAP_NOIRQ)
1.192 thorpej 1374: ata_c->flags |= AT_POLL;
1375: if (ata_c->flags & AT_POLL)
1.31 bouyer 1376: xfer->c_flags |= C_POLL;
1.217 bouyer 1377: if (ata_c->flags & AT_WAIT)
1378: xfer->c_flags |= C_WAIT;
1.165 thorpej 1379: xfer->c_drive = drvp->drive;
1.192 thorpej 1380: xfer->c_databuf = ata_c->data;
1381: xfer->c_bcount = ata_c->bcount;
1382: xfer->c_cmd = ata_c;
1.31 bouyer 1383: xfer->c_start = __wdccommand_start;
1384: xfer->c_intr = __wdccommand_intr;
1.182 bouyer 1385: xfer->c_kill_xfer = __wdccommand_kill_xfer;
1.2 bouyer 1386:
1.31 bouyer 1387: s = splbio();
1.201 thorpej 1388: ata_exec_xfer(chp, xfer);
1.31 bouyer 1389: #ifdef DIAGNOSTIC
1.192 thorpej 1390: if ((ata_c->flags & AT_POLL) != 0 &&
1391: (ata_c->flags & AT_DONE) == 0)
1.118 provos 1392: panic("wdc_exec_command: polled command not done");
1.2 bouyer 1393: #endif
1.192 thorpej 1394: if (ata_c->flags & AT_DONE) {
1.193 thorpej 1395: ret = ATACMD_COMPLETE;
1.31 bouyer 1396: } else {
1.192 thorpej 1397: if (ata_c->flags & AT_WAIT) {
1398: while ((ata_c->flags & AT_DONE) == 0) {
1399: tsleep(ata_c, PRIBIO, "wdccmd", 0);
1.69 bouyer 1400: }
1.193 thorpej 1401: ret = ATACMD_COMPLETE;
1.31 bouyer 1402: } else {
1.193 thorpej 1403: ret = ATACMD_QUEUED;
1.2 bouyer 1404: }
1405: }
1.31 bouyer 1406: splx(s);
1407: return ret;
1.2 bouyer 1408: }
1409:
1.167 thorpej 1410: static void
1.205 thorpej 1411: __wdccommand_start(struct ata_channel *chp, struct ata_xfer *xfer)
1.219 perry 1412: {
1.207 thorpej 1413: struct atac_softc *atac = chp->ch_atac;
1414: struct wdc_softc *wdc = CHAN_TO_WDC(chp);
1.205 thorpej 1415: struct wdc_regs *wdr = &wdc->regs[chp->ch_channel];
1.165 thorpej 1416: int drive = xfer->c_drive;
1.230 bouyer 1417: int wait_flags = (xfer->c_flags & C_POLL) ? AT_POLL : 0;
1.192 thorpej 1418: struct ata_command *ata_c = xfer->c_cmd;
1.31 bouyer 1419:
1.204 thorpej 1420: ATADEBUG_PRINT(("__wdccommand_start %s:%d:%d\n",
1.207 thorpej 1421: atac->atac_dev.dv_xname, chp->ch_channel, xfer->c_drive),
1.34 bouyer 1422: DEBUG_FUNCS);
1.31 bouyer 1423:
1.203 thorpej 1424: if (wdc->select)
1.169 thorpej 1425: wdc->select(chp,drive);
1.205 thorpej 1426: bus_space_write_1(wdr->cmd_iot, wdr->cmd_iohs[wd_sdh], 0,
1.31 bouyer 1427: WDSD_IBM | (drive << 4));
1.192 thorpej 1428: switch(wdcwait(chp, ata_c->r_st_bmask | WDCS_DRQ,
1.230 bouyer 1429: ata_c->r_st_bmask, ata_c->timeout, wait_flags)) {
1.137 bouyer 1430: case WDCWAIT_OK:
1431: break;
1432: case WDCWAIT_TOUT:
1.192 thorpej 1433: ata_c->flags |= AT_TIMEOU;
1.31 bouyer 1434: __wdccommand_done(chp, xfer);
1.53 bouyer 1435: return;
1.137 bouyer 1436: case WDCWAIT_THR:
1437: return;
1.31 bouyer 1438: }
1.192 thorpej 1439: if (ata_c->flags & AT_POLL) {
1.135 bouyer 1440: /* polled command, disable interrupts */
1.205 thorpej 1441: bus_space_write_1(wdr->ctl_iot, wdr->ctl_ioh, wd_aux_ctlr,
1.135 bouyer 1442: WDCTL_4BIT | WDCTL_IDS);
1443: }
1.192 thorpej 1444: wdccommand(chp, drive, ata_c->r_command, ata_c->r_cyl, ata_c->r_head,
1445: ata_c->r_sector, ata_c->r_count, ata_c->r_features);
1.139 bouyer 1446:
1.192 thorpej 1447: if ((ata_c->flags & AT_POLL) == 0) {
1.205 thorpej 1448: chp->ch_flags |= ATACH_IRQ_WAIT; /* wait for interrupt */
1.192 thorpej 1449: callout_reset(&chp->ch_callout, ata_c->timeout / 1000 * hz,
1.81 thorpej 1450: wdctimeout, chp);
1.31 bouyer 1451: return;
1.2 bouyer 1452: }
1453: /*
1.31 bouyer 1454: * Polled command. Wait for drive ready or drq. Done in intr().
1455: * Wait for at last 400ns for status bit to be valid.
1.2 bouyer 1456: */
1.134 mycroft 1457: delay(10); /* 400ns delay */
1.66 bouyer 1458: __wdccommand_intr(chp, xfer, 0);
1.2 bouyer 1459: }
1460:
1.167 thorpej 1461: static int
1.205 thorpej 1462: __wdccommand_intr(struct ata_channel *chp, struct ata_xfer *xfer, int irq)
1.2 bouyer 1463: {
1.207 thorpej 1464: struct atac_softc *atac = chp->ch_atac;
1465: struct wdc_softc *wdc = CHAN_TO_WDC(chp);
1.205 thorpej 1466: struct wdc_regs *wdr = &wdc->regs[chp->ch_channel];
1.192 thorpej 1467: struct ata_command *ata_c = xfer->c_cmd;
1468: int bcount = ata_c->bcount;
1469: char *data = ata_c->data;
1.137 bouyer 1470: int wflags;
1.226 bouyer 1471: int drive_flags;
1472:
1473: if (ata_c->r_command == WDCC_IDENTIFY ||
1474: ata_c->r_command == ATAPI_IDENTIFY_DEVICE) {
1475: /*
1476: * The IDENTIFY data has been designed as an array of
1477: * u_int16_t, so we can byteswap it on the fly.
1478: * Historically it's what we have always done so keeping it
1479: * here ensure binary backward compatibility.
1480: */
1.229 tacha 1481: drive_flags = DRIVE_NOSTREAM |
1482: chp->ch_drive[xfer->c_drive].drive_flags;
1.226 bouyer 1483: } else {
1484: /*
1485: * Other data structure are opaque and should be transfered
1486: * as is.
1487: */
1488: drive_flags = chp->ch_drive[xfer->c_drive].drive_flags;
1489: }
1.137 bouyer 1490:
1.192 thorpej 1491: if ((ata_c->flags & (AT_WAIT | AT_POLL)) == (AT_WAIT | AT_POLL)) {
1.137 bouyer 1492: /* both wait and poll, we can tsleep here */
1.147 bouyer 1493: wflags = AT_WAIT | AT_POLL;
1.137 bouyer 1494: } else {
1495: wflags = AT_POLL;
1496: }
1.31 bouyer 1497:
1.163 thorpej 1498: again:
1.204 thorpej 1499: ATADEBUG_PRINT(("__wdccommand_intr %s:%d:%d\n",
1.207 thorpej 1500: atac->atac_dev.dv_xname, chp->ch_channel, xfer->c_drive),
1.165 thorpej 1501: DEBUG_INTR);
1.137 bouyer 1502: /*
1503: * after a ATAPI_SOFT_RESET, the device will have released the bus.
1504: * Reselect again, it doesn't hurt for others commands, and the time
1505: * penalty for the extra regiter write is acceptable,
1506: * wdc_exec_command() isn't called often (mosly for autoconfig)
1507: */
1.205 thorpej 1508: bus_space_write_1(wdr->cmd_iot, wdr->cmd_iohs[wd_sdh], 0,
1.165 thorpej 1509: WDSD_IBM | (xfer->c_drive << 4));
1.192 thorpej 1510: if ((ata_c->flags & AT_XFDONE) != 0) {
1.114 bouyer 1511: /*
1512: * We have completed a data xfer. The drive should now be
1513: * in its initial state
1514: */
1.192 thorpej 1515: if (wdcwait(chp, ata_c->r_st_bmask | WDCS_DRQ,
1516: ata_c->r_st_bmask, (irq == 0) ? ata_c->timeout : 0,
1.137 bouyer 1517: wflags) == WDCWAIT_TOUT) {
1.219 perry 1518: if (irq && (xfer->c_flags & C_TIMEOU) == 0)
1.114 bouyer 1519: return 0; /* IRQ was not for us */
1.192 thorpej 1520: ata_c->flags |= AT_TIMEOU;
1.114 bouyer 1521: }
1.131 mycroft 1522: goto out;
1.114 bouyer 1523: }
1.192 thorpej 1524: if (wdcwait(chp, ata_c->r_st_pmask, ata_c->r_st_pmask,
1525: (irq == 0) ? ata_c->timeout : 0, wflags) == WDCWAIT_TOUT) {
1.219 perry 1526: if (irq && (xfer->c_flags & C_TIMEOU) == 0)
1.63 bouyer 1527: return 0; /* IRQ was not for us */
1.192 thorpej 1528: ata_c->flags |= AT_TIMEOU;
1.131 mycroft 1529: goto out;
1.2 bouyer 1530: }
1.203 thorpej 1531: if (wdc->irqack)
1.169 thorpej 1532: wdc->irqack(chp);
1.192 thorpej 1533: if (ata_c->flags & AT_READ) {
1.131 mycroft 1534: if ((chp->ch_status & WDCS_DRQ) == 0) {
1.192 thorpej 1535: ata_c->flags |= AT_TIMEOU;
1.131 mycroft 1536: goto out;
1537: }
1.226 bouyer 1538: wdc->datain_pio(chp, drive_flags, data, bcount);
1.114 bouyer 1539: /* at this point the drive should be in its initial state */
1.192 thorpej 1540: ata_c->flags |= AT_XFDONE;
1.234 bouyer 1541: /*
1542: * XXX checking the status register again here cause some
1543: * hardware to timeout.
1544: */
1.192 thorpej 1545: } else if (ata_c->flags & AT_WRITE) {
1.131 mycroft 1546: if ((chp->ch_status & WDCS_DRQ) == 0) {
1.192 thorpej 1547: ata_c->flags |= AT_TIMEOU;
1.131 mycroft 1548: goto out;
1549: }
1.226 bouyer 1550: wdc->dataout_pio(chp, drive_flags, data, bcount);
1.192 thorpej 1551: ata_c->flags |= AT_XFDONE;
1552: if ((ata_c->flags & AT_POLL) == 0) {
1.205 thorpej 1553: chp->ch_flags |= ATACH_IRQ_WAIT; /* wait for interrupt */
1.114 bouyer 1554: callout_reset(&chp->ch_callout,
1.243 bouyer 1555: mstohz(ata_c->timeout), wdctimeout, chp);
1.114 bouyer 1556: return 1;
1557: } else {
1558: goto again;
1559: }
1.2 bouyer 1560: }
1.163 thorpej 1561: out:
1.31 bouyer 1562: __wdccommand_done(chp, xfer);
1563: return 1;
1.2 bouyer 1564: }
1565:
1.167 thorpej 1566: static void
1.205 thorpej 1567: __wdccommand_done(struct ata_channel *chp, struct ata_xfer *xfer)
1.2 bouyer 1568: {
1.207 thorpej 1569: struct atac_softc *atac = chp->ch_atac;
1570: struct wdc_softc *wdc = CHAN_TO_WDC(chp);
1.205 thorpej 1571: struct wdc_regs *wdr = &wdc->regs[chp->ch_channel];
1.192 thorpej 1572: struct ata_command *ata_c = xfer->c_cmd;
1.2 bouyer 1573:
1.233 bouyer 1574: ATADEBUG_PRINT(("__wdccommand_done %s:%d:%d flags 0x%x\n",
1575: atac->atac_dev.dv_xname, chp->ch_channel, xfer->c_drive,
1576: ata_c->flags), DEBUG_FUNCS);
1.70 bouyer 1577:
1578:
1.31 bouyer 1579: if (chp->ch_status & WDCS_DWF)
1.192 thorpej 1580: ata_c->flags |= AT_DF;
1.31 bouyer 1581: if (chp->ch_status & WDCS_ERR) {
1.192 thorpej 1582: ata_c->flags |= AT_ERROR;
1583: ata_c->r_error = chp->ch_error;
1.31 bouyer 1584: }
1.192 thorpej 1585: if ((ata_c->flags & AT_READREG) != 0 &&
1.235 thorpej 1586: device_is_active(&atac->atac_dev) &&
1.192 thorpej 1587: (ata_c->flags & (AT_ERROR | AT_DF)) == 0) {
1.205 thorpej 1588: ata_c->r_head = bus_space_read_1(wdr->cmd_iot,
1589: wdr->cmd_iohs[wd_sdh], 0);
1590: ata_c->r_count = bus_space_read_1(wdr->cmd_iot,
1591: wdr->cmd_iohs[wd_seccnt], 0);
1592: ata_c->r_sector = bus_space_read_1(wdr->cmd_iot,
1593: wdr->cmd_iohs[wd_sector], 0);
1.221 fvdl 1594: ata_c->r_cyl = bus_space_read_1(wdr->cmd_iot,
1595: wdr->cmd_iohs[wd_cyl_hi], 0) << 8;
1.205 thorpej 1596: ata_c->r_cyl |= bus_space_read_1(wdr->cmd_iot,
1597: wdr->cmd_iohs[wd_cyl_lo], 0);
1598: ata_c->r_error = bus_space_read_1(wdr->cmd_iot,
1599: wdr->cmd_iohs[wd_error], 0);
1600: ata_c->r_features = bus_space_read_1(wdr->cmd_iot,
1601: wdr->cmd_iohs[wd_features], 0);
1.135 bouyer 1602: }
1.186 bouyer 1603: callout_stop(&chp->ch_callout);
1.187 bouyer 1604: chp->ch_queue->active_xfer = NULL;
1.192 thorpej 1605: if (ata_c->flags & AT_POLL) {
1.187 bouyer 1606: /* enable interrupts */
1.205 thorpej 1607: bus_space_write_1(wdr->ctl_iot, wdr->ctl_ioh, wd_aux_ctlr,
1.187 bouyer 1608: WDCTL_4BIT);
1609: delay(10); /* some drives need a little delay here */
1610: }
1611: if (chp->ch_drive[xfer->c_drive].drive_flags & DRIVE_WAITDRAIN) {
1612: __wdccommand_kill_xfer(chp, xfer, KILL_GONE);
1613: chp->ch_drive[xfer->c_drive].drive_flags &= ~DRIVE_WAITDRAIN;
1614: wakeup(&chp->ch_queue->active_xfer);
1.219 perry 1615: } else
1.187 bouyer 1616: __wdccommand_done_end(chp, xfer);
1.182 bouyer 1617: }
1.219 perry 1618:
1.182 bouyer 1619: static void
1.205 thorpej 1620: __wdccommand_done_end(struct ata_channel *chp, struct ata_xfer *xfer)
1.182 bouyer 1621: {
1.192 thorpej 1622: struct ata_command *ata_c = xfer->c_cmd;
1.182 bouyer 1623:
1.192 thorpej 1624: ata_c->flags |= AT_DONE;
1.198 thorpej 1625: ata_free_xfer(chp, xfer);
1.192 thorpej 1626: if (ata_c->flags & AT_WAIT)
1627: wakeup(ata_c);
1628: else if (ata_c->callback)
1629: ata_c->callback(ata_c->callback_arg);
1.202 thorpej 1630: atastart(chp);
1.31 bouyer 1631: return;
1.2 bouyer 1632: }
1633:
1.182 bouyer 1634: static void
1.205 thorpej 1635: __wdccommand_kill_xfer(struct ata_channel *chp, struct ata_xfer *xfer,
1.182 bouyer 1636: int reason)
1637: {
1.192 thorpej 1638: struct ata_command *ata_c = xfer->c_cmd;
1.182 bouyer 1639:
1640: switch (reason) {
1641: case KILL_GONE:
1.192 thorpej 1642: ata_c->flags |= AT_GONE;
1.219 perry 1643: break;
1.182 bouyer 1644: case KILL_RESET:
1.192 thorpej 1645: ata_c->flags |= AT_RESET;
1.182 bouyer 1646: break;
1647: default:
1648: printf("__wdccommand_kill_xfer: unknown reason %d\n",
1649: reason);
1650: panic("__wdccommand_kill_xfer");
1651: }
1652: __wdccommand_done_end(chp, xfer);
1653: }
1654:
1.2 bouyer 1655: /*
1.31 bouyer 1656: * Send a command. The drive should be ready.
1.2 bouyer 1657: * Assumes interrupts are blocked.
1658: */
1.31 bouyer 1659: void
1.205 thorpej 1660: wdccommand(struct ata_channel *chp, u_int8_t drive, u_int8_t command,
1.163 thorpej 1661: u_int16_t cylin, u_int8_t head, u_int8_t sector, u_int8_t count,
1.178 thorpej 1662: u_int8_t features)
1.31 bouyer 1663: {
1.207 thorpej 1664: struct atac_softc *atac = chp->ch_atac;
1665: struct wdc_softc *wdc = CHAN_TO_WDC(chp);
1.205 thorpej 1666: struct wdc_regs *wdr = &wdc->regs[chp->ch_channel];
1.163 thorpej 1667:
1.204 thorpej 1668: ATADEBUG_PRINT(("wdccommand %s:%d:%d: command=0x%x cylin=%d head=%d "
1.207 thorpej 1669: "sector=%d count=%d features=%d\n", atac->atac_dev.dv_xname,
1.169 thorpej 1670: chp->ch_channel, drive, command, cylin, head, sector, count,
1.178 thorpej 1671: features), DEBUG_FUNCS);
1.31 bouyer 1672:
1.203 thorpej 1673: if (wdc->select)
1.169 thorpej 1674: wdc->select(chp,drive);
1.107 dbj 1675:
1.31 bouyer 1676: /* Select drive, head, and addressing mode. */
1.205 thorpej 1677: bus_space_write_1(wdr->cmd_iot, wdr->cmd_iohs[wd_sdh], 0,
1.31 bouyer 1678: WDSD_IBM | (drive << 4) | head);
1.177 thorpej 1679: /* Load parameters into the wd_features register. */
1.205 thorpej 1680: bus_space_write_1(wdr->cmd_iot, wdr->cmd_iohs[wd_features], 0,
1.178 thorpej 1681: features);
1.205 thorpej 1682: bus_space_write_1(wdr->cmd_iot, wdr->cmd_iohs[wd_seccnt], 0, count);
1683: bus_space_write_1(wdr->cmd_iot, wdr->cmd_iohs[wd_sector], 0, sector);
1684: bus_space_write_1(wdr->cmd_iot, wdr->cmd_iohs[wd_cyl_lo], 0, cylin);
1685: bus_space_write_1(wdr->cmd_iot, wdr->cmd_iohs[wd_cyl_hi],
1.157 fvdl 1686: 0, cylin >> 8);
1.108 christos 1687:
1688: /* Send command. */
1.205 thorpej 1689: bus_space_write_1(wdr->cmd_iot, wdr->cmd_iohs[wd_command], 0, command);
1.108 christos 1690: return;
1691: }
1692:
1693: /*
1694: * Send a 48-bit addressing command. The drive should be ready.
1695: * Assumes interrupts are blocked.
1696: */
1697: void
1.205 thorpej 1698: wdccommandext(struct ata_channel *chp, u_int8_t drive, u_int8_t command,
1.163 thorpej 1699: u_int64_t blkno, u_int16_t count)
1.108 christos 1700: {
1.207 thorpej 1701: struct atac_softc *atac = chp->ch_atac;
1702: struct wdc_softc *wdc = CHAN_TO_WDC(chp);
1.205 thorpej 1703: struct wdc_regs *wdr = &wdc->regs[chp->ch_channel];
1.163 thorpej 1704:
1.204 thorpej 1705: ATADEBUG_PRINT(("wdccommandext %s:%d:%d: command=0x%x blkno=%d "
1.207 thorpej 1706: "count=%d\n", atac->atac_dev.dv_xname,
1.169 thorpej 1707: chp->ch_channel, drive, command, (u_int32_t) blkno, count),
1.108 christos 1708: DEBUG_FUNCS);
1709:
1.203 thorpej 1710: if (wdc->select)
1.169 thorpej 1711: wdc->select(chp,drive);
1.108 christos 1712:
1713: /* Select drive, head, and addressing mode. */
1.205 thorpej 1714: bus_space_write_1(wdr->cmd_iot, wdr->cmd_iohs[wd_sdh], 0,
1.108 christos 1715: (drive << 4) | WDSD_LBA);
1716:
1.218 rearnsha 1717: if (wdc->cap & WDC_CAPABILITY_WIDEREGS) {
1718: bus_space_write_2(wdr->cmd_iot, wdr->cmd_iohs[wd_features], 0,
1719: 0);
1720: bus_space_write_2(wdr->cmd_iot, wdr->cmd_iohs[wd_seccnt],
1721: 0, count);
1722: bus_space_write_2(wdr->cmd_iot, wdr->cmd_iohs[wd_lba_lo],
1723: 0, (((blkno >> 16) & 0xff00) | (blkno & 0x00ff)));
1724: bus_space_write_2(wdr->cmd_iot, wdr->cmd_iohs[wd_lba_mi],
1725: 0, (((blkno >> 24) & 0xff00) | ((blkno >> 8) & 0x00ff)));
1726: bus_space_write_2(wdr->cmd_iot, wdr->cmd_iohs[wd_lba_hi],
1727: 0, (((blkno >> 32) & 0xff00) | ((blkno >> 16) & 0x00ff)));
1728: } else {
1729: /* previous */
1730: bus_space_write_1(wdr->cmd_iot, wdr->cmd_iohs[wd_features], 0,
1731: 0);
1732: bus_space_write_1(wdr->cmd_iot, wdr->cmd_iohs[wd_seccnt],
1733: 0, count >> 8);
1734: bus_space_write_1(wdr->cmd_iot, wdr->cmd_iohs[wd_lba_lo],
1735: 0, blkno >> 24);
1736: bus_space_write_1(wdr->cmd_iot, wdr->cmd_iohs[wd_lba_mi],
1737: 0, blkno >> 32);
1738: bus_space_write_1(wdr->cmd_iot, wdr->cmd_iohs[wd_lba_hi],
1739: 0, blkno >> 40);
1740:
1741: /* current */
1742: bus_space_write_1(wdr->cmd_iot, wdr->cmd_iohs[wd_features], 0,
1743: 0);
1744: bus_space_write_1(wdr->cmd_iot, wdr->cmd_iohs[wd_seccnt], 0,
1745: count);
1746: bus_space_write_1(wdr->cmd_iot, wdr->cmd_iohs[wd_lba_lo], 0,
1747: blkno);
1748: bus_space_write_1(wdr->cmd_iot, wdr->cmd_iohs[wd_lba_mi],
1749: 0, blkno >> 8);
1750: bus_space_write_1(wdr->cmd_iot, wdr->cmd_iohs[wd_lba_hi],
1751: 0, blkno >> 16);
1752: }
1.2 bouyer 1753:
1.31 bouyer 1754: /* Send command. */
1.205 thorpej 1755: bus_space_write_1(wdr->cmd_iot, wdr->cmd_iohs[wd_command], 0, command);
1.31 bouyer 1756: return;
1.2 bouyer 1757: }
1758:
1759: /*
1.31 bouyer 1760: * Simplified version of wdccommand(). Unbusy/ready/drq must be
1761: * tested by the caller.
1.2 bouyer 1762: */
1.31 bouyer 1763: void
1.205 thorpej 1764: wdccommandshort(struct ata_channel *chp, int drive, int command)
1.2 bouyer 1765: {
1.207 thorpej 1766: struct atac_softc *atac = chp->ch_atac;
1767: struct wdc_softc *wdc = CHAN_TO_WDC(chp);
1.205 thorpej 1768: struct wdc_regs *wdr = &wdc->regs[chp->ch_channel];
1.2 bouyer 1769:
1.204 thorpej 1770: ATADEBUG_PRINT(("wdccommandshort %s:%d:%d command 0x%x\n",
1.207 thorpej 1771: atac->atac_dev.dv_xname, chp->ch_channel, drive, command),
1.31 bouyer 1772: DEBUG_FUNCS);
1.107 dbj 1773:
1.203 thorpej 1774: if (wdc->select)
1.169 thorpej 1775: wdc->select(chp,drive);
1.2 bouyer 1776:
1.31 bouyer 1777: /* Select drive. */
1.205 thorpej 1778: bus_space_write_1(wdr->cmd_iot, wdr->cmd_iohs[wd_sdh], 0,
1.31 bouyer 1779: WDSD_IBM | (drive << 4));
1.2 bouyer 1780:
1.205 thorpej 1781: bus_space_write_1(wdr->cmd_iot, wdr->cmd_iohs[wd_command], 0, command);
1.31 bouyer 1782: }
1.2 bouyer 1783:
1.31 bouyer 1784: static void
1.222 christos 1785: __wdcerror(struct ata_channel *chp, const char *msg)
1.2 bouyer 1786: {
1.207 thorpej 1787: struct atac_softc *atac = chp->ch_atac;
1.217 bouyer 1788: struct ata_xfer *xfer = chp->ch_queue->active_xfer;
1.88 mrg 1789:
1.2 bouyer 1790: if (xfer == NULL)
1.207 thorpej 1791: printf("%s:%d: %s\n", atac->atac_dev.dv_xname, chp->ch_channel,
1.31 bouyer 1792: msg);
1.2 bouyer 1793: else
1.207 thorpej 1794: printf("%s:%d:%d: %s\n", atac->atac_dev.dv_xname,
1.169 thorpej 1795: chp->ch_channel, xfer->c_drive, msg);
1.2 bouyer 1796: }
1797:
1.219 perry 1798: /*
1.2 bouyer 1799: * the bit bucket
1800: */
1801: void
1.205 thorpej 1802: wdcbit_bucket(struct ata_channel *chp, int size)
1.2 bouyer 1803: {
1.207 thorpej 1804: struct wdc_regs *wdr = CHAN_TO_WDC_REGS(chp);
1.2 bouyer 1805:
1.12 cgd 1806: for (; size >= 2; size -= 2)
1.205 thorpej 1807: (void)bus_space_read_2(wdr->cmd_iot, wdr->cmd_iohs[wd_data], 0);
1.12 cgd 1808: if (size)
1.205 thorpej 1809: (void)bus_space_read_1(wdr->cmd_iot, wdr->cmd_iohs[wd_data], 0);
1.44 thorpej 1810: }
1811:
1.213 thorpej 1812: static void
1.222 christos 1813: wdc_datain_pio(struct ata_channel *chp, int flags, void *bf, size_t len)
1.190 mycroft 1814: {
1.207 thorpej 1815: struct wdc_regs *wdr = CHAN_TO_WDC_REGS(chp);
1.190 mycroft 1816:
1.243.2.1! pavel 1817: #ifndef __NO_STRICT_ALIGNMENT
! 1818: if ((uintptr_t)bf & 1)
! 1819: goto unaligned;
! 1820: if ((flags & DRIVE_CAP32) && ((uintptr_t)bf & 3))
! 1821: goto unaligned;
! 1822: #endif
! 1823:
1.190 mycroft 1824: if (flags & DRIVE_NOSTREAM) {
1825: if (flags & DRIVE_CAP32) {
1.205 thorpej 1826: bus_space_read_multi_4(wdr->data32iot,
1.222 christos 1827: wdr->data32ioh, 0, bf, len >> 2);
1828: bf = (char *)bf + (len & ~3);
1.190 mycroft 1829: len &= 3;
1830: }
1831: if (len) {
1.205 thorpej 1832: bus_space_read_multi_2(wdr->cmd_iot,
1.222 christos 1833: wdr->cmd_iohs[wd_data], 0, bf, len >> 1);
1.190 mycroft 1834: }
1835: } else {
1836: if (flags & DRIVE_CAP32) {
1.205 thorpej 1837: bus_space_read_multi_stream_4(wdr->data32iot,
1.222 christos 1838: wdr->data32ioh, 0, bf, len >> 2);
1839: bf = (char *)bf + (len & ~3);
1.190 mycroft 1840: len &= 3;
1841: }
1842: if (len) {
1.205 thorpej 1843: bus_space_read_multi_stream_2(wdr->cmd_iot,
1.222 christos 1844: wdr->cmd_iohs[wd_data], 0, bf, len >> 1);
1.190 mycroft 1845: }
1846: }
1.243.2.1! pavel 1847: return;
! 1848:
! 1849: #ifndef __NO_STRICT_ALIGNMENT
! 1850: unaligned:
! 1851: if (flags & DRIVE_CAP32) {
! 1852: while (len > 3) {
! 1853: uint32_t val;
! 1854:
! 1855: val = bus_space_read_4(wdr->cmd_iot,
! 1856: wdr->cmd_iohs[wd_data], 0);
! 1857: memcpy(bf, &val, 4);
! 1858: bf = (char*)bf+4;
! 1859: len -= 4;
! 1860: }
! 1861: }
! 1862: while (len > 1) {
! 1863: uint16_t val;
! 1864:
! 1865: val = bus_space_read_2(wdr->cmd_iot,
! 1866: wdr->cmd_iohs[wd_data], 0);
! 1867: memcpy(bf, &val, 2);
! 1868: bf = (char*)bf+2;
! 1869: len -= 2;
! 1870: }
! 1871: #endif
1.190 mycroft 1872: }
1873:
1.213 thorpej 1874: static void
1.222 christos 1875: wdc_dataout_pio(struct ata_channel *chp, int flags, void *bf, size_t len)
1.190 mycroft 1876: {
1.207 thorpej 1877: struct wdc_regs *wdr = CHAN_TO_WDC_REGS(chp);
1.190 mycroft 1878:
1.243.2.1! pavel 1879: #ifndef __NO_STRICT_ALIGNMENT
! 1880: if ((uintptr_t)bf & 1)
! 1881: goto unaligned;
! 1882: if ((flags & DRIVE_CAP32) && ((uintptr_t)bf & 3))
! 1883: goto unaligned;
! 1884: #endif
! 1885:
1.190 mycroft 1886: if (flags & DRIVE_NOSTREAM) {
1887: if (flags & DRIVE_CAP32) {
1.205 thorpej 1888: bus_space_write_multi_4(wdr->data32iot,
1.222 christos 1889: wdr->data32ioh, 0, bf, len >> 2);
1890: bf = (char *)bf + (len & ~3);
1.190 mycroft 1891: len &= 3;
1892: }
1893: if (len) {
1.205 thorpej 1894: bus_space_write_multi_2(wdr->cmd_iot,
1.222 christos 1895: wdr->cmd_iohs[wd_data], 0, bf, len >> 1);
1.190 mycroft 1896: }
1897: } else {
1898: if (flags & DRIVE_CAP32) {
1.205 thorpej 1899: bus_space_write_multi_stream_4(wdr->data32iot,
1.222 christos 1900: wdr->data32ioh, 0, bf, len >> 2);
1901: bf = (char *)bf + (len & ~3);
1.190 mycroft 1902: len &= 3;
1903: }
1904: if (len) {
1.205 thorpej 1905: bus_space_write_multi_stream_2(wdr->cmd_iot,
1.222 christos 1906: wdr->cmd_iohs[wd_data], 0, bf, len >> 1);
1.190 mycroft 1907: }
1908: }
1.243.2.1! pavel 1909: return;
! 1910:
! 1911: #ifndef __NO_STRICT_ALIGNMENT
! 1912: unaligned:
! 1913: if (flags & DRIVE_CAP32) {
! 1914: while (len > 3) {
! 1915: uint32_t val;
! 1916:
! 1917: memcpy(&val, bf, 4);
! 1918: bus_space_write_4(wdr->cmd_iot,
! 1919: wdr->cmd_iohs[wd_data], 0, val);
! 1920: bf = (char*)bf+4;
! 1921: len -= 4;
! 1922: }
! 1923: }
! 1924: while (len > 1) {
! 1925: uint16_t val;
! 1926:
! 1927: memcpy(&val, bf, 2);
! 1928: bus_space_write_2(wdr->cmd_iot,
! 1929: wdr->cmd_iohs[wd_data], 0, val);
! 1930: bf = (char*)bf+2;
! 1931: len -= 2;
! 1932: }
! 1933: #endif
1.190 mycroft 1934: }
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