Annotation of src/sys/dev/ic/wdc.c, Revision 1.193
1.193 ! thorpej 1: /* $NetBSD: wdc.c,v 1.192 2004/08/12 04:57:19 thorpej Exp $ */
1.31 bouyer 2:
3: /*
1.137 bouyer 4: * Copyright (c) 1998, 2001, 2003 Manuel Bouyer. All rights reserved.
1.31 bouyer 5: *
6: * Redistribution and use in source and binary forms, with or without
7: * modification, are permitted provided that the following conditions
8: * are met:
9: * 1. Redistributions of source code must retain the above copyright
10: * notice, this list of conditions and the following disclaimer.
11: * 2. Redistributions in binary form must reproduce the above copyright
12: * notice, this list of conditions and the following disclaimer in the
13: * documentation and/or other materials provided with the distribution.
14: * 3. All advertising materials mentioning features or use of this software
15: * must display the following acknowledgement:
16: * This product includes software developed by Manuel Bouyer.
17: * 4. The name of the author may not be used to endorse or promote products
18: * derived from this software without specific prior written permission.
19: *
20: * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
21: * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
22: * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
23: * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
24: * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
25: * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
26: * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
27: * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
28: * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
29: * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
30: */
1.2 bouyer 31:
1.27 mycroft 32: /*-
1.125 mycroft 33: * Copyright (c) 1998, 2003 The NetBSD Foundation, Inc.
1.27 mycroft 34: * All rights reserved.
1.2 bouyer 35: *
1.27 mycroft 36: * This code is derived from software contributed to The NetBSD Foundation
37: * by Charles M. Hannum, by Onno van der Linden and by Manuel Bouyer.
1.12 cgd 38: *
1.2 bouyer 39: * Redistribution and use in source and binary forms, with or without
40: * modification, are permitted provided that the following conditions
41: * are met:
42: * 1. Redistributions of source code must retain the above copyright
43: * notice, this list of conditions and the following disclaimer.
44: * 2. Redistributions in binary form must reproduce the above copyright
45: * notice, this list of conditions and the following disclaimer in the
46: * documentation and/or other materials provided with the distribution.
47: * 3. All advertising materials mentioning features or use of this software
48: * must display the following acknowledgement:
1.27 mycroft 49: * This product includes software developed by the NetBSD
50: * Foundation, Inc. and its contributors.
51: * 4. Neither the name of The NetBSD Foundation nor the names of its
52: * contributors may be used to endorse or promote products derived
53: * from this software without specific prior written permission.
1.2 bouyer 54: *
1.27 mycroft 55: * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
56: * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
57: * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
58: * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
59: * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
60: * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
61: * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
62: * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
63: * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
64: * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
65: * POSSIBILITY OF SUCH DAMAGE.
1.2 bouyer 66: */
67:
1.12 cgd 68: /*
69: * CODE UNTESTED IN THE CURRENT REVISION:
70: */
1.100 lukem 71:
72: #include <sys/cdefs.h>
1.193 ! thorpej 73: __KERNEL_RCSID(0, "$NetBSD: wdc.c,v 1.192 2004/08/12 04:57:19 thorpej Exp $");
1.12 cgd 74:
1.59 hubertf 75: #ifndef WDCDEBUG
1.31 bouyer 76: #define WDCDEBUG
1.59 hubertf 77: #endif /* WDCDEBUG */
1.31 bouyer 78:
1.2 bouyer 79: #include <sys/param.h>
80: #include <sys/systm.h>
81: #include <sys/kernel.h>
82: #include <sys/conf.h>
83: #include <sys/buf.h>
1.31 bouyer 84: #include <sys/device.h>
1.2 bouyer 85: #include <sys/malloc.h>
1.71 bouyer 86: #include <sys/pool.h>
1.2 bouyer 87: #include <sys/syslog.h>
88: #include <sys/proc.h>
89:
90: #include <machine/intr.h>
91: #include <machine/bus.h>
92:
1.17 sakamoto 93: #ifndef __BUS_SPACE_HAS_STREAM_METHODS
1.31 bouyer 94: #define bus_space_write_multi_stream_2 bus_space_write_multi_2
95: #define bus_space_write_multi_stream_4 bus_space_write_multi_4
96: #define bus_space_read_multi_stream_2 bus_space_read_multi_2
97: #define bus_space_read_multi_stream_4 bus_space_read_multi_4
1.17 sakamoto 98: #endif /* __BUS_SPACE_HAS_STREAM_METHODS */
1.16 sakamoto 99:
1.103 bouyer 100: #include <dev/ata/atavar.h>
1.31 bouyer 101: #include <dev/ata/atareg.h>
1.12 cgd 102: #include <dev/ic/wdcreg.h>
103: #include <dev/ic/wdcvar.h>
1.31 bouyer 104:
1.137 bouyer 105: #include "locators.h"
106:
1.122 thorpej 107: #include "ataraid.h"
1.2 bouyer 108: #include "atapibus.h"
1.106 bouyer 109: #include "wd.h"
1.2 bouyer 110:
1.122 thorpej 111: #if NATARAID > 0
112: #include <dev/ata/ata_raidvar.h>
113: #endif
114:
1.31 bouyer 115: #define WDCDELAY 100 /* 100 microseconds */
116: #define WDCNDELAY_RST (WDC_RESET_WAIT * 1000 / WDCDELAY)
1.2 bouyer 117: #if 0
1.31 bouyer 118: /* If you enable this, it will report any delays more than WDCDELAY * N long. */
1.2 bouyer 119: #define WDCNDELAY_DEBUG 50
120: #endif
121:
1.137 bouyer 122: /* When polling wait that much and then tsleep for 1/hz seconds */
123: #define WDCDELAY_POLL 1 /* ms */
124:
125: /* timeout for the control commands */
126: #define WDC_CTRL_DELAY 10000 /* 10s, for the recall command */
127:
1.71 bouyer 128: struct pool wdc_xfer_pool;
1.2 bouyer 129:
1.106 bouyer 130: #if NWD > 0
1.103 bouyer 131: extern const struct ata_bustype wdc_ata_bustype; /* in ata_wdc.c */
1.106 bouyer 132: #else
133: /* A fake one, the autoconfig will print "wd at foo ... not configured */
134: const struct ata_bustype wdc_ata_bustype = {
135: SCSIPI_BUSTYPE_ATA,
136: NULL,
137: NULL,
138: NULL,
139: NULL,
140: NULL,
141: NULL,
142: NULL
143: };
144: #endif
1.102 bouyer 145:
1.168 thorpej 146: static int wdcprobe1(struct wdc_channel*, int);
147: static void __wdcerror(struct wdc_channel*, char *);
148: static int __wdcwait_reset(struct wdc_channel *, int, int);
149: static void __wdccommand_done(struct wdc_channel *, struct ata_xfer *);
1.182 bouyer 150: static void __wdccommand_done_end(struct wdc_channel *, struct ata_xfer *);
151: static void __wdccommand_kill_xfer(struct wdc_channel *,
152: struct ata_xfer *, int);
1.168 thorpej 153: static void __wdccommand_start(struct wdc_channel *, struct ata_xfer *);
1.182 bouyer 154: static int __wdccommand_intr(struct wdc_channel *, struct ata_xfer *, int);
1.168 thorpej 155: static int __wdcwait(struct wdc_channel *, int, int, int);
1.31 bouyer 156:
157: #define DEBUG_INTR 0x01
158: #define DEBUG_XFERS 0x02
159: #define DEBUG_STATUS 0x04
160: #define DEBUG_FUNCS 0x08
161: #define DEBUG_PROBE 0x10
1.74 enami 162: #define DEBUG_DETACH 0x20
1.87 bouyer 163: #define DEBUG_DELAY 0x40
1.31 bouyer 164: #ifdef WDCDEBUG
1.32 bouyer 165: int wdcdebug_mask = 0;
1.31 bouyer 166: int wdc_nxfer = 0;
167: #define WDCDEBUG_PRINT(args, level) if (wdcdebug_mask & (level)) printf args
1.2 bouyer 168: #else
1.31 bouyer 169: #define WDCDEBUG_PRINT(args, level)
1.2 bouyer 170: #endif
171:
1.162 thorpej 172: /*
173: * A queue of atabus instances, used to ensure the same bus probe order
174: * for a given hardware configuration at each boot.
175: */
176: struct atabus_initq_head atabus_initq_head =
177: TAILQ_HEAD_INITIALIZER(atabus_initq_head);
178: struct simplelock atabus_interlock = SIMPLELOCK_INITIALIZER;
1.137 bouyer 179:
1.176 thorpej 180: /*
181: * Initialize the "shadow register" handles for a standard wdc controller.
182: */
183: void
184: wdc_init_shadow_regs(struct wdc_channel *chp)
185: {
186:
187: chp->cmd_iohs[wd_status] = chp->cmd_iohs[wd_command];
188: chp->cmd_iohs[wd_features] = chp->cmd_iohs[wd_error];
189: }
190:
1.162 thorpej 191: /* Test to see controller with at last one attached drive is there.
192: * Returns a bit for each possible drive found (0x01 for drive 0,
193: * 0x02 for drive 1).
194: * Logic:
195: * - If a status register is at 0xff, assume there is no drive here
196: * (ISA has pull-up resistors). Similarly if the status register has
197: * the value we last wrote to the bus (for IDE interfaces without pullups).
198: * If no drive at all -> return.
199: * - reset the controller, wait for it to complete (may take up to 31s !).
200: * If timeout -> return.
201: * - test ATA/ATAPI signatures. If at last one drive found -> return.
202: * - try an ATA command on the master.
203: */
1.137 bouyer 204:
1.164 thorpej 205: static void
1.168 thorpej 206: wdc_drvprobe(struct wdc_channel *chp)
1.137 bouyer 207: {
208: struct ataparams params;
1.169 thorpej 209: struct wdc_softc *wdc = chp->ch_wdc;
1.145 christos 210: u_int8_t st0 = 0, st1 = 0;
1.164 thorpej 211: int i, error;
1.137 bouyer 212:
1.164 thorpej 213: if (wdcprobe1(chp, 0) == 0) {
214: /* No drives, abort the attach here. */
215: return;
1.161 thorpej 216: }
1.137 bouyer 217:
218: /* for ATA/OLD drives, wait for DRDY, 3s timeout */
219: for (i = 0; i < mstohz(3000); i++) {
1.174 bouyer 220: if (chp->ch_drive[0].drive_flags & (DRIVE_ATA|DRIVE_OLD)) {
221: if (wdc != NULL && (wdc->cap & WDC_CAPABILITY_SELECT))
222: wdc->select(chp,0);
223: bus_space_write_1(chp->cmd_iot, chp->cmd_iohs[wd_sdh],
224: 0, WDSD_IBM);
225: delay(10); /* 400ns delay */
226: st0 = bus_space_read_1(chp->cmd_iot,
227: chp->cmd_iohs[wd_status], 0);
228: }
1.137 bouyer 229:
1.174 bouyer 230: if (chp->ch_drive[1].drive_flags & (DRIVE_ATA|DRIVE_OLD)) {
231: if (wdc != NULL && (wdc->cap & WDC_CAPABILITY_SELECT))
232: wdc->select(chp,1);
233: bus_space_write_1(chp->cmd_iot, chp->cmd_iohs[wd_sdh],
234: 0, WDSD_IBM | 0x10);
235: delay(10); /* 400ns delay */
236: st1 = bus_space_read_1(chp->cmd_iot,
237: chp->cmd_iohs[wd_status], 0);
238: }
1.137 bouyer 239:
240: if (((chp->ch_drive[0].drive_flags & (DRIVE_ATA|DRIVE_OLD))
241: == 0 ||
242: (st0 & WDCS_DRDY)) &&
243: ((chp->ch_drive[1].drive_flags & (DRIVE_ATA|DRIVE_OLD))
244: == 0 ||
245: (st1 & WDCS_DRDY)))
246: break;
1.164 thorpej 247: tsleep(¶ms, PRIBIO, "atadrdy", 1);
1.137 bouyer 248: }
249: if ((st0 & WDCS_DRDY) == 0)
250: chp->ch_drive[0].drive_flags &= ~(DRIVE_ATA|DRIVE_OLD);
251: if ((st1 & WDCS_DRDY) == 0)
252: chp->ch_drive[1].drive_flags &= ~(DRIVE_ATA|DRIVE_OLD);
253:
254: WDCDEBUG_PRINT(("%s:%d: wait DRDY st0 0x%x st1 0x%x\n",
1.169 thorpej 255: wdc->sc_dev.dv_xname,
256: chp->ch_channel, st0, st1), DEBUG_PROBE);
1.137 bouyer 257:
258: /* Wait a bit, some devices are weird just after a reset. */
259: delay(5000);
260:
261: for (i = 0; i < 2; i++) {
1.171 thorpej 262: /* XXX This should be done by other code. */
1.137 bouyer 263: chp->ch_drive[i].chnl_softc = chp;
264: chp->ch_drive[i].drive = i;
1.171 thorpej 265:
1.137 bouyer 266: /*
267: * Init error counter so that an error withing the first xfers
268: * will trigger a downgrade
269: */
270: chp->ch_drive[i].n_dmaerrs = NERRS_MAX-1;
271:
272: /* If controller can't do 16bit flag the drives as 32bit */
1.169 thorpej 273: if ((wdc->cap &
1.137 bouyer 274: (WDC_CAPABILITY_DATA16 | WDC_CAPABILITY_DATA32)) ==
275: WDC_CAPABILITY_DATA32)
276: chp->ch_drive[i].drive_flags |= DRIVE_CAP32;
277: if ((chp->ch_drive[i].drive_flags & DRIVE) == 0)
278: continue;
279:
1.144 briggs 280: /* Shortcut in case we've been shutdown */
281: if (chp->ch_flags & WDCF_SHUTDOWN)
1.164 thorpej 282: return;
1.144 briggs 283:
1.137 bouyer 284: /* issue an identify, to try to detect ghosts */
285: error = ata_get_params(&chp->ch_drive[i],
286: AT_WAIT | AT_POLL, ¶ms);
287: if (error != CMD_OK) {
1.164 thorpej 288: tsleep(¶ms, PRIBIO, "atacnf", mstohz(1000));
1.144 briggs 289:
290: /* Shortcut in case we've been shutdown */
291: if (chp->ch_flags & WDCF_SHUTDOWN)
1.164 thorpej 292: return;
1.144 briggs 293:
1.137 bouyer 294: error = ata_get_params(&chp->ch_drive[i],
295: AT_WAIT | AT_POLL, ¶ms);
296: }
297: if (error == CMD_OK) {
1.152 wiz 298: /* If IDENTIFY succeeded, this is not an OLD ctrl */
1.137 bouyer 299: chp->ch_drive[0].drive_flags &= ~DRIVE_OLD;
300: chp->ch_drive[1].drive_flags &= ~DRIVE_OLD;
301: } else {
1.155 bouyer 302: chp->ch_drive[i].drive_flags &=
1.137 bouyer 303: ~(DRIVE_ATA | DRIVE_ATAPI);
304: WDCDEBUG_PRINT(("%s:%d:%d: IDENTIFY failed (%d)\n",
1.169 thorpej 305: wdc->sc_dev.dv_xname,
306: chp->ch_channel, i, error), DEBUG_PROBE);
1.137 bouyer 307: if ((chp->ch_drive[i].drive_flags & DRIVE_OLD) == 0)
308: continue;
309: /*
310: * Pre-ATA drive ?
311: * Test registers writability (Error register not
312: * writable, but cyllo is), then try an ATA command.
313: */
1.169 thorpej 314: if (wdc->cap & WDC_CAPABILITY_SELECT)
315: wdc->select(chp,i);
1.157 fvdl 316: bus_space_write_1(chp->cmd_iot,
317: chp->cmd_iohs[wd_sdh], 0, WDSD_IBM | (i << 4));
1.137 bouyer 318: delay(10); /* 400ns delay */
1.157 fvdl 319: bus_space_write_1(chp->cmd_iot, chp->cmd_iohs[wd_error],
320: 0, 0x58);
321: bus_space_write_1(chp->cmd_iot,
322: chp->cmd_iohs[wd_cyl_lo], 0, 0xa5);
323: if (bus_space_read_1(chp->cmd_iot,
324: chp->cmd_iohs[wd_error], 0) == 0x58 ||
325: bus_space_read_1(chp->cmd_iot,
326: chp->cmd_iohs[wd_cyl_lo], 0) != 0xa5) {
1.137 bouyer 327: WDCDEBUG_PRINT(("%s:%d:%d: register "
328: "writability failed\n",
1.169 thorpej 329: wdc->sc_dev.dv_xname,
330: chp->ch_channel, i), DEBUG_PROBE);
1.137 bouyer 331: chp->ch_drive[i].drive_flags &= ~DRIVE_OLD;
1.155 bouyer 332: continue;
1.137 bouyer 333: }
1.166 thorpej 334: if (wdc_wait_for_ready(chp, 10000, 0) == WDCWAIT_TOUT) {
1.137 bouyer 335: WDCDEBUG_PRINT(("%s:%d:%d: not ready\n",
1.169 thorpej 336: wdc->sc_dev.dv_xname,
337: chp->ch_channel, i), DEBUG_PROBE);
1.137 bouyer 338: chp->ch_drive[i].drive_flags &= ~DRIVE_OLD;
339: continue;
340: }
1.157 fvdl 341: bus_space_write_1(chp->cmd_iot,
342: chp->cmd_iohs[wd_command], 0, WDCC_RECAL);
1.137 bouyer 343: delay(10); /* 400ns delay */
1.166 thorpej 344: if (wdc_wait_for_ready(chp, 10000, 0) == WDCWAIT_TOUT) {
1.137 bouyer 345: WDCDEBUG_PRINT(("%s:%d:%d: WDCC_RECAL failed\n",
1.169 thorpej 346: wdc->sc_dev.dv_xname,
347: chp->ch_channel, i), DEBUG_PROBE);
1.137 bouyer 348: chp->ch_drive[i].drive_flags &= ~DRIVE_OLD;
1.155 bouyer 349: } else {
350: chp->ch_drive[0].drive_flags &=
351: ~(DRIVE_ATA | DRIVE_ATAPI);
352: chp->ch_drive[1].drive_flags &=
353: ~(DRIVE_ATA | DRIVE_ATAPI);
1.137 bouyer 354: }
355: }
356: }
1.164 thorpej 357: }
358:
359: void
360: atabusconfig(struct atabus_softc *atabus_sc)
361: {
1.168 thorpej 362: struct wdc_channel *chp = atabus_sc->sc_chan;
1.169 thorpej 363: struct wdc_softc *wdc = chp->ch_wdc;
1.189 mycroft 364: int i;
1.164 thorpej 365: struct atabus_initq *atabus_initq = NULL;
366:
367: /* Probe for the drives. */
1.169 thorpej 368: (*wdc->drv_probe)(chp);
1.137 bouyer 369:
370: WDCDEBUG_PRINT(("atabusattach: ch_drive_flags 0x%x 0x%x\n",
371: chp->ch_drive[0].drive_flags, chp->ch_drive[1].drive_flags),
372: DEBUG_PROBE);
373:
374: /* If no drives, abort here */
375: if ((chp->ch_drive[0].drive_flags & DRIVE) == 0 &&
376: (chp->ch_drive[1].drive_flags & DRIVE) == 0)
377: goto out;
378:
1.164 thorpej 379: /* Shortcut in case we've been shutdown */
380: if (chp->ch_flags & WDCF_SHUTDOWN)
381: goto out;
382:
1.137 bouyer 383: /* Make sure the devices probe in atabus order to avoid jitter. */
384: simple_lock(&atabus_interlock);
385: while(1) {
386: atabus_initq = TAILQ_FIRST(&atabus_initq_head);
387: if (atabus_initq->atabus_sc == atabus_sc)
388: break;
389: ltsleep(&atabus_initq_head, PRIBIO, "ata_initq", 0,
390: &atabus_interlock);
391: }
392: simple_unlock(&atabus_interlock);
393:
394: /*
395: * Attach an ATAPI bus, if needed.
396: */
397: if ((chp->ch_drive[0].drive_flags & DRIVE_ATAPI) ||
398: (chp->ch_drive[1].drive_flags & DRIVE_ATAPI)) {
399: #if NATAPIBUS > 0
400: wdc_atapibus_attach(atabus_sc);
401: #else
402: /*
403: * Fake the autoconfig "not configured" message
404: */
405: aprint_normal("atapibus at %s not configured\n",
1.169 thorpej 406: wdc->sc_dev.dv_xname);
1.137 bouyer 407: chp->atapibus = NULL;
1.141 bouyer 408: chp->ch_drive[0].drive_flags &= ~DRIVE_ATAPI;
409: chp->ch_drive[1].drive_flags &= ~DRIVE_ATAPI;
1.137 bouyer 410: #endif
411: }
412:
413: for (i = 0; i < 2; i++) {
414: struct ata_device adev;
415: if ((chp->ch_drive[i].drive_flags &
416: (DRIVE_ATA | DRIVE_OLD)) == 0) {
417: continue;
418: }
419: memset(&adev, 0, sizeof(struct ata_device));
420: adev.adev_bustype = &wdc_ata_bustype;
1.169 thorpej 421: adev.adev_channel = chp->ch_channel;
1.137 bouyer 422: adev.adev_openings = 1;
423: adev.adev_drv_data = &chp->ch_drive[i];
424: chp->ata_drives[i] = config_found(&atabus_sc->sc_dev,
1.162 thorpej 425: &adev, ataprint);
1.141 bouyer 426: if (chp->ata_drives[i] != NULL)
1.137 bouyer 427: wdc_probe_caps(&chp->ch_drive[i]);
1.141 bouyer 428: else
429: chp->ch_drive[i].drive_flags &=
430: ~(DRIVE_ATA | DRIVE_OLD);
1.137 bouyer 431: }
432:
433: /* now that we know the drives, the controller can set its modes */
1.169 thorpej 434: if (wdc->cap & WDC_CAPABILITY_MODE) {
435: wdc->set_modes(chp);
1.137 bouyer 436: wdc_print_modes(chp);
437: }
438: #if NATARAID > 0
1.169 thorpej 439: if (wdc->cap & WDC_CAPABILITY_RAID)
1.137 bouyer 440: for (i = 0; i < 2; i++)
441: if (chp->ata_drives[i] != NULL)
442: ata_raid_check_component(chp->ata_drives[i]);
443: #endif /* NATARAID > 0 */
444:
445: /*
1.152 wiz 446: * reset drive_flags for unattached devices, reset state for attached
1.137 bouyer 447: * ones
448: */
449: for (i = 0; i < 2; i++) {
450: if (chp->ch_drive[i].drv_softc == NULL)
451: chp->ch_drive[i].drive_flags = 0;
452: else
453: chp->ch_drive[i].state = 0;
454: }
455:
1.163 thorpej 456: out:
1.137 bouyer 457: if (atabus_initq == NULL) {
458: simple_lock(&atabus_interlock);
459: while(1) {
460: atabus_initq = TAILQ_FIRST(&atabus_initq_head);
461: if (atabus_initq->atabus_sc == atabus_sc)
462: break;
463: ltsleep(&atabus_initq_head, PRIBIO, "ata_initq", 0,
464: &atabus_interlock);
465: }
466: simple_unlock(&atabus_interlock);
467: }
468: simple_lock(&atabus_interlock);
469: TAILQ_REMOVE(&atabus_initq_head, atabus_initq, atabus_initq);
470: simple_unlock(&atabus_interlock);
471:
472: free(atabus_initq, M_DEVBUF);
473: wakeup(&atabus_initq_head);
474:
475: config_pending_decr();
1.189 mycroft 476:
477: wdc_delref(chp);
1.137 bouyer 478: }
479:
1.2 bouyer 480: int
1.168 thorpej 481: wdcprobe(struct wdc_channel *chp)
1.12 cgd 482: {
1.163 thorpej 483:
484: return (wdcprobe1(chp, 1));
1.137 bouyer 485: }
486:
1.167 thorpej 487: static int
1.168 thorpej 488: wdcprobe1(struct wdc_channel *chp, int poll)
1.137 bouyer 489: {
1.169 thorpej 490: struct wdc_softc *wdc = chp->ch_wdc;
1.31 bouyer 491: u_int8_t st0, st1, sc, sn, cl, ch;
492: u_int8_t ret_value = 0x03;
493: u_int8_t drive;
1.156 bouyer 494: int s;
1.31 bouyer 495:
496: /*
497: * Sanity check to see if the wdc channel responds at all.
498: */
499:
1.174 bouyer 500: s = splbio();
1.169 thorpej 501: if (wdc == NULL ||
502: (wdc->cap & WDC_CAPABILITY_NO_EXTRA_RESETS) == 0) {
1.107 dbj 503:
1.169 thorpej 504: if (wdc != NULL && (wdc->cap & WDC_CAPABILITY_SELECT))
505: wdc->select(chp,0);
1.137 bouyer 506:
1.157 fvdl 507: bus_space_write_1(chp->cmd_iot, chp->cmd_iohs[wd_sdh], 0,
1.43 kenh 508: WDSD_IBM);
1.131 mycroft 509: delay(10); /* 400ns delay */
1.157 fvdl 510: st0 = bus_space_read_1(chp->cmd_iot,
511: chp->cmd_iohs[wd_status], 0);
1.107 dbj 512:
1.169 thorpej 513: if (wdc != NULL && (wdc->cap & WDC_CAPABILITY_SELECT))
514: wdc->select(chp,1);
1.137 bouyer 515:
1.157 fvdl 516: bus_space_write_1(chp->cmd_iot, chp->cmd_iohs[wd_sdh], 0,
1.43 kenh 517: WDSD_IBM | 0x10);
1.131 mycroft 518: delay(10); /* 400ns delay */
1.157 fvdl 519: st1 = bus_space_read_1(chp->cmd_iot,
520: chp->cmd_iohs[wd_status], 0);
1.43 kenh 521:
522: WDCDEBUG_PRINT(("%s:%d: before reset, st0=0x%x, st1=0x%x\n",
1.169 thorpej 523: wdc != NULL ? wdc->sc_dev.dv_xname : "wdcprobe",
524: chp->ch_channel, st0, st1), DEBUG_PROBE);
1.43 kenh 525:
1.142 bouyer 526: if (st0 == 0xff || st0 == WDSD_IBM)
1.43 kenh 527: ret_value &= ~0x01;
1.142 bouyer 528: if (st1 == 0xff || st1 == (WDSD_IBM | 0x10))
1.43 kenh 529: ret_value &= ~0x02;
1.125 mycroft 530: /* Register writability test, drive 0. */
531: if (ret_value & 0x01) {
1.169 thorpej 532: if (wdc != NULL && (wdc->cap & WDC_CAPABILITY_SELECT))
533: wdc->select(chp,0);
1.157 fvdl 534: bus_space_write_1(chp->cmd_iot, chp->cmd_iohs[wd_sdh],
535: 0, WDSD_IBM);
536: bus_space_write_1(chp->cmd_iot,
537: chp->cmd_iohs[wd_cyl_lo], 0, 0x02);
1.174 bouyer 538: cl = bus_space_read_1(chp->cmd_iot,
539: chp->cmd_iohs[wd_cyl_lo], 0);
540: if (cl != 0x02) {
541: WDCDEBUG_PRINT(("%s:%d drive 0 wd_cyl_lo: "
542: "got 0x%x != 0x02\n",
543: wdc != NULL ?
544: wdc->sc_dev.dv_xname : "wdcprobe",
545: chp->ch_channel, cl),
546: DEBUG_PROBE);
1.125 mycroft 547: ret_value &= ~0x01;
1.174 bouyer 548: }
1.157 fvdl 549: bus_space_write_1(chp->cmd_iot,
550: chp->cmd_iohs[wd_cyl_lo], 0, 0x01);
1.174 bouyer 551: cl = bus_space_read_1(chp->cmd_iot,
552: chp->cmd_iohs[wd_cyl_lo], 0);
553: if (cl != 0x01) {
554: WDCDEBUG_PRINT(("%s:%d drive 0 wd_cyl_lo: "
555: "got 0x%x != 0x01\n",
556: wdc != NULL ?
557: wdc->sc_dev.dv_xname : "wdcprobe",
558: chp->ch_channel, cl),
559: DEBUG_PROBE);
1.125 mycroft 560: ret_value &= ~0x01;
1.174 bouyer 561: }
1.167 thorpej 562: bus_space_write_1(chp->cmd_iot,
563: chp->cmd_iohs[wd_sector], 0, 0x01);
1.174 bouyer 564: cl = bus_space_read_1(chp->cmd_iot,
565: chp->cmd_iohs[wd_sector], 0);
566: if (cl != 0x01) {
567: WDCDEBUG_PRINT(("%s:%d drive 0 wd_sector: "
568: "got 0x%x != 0x01\n",
569: wdc != NULL ?
570: wdc->sc_dev.dv_xname : "wdcprobe",
571: chp->ch_channel, cl),
572: DEBUG_PROBE);
1.125 mycroft 573: ret_value &= ~0x01;
1.174 bouyer 574: }
1.157 fvdl 575: bus_space_write_1(chp->cmd_iot,
576: chp->cmd_iohs[wd_sector], 0, 0x02);
1.174 bouyer 577: cl = bus_space_read_1(chp->cmd_iot,
578: chp->cmd_iohs[wd_sector], 0);
579: if (cl != 0x02) {
580: WDCDEBUG_PRINT(("%s:%d drive 0 wd_sector: "
581: "got 0x%x != 0x02\n",
582: wdc != NULL ?
583: wdc->sc_dev.dv_xname : "wdcprobe",
584: chp->ch_channel, cl),
585: DEBUG_PROBE);
1.125 mycroft 586: ret_value &= ~0x01;
1.174 bouyer 587: }
588: cl = bus_space_read_1(chp->cmd_iot,
589: chp->cmd_iohs[wd_cyl_lo], 0);
590: if (cl != 0x01) {
591: WDCDEBUG_PRINT(("%s:%d drive 0 wd_cyl_lo(2): "
592: "got 0x%x != 0x01\n",
593: wdc != NULL ?
594: wdc->sc_dev.dv_xname : "wdcprobe",
595: chp->ch_channel, cl),
596: DEBUG_PROBE);
1.131 mycroft 597: ret_value &= ~0x01;
1.174 bouyer 598: }
1.125 mycroft 599: }
600: /* Register writability test, drive 1. */
601: if (ret_value & 0x02) {
1.169 thorpej 602: if (wdc != NULL && (wdc->cap & WDC_CAPABILITY_SELECT))
603: wdc->select(chp,1);
1.157 fvdl 604: bus_space_write_1(chp->cmd_iot, chp->cmd_iohs[wd_sdh],
605: 0, WDSD_IBM | 0x10);
1.167 thorpej 606: bus_space_write_1(chp->cmd_iot,
607: chp->cmd_iohs[wd_cyl_lo], 0, 0x02);
1.174 bouyer 608: cl = bus_space_read_1(chp->cmd_iot,
609: chp->cmd_iohs[wd_cyl_lo], 0);
610: if (cl != 0x02) {
611: WDCDEBUG_PRINT(("%s:%d drive 1 wd_cyl_lo: "
612: "got 0x%x != 0x02\n",
613: wdc != NULL ?
614: wdc->sc_dev.dv_xname : "wdcprobe",
615: chp->ch_channel, cl),
616: DEBUG_PROBE);
1.125 mycroft 617: ret_value &= ~0x02;
1.174 bouyer 618: }
1.157 fvdl 619: bus_space_write_1(chp->cmd_iot,
620: chp->cmd_iohs[wd_cyl_lo], 0, 0x01);
1.174 bouyer 621: cl = bus_space_read_1(chp->cmd_iot,
622: chp->cmd_iohs[wd_cyl_lo], 0);
623: if (cl != 0x01) {
624: WDCDEBUG_PRINT(("%s:%d drive 1 wd_cyl_lo: "
625: "got 0x%x != 0x01\n",
626: wdc != NULL ?
627: wdc->sc_dev.dv_xname : "wdcprobe",
628: chp->ch_channel, cl),
629: DEBUG_PROBE);
1.125 mycroft 630: ret_value &= ~0x02;
1.174 bouyer 631: }
1.157 fvdl 632: bus_space_write_1(chp->cmd_iot,
633: chp->cmd_iohs[wd_sector], 0, 0x01);
1.174 bouyer 634: cl = bus_space_read_1(chp->cmd_iot,
635: chp->cmd_iohs[wd_sector], 0);
636: if (cl != 0x01) {
637: WDCDEBUG_PRINT(("%s:%d drive 1 wd_sector: "
638: "got 0x%x != 0x01\n",
639: wdc != NULL ?
640: wdc->sc_dev.dv_xname : "wdcprobe",
641: chp->ch_channel, cl),
642: DEBUG_PROBE);
1.125 mycroft 643: ret_value &= ~0x02;
1.174 bouyer 644: }
1.167 thorpej 645: bus_space_write_1(chp->cmd_iot,
646: chp->cmd_iohs[wd_sector], 0, 0x02);
1.174 bouyer 647: cl = bus_space_read_1(chp->cmd_iot,
648: chp->cmd_iohs[wd_sector], 0);
649: if (cl != 0x02) {
650: WDCDEBUG_PRINT(("%s:%d drive 1 wd_sector: "
651: "got 0x%x != 0x02\n",
652: wdc != NULL ?
653: wdc->sc_dev.dv_xname : "wdcprobe",
654: chp->ch_channel, cl),
655: DEBUG_PROBE);
1.125 mycroft 656: ret_value &= ~0x02;
1.174 bouyer 657: }
658: cl = bus_space_read_1(chp->cmd_iot,
659: chp->cmd_iohs[wd_cyl_lo], 0);
660: if (cl != 0x01) {
661: WDCDEBUG_PRINT(("%s:%d drive 1 wd_cyl_lo(2): "
662: "got 0x%x != 0x01\n",
663: wdc != NULL ?
664: wdc->sc_dev.dv_xname : "wdcprobe",
665: chp->ch_channel, cl),
666: DEBUG_PROBE);
1.131 mycroft 667: ret_value &= ~0x02;
1.174 bouyer 668: }
1.125 mycroft 669: }
1.137 bouyer 670:
1.174 bouyer 671: if (ret_value == 0) {
672: splx(s);
1.137 bouyer 673: return 0;
1.174 bouyer 674: }
1.62 bouyer 675: }
1.31 bouyer 676:
1.174 bouyer 677:
1.181 bouyer 678: #if 0 /* XXX this break some ATA or ATAPI devices */
1.174 bouyer 679: /*
680: * reset bus. Also send an ATAPI_RESET to devices, in case there are
681: * ATAPI device out there which don't react to the bus reset
682: */
683: if (ret_value & 0x01) {
684: if (wdc != NULL && (wdc->cap & WDC_CAPABILITY_SELECT))
685: wdc->select(chp,0);
686: bus_space_write_1(chp->cmd_iot, chp->cmd_iohs[wd_sdh],
687: 0, WDSD_IBM);
688: bus_space_write_1(chp->cmd_iot, chp->cmd_iohs[wd_command], 0,
689: ATAPI_SOFT_RESET);
690: }
691: if (ret_value & 0x02) {
692: if (wdc != NULL && (wdc->cap & WDC_CAPABILITY_SELECT))
693: wdc->select(chp,0);
694: bus_space_write_1(chp->cmd_iot, chp->cmd_iohs[wd_sdh],
695: 0, WDSD_IBM | 0x10);
696: bus_space_write_1(chp->cmd_iot, chp->cmd_iohs[wd_command], 0,
697: ATAPI_SOFT_RESET);
698: }
1.156 bouyer 699:
1.175 bouyer 700: delay(5000);
1.181 bouyer 701: #endif
1.175 bouyer 702:
1.169 thorpej 703: if (wdc != NULL && (wdc->cap & WDC_CAPABILITY_SELECT))
704: wdc->select(chp,0);
1.157 fvdl 705: bus_space_write_1(chp->cmd_iot, chp->cmd_iohs[wd_sdh], 0, WDSD_IBM);
1.137 bouyer 706: delay(10); /* 400ns delay */
1.174 bouyer 707: /* assert SRST, wait for reset to complete */
1.137 bouyer 708: bus_space_write_1(chp->ctl_iot, chp->ctl_ioh, wd_aux_ctlr,
709: WDCTL_RST | WDCTL_IDS | WDCTL_4BIT);
1.172 bouyer 710: DELAY(1000);
711: bus_space_write_1(chp->ctl_iot, chp->ctl_ioh, wd_aux_ctlr,
712: WDCTL_IDS | WDCTL_4BIT);
1.137 bouyer 713: DELAY(2000);
1.157 fvdl 714: (void) bus_space_read_1(chp->cmd_iot, chp->cmd_iohs[wd_error], 0);
1.137 bouyer 715: bus_space_write_1(chp->ctl_iot, chp->ctl_ioh, wd_aux_ctlr, WDCTL_4BIT);
716: delay(10); /* 400ns delay */
1.156 bouyer 717: /* ACK interrupt in case there is one pending left (Promise ATA100) */
1.169 thorpej 718: if (wdc != NULL && (wdc->cap & WDC_CAPABILITY_IRQACK))
719: wdc->irqack(chp);
1.156 bouyer 720: splx(s);
1.137 bouyer 721:
722: ret_value = __wdcwait_reset(chp, ret_value, poll);
723: WDCDEBUG_PRINT(("%s:%d: after reset, ret_value=0x%d\n",
1.169 thorpej 724: wdc != NULL ? wdc->sc_dev.dv_xname : "wdcprobe", chp->ch_channel,
1.137 bouyer 725: ret_value), DEBUG_PROBE);
1.12 cgd 726:
1.137 bouyer 727: /* if reset failed, there's nothing here */
728: if (ret_value == 0)
729: return 0;
1.67 bouyer 730:
1.12 cgd 731: /*
1.167 thorpej 732: * Test presence of drives. First test register signatures looking
733: * for ATAPI devices. If it's not an ATAPI and reset said there may
734: * be something here assume it's ATA or OLD. Ghost will be killed
735: * later in attach routine.
1.12 cgd 736: */
1.137 bouyer 737: for (drive = 0; drive < 2; drive++) {
738: if ((ret_value & (0x01 << drive)) == 0)
739: continue;
1.169 thorpej 740: if (wdc != NULL && wdc->cap & WDC_CAPABILITY_SELECT)
741: wdc->select(chp,drive);
1.157 fvdl 742: bus_space_write_1(chp->cmd_iot, chp->cmd_iohs[wd_sdh], 0,
1.137 bouyer 743: WDSD_IBM | (drive << 4));
744: delay(10); /* 400ns delay */
745: /* Save registers contents */
1.157 fvdl 746: sc = bus_space_read_1(chp->cmd_iot,
747: chp->cmd_iohs[wd_seccnt], 0);
748: sn = bus_space_read_1(chp->cmd_iot,
749: chp->cmd_iohs[wd_sector], 0);
750: cl = bus_space_read_1(chp->cmd_iot,
751: chp->cmd_iohs[wd_cyl_lo], 0);
752: ch = bus_space_read_1(chp->cmd_iot,
753: chp->cmd_iohs[wd_cyl_hi], 0);
1.137 bouyer 754:
755: WDCDEBUG_PRINT(("%s:%d:%d: after reset, sc=0x%x sn=0x%x "
756: "cl=0x%x ch=0x%x\n",
1.169 thorpej 757: wdc != NULL ? wdc->sc_dev.dv_xname : "wdcprobe",
758: chp->ch_channel, drive, sc, sn, cl, ch), DEBUG_PROBE);
1.31 bouyer 759: /*
1.137 bouyer 760: * sc & sn are supposted to be 0x1 for ATAPI but in some cases
761: * we get wrong values here, so ignore it.
1.31 bouyer 762: */
1.137 bouyer 763: if (cl == 0x14 && ch == 0xeb) {
764: chp->ch_drive[drive].drive_flags |= DRIVE_ATAPI;
765: } else {
766: chp->ch_drive[drive].drive_flags |= DRIVE_ATA;
1.169 thorpej 767: if (wdc == NULL ||
768: (wdc->cap & WDC_CAPABILITY_PREATA) != 0)
1.137 bouyer 769: chp->ch_drive[drive].drive_flags |= DRIVE_OLD;
770: }
1.31 bouyer 771: }
1.137 bouyer 772: return (ret_value);
773: }
1.31 bouyer 774:
1.137 bouyer 775: void
1.168 thorpej 776: wdcattach(struct wdc_channel *chp)
1.137 bouyer 777: {
1.169 thorpej 778: struct wdc_softc *wdc = chp->ch_wdc;
1.137 bouyer 779: static int inited = 0;
1.32 bouyer 780:
1.137 bouyer 781: if (chp->ch_flags & WDCF_DISABLED)
782: return;
1.74 enami 783:
1.191 mycroft 784: /* default data transfer methods */
785: if (!wdc->datain_pio)
786: wdc->datain_pio = wdc_datain_pio;
787: if (!wdc->dataout_pio)
788: wdc->dataout_pio = wdc_dataout_pio;
789:
1.137 bouyer 790: /* initialise global data */
791: callout_init(&chp->ch_callout);
1.169 thorpej 792: if (wdc->drv_probe == NULL)
793: wdc->drv_probe = wdc_drvprobe;
1.137 bouyer 794: if (inited == 0) {
1.165 thorpej 795: /* Initialize the ata_xfer pool. */
796: pool_init(&wdc_xfer_pool, sizeof(struct ata_xfer), 0,
1.137 bouyer 797: 0, 0, "wdcspl", NULL);
798: inited++;
1.133 bouyer 799: }
1.165 thorpej 800: TAILQ_INIT(&chp->ch_queue->queue_xfer);
1.148 bouyer 801: chp->ch_queue->queue_freeze = 0;
1.186 bouyer 802: chp->ch_queue->active_xfer = NULL;
1.126 enami 803:
1.169 thorpej 804: chp->atabus = config_found(&wdc->sc_dev, chp, atabusprint);
1.74 enami 805: }
806:
1.163 thorpej 807: int
808: wdcactivate(struct device *self, enum devact act)
1.137 bouyer 809: {
810: struct wdc_softc *wdc = (struct wdc_softc *)self;
811: int s, i, error = 0;
812:
813: s = splbio();
814: switch (act) {
815: case DVACT_ACTIVATE:
816: error = EOPNOTSUPP;
817: break;
818:
819: case DVACT_DEACTIVATE:
820: for (i = 0; i < wdc->nchannels; i++) {
821: error = config_deactivate(wdc->channels[i]->atabus);
822: if (error)
823: break;
824: }
825: break;
826: }
827: splx(s);
828: return (error);
829: }
830:
831: int
1.163 thorpej 832: wdcdetach(struct device *self, int flags)
1.137 bouyer 833: {
834: struct wdc_softc *wdc = (struct wdc_softc *)self;
1.168 thorpej 835: struct wdc_channel *chp;
1.188 mycroft 836: struct scsipi_adapter *adapt = &wdc->sc_atapi_adapter._generic;
1.137 bouyer 837: int i, error = 0;
838:
839: for (i = 0; i < wdc->nchannels; i++) {
840: chp = wdc->channels[i];
841: WDCDEBUG_PRINT(("wdcdetach: %s: detaching %s\n",
842: wdc->sc_dev.dv_xname, chp->atabus->dv_xname), DEBUG_DETACH);
843: error = config_detach(chp->atabus, flags);
844: if (error)
845: break;
846: }
1.188 mycroft 847: if (adapt->adapt_refcnt != 0) {
848: #ifdef DIAGNOSTIC
849: printf("wdcdetach: refcnt should be 0 here??\n");
850: #endif
851: (void) (*adapt->adapt_enable)(&wdc->sc_dev, 0);
852: }
1.137 bouyer 853: return (error);
854: }
855:
1.31 bouyer 856: /*
857: * Start I/O on a controller, for the given channel.
858: * The first xfer may be not for our channel if the channel queues
859: * are shared.
860: */
861: void
1.168 thorpej 862: wdcstart(struct wdc_channel *chp)
1.31 bouyer 863: {
1.169 thorpej 864: struct wdc_softc *wdc = chp->ch_wdc;
1.165 thorpej 865: struct ata_xfer *xfer;
1.38 bouyer 866:
867: #ifdef WDC_DIAGNOSTIC
868: int spl1, spl2;
869:
870: spl1 = splbio();
871: spl2 = splbio();
872: if (spl2 != spl1) {
873: printf("wdcstart: not at splbio()\n");
874: panic("wdcstart");
875: }
876: splx(spl2);
877: splx(spl1);
878: #endif /* WDC_DIAGNOSTIC */
1.12 cgd 879:
1.31 bouyer 880: /* is there a xfer ? */
1.165 thorpej 881: if ((xfer = TAILQ_FIRST(&chp->ch_queue->queue_xfer)) == NULL)
1.31 bouyer 882: return;
1.47 bouyer 883:
884: /* adjust chp, in case we have a shared queue */
1.165 thorpej 885: chp = xfer->c_chp;
1.47 bouyer 886:
1.186 bouyer 887: if (chp->ch_queue->active_xfer != NULL) {
1.31 bouyer 888: return; /* channel aleady active */
889: }
1.148 bouyer 890: if (__predict_false(chp->ch_queue->queue_freeze > 0)) {
1.147 bouyer 891: return; /* queue froozen */
1.137 bouyer 892: }
1.31 bouyer 893: #ifdef DIAGNOSTIC
894: if ((chp->ch_flags & WDCF_IRQ_WAIT) != 0)
1.118 provos 895: panic("wdcstart: channel waiting for irq");
1.31 bouyer 896: #endif
1.169 thorpej 897: if (wdc->cap & WDC_CAPABILITY_HWLOCK)
898: if (!(*wdc->claim_hw)(chp, 0))
1.31 bouyer 899: return;
1.12 cgd 900:
1.31 bouyer 901: WDCDEBUG_PRINT(("wdcstart: xfer %p channel %d drive %d\n", xfer,
1.169 thorpej 902: chp->ch_channel, xfer->c_drive), DEBUG_XFERS);
1.165 thorpej 903: if (chp->ch_drive[xfer->c_drive].drive_flags & DRIVE_RESET) {
904: chp->ch_drive[xfer->c_drive].drive_flags &= ~DRIVE_RESET;
905: chp->ch_drive[xfer->c_drive].state = 0;
1.37 bouyer 906: }
1.186 bouyer 907: chp->ch_queue->active_xfer = xfer;
908: TAILQ_REMOVE(&chp->ch_queue->queue_xfer, xfer, c_xferchain);
909:
1.169 thorpej 910: if (wdc->cap & WDC_CAPABILITY_NOIRQ)
1.98 bjh21 911: KASSERT(xfer->c_flags & C_POLL);
1.31 bouyer 912: xfer->c_start(chp, xfer);
913: }
1.2 bouyer 914:
1.31 bouyer 915: /* restart an interrupted I/O */
916: void
1.163 thorpej 917: wdcrestart(void *v)
1.31 bouyer 918: {
1.168 thorpej 919: struct wdc_channel *chp = v;
1.31 bouyer 920: int s;
1.2 bouyer 921:
1.31 bouyer 922: s = splbio();
1.45 drochner 923: wdcstart(chp);
1.31 bouyer 924: splx(s);
1.2 bouyer 925: }
1.31 bouyer 926:
1.2 bouyer 927:
1.31 bouyer 928: /*
929: * Interrupt routine for the controller. Acknowledge the interrupt, check for
930: * errors on the current operation, mark it done if necessary, and start the
931: * next request. Also check for a partially done transfer, and continue with
932: * the next chunk if so.
933: */
1.12 cgd 934: int
1.163 thorpej 935: wdcintr(void *arg)
1.12 cgd 936: {
1.168 thorpej 937: struct wdc_channel *chp = arg;
1.169 thorpej 938: struct wdc_softc *wdc = chp->ch_wdc;
1.165 thorpej 939: struct ata_xfer *xfer;
1.76 bouyer 940: int ret;
1.12 cgd 941:
1.169 thorpej 942: if ((wdc->sc_dev.dv_flags & DVF_ACTIVE) == 0) {
1.80 enami 943: WDCDEBUG_PRINT(("wdcintr: deactivated controller\n"),
944: DEBUG_INTR);
945: return (0);
946: }
1.31 bouyer 947: if ((chp->ch_flags & WDCF_IRQ_WAIT) == 0) {
948: WDCDEBUG_PRINT(("wdcintr: inactive controller\n"), DEBUG_INTR);
1.113 bouyer 949: /* try to clear the pending interrupt anyway */
1.157 fvdl 950: (void)bus_space_read_1(chp->cmd_iot,
951: chp->cmd_iohs[wd_status], 0);
1.80 enami 952: return (0);
1.31 bouyer 953: }
1.12 cgd 954:
1.31 bouyer 955: WDCDEBUG_PRINT(("wdcintr\n"), DEBUG_INTR);
1.186 bouyer 956: xfer = chp->ch_queue->active_xfer;
957: #ifdef DIAGNOSTIC
958: if (xfer == NULL)
959: panic("wdcintr: no xfer");
960: #endif
1.84 bouyer 961: if (chp->ch_flags & WDCF_DMA_WAIT) {
1.169 thorpej 962: wdc->dma_status =
963: (*wdc->dma_finish)(wdc->dma_arg, chp->ch_channel,
1.185 bouyer 964: xfer->c_drive, WDC_DMAEND_END);
1.169 thorpej 965: if (wdc->dma_status & WDC_DMAST_NOIRQ) {
1.84 bouyer 966: /* IRQ not for us, not detected by DMA engine */
967: return 0;
968: }
969: chp->ch_flags &= ~WDCF_DMA_WAIT;
970: }
1.31 bouyer 971: chp->ch_flags &= ~WDCF_IRQ_WAIT;
1.76 bouyer 972: ret = xfer->c_intr(chp, xfer, 1);
973: if (ret == 0) /* irq was not for us, still waiting for irq */
974: chp->ch_flags |= WDCF_IRQ_WAIT;
975: return (ret);
1.12 cgd 976: }
977:
1.31 bouyer 978: /* Put all disk in RESET state */
1.125 mycroft 979: void
1.183 bouyer 980: wdc_reset_drive(struct ata_drive_datas *drvp, int flags)
1.2 bouyer 981: {
1.168 thorpej 982: struct wdc_channel *chp = drvp->chnl_softc;
1.169 thorpej 983: struct wdc_softc *wdc = chp->ch_wdc;
1.34 bouyer 984: WDCDEBUG_PRINT(("ata_reset_channel %s:%d for drive %d\n",
1.169 thorpej 985: wdc->sc_dev.dv_xname, chp->ch_channel, drvp->drive),
1.34 bouyer 986: DEBUG_FUNCS);
1.182 bouyer 987:
988:
1.183 bouyer 989: wdc_reset_channel(chp, flags);
1.182 bouyer 990: }
991:
1.183 bouyer 992: void
993: wdc_reset_channel(struct wdc_channel *chp, int flags)
1.182 bouyer 994: {
1.186 bouyer 995: TAILQ_HEAD(, ata_xfer) reset_xfer;
1.183 bouyer 996: struct ata_xfer *xfer, *next_xfer;
1.182 bouyer 997: int drive;
998:
1.184 bouyer 999: chp->ch_queue->queue_freeze++;
1.186 bouyer 1000: TAILQ_INIT(&reset_xfer);
1.184 bouyer 1001:
1002: /* if we can poll or wait it's OK, otherwise wake up the kernel
1003: * thread
1004: */
1005: if ((flags & (AT_POLL | AT_WAIT)) == 0) {
1006: if (chp->ch_flags & WDCF_TH_RESET) {
1007: /* no need to schedule a reset more than one time */
1008: return;
1009: }
1010: chp->ch_flags |= WDCF_TH_RESET;
1011: chp->ch_reset_flags = flags & (AT_RST_EMERG | AT_RST_NOCMD);
1012: wakeup(&chp->ch_thread);
1013: return;
1014: }
1015:
1.186 bouyer 1016: chp->ch_flags &= ~WDCF_IRQ_WAIT;
1017: /*
1018: * if the current command if on an ATAPI device, issue a
1019: * ATAPI_SOFT_RESET
1020: */
1021: xfer = chp->ch_queue->active_xfer;
1022: if (xfer && xfer->c_chp == chp && (xfer->c_flags & C_ATAPI)) {
1023: wdccommandshort(chp, xfer->c_drive, ATAPI_SOFT_RESET);
1024: if (flags & AT_WAIT)
1025: tsleep(&flags, PRIBIO, "atardl", mstohz(1) + 1);
1026: else
1027: delay(1000);
1028: }
1029:
1.184 bouyer 1030: /* reset the channel */
1.186 bouyer 1031: if (flags & AT_WAIT)
1032: (void) wdcreset(chp, RESET_SLEEP);
1033: else
1.184 bouyer 1034: (void) wdcreset(chp, RESET_POLL);
1035:
1036: /*
1.186 bouyer 1037: * wait a bit after reset; in case the DMA engines needs some time
1.184 bouyer 1038: * to recover.
1039: */
1040: if (flags & AT_WAIT)
1.186 bouyer 1041: tsleep(&flags, PRIBIO, "atardl", mstohz(1) + 1);
1.184 bouyer 1042: else
1043: delay(1000);
1.182 bouyer 1044: /*
1045: * look for pending xfers. If we have a shared queue, we'll also reset
1046: * the other channel if the current xfer is running on it.
1.184 bouyer 1047: * Then we'll dequeue only the xfers for this channel.
1.182 bouyer 1048: */
1049: if ((flags & AT_RST_NOCMD) == 0) {
1.186 bouyer 1050: /*
1051: * move all xfers queued for this channel to the reset queue,
1052: * and then process the current xfer and then the reset queue.
1053: * We have to use a temporary queue because c_kill_xfer()
1054: * may requeue commands.
1055: */
1056: for (xfer = TAILQ_FIRST(&chp->ch_queue->queue_xfer);
1057: xfer != NULL; xfer = next_xfer) {
1058: next_xfer = TAILQ_NEXT(xfer, c_xferchain);
1059: if (xfer->c_chp != chp)
1060: continue;
1061: TAILQ_REMOVE(&chp->ch_queue->queue_xfer,
1062: xfer, c_xferchain);
1063: TAILQ_INSERT_TAIL(&reset_xfer, xfer, c_xferchain);
1064: }
1065: xfer = chp->ch_queue->active_xfer;
1.184 bouyer 1066: if (xfer) {
1067: if (xfer->c_chp != chp)
1068: wdc_reset_channel(xfer->c_chp, flags);
1069: else {
1.186 bouyer 1070: callout_stop(&chp->ch_callout);
1.184 bouyer 1071: /*
1072: * If we're waiting for DMA, stop the
1073: * DMA engine
1074: */
1075: if (chp->ch_flags & WDCF_DMA_WAIT) {
1076: (*chp->ch_wdc->dma_finish)(
1077: chp->ch_wdc->dma_arg,
1078: chp->ch_channel,
1079: xfer->c_drive,
1.185 bouyer 1080: WDC_DMAEND_ABRT_QUIET);
1.186 bouyer 1081: chp->ch_flags &= ~WDCF_DMA_WAIT;
1.184 bouyer 1082: }
1.186 bouyer 1083: chp->ch_queue->active_xfer = NULL;
1084: if ((flags & AT_RST_EMERG) == 0)
1085: xfer->c_kill_xfer(
1086: chp, xfer, KILL_RESET);
1.184 bouyer 1087: }
1088: }
1.186 bouyer 1089:
1090: for (xfer = TAILQ_FIRST(&reset_xfer);
1.183 bouyer 1091: xfer != NULL; xfer = next_xfer) {
1092: next_xfer = TAILQ_NEXT(xfer, c_xferchain);
1.186 bouyer 1093: TAILQ_REMOVE(&reset_xfer, xfer, c_xferchain);
1.182 bouyer 1094: if ((flags & AT_RST_EMERG) == 0)
1095: xfer->c_kill_xfer(chp, xfer, KILL_RESET);
1096: }
1097: }
1.31 bouyer 1098: for (drive = 0; drive < 2; drive++) {
1099: chp->ch_drive[drive].state = 0;
1.12 cgd 1100: }
1.184 bouyer 1101: chp->ch_flags &= ~WDCF_TH_RESET;
1.182 bouyer 1102: if ((flags & AT_RST_EMERG) == 0) {
1103: chp->ch_queue->queue_freeze--;
1104: wdcstart(chp);
1105: } else {
1106: /* make sure that we can use polled commands */
1107: TAILQ_INIT(&chp->ch_queue->queue_xfer);
1108: chp->ch_queue->queue_freeze = 0;
1.186 bouyer 1109: chp->ch_queue->active_xfer = NULL;
1.182 bouyer 1110: }
1.31 bouyer 1111: }
1.12 cgd 1112:
1.31 bouyer 1113: int
1.168 thorpej 1114: wdcreset(struct wdc_channel *chp, int poll)
1.31 bouyer 1115: {
1.169 thorpej 1116: struct wdc_softc *wdc = chp->ch_wdc;
1.31 bouyer 1117: int drv_mask1, drv_mask2;
1.156 bouyer 1118: int s = 0;
1.2 bouyer 1119:
1.169 thorpej 1120: if (wdc->cap & WDC_CAPABILITY_SELECT)
1121: wdc->select(chp,0);
1.156 bouyer 1122: if (poll != RESET_SLEEP)
1123: s = splbio();
1.157 fvdl 1124: /* master */
1125: bus_space_write_1(chp->cmd_iot, chp->cmd_iohs[wd_sdh], 0, WDSD_IBM);
1.131 mycroft 1126: delay(10); /* 400ns delay */
1.31 bouyer 1127: bus_space_write_1(chp->ctl_iot, chp->ctl_ioh, wd_aux_ctlr,
1.131 mycroft 1128: WDCTL_RST | WDCTL_IDS | WDCTL_4BIT);
1129: delay(2000);
1.157 fvdl 1130: (void) bus_space_read_1(chp->cmd_iot, chp->cmd_iohs[wd_error], 0);
1.137 bouyer 1131: bus_space_write_1(chp->ctl_iot, chp->ctl_ioh, wd_aux_ctlr,
1132: WDCTL_4BIT | WDCTL_IDS);
1.131 mycroft 1133: delay(10); /* 400ns delay */
1.156 bouyer 1134: if (poll != RESET_SLEEP) {
1.169 thorpej 1135: if (wdc->cap & WDC_CAPABILITY_IRQACK)
1136: wdc->irqack(chp);
1.156 bouyer 1137: splx(s);
1138: }
1.2 bouyer 1139:
1.31 bouyer 1140: drv_mask1 = (chp->ch_drive[0].drive_flags & DRIVE) ? 0x01:0x00;
1141: drv_mask1 |= (chp->ch_drive[1].drive_flags & DRIVE) ? 0x02:0x00;
1.137 bouyer 1142: drv_mask2 = __wdcwait_reset(chp, drv_mask1,
1143: (poll == RESET_SLEEP) ? 0 : 1);
1144: if (drv_mask2 != drv_mask1) {
1.31 bouyer 1145: printf("%s channel %d: reset failed for",
1.169 thorpej 1146: wdc->sc_dev.dv_xname, chp->ch_channel);
1.31 bouyer 1147: if ((drv_mask1 & 0x01) != 0 && (drv_mask2 & 0x01) == 0)
1148: printf(" drive 0");
1149: if ((drv_mask1 & 0x02) != 0 && (drv_mask2 & 0x02) == 0)
1150: printf(" drive 1");
1151: printf("\n");
1152: }
1.137 bouyer 1153: bus_space_write_1(chp->ctl_iot, chp->ctl_ioh, wd_aux_ctlr, WDCTL_4BIT);
1.31 bouyer 1154: return (drv_mask1 != drv_mask2) ? 1 : 0;
1155: }
1156:
1157: static int
1.168 thorpej 1158: __wdcwait_reset(struct wdc_channel *chp, int drv_mask, int poll)
1.31 bouyer 1159: {
1.169 thorpej 1160: struct wdc_softc *wdc = chp->ch_wdc;
1.137 bouyer 1161: int timeout, nloop;
1.149 bouyer 1162: u_int8_t st0 = 0, st1 = 0;
1.70 bouyer 1163: #ifdef WDCDEBUG
1.146 christos 1164: u_int8_t sc0 = 0, sn0 = 0, cl0 = 0, ch0 = 0;
1165: u_int8_t sc1 = 0, sn1 = 0, cl1 = 0, ch1 = 0;
1.70 bouyer 1166: #endif
1.137 bouyer 1167:
1168: if (poll)
1169: nloop = WDCNDELAY_RST;
1170: else
1171: nloop = WDC_RESET_WAIT * hz / 1000;
1.31 bouyer 1172: /* wait for BSY to deassert */
1.137 bouyer 1173: for (timeout = 0; timeout < nloop; timeout++) {
1.174 bouyer 1174: if ((drv_mask & 0x01) != 0) {
1175: if (wdc && wdc->cap & WDC_CAPABILITY_SELECT)
1176: wdc->select(chp,0);
1177: bus_space_write_1(chp->cmd_iot, chp->cmd_iohs[wd_sdh],
1178: 0, WDSD_IBM); /* master */
1179: delay(10);
1180: st0 = bus_space_read_1(chp->cmd_iot,
1181: chp->cmd_iohs[wd_status], 0);
1.70 bouyer 1182: #ifdef WDCDEBUG
1.174 bouyer 1183: sc0 = bus_space_read_1(chp->cmd_iot,
1184: chp->cmd_iohs[wd_seccnt], 0);
1185: sn0 = bus_space_read_1(chp->cmd_iot,
1186: chp->cmd_iohs[wd_sector], 0);
1187: cl0 = bus_space_read_1(chp->cmd_iot,
1188: chp->cmd_iohs[wd_cyl_lo], 0);
1189: ch0 = bus_space_read_1(chp->cmd_iot,
1190: chp->cmd_iohs[wd_cyl_hi], 0);
1.70 bouyer 1191: #endif
1.174 bouyer 1192: }
1193: if ((drv_mask & 0x02) != 0) {
1194: if (wdc && wdc->cap & WDC_CAPABILITY_SELECT)
1195: wdc->select(chp,1);
1196: bus_space_write_1(chp->cmd_iot, chp->cmd_iohs[wd_sdh],
1197: 0, WDSD_IBM | 0x10); /* slave */
1198: delay(10);
1199: st1 = bus_space_read_1(chp->cmd_iot,
1200: chp->cmd_iohs[wd_status], 0);
1.70 bouyer 1201: #ifdef WDCDEBUG
1.174 bouyer 1202: sc1 = bus_space_read_1(chp->cmd_iot,
1203: chp->cmd_iohs[wd_seccnt], 0);
1204: sn1 = bus_space_read_1(chp->cmd_iot,
1205: chp->cmd_iohs[wd_sector], 0);
1206: cl1 = bus_space_read_1(chp->cmd_iot,
1207: chp->cmd_iohs[wd_cyl_lo], 0);
1208: ch1 = bus_space_read_1(chp->cmd_iot,
1209: chp->cmd_iohs[wd_cyl_hi], 0);
1.70 bouyer 1210: #endif
1.174 bouyer 1211: }
1.31 bouyer 1212:
1213: if ((drv_mask & 0x01) == 0) {
1214: /* no master */
1215: if ((drv_mask & 0x02) != 0 && (st1 & WDCS_BSY) == 0) {
1216: /* No master, slave is ready, it's done */
1.65 bouyer 1217: goto end;
1.31 bouyer 1218: }
1219: } else if ((drv_mask & 0x02) == 0) {
1220: /* no slave */
1221: if ((drv_mask & 0x01) != 0 && (st0 & WDCS_BSY) == 0) {
1222: /* No slave, master is ready, it's done */
1.65 bouyer 1223: goto end;
1.31 bouyer 1224: }
1.2 bouyer 1225: } else {
1.31 bouyer 1226: /* Wait for both master and slave to be ready */
1227: if ((st0 & WDCS_BSY) == 0 && (st1 & WDCS_BSY) == 0) {
1.65 bouyer 1228: goto end;
1.2 bouyer 1229: }
1230: }
1.137 bouyer 1231: if (poll)
1232: delay(WDCDELAY);
1233: else
1234: tsleep(&nloop, PRIBIO, "atarst", 1);
1.2 bouyer 1235: }
1.116 wiz 1236: /* Reset timed out. Maybe it's because drv_mask was not right */
1.31 bouyer 1237: if (st0 & WDCS_BSY)
1238: drv_mask &= ~0x01;
1239: if (st1 & WDCS_BSY)
1240: drv_mask &= ~0x02;
1.65 bouyer 1241: end:
1.70 bouyer 1242: WDCDEBUG_PRINT(("%s:%d:0: after reset, sc=0x%x sn=0x%x "
1243: "cl=0x%x ch=0x%x\n",
1.169 thorpej 1244: wdc != NULL ? wdc->sc_dev.dv_xname : "wdcprobe",
1245: chp->ch_channel, sc0, sn0, cl0, ch0), DEBUG_PROBE);
1.70 bouyer 1246: WDCDEBUG_PRINT(("%s:%d:1: after reset, sc=0x%x sn=0x%x "
1247: "cl=0x%x ch=0x%x\n",
1.169 thorpej 1248: wdc != NULL ? wdc->sc_dev.dv_xname : "wdcprobe",
1249: chp->ch_channel, sc1, sn1, cl1, ch1), DEBUG_PROBE);
1.70 bouyer 1250:
1.149 bouyer 1251: WDCDEBUG_PRINT(("%s:%d: wdcwait_reset() end, st0=0x%x st1=0x%x\n",
1.169 thorpej 1252: wdc != NULL ? wdc->sc_dev.dv_xname : "wdcprobe", chp->ch_channel,
1.149 bouyer 1253: st0, st1), DEBUG_PROBE);
1.65 bouyer 1254:
1.31 bouyer 1255: return drv_mask;
1.2 bouyer 1256: }
1257:
1258: /*
1.31 bouyer 1259: * Wait for a drive to be !BSY, and have mask in its status register.
1260: * return -1 for a timeout after "timeout" ms.
1.2 bouyer 1261: */
1.167 thorpej 1262: static int
1.168 thorpej 1263: __wdcwait(struct wdc_channel *chp, int mask, int bits, int timeout)
1.2 bouyer 1264: {
1.169 thorpej 1265: struct wdc_softc *wdc = chp->ch_wdc;
1.31 bouyer 1266: u_char status;
1267: int time = 0;
1.60 abs 1268:
1.169 thorpej 1269: WDCDEBUG_PRINT(("__wdcwait %s:%d\n", wdc != NULL ?
1270: wdc->sc_dev.dv_xname : "none",
1271: chp->ch_channel), DEBUG_STATUS);
1.31 bouyer 1272: chp->ch_error = 0;
1273:
1274: timeout = timeout * 1000 / WDCDELAY; /* delay uses microseconds */
1.2 bouyer 1275:
1.31 bouyer 1276: for (;;) {
1277: chp->ch_status = status =
1.157 fvdl 1278: bus_space_read_1(chp->cmd_iot, chp->cmd_iohs[wd_status], 0);
1.131 mycroft 1279: if ((status & (WDCS_BSY | mask)) == bits)
1.31 bouyer 1280: break;
1281: if (++time > timeout) {
1.137 bouyer 1282: WDCDEBUG_PRINT(("__wdcwait: timeout (time=%d), "
1.87 bouyer 1283: "status %x error %x (mask 0x%x bits 0x%x)\n",
1284: time, status,
1.157 fvdl 1285: bus_space_read_1(chp->cmd_iot,
1286: chp->cmd_iohs[wd_error], 0), mask, bits),
1.87 bouyer 1287: DEBUG_STATUS | DEBUG_PROBE | DEBUG_DELAY);
1.137 bouyer 1288: return(WDCWAIT_TOUT);
1.31 bouyer 1289: }
1290: delay(WDCDELAY);
1.2 bouyer 1291: }
1.87 bouyer 1292: #ifdef WDCDEBUG
1293: if (time > 0 && (wdcdebug_mask & DEBUG_DELAY))
1.137 bouyer 1294: printf("__wdcwait: did busy-wait, time=%d\n", time);
1.87 bouyer 1295: #endif
1.31 bouyer 1296: if (status & WDCS_ERR)
1.157 fvdl 1297: chp->ch_error = bus_space_read_1(chp->cmd_iot,
1298: chp->cmd_iohs[wd_error], 0);
1.31 bouyer 1299: #ifdef WDCNDELAY_DEBUG
1300: /* After autoconfig, there should be no long delays. */
1301: if (!cold && time > WDCNDELAY_DEBUG) {
1.186 bouyer 1302: struct ata_xfer *xfer = chp->ch_queue->active_xfer;
1.31 bouyer 1303: if (xfer == NULL)
1304: printf("%s channel %d: warning: busy-wait took %dus\n",
1.169 thorpej 1305: wdc->sc_dev.dv_xname, chp->ch_channel,
1.31 bouyer 1306: WDCDELAY * time);
1307: else
1308: printf("%s:%d:%d: warning: busy-wait took %dus\n",
1.169 thorpej 1309: wdc->sc_dev.dv_xname, chp->ch_channel,
1.31 bouyer 1310: xfer->drive,
1311: WDCDELAY * time);
1.2 bouyer 1312: }
1313: #endif
1.137 bouyer 1314: return(WDCWAIT_OK);
1315: }
1316:
1317: /*
1318: * Call __wdcwait(), polling using tsleep() or waking up the kernel
1319: * thread if possible
1320: */
1321: int
1.168 thorpej 1322: wdcwait(struct wdc_channel *chp, int mask, int bits, int timeout, int flags)
1.137 bouyer 1323: {
1324: int error, i, timeout_hz = mstohz(timeout);
1325:
1326: if (timeout_hz == 0 ||
1327: (flags & (AT_WAIT | AT_POLL)) == AT_POLL)
1328: error = __wdcwait(chp, mask, bits, timeout);
1329: else {
1330: error = __wdcwait(chp, mask, bits, WDCDELAY_POLL);
1331: if (error != 0) {
1.147 bouyer 1332: if ((chp->ch_flags & WDCF_TH_RUN) ||
1333: (flags & AT_WAIT)) {
1.137 bouyer 1334: /*
1.147 bouyer 1335: * we're running in the channel thread
1336: * or some userland thread context
1.137 bouyer 1337: */
1338: for (i = 0; i < timeout_hz; i++) {
1339: if (__wdcwait(chp, mask, bits,
1340: WDCDELAY_POLL) == 0) {
1341: error = 0;
1342: break;
1343: }
1344: tsleep(&chp, PRIBIO, "atapoll", 1);
1345: }
1346: } else {
1347: /*
1348: * we're probably in interrupt context,
1349: * ask the thread to come back here
1350: */
1.147 bouyer 1351: #ifdef DIAGNOSTIC
1.148 bouyer 1352: if (chp->ch_queue->queue_freeze > 0)
1353: panic("wdcwait: queue_freeze");
1.147 bouyer 1354: #endif
1.148 bouyer 1355: chp->ch_queue->queue_freeze++;
1.170 thorpej 1356: wakeup(&chp->ch_thread);
1.137 bouyer 1357: return(WDCWAIT_THR);
1358: }
1359: }
1360: }
1.163 thorpej 1361: return (error);
1.2 bouyer 1362: }
1363:
1.137 bouyer 1364:
1.84 bouyer 1365: /*
1366: * Busy-wait for DMA to complete
1367: */
1368: int
1.168 thorpej 1369: wdc_dmawait(struct wdc_channel *chp, struct ata_xfer *xfer, int timeout)
1.84 bouyer 1370: {
1.169 thorpej 1371: struct wdc_softc *wdc = chp->ch_wdc;
1.84 bouyer 1372: int time;
1.169 thorpej 1373:
1.84 bouyer 1374: for (time = 0; time < timeout * 1000 / WDCDELAY; time++) {
1.169 thorpej 1375: wdc->dma_status =
1376: (*wdc->dma_finish)(wdc->dma_arg,
1.185 bouyer 1377: chp->ch_channel, xfer->c_drive, WDC_DMAEND_END);
1.169 thorpej 1378: if ((wdc->dma_status & WDC_DMAST_NOIRQ) == 0)
1.84 bouyer 1379: return 0;
1380: delay(WDCDELAY);
1381: }
1382: /* timeout, force a DMA halt */
1.169 thorpej 1383: wdc->dma_status = (*wdc->dma_finish)(wdc->dma_arg,
1.185 bouyer 1384: chp->ch_channel, xfer->c_drive, WDC_DMAEND_ABRT);
1.84 bouyer 1385: return 1;
1386: }
1387:
1.31 bouyer 1388: void
1.163 thorpej 1389: wdctimeout(void *arg)
1.2 bouyer 1390: {
1.168 thorpej 1391: struct wdc_channel *chp = (struct wdc_channel *)arg;
1.169 thorpej 1392: struct wdc_softc *wdc = chp->ch_wdc;
1.186 bouyer 1393: struct ata_xfer *xfer = chp->ch_queue->active_xfer;
1.31 bouyer 1394: int s;
1.2 bouyer 1395:
1.31 bouyer 1396: WDCDEBUG_PRINT(("wdctimeout\n"), DEBUG_FUNCS);
1397:
1398: s = splbio();
1399: if ((chp->ch_flags & WDCF_IRQ_WAIT) != 0) {
1400: __wdcerror(chp, "lost interrupt");
1.88 mrg 1401: printf("\ttype: %s tc_bcount: %d tc_skip: %d\n",
1402: (xfer->c_flags & C_ATAPI) ? "atapi" : "ata",
1403: xfer->c_bcount,
1404: xfer->c_skip);
1.84 bouyer 1405: if (chp->ch_flags & WDCF_DMA_WAIT) {
1.169 thorpej 1406: wdc->dma_status =
1407: (*wdc->dma_finish)(wdc->dma_arg,
1.185 bouyer 1408: chp->ch_channel, xfer->c_drive,
1409: WDC_DMAEND_ABRT);
1.84 bouyer 1410: chp->ch_flags &= ~WDCF_DMA_WAIT;
1411: }
1.31 bouyer 1412: /*
1.119 drochner 1413: * Call the interrupt routine. If we just missed an interrupt,
1.31 bouyer 1414: * it will do what's needed. Else, it will take the needed
1415: * action (reset the device).
1.70 bouyer 1416: * Before that we need to reinstall the timeout callback,
1417: * in case it will miss another irq while in this transfer
1418: * We arbitray chose it to be 1s
1.31 bouyer 1419: */
1.81 thorpej 1420: callout_reset(&chp->ch_callout, hz, wdctimeout, chp);
1.31 bouyer 1421: xfer->c_flags |= C_TIMEOU;
1422: chp->ch_flags &= ~WDCF_IRQ_WAIT;
1.66 bouyer 1423: xfer->c_intr(chp, xfer, 1);
1.31 bouyer 1424: } else
1425: __wdcerror(chp, "missing untimeout");
1426: splx(s);
1.2 bouyer 1427: }
1428:
1.31 bouyer 1429: /*
1.152 wiz 1430: * Probe drive's capabilities, for use by the controller later
1.31 bouyer 1431: * Assumes drvp points to an existing drive.
1432: * XXX this should be a controller-indep function
1433: */
1.2 bouyer 1434: void
1.163 thorpej 1435: wdc_probe_caps(struct ata_drive_datas *drvp)
1.2 bouyer 1436: {
1.31 bouyer 1437: struct ataparams params, params2;
1.168 thorpej 1438: struct wdc_channel *chp = drvp->chnl_softc;
1.169 thorpej 1439: struct wdc_softc *wdc = chp->ch_wdc;
1.31 bouyer 1440: struct device *drv_dev = drvp->drv_softc;
1441: int i, printed;
1442: char *sep = "";
1.48 bouyer 1443: int cf_flags;
1.31 bouyer 1444:
1.125 mycroft 1445: if (ata_get_params(drvp, AT_WAIT, ¶ms) != CMD_OK) {
1.31 bouyer 1446: /* IDENTIFY failed. Can't tell more about the device */
1.2 bouyer 1447: return;
1448: }
1.31 bouyer 1449: if ((wdc->cap & (WDC_CAPABILITY_DATA16 | WDC_CAPABILITY_DATA32)) ==
1450: (WDC_CAPABILITY_DATA16 | WDC_CAPABILITY_DATA32)) {
1.2 bouyer 1451: /*
1.39 bouyer 1452: * Controller claims 16 and 32 bit transfers.
1453: * Re-do an IDENTIFY with 32-bit transfers,
1.31 bouyer 1454: * and compare results.
1.2 bouyer 1455: */
1.31 bouyer 1456: drvp->drive_flags |= DRIVE_CAP32;
1.125 mycroft 1457: ata_get_params(drvp, AT_WAIT, ¶ms2);
1.31 bouyer 1458: if (memcmp(¶ms, ¶ms2, sizeof(struct ataparams)) != 0) {
1459: /* Not good. fall back to 16bits */
1460: drvp->drive_flags &= ~DRIVE_CAP32;
1461: } else {
1.125 mycroft 1462: aprint_normal("%s: 32-bit data port\n",
1.123 thorpej 1463: drv_dev->dv_xname);
1.2 bouyer 1464: }
1465: }
1.55 bouyer 1466: #if 0 /* Some ultra-DMA drives claims to only support ATA-3. sigh */
1467: if (params.atap_ata_major > 0x01 &&
1468: params.atap_ata_major != 0xffff) {
1469: for (i = 14; i > 0; i--) {
1470: if (params.atap_ata_major & (1 << i)) {
1.125 mycroft 1471: aprint_normal("%s: ATA version %d\n",
1472: drv_dev->dv_xname, i);
1.55 bouyer 1473: drvp->ata_vers = i;
1474: break;
1475: }
1476: }
1.125 mycroft 1477: }
1.55 bouyer 1478: #endif
1.2 bouyer 1479:
1.31 bouyer 1480: /* An ATAPI device is at last PIO mode 3 */
1481: if (drvp->drive_flags & DRIVE_ATAPI)
1482: drvp->PIO_mode = 3;
1.2 bouyer 1483:
1484: /*
1.31 bouyer 1485: * It's not in the specs, but it seems that some drive
1486: * returns 0xffff in atap_extensions when this field is invalid
1.2 bouyer 1487: */
1.31 bouyer 1488: if (params.atap_extensions != 0xffff &&
1489: (params.atap_extensions & WDC_EXT_MODES)) {
1490: printed = 0;
1491: /*
1492: * XXX some drives report something wrong here (they claim to
1493: * support PIO mode 8 !). As mode is coded on 3 bits in
1494: * SET FEATURE, limit it to 7 (so limit i to 4).
1.116 wiz 1495: * If higher mode than 7 is found, abort.
1.31 bouyer 1496: */
1.39 bouyer 1497: for (i = 7; i >= 0; i--) {
1.31 bouyer 1498: if ((params.atap_piomode_supp & (1 << i)) == 0)
1499: continue;
1.39 bouyer 1500: if (i > 4)
1501: return;
1.31 bouyer 1502: /*
1503: * See if mode is accepted.
1504: * If the controller can't set its PIO mode,
1505: * assume the defaults are good, so don't try
1506: * to set it
1507: */
1508: if ((wdc->cap & WDC_CAPABILITY_MODE) != 0)
1.137 bouyer 1509: /*
1510: * It's OK to pool here, it's fast enouth
1511: * to not bother waiting for interrupt
1512: */
1.31 bouyer 1513: if (ata_set_mode(drvp, 0x08 | (i + 3),
1.125 mycroft 1514: AT_WAIT) != CMD_OK)
1.2 bouyer 1515: continue;
1.31 bouyer 1516: if (!printed) {
1.123 thorpej 1517: aprint_normal("%s: drive supports PIO mode %d",
1.39 bouyer 1518: drv_dev->dv_xname, i + 3);
1.31 bouyer 1519: sep = ",";
1520: printed = 1;
1521: }
1522: /*
1523: * If controller's driver can't set its PIO mode,
1524: * get the highter one for the drive.
1525: */
1526: if ((wdc->cap & WDC_CAPABILITY_MODE) == 0 ||
1.52 bouyer 1527: wdc->PIO_cap >= i + 3) {
1.31 bouyer 1528: drvp->PIO_mode = i + 3;
1.48 bouyer 1529: drvp->PIO_cap = i + 3;
1.2 bouyer 1530: break;
1531: }
1532: }
1.31 bouyer 1533: if (!printed) {
1534: /*
1535: * We didn't find a valid PIO mode.
1536: * Assume the values returned for DMA are buggy too
1537: */
1538: return;
1.2 bouyer 1539: }
1.35 bouyer 1540: drvp->drive_flags |= DRIVE_MODE;
1.31 bouyer 1541: printed = 0;
1542: for (i = 7; i >= 0; i--) {
1543: if ((params.atap_dmamode_supp & (1 << i)) == 0)
1544: continue;
1545: if ((wdc->cap & WDC_CAPABILITY_DMA) &&
1546: (wdc->cap & WDC_CAPABILITY_MODE))
1.125 mycroft 1547: if (ata_set_mode(drvp, 0x20 | i, AT_WAIT)
1.31 bouyer 1548: != CMD_OK)
1549: continue;
1550: if (!printed) {
1.123 thorpej 1551: aprint_normal("%s DMA mode %d", sep, i);
1.31 bouyer 1552: sep = ",";
1553: printed = 1;
1554: }
1555: if (wdc->cap & WDC_CAPABILITY_DMA) {
1556: if ((wdc->cap & WDC_CAPABILITY_MODE) &&
1.52 bouyer 1557: wdc->DMA_cap < i)
1.31 bouyer 1558: continue;
1559: drvp->DMA_mode = i;
1.48 bouyer 1560: drvp->DMA_cap = i;
1.31 bouyer 1561: drvp->drive_flags |= DRIVE_DMA;
1562: }
1.2 bouyer 1563: break;
1564: }
1.31 bouyer 1565: if (params.atap_extensions & WDC_EXT_UDMA_MODES) {
1.71 bouyer 1566: printed = 0;
1.31 bouyer 1567: for (i = 7; i >= 0; i--) {
1568: if ((params.atap_udmamode_supp & (1 << i))
1569: == 0)
1570: continue;
1571: if ((wdc->cap & WDC_CAPABILITY_MODE) &&
1572: (wdc->cap & WDC_CAPABILITY_UDMA))
1573: if (ata_set_mode(drvp, 0x40 | i,
1.125 mycroft 1574: AT_WAIT) != CMD_OK)
1.31 bouyer 1575: continue;
1.71 bouyer 1576: if (!printed) {
1.123 thorpej 1577: aprint_normal("%s Ultra-DMA mode %d",
1578: sep, i);
1.93 wrstuden 1579: if (i == 2)
1.123 thorpej 1580: aprint_normal(" (Ultra/33)");
1.93 wrstuden 1581: else if (i == 4)
1.123 thorpej 1582: aprint_normal(" (Ultra/66)");
1.93 wrstuden 1583: else if (i == 5)
1.123 thorpej 1584: aprint_normal(" (Ultra/100)");
1.117 bouyer 1585: else if (i == 6)
1.123 thorpej 1586: aprint_normal(" (Ultra/133)");
1.71 bouyer 1587: sep = ",";
1588: printed = 1;
1589: }
1.31 bouyer 1590: if (wdc->cap & WDC_CAPABILITY_UDMA) {
1.50 bouyer 1591: if ((wdc->cap & WDC_CAPABILITY_MODE) &&
1.52 bouyer 1592: wdc->UDMA_cap < i)
1.50 bouyer 1593: continue;
1.31 bouyer 1594: drvp->UDMA_mode = i;
1.48 bouyer 1595: drvp->UDMA_cap = i;
1.31 bouyer 1596: drvp->drive_flags |= DRIVE_UDMA;
1597: }
1598: break;
1599: }
1600: }
1.123 thorpej 1601: aprint_normal("\n");
1.55 bouyer 1602: }
1603:
1.190 mycroft 1604: drvp->drive_flags &= ~DRIVE_NOSTREAM;
1605: if (drvp->drive_flags & DRIVE_ATAPI) {
1606: if (wdc->cap & WDC_CAPABILITY_ATAPI_NOSTREAM)
1607: drvp->drive_flags |= DRIVE_NOSTREAM;
1608: } else {
1609: if (wdc->cap & WDC_CAPABILITY_ATA_NOSTREAM)
1610: drvp->drive_flags |= DRIVE_NOSTREAM;
1611: }
1612:
1.55 bouyer 1613: /* Try to guess ATA version here, if it didn't get reported */
1614: if (drvp->ata_vers == 0) {
1615: if (drvp->drive_flags & DRIVE_UDMA)
1616: drvp->ata_vers = 4; /* should be at last ATA-4 */
1617: else if (drvp->PIO_cap > 2)
1618: drvp->ata_vers = 2; /* should be at last ATA-2 */
1.48 bouyer 1619: }
1620: cf_flags = drv_dev->dv_cfdata->cf_flags;
1621: if (cf_flags & ATA_CONFIG_PIO_SET) {
1622: drvp->PIO_mode =
1623: (cf_flags & ATA_CONFIG_PIO_MODES) >> ATA_CONFIG_PIO_OFF;
1624: drvp->drive_flags |= DRIVE_MODE;
1625: }
1626: if ((wdc->cap & WDC_CAPABILITY_DMA) == 0) {
1627: /* don't care about DMA modes */
1628: return;
1629: }
1630: if (cf_flags & ATA_CONFIG_DMA_SET) {
1631: if ((cf_flags & ATA_CONFIG_DMA_MODES) ==
1632: ATA_CONFIG_DMA_DISABLE) {
1633: drvp->drive_flags &= ~DRIVE_DMA;
1634: } else {
1635: drvp->DMA_mode = (cf_flags & ATA_CONFIG_DMA_MODES) >>
1636: ATA_CONFIG_DMA_OFF;
1637: drvp->drive_flags |= DRIVE_DMA | DRIVE_MODE;
1638: }
1.101 bouyer 1639: }
1640: if ((wdc->cap & WDC_CAPABILITY_UDMA) == 0) {
1641: /* don't care about UDMA modes */
1642: return;
1.48 bouyer 1643: }
1644: if (cf_flags & ATA_CONFIG_UDMA_SET) {
1645: if ((cf_flags & ATA_CONFIG_UDMA_MODES) ==
1646: ATA_CONFIG_UDMA_DISABLE) {
1647: drvp->drive_flags &= ~DRIVE_UDMA;
1648: } else {
1649: drvp->UDMA_mode = (cf_flags & ATA_CONFIG_UDMA_MODES) >>
1650: ATA_CONFIG_UDMA_OFF;
1651: drvp->drive_flags |= DRIVE_UDMA | DRIVE_MODE;
1652: }
1.2 bouyer 1653: }
1.54 bouyer 1654: }
1655:
1656: /*
1.56 bouyer 1657: * downgrade the transfer mode of a drive after an error. return 1 if
1.54 bouyer 1658: * downgrade was possible, 0 otherwise.
1659: */
1660: int
1.163 thorpej 1661: wdc_downgrade_mode(struct ata_drive_datas *drvp, int flags)
1.54 bouyer 1662: {
1.168 thorpej 1663: struct wdc_channel *chp = drvp->chnl_softc;
1.169 thorpej 1664: struct wdc_softc *wdc = chp->ch_wdc;
1.54 bouyer 1665: struct device *drv_dev = drvp->drv_softc;
1666: int cf_flags = drv_dev->dv_cfdata->cf_flags;
1667:
1668: /* if drive or controller don't know its mode, we can't do much */
1669: if ((drvp->drive_flags & DRIVE_MODE) == 0 ||
1670: (wdc->cap & WDC_CAPABILITY_MODE) == 0)
1671: return 0;
1672: /* current drive mode was set by a config flag, let it this way */
1673: if ((cf_flags & ATA_CONFIG_PIO_SET) ||
1674: (cf_flags & ATA_CONFIG_DMA_SET) ||
1675: (cf_flags & ATA_CONFIG_UDMA_SET))
1676: return 0;
1677:
1.61 bouyer 1678: /*
1.180 mycroft 1679: * If we were using Ultra-DMA mode, downgrade to the next lower mode.
1.73 bouyer 1680: */
1.78 bouyer 1681: if ((drvp->drive_flags & DRIVE_UDMA) && drvp->UDMA_mode >= 2) {
1.180 mycroft 1682: drvp->UDMA_mode--;
1.78 bouyer 1683: printf("%s: transfer error, downgrading to Ultra-DMA mode %d\n",
1.73 bouyer 1684: drv_dev->dv_xname, drvp->UDMA_mode);
1685: }
1686:
1687: /*
1.180 mycroft 1688: * If we were using ultra-DMA, don't downgrade to multiword DMA.
1.61 bouyer 1689: */
1.180 mycroft 1690: else if (drvp->drive_flags & (DRIVE_DMA | DRIVE_UDMA)) {
1.61 bouyer 1691: drvp->drive_flags &= ~(DRIVE_DMA | DRIVE_UDMA);
1.54 bouyer 1692: drvp->PIO_mode = drvp->PIO_cap;
1.56 bouyer 1693: printf("%s: transfer error, downgrading to PIO mode %d\n",
1.54 bouyer 1694: drv_dev->dv_xname, drvp->PIO_mode);
1695: } else /* already using PIO, can't downgrade */
1696: return 0;
1697:
1698: wdc->set_modes(chp);
1.137 bouyer 1699: wdc_print_modes(chp);
1700: /* reset the channel, which will shedule all drives for setup */
1.183 bouyer 1701: wdc_reset_channel(chp, flags | AT_RST_NOCMD);
1.54 bouyer 1702: return 1;
1.2 bouyer 1703: }
1704:
1705: int
1.192 thorpej 1706: wdc_exec_command(struct ata_drive_datas *drvp, struct ata_command *ata_c)
1.31 bouyer 1707: {
1.168 thorpej 1708: struct wdc_channel *chp = drvp->chnl_softc;
1.169 thorpej 1709: struct wdc_softc *wdc = chp->ch_wdc;
1.165 thorpej 1710: struct ata_xfer *xfer;
1.31 bouyer 1711: int s, ret;
1.2 bouyer 1712:
1.34 bouyer 1713: WDCDEBUG_PRINT(("wdc_exec_command %s:%d:%d\n",
1.169 thorpej 1714: wdc->sc_dev.dv_xname, chp->ch_channel, drvp->drive),
1.34 bouyer 1715: DEBUG_FUNCS);
1.2 bouyer 1716:
1.31 bouyer 1717: /* set up an xfer and queue. Wait for completion */
1.192 thorpej 1718: xfer = wdc_get_xfer(ata_c->flags & AT_WAIT ? WDC_CANSLEEP :
1.31 bouyer 1719: WDC_NOSLEEP);
1720: if (xfer == NULL) {
1.193 ! thorpej 1721: return ATACMD_TRY_AGAIN;
1.31 bouyer 1722: }
1.2 bouyer 1723:
1.169 thorpej 1724: if (wdc->cap & WDC_CAPABILITY_NOIRQ)
1.192 thorpej 1725: ata_c->flags |= AT_POLL;
1726: if (ata_c->flags & AT_POLL)
1.31 bouyer 1727: xfer->c_flags |= C_POLL;
1.165 thorpej 1728: xfer->c_drive = drvp->drive;
1.192 thorpej 1729: xfer->c_databuf = ata_c->data;
1730: xfer->c_bcount = ata_c->bcount;
1731: xfer->c_cmd = ata_c;
1.31 bouyer 1732: xfer->c_start = __wdccommand_start;
1733: xfer->c_intr = __wdccommand_intr;
1.182 bouyer 1734: xfer->c_kill_xfer = __wdccommand_kill_xfer;
1.2 bouyer 1735:
1.31 bouyer 1736: s = splbio();
1737: wdc_exec_xfer(chp, xfer);
1738: #ifdef DIAGNOSTIC
1.192 thorpej 1739: if ((ata_c->flags & AT_POLL) != 0 &&
1740: (ata_c->flags & AT_DONE) == 0)
1.118 provos 1741: panic("wdc_exec_command: polled command not done");
1.2 bouyer 1742: #endif
1.192 thorpej 1743: if (ata_c->flags & AT_DONE) {
1.193 ! thorpej 1744: ret = ATACMD_COMPLETE;
1.31 bouyer 1745: } else {
1.192 thorpej 1746: if (ata_c->flags & AT_WAIT) {
1747: while ((ata_c->flags & AT_DONE) == 0) {
1748: tsleep(ata_c, PRIBIO, "wdccmd", 0);
1.69 bouyer 1749: }
1.193 ! thorpej 1750: ret = ATACMD_COMPLETE;
1.31 bouyer 1751: } else {
1.193 ! thorpej 1752: ret = ATACMD_QUEUED;
1.2 bouyer 1753: }
1754: }
1.31 bouyer 1755: splx(s);
1756: return ret;
1.2 bouyer 1757: }
1758:
1.167 thorpej 1759: static void
1.168 thorpej 1760: __wdccommand_start(struct wdc_channel *chp, struct ata_xfer *xfer)
1.31 bouyer 1761: {
1.169 thorpej 1762: struct wdc_softc *wdc = chp->ch_wdc;
1.165 thorpej 1763: int drive = xfer->c_drive;
1.192 thorpej 1764: struct ata_command *ata_c = xfer->c_cmd;
1.31 bouyer 1765:
1.34 bouyer 1766: WDCDEBUG_PRINT(("__wdccommand_start %s:%d:%d\n",
1.169 thorpej 1767: wdc->sc_dev.dv_xname, chp->ch_channel, xfer->c_drive),
1.34 bouyer 1768: DEBUG_FUNCS);
1.31 bouyer 1769:
1.169 thorpej 1770: if (wdc->cap & WDC_CAPABILITY_SELECT)
1771: wdc->select(chp,drive);
1.157 fvdl 1772: bus_space_write_1(chp->cmd_iot, chp->cmd_iohs[wd_sdh], 0,
1.31 bouyer 1773: WDSD_IBM | (drive << 4));
1.192 thorpej 1774: switch(wdcwait(chp, ata_c->r_st_bmask | WDCS_DRQ,
1775: ata_c->r_st_bmask, ata_c->timeout, ata_c->flags)) {
1.137 bouyer 1776: case WDCWAIT_OK:
1777: break;
1778: case WDCWAIT_TOUT:
1.192 thorpej 1779: ata_c->flags |= AT_TIMEOU;
1.31 bouyer 1780: __wdccommand_done(chp, xfer);
1.53 bouyer 1781: return;
1.137 bouyer 1782: case WDCWAIT_THR:
1783: return;
1.31 bouyer 1784: }
1.192 thorpej 1785: if (ata_c->flags & AT_POLL) {
1.135 bouyer 1786: /* polled command, disable interrupts */
1787: bus_space_write_1(chp->ctl_iot, chp->ctl_ioh, wd_aux_ctlr,
1788: WDCTL_4BIT | WDCTL_IDS);
1789: }
1.192 thorpej 1790: wdccommand(chp, drive, ata_c->r_command, ata_c->r_cyl, ata_c->r_head,
1791: ata_c->r_sector, ata_c->r_count, ata_c->r_features);
1.139 bouyer 1792:
1.192 thorpej 1793: if ((ata_c->flags & AT_POLL) == 0) {
1.31 bouyer 1794: chp->ch_flags |= WDCF_IRQ_WAIT; /* wait for interrupt */
1.192 thorpej 1795: callout_reset(&chp->ch_callout, ata_c->timeout / 1000 * hz,
1.81 thorpej 1796: wdctimeout, chp);
1.31 bouyer 1797: return;
1.2 bouyer 1798: }
1799: /*
1.31 bouyer 1800: * Polled command. Wait for drive ready or drq. Done in intr().
1801: * Wait for at last 400ns for status bit to be valid.
1.2 bouyer 1802: */
1.134 mycroft 1803: delay(10); /* 400ns delay */
1.66 bouyer 1804: __wdccommand_intr(chp, xfer, 0);
1.2 bouyer 1805: }
1806:
1.167 thorpej 1807: static int
1.168 thorpej 1808: __wdccommand_intr(struct wdc_channel *chp, struct ata_xfer *xfer, int irq)
1.2 bouyer 1809: {
1.169 thorpej 1810: struct wdc_softc *wdc = chp->ch_wdc;
1.192 thorpej 1811: struct ata_command *ata_c = xfer->c_cmd;
1812: int bcount = ata_c->bcount;
1813: char *data = ata_c->data;
1.137 bouyer 1814: int wflags;
1815:
1.192 thorpej 1816: if ((ata_c->flags & (AT_WAIT | AT_POLL)) == (AT_WAIT | AT_POLL)) {
1.137 bouyer 1817: /* both wait and poll, we can tsleep here */
1.147 bouyer 1818: wflags = AT_WAIT | AT_POLL;
1.137 bouyer 1819: } else {
1820: wflags = AT_POLL;
1821: }
1.31 bouyer 1822:
1.163 thorpej 1823: again:
1.34 bouyer 1824: WDCDEBUG_PRINT(("__wdccommand_intr %s:%d:%d\n",
1.169 thorpej 1825: wdc->sc_dev.dv_xname, chp->ch_channel, xfer->c_drive),
1.165 thorpej 1826: DEBUG_INTR);
1.137 bouyer 1827: /*
1828: * after a ATAPI_SOFT_RESET, the device will have released the bus.
1829: * Reselect again, it doesn't hurt for others commands, and the time
1830: * penalty for the extra regiter write is acceptable,
1831: * wdc_exec_command() isn't called often (mosly for autoconfig)
1832: */
1.157 fvdl 1833: bus_space_write_1(chp->cmd_iot, chp->cmd_iohs[wd_sdh], 0,
1.165 thorpej 1834: WDSD_IBM | (xfer->c_drive << 4));
1.192 thorpej 1835: if ((ata_c->flags & AT_XFDONE) != 0) {
1.114 bouyer 1836: /*
1837: * We have completed a data xfer. The drive should now be
1838: * in its initial state
1839: */
1.192 thorpej 1840: if (wdcwait(chp, ata_c->r_st_bmask | WDCS_DRQ,
1841: ata_c->r_st_bmask, (irq == 0) ? ata_c->timeout : 0,
1.137 bouyer 1842: wflags) == WDCWAIT_TOUT) {
1.114 bouyer 1843: if (irq && (xfer->c_flags & C_TIMEOU) == 0)
1844: return 0; /* IRQ was not for us */
1.192 thorpej 1845: ata_c->flags |= AT_TIMEOU;
1.114 bouyer 1846: }
1.131 mycroft 1847: goto out;
1.114 bouyer 1848: }
1.192 thorpej 1849: if (wdcwait(chp, ata_c->r_st_pmask, ata_c->r_st_pmask,
1850: (irq == 0) ? ata_c->timeout : 0, wflags) == WDCWAIT_TOUT) {
1.66 bouyer 1851: if (irq && (xfer->c_flags & C_TIMEOU) == 0)
1.63 bouyer 1852: return 0; /* IRQ was not for us */
1.192 thorpej 1853: ata_c->flags |= AT_TIMEOU;
1.131 mycroft 1854: goto out;
1.2 bouyer 1855: }
1.169 thorpej 1856: if (wdc->cap & WDC_CAPABILITY_IRQACK)
1857: wdc->irqack(chp);
1.192 thorpej 1858: if (ata_c->flags & AT_READ) {
1.131 mycroft 1859: if ((chp->ch_status & WDCS_DRQ) == 0) {
1.192 thorpej 1860: ata_c->flags |= AT_TIMEOU;
1.131 mycroft 1861: goto out;
1862: }
1.165 thorpej 1863: if (chp->ch_drive[xfer->c_drive].drive_flags & DRIVE_CAP32) {
1.31 bouyer 1864: bus_space_read_multi_4(chp->data32iot, chp->data32ioh,
1865: 0, (u_int32_t*)data, bcount >> 2);
1866: data += bcount & 0xfffffffc;
1867: bcount = bcount & 0x03;
1868: }
1869: if (bcount > 0)
1.191 mycroft 1870: wdc->datain_pio(chp, DRIVE_NOSTREAM, data, bcount);
1.114 bouyer 1871: /* at this point the drive should be in its initial state */
1.192 thorpej 1872: ata_c->flags |= AT_XFDONE;
1.137 bouyer 1873: /* XXX should read status register here ? */
1.192 thorpej 1874: } else if (ata_c->flags & AT_WRITE) {
1.131 mycroft 1875: if ((chp->ch_status & WDCS_DRQ) == 0) {
1.192 thorpej 1876: ata_c->flags |= AT_TIMEOU;
1.131 mycroft 1877: goto out;
1878: }
1.165 thorpej 1879: if (chp->ch_drive[xfer->c_drive].drive_flags & DRIVE_CAP32) {
1.31 bouyer 1880: bus_space_write_multi_4(chp->data32iot, chp->data32ioh,
1881: 0, (u_int32_t*)data, bcount >> 2);
1882: data += bcount & 0xfffffffc;
1883: bcount = bcount & 0x03;
1884: }
1885: if (bcount > 0)
1.191 mycroft 1886: wdc->dataout_pio(chp, DRIVE_NOSTREAM, data, bcount);
1.192 thorpej 1887: ata_c->flags |= AT_XFDONE;
1888: if ((ata_c->flags & AT_POLL) == 0) {
1.114 bouyer 1889: chp->ch_flags |= WDCF_IRQ_WAIT; /* wait for interrupt */
1890: callout_reset(&chp->ch_callout,
1.192 thorpej 1891: ata_c->timeout / 1000 * hz, wdctimeout, chp);
1.114 bouyer 1892: return 1;
1893: } else {
1894: goto again;
1895: }
1.2 bouyer 1896: }
1.163 thorpej 1897: out:
1.31 bouyer 1898: __wdccommand_done(chp, xfer);
1899: return 1;
1.2 bouyer 1900: }
1901:
1.167 thorpej 1902: static void
1.168 thorpej 1903: __wdccommand_done(struct wdc_channel *chp, struct ata_xfer *xfer)
1.2 bouyer 1904: {
1.169 thorpej 1905: struct wdc_softc *wdc = chp->ch_wdc;
1.192 thorpej 1906: struct ata_command *ata_c = xfer->c_cmd;
1.2 bouyer 1907:
1.34 bouyer 1908: WDCDEBUG_PRINT(("__wdccommand_done %s:%d:%d\n",
1.169 thorpej 1909: wdc->sc_dev.dv_xname, chp->ch_channel, xfer->c_drive),
1.165 thorpej 1910: DEBUG_FUNCS);
1.70 bouyer 1911:
1912:
1.31 bouyer 1913: if (chp->ch_status & WDCS_DWF)
1.192 thorpej 1914: ata_c->flags |= AT_DF;
1.31 bouyer 1915: if (chp->ch_status & WDCS_ERR) {
1.192 thorpej 1916: ata_c->flags |= AT_ERROR;
1917: ata_c->r_error = chp->ch_error;
1.31 bouyer 1918: }
1.192 thorpej 1919: if ((ata_c->flags & AT_READREG) != 0 &&
1.169 thorpej 1920: (wdc->sc_dev.dv_flags & DVF_ACTIVE) != 0 &&
1.192 thorpej 1921: (ata_c->flags & (AT_ERROR | AT_DF)) == 0) {
1922: ata_c->r_head = bus_space_read_1(chp->cmd_iot,
1.157 fvdl 1923: chp->cmd_iohs[wd_sdh], 0);
1.192 thorpej 1924: ata_c->r_count = bus_space_read_1(chp->cmd_iot,
1.179 mycroft 1925: chp->cmd_iohs[wd_seccnt], 0);
1.192 thorpej 1926: ata_c->r_sector = bus_space_read_1(chp->cmd_iot,
1.179 mycroft 1927: chp->cmd_iohs[wd_sector], 0);
1.192 thorpej 1928: ata_c->r_cyl |= bus_space_read_1(chp->cmd_iot,
1.179 mycroft 1929: chp->cmd_iohs[wd_cyl_lo], 0);
1.192 thorpej 1930: ata_c->r_cyl = bus_space_read_1(chp->cmd_iot,
1.157 fvdl 1931: chp->cmd_iohs[wd_cyl_hi], 0) << 8;
1.192 thorpej 1932: ata_c->r_error = bus_space_read_1(chp->cmd_iot,
1.157 fvdl 1933: chp->cmd_iohs[wd_error], 0);
1.192 thorpej 1934: ata_c->r_features = bus_space_read_1(chp->cmd_iot,
1.178 thorpej 1935: chp->cmd_iohs[wd_features], 0);
1.135 bouyer 1936: }
1.186 bouyer 1937: callout_stop(&chp->ch_callout);
1.187 bouyer 1938: chp->ch_queue->active_xfer = NULL;
1.192 thorpej 1939: if (ata_c->flags & AT_POLL) {
1.187 bouyer 1940: /* enable interrupts */
1941: bus_space_write_1(chp->ctl_iot, chp->ctl_ioh, wd_aux_ctlr,
1942: WDCTL_4BIT);
1943: delay(10); /* some drives need a little delay here */
1944: }
1945: if (chp->ch_drive[xfer->c_drive].drive_flags & DRIVE_WAITDRAIN) {
1946: __wdccommand_kill_xfer(chp, xfer, KILL_GONE);
1947: chp->ch_drive[xfer->c_drive].drive_flags &= ~DRIVE_WAITDRAIN;
1948: wakeup(&chp->ch_queue->active_xfer);
1949: } else
1950: __wdccommand_done_end(chp, xfer);
1.182 bouyer 1951: }
1.137 bouyer 1952:
1.182 bouyer 1953: static void
1954: __wdccommand_done_end(struct wdc_channel *chp, struct ata_xfer *xfer)
1955: {
1.192 thorpej 1956: struct ata_command *ata_c = xfer->c_cmd;
1.182 bouyer 1957:
1.192 thorpej 1958: ata_c->flags |= AT_DONE;
1.31 bouyer 1959: wdc_free_xfer(chp, xfer);
1.192 thorpej 1960: if (ata_c->flags & AT_WAIT)
1961: wakeup(ata_c);
1962: else if (ata_c->callback)
1963: ata_c->callback(ata_c->callback_arg);
1.45 drochner 1964: wdcstart(chp);
1.31 bouyer 1965: return;
1.2 bouyer 1966: }
1967:
1.182 bouyer 1968: static void
1969: __wdccommand_kill_xfer(struct wdc_channel *chp, struct ata_xfer *xfer,
1970: int reason)
1971: {
1.192 thorpej 1972: struct ata_command *ata_c = xfer->c_cmd;
1.182 bouyer 1973:
1974: switch (reason) {
1975: case KILL_GONE:
1.192 thorpej 1976: ata_c->flags |= AT_GONE;
1.182 bouyer 1977: break;
1978: case KILL_RESET:
1.192 thorpej 1979: ata_c->flags |= AT_RESET;
1.182 bouyer 1980: break;
1981: default:
1982: printf("__wdccommand_kill_xfer: unknown reason %d\n",
1983: reason);
1984: panic("__wdccommand_kill_xfer");
1985: }
1986: __wdccommand_done_end(chp, xfer);
1987: }
1988:
1.2 bouyer 1989: /*
1.31 bouyer 1990: * Send a command. The drive should be ready.
1.2 bouyer 1991: * Assumes interrupts are blocked.
1992: */
1.31 bouyer 1993: void
1.168 thorpej 1994: wdccommand(struct wdc_channel *chp, u_int8_t drive, u_int8_t command,
1.163 thorpej 1995: u_int16_t cylin, u_int8_t head, u_int8_t sector, u_int8_t count,
1.178 thorpej 1996: u_int8_t features)
1.31 bouyer 1997: {
1.169 thorpej 1998: struct wdc_softc *wdc = chp->ch_wdc;
1.163 thorpej 1999:
1.31 bouyer 2000: WDCDEBUG_PRINT(("wdccommand %s:%d:%d: command=0x%x cylin=%d head=%d "
1.178 thorpej 2001: "sector=%d count=%d features=%d\n", wdc->sc_dev.dv_xname,
1.169 thorpej 2002: chp->ch_channel, drive, command, cylin, head, sector, count,
1.178 thorpej 2003: features), DEBUG_FUNCS);
1.31 bouyer 2004:
1.169 thorpej 2005: if (wdc->cap & WDC_CAPABILITY_SELECT)
2006: wdc->select(chp,drive);
1.107 dbj 2007:
1.31 bouyer 2008: /* Select drive, head, and addressing mode. */
1.157 fvdl 2009: bus_space_write_1(chp->cmd_iot, chp->cmd_iohs[wd_sdh], 0,
1.31 bouyer 2010: WDSD_IBM | (drive << 4) | head);
1.177 thorpej 2011: /* Load parameters into the wd_features register. */
2012: bus_space_write_1(chp->cmd_iot, chp->cmd_iohs[wd_features], 0,
1.178 thorpej 2013: features);
1.179 mycroft 2014: bus_space_write_1(chp->cmd_iot, chp->cmd_iohs[wd_seccnt], 0, count);
2015: bus_space_write_1(chp->cmd_iot, chp->cmd_iohs[wd_sector], 0, sector);
1.157 fvdl 2016: bus_space_write_1(chp->cmd_iot, chp->cmd_iohs[wd_cyl_lo], 0, cylin);
2017: bus_space_write_1(chp->cmd_iot, chp->cmd_iohs[wd_cyl_hi],
2018: 0, cylin >> 8);
1.108 christos 2019:
2020: /* Send command. */
1.157 fvdl 2021: bus_space_write_1(chp->cmd_iot, chp->cmd_iohs[wd_command], 0, command);
1.108 christos 2022: return;
2023: }
2024:
2025: /*
2026: * Send a 48-bit addressing command. The drive should be ready.
2027: * Assumes interrupts are blocked.
2028: */
2029: void
1.168 thorpej 2030: wdccommandext(struct wdc_channel *chp, u_int8_t drive, u_int8_t command,
1.163 thorpej 2031: u_int64_t blkno, u_int16_t count)
1.108 christos 2032: {
1.169 thorpej 2033: struct wdc_softc *wdc = chp->ch_wdc;
1.163 thorpej 2034:
1.108 christos 2035: WDCDEBUG_PRINT(("wdccommandext %s:%d:%d: command=0x%x blkno=%d "
1.169 thorpej 2036: "count=%d\n", wdc->sc_dev.dv_xname,
2037: chp->ch_channel, drive, command, (u_int32_t) blkno, count),
1.108 christos 2038: DEBUG_FUNCS);
2039:
1.169 thorpej 2040: if (wdc->cap & WDC_CAPABILITY_SELECT)
2041: wdc->select(chp,drive);
1.108 christos 2042:
2043: /* Select drive, head, and addressing mode. */
1.157 fvdl 2044: bus_space_write_1(chp->cmd_iot, chp->cmd_iohs[wd_sdh], 0,
1.108 christos 2045: (drive << 4) | WDSD_LBA);
2046:
2047: /* previous */
1.157 fvdl 2048: bus_space_write_1(chp->cmd_iot, chp->cmd_iohs[wd_features], 0, 0);
2049: bus_space_write_1(chp->cmd_iot, chp->cmd_iohs[wd_seccnt],
2050: 0, count >> 8);
1.179 mycroft 2051: bus_space_write_1(chp->cmd_iot, chp->cmd_iohs[wd_lba_lo],
2052: 0, blkno >> 24);
2053: bus_space_write_1(chp->cmd_iot, chp->cmd_iohs[wd_lba_mi],
2054: 0, blkno >> 32);
1.157 fvdl 2055: bus_space_write_1(chp->cmd_iot, chp->cmd_iohs[wd_lba_hi],
2056: 0, blkno >> 40);
1.108 christos 2057:
2058: /* current */
1.157 fvdl 2059: bus_space_write_1(chp->cmd_iot, chp->cmd_iohs[wd_features], 0, 0);
2060: bus_space_write_1(chp->cmd_iot, chp->cmd_iohs[wd_seccnt], 0, count);
1.179 mycroft 2061: bus_space_write_1(chp->cmd_iot, chp->cmd_iohs[wd_lba_lo], 0, blkno);
2062: bus_space_write_1(chp->cmd_iot, chp->cmd_iohs[wd_lba_mi],
2063: 0, blkno >> 8);
1.157 fvdl 2064: bus_space_write_1(chp->cmd_iot, chp->cmd_iohs[wd_lba_hi],
2065: 0, blkno >> 16);
1.2 bouyer 2066:
1.31 bouyer 2067: /* Send command. */
1.157 fvdl 2068: bus_space_write_1(chp->cmd_iot, chp->cmd_iohs[wd_command], 0, command);
1.31 bouyer 2069: return;
1.2 bouyer 2070: }
2071:
2072: /*
1.31 bouyer 2073: * Simplified version of wdccommand(). Unbusy/ready/drq must be
2074: * tested by the caller.
1.2 bouyer 2075: */
1.31 bouyer 2076: void
1.168 thorpej 2077: wdccommandshort(struct wdc_channel *chp, int drive, int command)
1.2 bouyer 2078: {
1.169 thorpej 2079: struct wdc_softc *wdc = chp->ch_wdc;
1.2 bouyer 2080:
1.31 bouyer 2081: WDCDEBUG_PRINT(("wdccommandshort %s:%d:%d command 0x%x\n",
1.169 thorpej 2082: wdc->sc_dev.dv_xname, chp->ch_channel, drive, command),
1.31 bouyer 2083: DEBUG_FUNCS);
1.107 dbj 2084:
1.169 thorpej 2085: if (wdc->cap & WDC_CAPABILITY_SELECT)
2086: wdc->select(chp,drive);
1.2 bouyer 2087:
1.31 bouyer 2088: /* Select drive. */
1.157 fvdl 2089: bus_space_write_1(chp->cmd_iot, chp->cmd_iohs[wd_sdh], 0,
1.31 bouyer 2090: WDSD_IBM | (drive << 4));
1.2 bouyer 2091:
1.157 fvdl 2092: bus_space_write_1(chp->cmd_iot, chp->cmd_iohs[wd_command], 0, command);
1.31 bouyer 2093: }
1.2 bouyer 2094:
1.31 bouyer 2095: /* Add a command to the queue and start controller. Must be called at splbio */
1.2 bouyer 2096: void
1.168 thorpej 2097: wdc_exec_xfer(struct wdc_channel *chp, struct ata_xfer *xfer)
1.2 bouyer 2098: {
1.163 thorpej 2099:
1.33 bouyer 2100: WDCDEBUG_PRINT(("wdc_exec_xfer %p channel %d drive %d\n", xfer,
1.169 thorpej 2101: chp->ch_channel, xfer->c_drive), DEBUG_XFERS);
1.2 bouyer 2102:
1.31 bouyer 2103: /* complete xfer setup */
1.165 thorpej 2104: xfer->c_chp = chp;
1.2 bouyer 2105:
2106: /* insert at the end of command list */
1.165 thorpej 2107: TAILQ_INSERT_TAIL(&chp->ch_queue->queue_xfer, xfer, c_xferchain);
1.31 bouyer 2108: WDCDEBUG_PRINT(("wdcstart from wdc_exec_xfer, flags 0x%x\n",
1.33 bouyer 2109: chp->ch_flags), DEBUG_XFERS);
1.45 drochner 2110: wdcstart(chp);
1.31 bouyer 2111: }
1.2 bouyer 2112:
1.165 thorpej 2113: struct ata_xfer *
1.163 thorpej 2114: wdc_get_xfer(int flags)
1.2 bouyer 2115: {
1.165 thorpej 2116: struct ata_xfer *xfer;
1.72 bouyer 2117: int s;
1.2 bouyer 2118:
1.72 bouyer 2119: s = splbio();
1.71 bouyer 2120: xfer = pool_get(&wdc_xfer_pool,
2121: ((flags & WDC_NOSLEEP) != 0 ? PR_NOWAIT : PR_WAITOK));
1.72 bouyer 2122: splx(s);
1.99 chs 2123: if (xfer != NULL) {
1.165 thorpej 2124: memset(xfer, 0, sizeof(struct ata_xfer));
1.99 chs 2125: }
1.2 bouyer 2126: return xfer;
2127: }
2128:
2129: void
1.168 thorpej 2130: wdc_free_xfer(struct wdc_channel *chp, struct ata_xfer *xfer)
1.2 bouyer 2131: {
1.169 thorpej 2132: struct wdc_softc *wdc = chp->ch_wdc;
1.2 bouyer 2133: int s;
2134:
1.31 bouyer 2135: if (wdc->cap & WDC_CAPABILITY_HWLOCK)
2136: (*wdc->free_hw)(chp);
1.2 bouyer 2137: s = splbio();
1.72 bouyer 2138: pool_put(&wdc_xfer_pool, xfer);
1.2 bouyer 2139: splx(s);
1.75 enami 2140: }
2141:
2142: /*
1.168 thorpej 2143: * Kill off all pending xfers for a wdc_channel.
1.75 enami 2144: *
2145: * Must be called at splbio().
2146: */
2147: void
1.187 bouyer 2148: wdc_kill_pending(struct ata_drive_datas *drvp)
1.75 enami 2149: {
1.187 bouyer 2150: struct wdc_channel *chp = drvp->chnl_softc;
1.186 bouyer 2151: struct ata_xfer *xfer, *next_xfer;
1.187 bouyer 2152: int s = splbio();
1.75 enami 2153:
1.186 bouyer 2154: for (xfer = TAILQ_FIRST(&chp->ch_queue->queue_xfer);
2155: xfer != NULL; xfer = next_xfer) {
2156: next_xfer = TAILQ_NEXT(xfer, c_xferchain);
1.187 bouyer 2157: if (xfer->c_chp != chp || xfer->c_drive != drvp->drive)
1.186 bouyer 2158: continue;
2159: TAILQ_REMOVE(&chp->ch_queue->queue_xfer, xfer, c_xferchain);
1.182 bouyer 2160: (*xfer->c_kill_xfer)(chp, xfer, KILL_GONE);
1.75 enami 2161: }
1.187 bouyer 2162:
2163: while ((xfer = chp->ch_queue->active_xfer) != NULL) {
2164: if (xfer->c_chp == chp && xfer->c_drive == drvp->drive) {
2165: drvp->drive_flags |= DRIVE_WAITDRAIN;
2166: (void) tsleep(&chp->ch_queue->active_xfer,
2167: PRIBIO, "atdrn", 0);
2168: } else {
2169: /* no more xfer for us */
2170: break;
2171: }
2172: }
2173: splx(s);
1.2 bouyer 2174: }
2175:
1.31 bouyer 2176: static void
1.168 thorpej 2177: __wdcerror(struct wdc_channel *chp, char *msg)
1.2 bouyer 2178: {
1.169 thorpej 2179: struct wdc_softc *wdc = chp->ch_wdc;
1.165 thorpej 2180: struct ata_xfer *xfer = TAILQ_FIRST(&chp->ch_queue->queue_xfer);
1.88 mrg 2181:
1.2 bouyer 2182: if (xfer == NULL)
1.169 thorpej 2183: printf("%s:%d: %s\n", wdc->sc_dev.dv_xname, chp->ch_channel,
1.31 bouyer 2184: msg);
1.2 bouyer 2185: else
1.169 thorpej 2186: printf("%s:%d:%d: %s\n", wdc->sc_dev.dv_xname,
2187: chp->ch_channel, xfer->c_drive, msg);
1.2 bouyer 2188: }
2189:
2190: /*
2191: * the bit bucket
2192: */
2193: void
1.168 thorpej 2194: wdcbit_bucket(struct wdc_channel *chp, int size)
1.2 bouyer 2195: {
2196:
1.12 cgd 2197: for (; size >= 2; size -= 2)
1.157 fvdl 2198: (void)bus_space_read_2(chp->cmd_iot, chp->cmd_iohs[wd_data], 0);
1.12 cgd 2199: if (size)
1.157 fvdl 2200: (void)bus_space_read_1(chp->cmd_iot, chp->cmd_iohs[wd_data], 0);
1.44 thorpej 2201: }
2202:
2203: int
1.168 thorpej 2204: wdc_addref(struct wdc_channel *chp)
1.44 thorpej 2205: {
1.169 thorpej 2206: struct wdc_softc *wdc = chp->ch_wdc;
1.96 bouyer 2207: struct scsipi_adapter *adapt = &wdc->sc_atapi_adapter._generic;
1.44 thorpej 2208: int s, error = 0;
2209:
2210: s = splbio();
1.96 bouyer 2211: if (adapt->adapt_refcnt++ == 0 &&
2212: adapt->adapt_enable != NULL) {
2213: error = (*adapt->adapt_enable)(&wdc->sc_dev, 1);
1.44 thorpej 2214: if (error)
1.96 bouyer 2215: adapt->adapt_refcnt--;
1.44 thorpej 2216: }
2217: splx(s);
2218: return (error);
2219: }
2220:
2221: void
1.168 thorpej 2222: wdc_delref(struct wdc_channel *chp)
1.44 thorpej 2223: {
1.169 thorpej 2224: struct wdc_softc *wdc = chp->ch_wdc;
1.96 bouyer 2225: struct scsipi_adapter *adapt = &wdc->sc_atapi_adapter._generic;
1.44 thorpej 2226: int s;
2227:
2228: s = splbio();
1.96 bouyer 2229: if (adapt->adapt_refcnt-- == 1 &&
2230: adapt->adapt_enable != NULL)
2231: (void) (*adapt->adapt_enable)(&wdc->sc_dev, 0);
1.44 thorpej 2232: splx(s);
1.93 wrstuden 2233: }
2234:
2235: void
1.168 thorpej 2236: wdc_print_modes(struct wdc_channel *chp)
1.93 wrstuden 2237: {
1.169 thorpej 2238: struct wdc_softc *wdc = chp->ch_wdc;
1.93 wrstuden 2239: int drive;
2240: struct ata_drive_datas *drvp;
2241:
2242: for (drive = 0; drive < 2; drive++) {
2243: drvp = &chp->ch_drive[drive];
2244: if ((drvp->drive_flags & DRIVE) == 0)
2245: continue;
1.123 thorpej 2246: aprint_normal("%s(%s:%d:%d): using PIO mode %d",
1.93 wrstuden 2247: drvp->drv_softc->dv_xname,
1.169 thorpej 2248: wdc->sc_dev.dv_xname,
2249: chp->ch_channel, drive, drvp->PIO_mode);
1.93 wrstuden 2250: if (drvp->drive_flags & DRIVE_DMA)
1.123 thorpej 2251: aprint_normal(", DMA mode %d", drvp->DMA_mode);
1.93 wrstuden 2252: if (drvp->drive_flags & DRIVE_UDMA) {
1.123 thorpej 2253: aprint_normal(", Ultra-DMA mode %d", drvp->UDMA_mode);
1.93 wrstuden 2254: if (drvp->UDMA_mode == 2)
1.123 thorpej 2255: aprint_normal(" (Ultra/33)");
1.93 wrstuden 2256: else if (drvp->UDMA_mode == 4)
1.123 thorpej 2257: aprint_normal(" (Ultra/66)");
1.93 wrstuden 2258: else if (drvp->UDMA_mode == 5)
1.123 thorpej 2259: aprint_normal(" (Ultra/100)");
2260: else if (drvp->UDMA_mode == 6)
2261: aprint_normal(" (Ultra/133)");
1.93 wrstuden 2262: }
2263: if (drvp->drive_flags & (DRIVE_DMA | DRIVE_UDMA))
1.123 thorpej 2264: aprint_normal(" (using DMA data transfers)");
2265: aprint_normal("\n");
1.93 wrstuden 2266: }
1.2 bouyer 2267: }
1.190 mycroft 2268:
2269: void
2270: wdc_datain_pio(chp, flags, buf, len)
2271: struct wdc_channel *chp;
2272: int flags;
2273: void *buf;
2274: size_t len;
2275: {
2276:
2277: if (flags & DRIVE_NOSTREAM) {
2278: if (flags & DRIVE_CAP32) {
2279: bus_space_read_multi_4(chp->data32iot,
2280: chp->data32ioh, 0, buf, len >> 2);
2281: buf = (char *)buf + (len & ~3);
2282: len &= 3;
2283: }
2284: if (len) {
2285: bus_space_read_multi_2(chp->cmd_iot,
2286: chp->cmd_iohs[wd_data], 0, buf, len >> 1);
2287: }
2288: } else {
2289: if (flags & DRIVE_CAP32) {
2290: bus_space_read_multi_stream_4(chp->data32iot,
2291: chp->data32ioh, 0, buf, len >> 2);
2292: buf = (char *)buf + (len & ~3);
2293: len &= 3;
2294: }
2295: if (len) {
2296: bus_space_read_multi_stream_2(chp->cmd_iot,
2297: chp->cmd_iohs[wd_data], 0, buf, len >> 1);
2298: }
2299: }
2300: }
2301:
2302: void
2303: wdc_dataout_pio(chp, flags, buf, len)
2304: struct wdc_channel *chp;
2305: int flags;
2306: void *buf;
2307: size_t len;
2308: {
2309:
2310: if (flags & DRIVE_NOSTREAM) {
2311: if (flags & DRIVE_CAP32) {
2312: bus_space_write_multi_4(chp->data32iot,
2313: chp->data32ioh, 0, buf, len >> 2);
2314: buf = (char *)buf + (len & ~3);
2315: len &= 3;
2316: }
2317: if (len) {
2318: bus_space_write_multi_2(chp->cmd_iot,
2319: chp->cmd_iohs[wd_data], 0, buf, len >> 1);
2320: }
2321: } else {
2322: if (flags & DRIVE_CAP32) {
2323: bus_space_write_multi_stream_4(chp->data32iot,
2324: chp->data32ioh, 0, buf, len >> 2);
2325: buf = (char *)buf + (len & ~3);
2326: len &= 3;
2327: }
2328: if (len) {
2329: bus_space_write_multi_stream_2(chp->cmd_iot,
2330: chp->cmd_iohs[wd_data], 0, buf, len >> 1);
2331: }
2332: }
2333: }
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