[BACK]Return to wdc.c CVS log [TXT][DIR] Up to [cvs.NetBSD.org] / src / sys / dev / ic

Annotation of src/sys/dev/ic/wdc.c, Revision 1.171

1.171   ! thorpej     1: /*     $NetBSD: wdc.c,v 1.170 2004/01/03 23:59:58 thorpej Exp $ */
1.31      bouyer      2:
                      3: /*
1.137     bouyer      4:  * Copyright (c) 1998, 2001, 2003 Manuel Bouyer.  All rights reserved.
1.31      bouyer      5:  *
                      6:  * Redistribution and use in source and binary forms, with or without
                      7:  * modification, are permitted provided that the following conditions
                      8:  * are met:
                      9:  * 1. Redistributions of source code must retain the above copyright
                     10:  *    notice, this list of conditions and the following disclaimer.
                     11:  * 2. Redistributions in binary form must reproduce the above copyright
                     12:  *    notice, this list of conditions and the following disclaimer in the
                     13:  *    documentation and/or other materials provided with the distribution.
                     14:  * 3. All advertising materials mentioning features or use of this software
                     15:  *    must display the following acknowledgement:
                     16:  *  This product includes software developed by Manuel Bouyer.
                     17:  * 4. The name of the author may not be used to endorse or promote products
                     18:  *    derived from this software without specific prior written permission.
                     19:  *
                     20:  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
                     21:  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
                     22:  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
                     23:  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
                     24:  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
                     25:  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
                     26:  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
                     27:  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
                     28:  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
                     29:  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
                     30:  */
1.2       bouyer     31:
1.27      mycroft    32: /*-
1.125     mycroft    33:  * Copyright (c) 1998, 2003 The NetBSD Foundation, Inc.
1.27      mycroft    34:  * All rights reserved.
1.2       bouyer     35:  *
1.27      mycroft    36:  * This code is derived from software contributed to The NetBSD Foundation
                     37:  * by Charles M. Hannum, by Onno van der Linden and by Manuel Bouyer.
1.12      cgd        38:  *
1.2       bouyer     39:  * Redistribution and use in source and binary forms, with or without
                     40:  * modification, are permitted provided that the following conditions
                     41:  * are met:
                     42:  * 1. Redistributions of source code must retain the above copyright
                     43:  *    notice, this list of conditions and the following disclaimer.
                     44:  * 2. Redistributions in binary form must reproduce the above copyright
                     45:  *    notice, this list of conditions and the following disclaimer in the
                     46:  *    documentation and/or other materials provided with the distribution.
                     47:  * 3. All advertising materials mentioning features or use of this software
                     48:  *    must display the following acknowledgement:
1.27      mycroft    49:  *        This product includes software developed by the NetBSD
                     50:  *        Foundation, Inc. and its contributors.
                     51:  * 4. Neither the name of The NetBSD Foundation nor the names of its
                     52:  *    contributors may be used to endorse or promote products derived
                     53:  *    from this software without specific prior written permission.
1.2       bouyer     54:  *
1.27      mycroft    55:  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
                     56:  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
                     57:  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
                     58:  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
                     59:  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
                     60:  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
                     61:  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
                     62:  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
                     63:  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
                     64:  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
                     65:  * POSSIBILITY OF SUCH DAMAGE.
1.2       bouyer     66:  */
                     67:
1.12      cgd        68: /*
                     69:  * CODE UNTESTED IN THE CURRENT REVISION:
                     70:  */
1.100     lukem      71:
                     72: #include <sys/cdefs.h>
1.171   ! thorpej    73: __KERNEL_RCSID(0, "$NetBSD: wdc.c,v 1.170 2004/01/03 23:59:58 thorpej Exp $");
1.12      cgd        74:
1.59      hubertf    75: #ifndef WDCDEBUG
1.31      bouyer     76: #define WDCDEBUG
1.59      hubertf    77: #endif /* WDCDEBUG */
1.31      bouyer     78:
1.2       bouyer     79: #include <sys/param.h>
                     80: #include <sys/systm.h>
                     81: #include <sys/kernel.h>
                     82: #include <sys/conf.h>
                     83: #include <sys/buf.h>
1.31      bouyer     84: #include <sys/device.h>
1.2       bouyer     85: #include <sys/malloc.h>
1.71      bouyer     86: #include <sys/pool.h>
1.2       bouyer     87: #include <sys/syslog.h>
                     88: #include <sys/proc.h>
                     89:
                     90: #include <machine/intr.h>
                     91: #include <machine/bus.h>
                     92:
1.17      sakamoto   93: #ifndef __BUS_SPACE_HAS_STREAM_METHODS
1.31      bouyer     94: #define bus_space_write_multi_stream_2 bus_space_write_multi_2
                     95: #define bus_space_write_multi_stream_4 bus_space_write_multi_4
                     96: #define bus_space_read_multi_stream_2  bus_space_read_multi_2
                     97: #define bus_space_read_multi_stream_4  bus_space_read_multi_4
1.17      sakamoto   98: #endif /* __BUS_SPACE_HAS_STREAM_METHODS */
1.16      sakamoto   99:
1.103     bouyer    100: #include <dev/ata/atavar.h>
1.31      bouyer    101: #include <dev/ata/atareg.h>
1.12      cgd       102: #include <dev/ic/wdcreg.h>
                    103: #include <dev/ic/wdcvar.h>
1.31      bouyer    104:
1.137     bouyer    105: #include "locators.h"
                    106:
1.122     thorpej   107: #include "ataraid.h"
1.2       bouyer    108: #include "atapibus.h"
1.106     bouyer    109: #include "wd.h"
1.2       bouyer    110:
1.122     thorpej   111: #if NATARAID > 0
                    112: #include <dev/ata/ata_raidvar.h>
                    113: #endif
                    114:
1.31      bouyer    115: #define WDCDELAY  100 /* 100 microseconds */
                    116: #define WDCNDELAY_RST (WDC_RESET_WAIT * 1000 / WDCDELAY)
1.2       bouyer    117: #if 0
1.31      bouyer    118: /* If you enable this, it will report any delays more than WDCDELAY * N long. */
1.2       bouyer    119: #define WDCNDELAY_DEBUG        50
                    120: #endif
                    121:
1.137     bouyer    122: /* When polling wait that much and then tsleep for 1/hz seconds */
                    123: #define WDCDELAY_POLL 1 /* ms */
                    124:
                    125: /* timeout for the control commands */
                    126: #define WDC_CTRL_DELAY 10000 /* 10s, for the recall command */
                    127:
1.71      bouyer    128: struct pool wdc_xfer_pool;
1.2       bouyer    129:
1.106     bouyer    130: #if NWD > 0
1.103     bouyer    131: extern const struct ata_bustype wdc_ata_bustype; /* in ata_wdc.c */
1.106     bouyer    132: #else
                    133: /* A fake one, the autoconfig will print "wd at foo ... not configured */
                    134: const struct ata_bustype wdc_ata_bustype = {
                    135:        SCSIPI_BUSTYPE_ATA,
                    136:        NULL,
                    137:        NULL,
                    138:        NULL,
                    139:        NULL,
                    140:        NULL,
                    141:        NULL,
                    142:        NULL
                    143: };
                    144: #endif
1.102     bouyer    145:
1.168     thorpej   146: static int     wdcprobe1(struct wdc_channel*, int);
                    147: static void    __wdcerror(struct wdc_channel*, char *);
                    148: static int     __wdcwait_reset(struct wdc_channel *, int, int);
                    149: static void    __wdccommand_done(struct wdc_channel *, struct ata_xfer *);
                    150: static void    __wdccommand_start(struct wdc_channel *, struct ata_xfer *);
                    151: static int     __wdccommand_intr(struct wdc_channel *, struct ata_xfer *,
1.167     thorpej   152:                                  int);
1.168     thorpej   153: static int     __wdcwait(struct wdc_channel *, int, int, int);
1.31      bouyer    154:
                    155: #define DEBUG_INTR   0x01
                    156: #define DEBUG_XFERS  0x02
                    157: #define DEBUG_STATUS 0x04
                    158: #define DEBUG_FUNCS  0x08
                    159: #define DEBUG_PROBE  0x10
1.74      enami     160: #define DEBUG_DETACH 0x20
1.87      bouyer    161: #define DEBUG_DELAY  0x40
1.31      bouyer    162: #ifdef WDCDEBUG
1.32      bouyer    163: int wdcdebug_mask = 0;
1.31      bouyer    164: int wdc_nxfer = 0;
                    165: #define WDCDEBUG_PRINT(args, level)  if (wdcdebug_mask & (level)) printf args
1.2       bouyer    166: #else
1.31      bouyer    167: #define WDCDEBUG_PRINT(args, level)
1.2       bouyer    168: #endif
                    169:
1.162     thorpej   170: /*
                    171:  * A queue of atabus instances, used to ensure the same bus probe order
                    172:  * for a given hardware configuration at each boot.
                    173:  */
                    174: struct atabus_initq_head atabus_initq_head =
                    175:     TAILQ_HEAD_INITIALIZER(atabus_initq_head);
                    176: struct simplelock atabus_interlock = SIMPLELOCK_INITIALIZER;
1.137     bouyer    177:
1.162     thorpej   178: /* Test to see controller with at last one attached drive is there.
                    179:  * Returns a bit for each possible drive found (0x01 for drive 0,
                    180:  * 0x02 for drive 1).
                    181:  * Logic:
                    182:  * - If a status register is at 0xff, assume there is no drive here
                    183:  *   (ISA has pull-up resistors).  Similarly if the status register has
                    184:  *   the value we last wrote to the bus (for IDE interfaces without pullups).
                    185:  *   If no drive at all -> return.
                    186:  * - reset the controller, wait for it to complete (may take up to 31s !).
                    187:  *   If timeout -> return.
                    188:  * - test ATA/ATAPI signatures. If at last one drive found -> return.
                    189:  * - try an ATA command on the master.
                    190:  */
1.137     bouyer    191:
1.164     thorpej   192: static void
1.168     thorpej   193: wdc_drvprobe(struct wdc_channel *chp)
1.137     bouyer    194: {
                    195:        struct ataparams params;
1.169     thorpej   196:        struct wdc_softc *wdc = chp->ch_wdc;
1.145     christos  197:        u_int8_t st0 = 0, st1 = 0;
1.164     thorpej   198:        int i, error;
1.137     bouyer    199:
1.164     thorpej   200:        if (wdcprobe1(chp, 0) == 0) {
                    201:                /* No drives, abort the attach here. */
                    202:                return;
1.161     thorpej   203:        }
1.137     bouyer    204:
                    205:        /* for ATA/OLD drives, wait for DRDY, 3s timeout */
                    206:        for (i = 0; i < mstohz(3000); i++) {
1.169     thorpej   207:                if (wdc != NULL && (wdc->cap & WDC_CAPABILITY_SELECT))
                    208:                        wdc->select(chp,0);
1.157     fvdl      209:                bus_space_write_1(chp->cmd_iot, chp->cmd_iohs[wd_sdh], 0,
1.137     bouyer    210:                    WDSD_IBM);
                    211:                delay(10);      /* 400ns delay */
1.157     fvdl      212:                st0 = bus_space_read_1(chp->cmd_iot,
                    213:                    chp->cmd_iohs[wd_status], 0);
1.137     bouyer    214:
1.169     thorpej   215:                if (wdc != NULL && (wdc->cap & WDC_CAPABILITY_SELECT))
                    216:                        wdc->select(chp,1);
1.157     fvdl      217:                bus_space_write_1(chp->cmd_iot, chp->cmd_iohs[wd_sdh], 0,
1.137     bouyer    218:                    WDSD_IBM | 0x10);
                    219:                delay(10);      /* 400ns delay */
1.157     fvdl      220:                st1 = bus_space_read_1(chp->cmd_iot,
                    221:                    chp->cmd_iohs[wd_status], 0);
1.137     bouyer    222:
                    223:                if (((chp->ch_drive[0].drive_flags & (DRIVE_ATA|DRIVE_OLD))
                    224:                        == 0 ||
                    225:                    (st0 & WDCS_DRDY)) &&
                    226:                    ((chp->ch_drive[1].drive_flags & (DRIVE_ATA|DRIVE_OLD))
                    227:                        == 0 ||
                    228:                    (st1 & WDCS_DRDY)))
                    229:                        break;
1.164     thorpej   230:                tsleep(&params, PRIBIO, "atadrdy", 1);
1.137     bouyer    231:        }
                    232:        if ((st0 & WDCS_DRDY) == 0)
                    233:                chp->ch_drive[0].drive_flags &= ~(DRIVE_ATA|DRIVE_OLD);
                    234:        if ((st1 & WDCS_DRDY) == 0)
                    235:                chp->ch_drive[1].drive_flags &= ~(DRIVE_ATA|DRIVE_OLD);
                    236:
                    237:        WDCDEBUG_PRINT(("%s:%d: wait DRDY st0 0x%x st1 0x%x\n",
1.169     thorpej   238:            wdc->sc_dev.dv_xname,
                    239:            chp->ch_channel, st0, st1), DEBUG_PROBE);
1.137     bouyer    240:
                    241:        /* Wait a bit, some devices are weird just after a reset. */
                    242:        delay(5000);
                    243:
                    244:        for (i = 0; i < 2; i++) {
1.171   ! thorpej   245:                /* XXX This should be done by other code. */
1.137     bouyer    246:                chp->ch_drive[i].chnl_softc = chp;
                    247:                chp->ch_drive[i].drive = i;
1.171   ! thorpej   248:
1.137     bouyer    249:                /*
                    250:                 * Init error counter so that an error withing the first xfers
                    251:                 * will trigger a downgrade
                    252:                 */
                    253:                chp->ch_drive[i].n_dmaerrs = NERRS_MAX-1;
                    254:
                    255:                /* If controller can't do 16bit flag the drives as 32bit */
1.169     thorpej   256:                if ((wdc->cap &
1.137     bouyer    257:                    (WDC_CAPABILITY_DATA16 | WDC_CAPABILITY_DATA32)) ==
                    258:                    WDC_CAPABILITY_DATA32)
                    259:                        chp->ch_drive[i].drive_flags |= DRIVE_CAP32;
                    260:                if ((chp->ch_drive[i].drive_flags & DRIVE) == 0)
                    261:                        continue;
                    262:
1.144     briggs    263:                /* Shortcut in case we've been shutdown */
                    264:                if (chp->ch_flags & WDCF_SHUTDOWN)
1.164     thorpej   265:                        return;
1.144     briggs    266:
1.137     bouyer    267:                /* issue an identify, to try to detect ghosts */
                    268:                error = ata_get_params(&chp->ch_drive[i],
                    269:                    AT_WAIT | AT_POLL, &params);
                    270:                if (error != CMD_OK) {
1.164     thorpej   271:                        tsleep(&params, PRIBIO, "atacnf", mstohz(1000));
1.144     briggs    272:
                    273:                        /* Shortcut in case we've been shutdown */
                    274:                        if (chp->ch_flags & WDCF_SHUTDOWN)
1.164     thorpej   275:                                return;
1.144     briggs    276:
1.137     bouyer    277:                        error = ata_get_params(&chp->ch_drive[i],
                    278:                            AT_WAIT | AT_POLL, &params);
                    279:                }
                    280:                if (error == CMD_OK) {
1.152     wiz       281:                        /* If IDENTIFY succeeded, this is not an OLD ctrl */
1.137     bouyer    282:                        chp->ch_drive[0].drive_flags &= ~DRIVE_OLD;
                    283:                        chp->ch_drive[1].drive_flags &= ~DRIVE_OLD;
                    284:                } else {
1.155     bouyer    285:                        chp->ch_drive[i].drive_flags &=
1.137     bouyer    286:                            ~(DRIVE_ATA | DRIVE_ATAPI);
                    287:                        WDCDEBUG_PRINT(("%s:%d:%d: IDENTIFY failed (%d)\n",
1.169     thorpej   288:                            wdc->sc_dev.dv_xname,
                    289:                            chp->ch_channel, i, error), DEBUG_PROBE);
1.137     bouyer    290:                        if ((chp->ch_drive[i].drive_flags & DRIVE_OLD) == 0)
                    291:                                continue;
                    292:                        /*
                    293:                         * Pre-ATA drive ?
                    294:                         * Test registers writability (Error register not
                    295:                         * writable, but cyllo is), then try an ATA command.
                    296:                         */
1.169     thorpej   297:                        if (wdc->cap & WDC_CAPABILITY_SELECT)
                    298:                                wdc->select(chp,i);
1.157     fvdl      299:                        bus_space_write_1(chp->cmd_iot,
                    300:                            chp->cmd_iohs[wd_sdh], 0, WDSD_IBM | (i << 4));
1.137     bouyer    301:                        delay(10);      /* 400ns delay */
1.157     fvdl      302:                        bus_space_write_1(chp->cmd_iot, chp->cmd_iohs[wd_error],
                    303:                            0, 0x58);
                    304:                        bus_space_write_1(chp->cmd_iot,
                    305:                            chp->cmd_iohs[wd_cyl_lo], 0, 0xa5);
                    306:                        if (bus_space_read_1(chp->cmd_iot,
                    307:                                chp->cmd_iohs[wd_error], 0) == 0x58 ||
                    308:                            bus_space_read_1(chp->cmd_iot,
                    309:                                chp->cmd_iohs[wd_cyl_lo], 0) != 0xa5) {
1.137     bouyer    310:                                WDCDEBUG_PRINT(("%s:%d:%d: register "
                    311:                                    "writability failed\n",
1.169     thorpej   312:                                    wdc->sc_dev.dv_xname,
                    313:                                    chp->ch_channel, i), DEBUG_PROBE);
1.137     bouyer    314:                                    chp->ch_drive[i].drive_flags &= ~DRIVE_OLD;
1.155     bouyer    315:                                    continue;
1.137     bouyer    316:                        }
1.166     thorpej   317:                        if (wdc_wait_for_ready(chp, 10000, 0) == WDCWAIT_TOUT) {
1.137     bouyer    318:                                WDCDEBUG_PRINT(("%s:%d:%d: not ready\n",
1.169     thorpej   319:                                    wdc->sc_dev.dv_xname,
                    320:                                    chp->ch_channel, i), DEBUG_PROBE);
1.137     bouyer    321:                                chp->ch_drive[i].drive_flags &= ~DRIVE_OLD;
                    322:                                continue;
                    323:                        }
1.157     fvdl      324:                        bus_space_write_1(chp->cmd_iot,
                    325:                            chp->cmd_iohs[wd_command], 0, WDCC_RECAL);
1.137     bouyer    326:                        delay(10);      /* 400ns delay */
1.166     thorpej   327:                        if (wdc_wait_for_ready(chp, 10000, 0) == WDCWAIT_TOUT) {
1.137     bouyer    328:                                WDCDEBUG_PRINT(("%s:%d:%d: WDCC_RECAL failed\n",
1.169     thorpej   329:                                    wdc->sc_dev.dv_xname,
                    330:                                    chp->ch_channel, i), DEBUG_PROBE);
1.137     bouyer    331:                                chp->ch_drive[i].drive_flags &= ~DRIVE_OLD;
1.155     bouyer    332:                        } else {
                    333:                                chp->ch_drive[0].drive_flags &=
                    334:                                    ~(DRIVE_ATA | DRIVE_ATAPI);
                    335:                                chp->ch_drive[1].drive_flags &=
                    336:                                    ~(DRIVE_ATA | DRIVE_ATAPI);
1.137     bouyer    337:                        }
                    338:                }
                    339:        }
1.164     thorpej   340: }
                    341:
                    342: void
                    343: atabusconfig(struct atabus_softc *atabus_sc)
                    344: {
1.168     thorpej   345:        struct wdc_channel *chp = atabus_sc->sc_chan;
1.169     thorpej   346:        struct wdc_softc *wdc = chp->ch_wdc;
1.164     thorpej   347:        int i, error, need_delref = 0;
                    348:        struct atabus_initq *atabus_initq = NULL;
                    349:
                    350:        if ((error = wdc_addref(chp)) != 0) {
                    351:                aprint_error("%s: unable to enable controller\n",
1.169     thorpej   352:                    wdc->sc_dev.dv_xname);
1.164     thorpej   353:                goto out;
                    354:        }
                    355:        need_delref = 1;
                    356:
                    357:        /* Probe for the drives. */
1.169     thorpej   358:        (*wdc->drv_probe)(chp);
1.137     bouyer    359:
                    360:        WDCDEBUG_PRINT(("atabusattach: ch_drive_flags 0x%x 0x%x\n",
                    361:            chp->ch_drive[0].drive_flags, chp->ch_drive[1].drive_flags),
                    362:            DEBUG_PROBE);
                    363:
                    364:        /* If no drives, abort here */
                    365:        if ((chp->ch_drive[0].drive_flags & DRIVE) == 0 &&
                    366:            (chp->ch_drive[1].drive_flags & DRIVE) == 0)
                    367:                goto out;
                    368:
1.164     thorpej   369:        /* Shortcut in case we've been shutdown */
                    370:        if (chp->ch_flags & WDCF_SHUTDOWN)
                    371:                goto out;
                    372:
1.137     bouyer    373:        /* Make sure the devices probe in atabus order to avoid jitter. */
                    374:        simple_lock(&atabus_interlock);
                    375:        while(1) {
                    376:                atabus_initq = TAILQ_FIRST(&atabus_initq_head);
                    377:                if (atabus_initq->atabus_sc == atabus_sc)
                    378:                        break;
                    379:                ltsleep(&atabus_initq_head, PRIBIO, "ata_initq", 0,
                    380:                    &atabus_interlock);
                    381:        }
                    382:        simple_unlock(&atabus_interlock);
                    383:
                    384:        /*
                    385:         * Attach an ATAPI bus, if needed.
                    386:         */
                    387:        if ((chp->ch_drive[0].drive_flags & DRIVE_ATAPI) ||
                    388:            (chp->ch_drive[1].drive_flags & DRIVE_ATAPI)) {
                    389: #if NATAPIBUS > 0
                    390:                wdc_atapibus_attach(atabus_sc);
                    391: #else
                    392:                /*
                    393:                 * Fake the autoconfig "not configured" message
                    394:                 */
                    395:                aprint_normal("atapibus at %s not configured\n",
1.169     thorpej   396:                    wdc->sc_dev.dv_xname);
1.137     bouyer    397:                chp->atapibus = NULL;
1.141     bouyer    398:                chp->ch_drive[0].drive_flags &= ~DRIVE_ATAPI;
                    399:                chp->ch_drive[1].drive_flags &= ~DRIVE_ATAPI;
1.137     bouyer    400: #endif
                    401:        }
                    402:
                    403:        for (i = 0; i < 2; i++) {
                    404:                struct ata_device adev;
                    405:                if ((chp->ch_drive[i].drive_flags &
                    406:                    (DRIVE_ATA | DRIVE_OLD)) == 0) {
                    407:                        continue;
                    408:                }
                    409:                memset(&adev, 0, sizeof(struct ata_device));
                    410:                adev.adev_bustype = &wdc_ata_bustype;
1.169     thorpej   411:                adev.adev_channel = chp->ch_channel;
1.137     bouyer    412:                adev.adev_openings = 1;
                    413:                adev.adev_drv_data = &chp->ch_drive[i];
                    414:                chp->ata_drives[i] = config_found(&atabus_sc->sc_dev,
1.162     thorpej   415:                    &adev, ataprint);
1.141     bouyer    416:                if (chp->ata_drives[i] != NULL)
1.137     bouyer    417:                        wdc_probe_caps(&chp->ch_drive[i]);
1.141     bouyer    418:                else
                    419:                        chp->ch_drive[i].drive_flags &=
                    420:                            ~(DRIVE_ATA | DRIVE_OLD);
1.137     bouyer    421:        }
                    422:
                    423:        /* now that we know the drives, the controller can set its modes */
1.169     thorpej   424:        if (wdc->cap & WDC_CAPABILITY_MODE) {
                    425:                wdc->set_modes(chp);
1.137     bouyer    426:                wdc_print_modes(chp);
                    427:        }
                    428: #if NATARAID > 0
1.169     thorpej   429:        if (wdc->cap & WDC_CAPABILITY_RAID)
1.137     bouyer    430:                for (i = 0; i < 2; i++)
                    431:                        if (chp->ata_drives[i] != NULL)
                    432:                                ata_raid_check_component(chp->ata_drives[i]);
                    433: #endif /* NATARAID > 0 */
                    434:
                    435:        /*
1.152     wiz       436:         * reset drive_flags for unattached devices, reset state for attached
1.137     bouyer    437:         *  ones
                    438:         */
                    439:        for (i = 0; i < 2; i++) {
                    440:                if (chp->ch_drive[i].drv_softc == NULL)
                    441:                        chp->ch_drive[i].drive_flags = 0;
                    442:                else
                    443:                        chp->ch_drive[i].state = 0;
                    444:        }
                    445:
1.163     thorpej   446:  out:
1.137     bouyer    447:        if (atabus_initq == NULL) {
                    448:                simple_lock(&atabus_interlock);
                    449:                while(1) {
                    450:                        atabus_initq = TAILQ_FIRST(&atabus_initq_head);
                    451:                        if (atabus_initq->atabus_sc == atabus_sc)
                    452:                                break;
                    453:                        ltsleep(&atabus_initq_head, PRIBIO, "ata_initq", 0,
                    454:                            &atabus_interlock);
                    455:                }
                    456:                simple_unlock(&atabus_interlock);
                    457:        }
                    458:         simple_lock(&atabus_interlock);
                    459:         TAILQ_REMOVE(&atabus_initq_head, atabus_initq, atabus_initq);
                    460:         simple_unlock(&atabus_interlock);
                    461:
                    462:         free(atabus_initq, M_DEVBUF);
                    463:         wakeup(&atabus_initq_head);
                    464:
                    465:        config_pending_decr();
1.144     briggs    466:        if (need_delref)
                    467:                wdc_delref(chp);
1.137     bouyer    468: }
                    469:
1.2       bouyer    470: int
1.168     thorpej   471: wdcprobe(struct wdc_channel *chp)
1.12      cgd       472: {
1.163     thorpej   473:
                    474:        return (wdcprobe1(chp, 1));
1.137     bouyer    475: }
                    476:
1.167     thorpej   477: static int
1.168     thorpej   478: wdcprobe1(struct wdc_channel *chp, int poll)
1.137     bouyer    479: {
1.169     thorpej   480:        struct wdc_softc *wdc = chp->ch_wdc;
1.31      bouyer    481:        u_int8_t st0, st1, sc, sn, cl, ch;
                    482:        u_int8_t ret_value = 0x03;
                    483:        u_int8_t drive;
1.156     bouyer    484:        int s;
1.31      bouyer    485:
                    486:        /*
                    487:         * Sanity check to see if the wdc channel responds at all.
                    488:         */
                    489:
1.169     thorpej   490:        if (wdc == NULL ||
                    491:            (wdc->cap & WDC_CAPABILITY_NO_EXTRA_RESETS) == 0) {
1.107     dbj       492:
1.169     thorpej   493:                if (wdc != NULL && (wdc->cap & WDC_CAPABILITY_SELECT))
                    494:                        wdc->select(chp,0);
1.137     bouyer    495:
1.157     fvdl      496:                bus_space_write_1(chp->cmd_iot, chp->cmd_iohs[wd_sdh], 0,
1.43      kenh      497:                    WDSD_IBM);
1.131     mycroft   498:                delay(10);      /* 400ns delay */
1.157     fvdl      499:                st0 = bus_space_read_1(chp->cmd_iot,
                    500:                    chp->cmd_iohs[wd_status], 0);
1.107     dbj       501:
1.169     thorpej   502:                if (wdc != NULL && (wdc->cap & WDC_CAPABILITY_SELECT))
                    503:                        wdc->select(chp,1);
1.137     bouyer    504:
1.157     fvdl      505:                bus_space_write_1(chp->cmd_iot, chp->cmd_iohs[wd_sdh], 0,
1.43      kenh      506:                    WDSD_IBM | 0x10);
1.131     mycroft   507:                delay(10);      /* 400ns delay */
1.157     fvdl      508:                st1 = bus_space_read_1(chp->cmd_iot,
                    509:                    chp->cmd_iohs[wd_status], 0);
1.43      kenh      510:
                    511:                WDCDEBUG_PRINT(("%s:%d: before reset, st0=0x%x, st1=0x%x\n",
1.169     thorpej   512:                    wdc != NULL ? wdc->sc_dev.dv_xname : "wdcprobe",
                    513:                    chp->ch_channel, st0, st1), DEBUG_PROBE);
1.43      kenh      514:
1.142     bouyer    515:                if (st0 == 0xff || st0 == WDSD_IBM)
1.43      kenh      516:                        ret_value &= ~0x01;
1.142     bouyer    517:                if (st1 == 0xff || st1 == (WDSD_IBM | 0x10))
1.43      kenh      518:                        ret_value &= ~0x02;
1.125     mycroft   519:                /* Register writability test, drive 0. */
                    520:                if (ret_value & 0x01) {
1.169     thorpej   521:                        if (wdc != NULL && (wdc->cap & WDC_CAPABILITY_SELECT))
                    522:                                wdc->select(chp,0);
1.157     fvdl      523:                        bus_space_write_1(chp->cmd_iot, chp->cmd_iohs[wd_sdh],
                    524:                            0, WDSD_IBM);
                    525:                        bus_space_write_1(chp->cmd_iot,
                    526:                            chp->cmd_iohs[wd_cyl_lo], 0, 0x02);
                    527:                        if (bus_space_read_1(chp->cmd_iot,
                    528:                            chp->cmd_iohs[wd_cyl_lo], 0) != 0x02)
1.125     mycroft   529:                                ret_value &= ~0x01;
1.157     fvdl      530:                        bus_space_write_1(chp->cmd_iot,
                    531:                            chp->cmd_iohs[wd_cyl_lo], 0, 0x01);
                    532:                        if (bus_space_read_1(chp->cmd_iot,
                    533:                            chp->cmd_iohs[wd_cyl_lo], 0) != 0x01)
1.125     mycroft   534:                                ret_value &= ~0x01;
1.167     thorpej   535:                        bus_space_write_1(chp->cmd_iot,
                    536:                            chp->cmd_iohs[wd_sector], 0, 0x01);
1.157     fvdl      537:                        if (bus_space_read_1(chp->cmd_iot,
                    538:                            chp->cmd_iohs[wd_sector], 0) != 0x01)
1.125     mycroft   539:                                ret_value &= ~0x01;
1.157     fvdl      540:                        bus_space_write_1(chp->cmd_iot,
                    541:                            chp->cmd_iohs[wd_sector], 0, 0x02);
                    542:                        if (bus_space_read_1(chp->cmd_iot,
                    543:                            chp->cmd_iohs[wd_sector], 0) != 0x02)
1.125     mycroft   544:                                ret_value &= ~0x01;
1.157     fvdl      545:                        if (bus_space_read_1(chp->cmd_iot,
                    546:                            chp->cmd_iohs[wd_cyl_lo], 0) != 0x01)
1.131     mycroft   547:                                ret_value &= ~0x01;
1.125     mycroft   548:                }
                    549:                /* Register writability test, drive 1. */
                    550:                if (ret_value & 0x02) {
1.169     thorpej   551:                        if (wdc != NULL && (wdc->cap & WDC_CAPABILITY_SELECT))
                    552:                             wdc->select(chp,1);
1.157     fvdl      553:                        bus_space_write_1(chp->cmd_iot, chp->cmd_iohs[wd_sdh],
                    554:                             0, WDSD_IBM | 0x10);
1.167     thorpej   555:                        bus_space_write_1(chp->cmd_iot,
                    556:                            chp->cmd_iohs[wd_cyl_lo], 0, 0x02);
1.157     fvdl      557:                        if (bus_space_read_1(chp->cmd_iot,
                    558:                             chp->cmd_iohs[wd_cyl_lo], 0) != 0x02)
1.125     mycroft   559:                                ret_value &= ~0x02;
1.157     fvdl      560:                        bus_space_write_1(chp->cmd_iot,
                    561:                            chp->cmd_iohs[wd_cyl_lo], 0, 0x01);
                    562:                        if (bus_space_read_1(chp->cmd_iot,
                    563:                             chp->cmd_iohs[wd_cyl_lo], 0) != 0x01)
1.125     mycroft   564:                                ret_value &= ~0x02;
1.157     fvdl      565:                        bus_space_write_1(chp->cmd_iot,
                    566:                            chp->cmd_iohs[wd_sector], 0, 0x01);
                    567:                        if (bus_space_read_1(chp->cmd_iot,
                    568:                            chp->cmd_iohs[wd_sector], 0) != 0x01)
1.125     mycroft   569:                                ret_value &= ~0x02;
1.167     thorpej   570:                        bus_space_write_1(chp->cmd_iot,
                    571:                            chp->cmd_iohs[wd_sector], 0, 0x02);
1.157     fvdl      572:                        if (bus_space_read_1(chp->cmd_iot,
                    573:                            chp->cmd_iohs[wd_sector], 0) != 0x02)
1.125     mycroft   574:                                ret_value &= ~0x02;
1.157     fvdl      575:                        if (bus_space_read_1(chp->cmd_iot,
                    576:                            chp->cmd_iohs[wd_cyl_lo], 0) != 0x01)
1.131     mycroft   577:                                ret_value &= ~0x02;
1.125     mycroft   578:                }
1.137     bouyer    579:
                    580:                if (ret_value == 0)
                    581:                        return 0;
1.62      bouyer    582:        }
1.31      bouyer    583:
1.156     bouyer    584:        s = splbio();
                    585:
1.169     thorpej   586:        if (wdc != NULL && (wdc->cap & WDC_CAPABILITY_SELECT))
                    587:                wdc->select(chp,0);
1.137     bouyer    588:        /* assert SRST, wait for reset to complete */
1.157     fvdl      589:        bus_space_write_1(chp->cmd_iot, chp->cmd_iohs[wd_sdh], 0, WDSD_IBM);
1.137     bouyer    590:        delay(10);      /* 400ns delay */
                    591:        bus_space_write_1(chp->ctl_iot, chp->ctl_ioh, wd_aux_ctlr,
                    592:            WDCTL_RST | WDCTL_IDS | WDCTL_4BIT);
                    593:        DELAY(2000);
1.157     fvdl      594:        (void) bus_space_read_1(chp->cmd_iot, chp->cmd_iohs[wd_error], 0);
1.137     bouyer    595:        bus_space_write_1(chp->ctl_iot, chp->ctl_ioh, wd_aux_ctlr, WDCTL_4BIT);
                    596:        delay(10);      /* 400ns delay */
1.156     bouyer    597:        /* ACK interrupt in case there is one pending left (Promise ATA100) */
1.169     thorpej   598:        if (wdc != NULL && (wdc->cap & WDC_CAPABILITY_IRQACK))
                    599:                wdc->irqack(chp);
1.156     bouyer    600:        splx(s);
1.137     bouyer    601:
                    602:        ret_value = __wdcwait_reset(chp, ret_value, poll);
                    603:        WDCDEBUG_PRINT(("%s:%d: after reset, ret_value=0x%d\n",
1.169     thorpej   604:            wdc != NULL ? wdc->sc_dev.dv_xname : "wdcprobe", chp->ch_channel,
1.137     bouyer    605:            ret_value), DEBUG_PROBE);
1.12      cgd       606:
1.137     bouyer    607:        /* if reset failed, there's nothing here */
                    608:        if (ret_value == 0)
                    609:                return 0;
1.67      bouyer    610:
1.12      cgd       611:        /*
1.167     thorpej   612:         * Test presence of drives. First test register signatures looking
                    613:         * for ATAPI devices. If it's not an ATAPI and reset said there may
                    614:         * be something here assume it's ATA or OLD.  Ghost will be killed
                    615:         * later in attach routine.
1.12      cgd       616:         */
1.137     bouyer    617:        for (drive = 0; drive < 2; drive++) {
                    618:                if ((ret_value & (0x01 << drive)) == 0)
                    619:                        continue;
1.169     thorpej   620:                if (wdc != NULL && wdc->cap & WDC_CAPABILITY_SELECT)
                    621:                        wdc->select(chp,drive);
1.157     fvdl      622:                bus_space_write_1(chp->cmd_iot, chp->cmd_iohs[wd_sdh], 0,
1.137     bouyer    623:                    WDSD_IBM | (drive << 4));
                    624:                delay(10);      /* 400ns delay */
                    625:                /* Save registers contents */
1.157     fvdl      626:                sc = bus_space_read_1(chp->cmd_iot,
                    627:                    chp->cmd_iohs[wd_seccnt], 0);
                    628:                sn = bus_space_read_1(chp->cmd_iot,
                    629:                    chp->cmd_iohs[wd_sector], 0);
                    630:                cl = bus_space_read_1(chp->cmd_iot,
                    631:                    chp->cmd_iohs[wd_cyl_lo], 0);
                    632:                ch = bus_space_read_1(chp->cmd_iot,
                    633:                     chp->cmd_iohs[wd_cyl_hi], 0);
1.137     bouyer    634:
                    635:                WDCDEBUG_PRINT(("%s:%d:%d: after reset, sc=0x%x sn=0x%x "
                    636:                    "cl=0x%x ch=0x%x\n",
1.169     thorpej   637:                    wdc != NULL ? wdc->sc_dev.dv_xname : "wdcprobe",
                    638:                    chp->ch_channel, drive, sc, sn, cl, ch), DEBUG_PROBE);
1.31      bouyer    639:                /*
1.137     bouyer    640:                 * sc & sn are supposted to be 0x1 for ATAPI but in some cases
                    641:                 * we get wrong values here, so ignore it.
1.31      bouyer    642:                 */
1.137     bouyer    643:                if (cl == 0x14 && ch == 0xeb) {
                    644:                        chp->ch_drive[drive].drive_flags |= DRIVE_ATAPI;
                    645:                } else {
                    646:                        chp->ch_drive[drive].drive_flags |= DRIVE_ATA;
1.169     thorpej   647:                        if (wdc == NULL ||
                    648:                            (wdc->cap & WDC_CAPABILITY_PREATA) != 0)
1.137     bouyer    649:                                chp->ch_drive[drive].drive_flags |= DRIVE_OLD;
                    650:                }
1.31      bouyer    651:        }
1.137     bouyer    652:        return (ret_value);
                    653: }
1.31      bouyer    654:
1.137     bouyer    655: void
1.168     thorpej   656: wdcattach(struct wdc_channel *chp)
1.137     bouyer    657: {
1.169     thorpej   658:        struct wdc_softc *wdc = chp->ch_wdc;
1.137     bouyer    659:        static int inited = 0;
1.32      bouyer    660:
1.137     bouyer    661:        if (chp->ch_flags & WDCF_DISABLED)
                    662:                return;
1.74      enami     663:
1.137     bouyer    664:        /* initialise global data */
                    665:        callout_init(&chp->ch_callout);
1.169     thorpej   666:        if (wdc->drv_probe == NULL)
                    667:                wdc->drv_probe = wdc_drvprobe;
1.137     bouyer    668:        if (inited == 0) {
1.165     thorpej   669:                /* Initialize the ata_xfer pool. */
                    670:                pool_init(&wdc_xfer_pool, sizeof(struct ata_xfer), 0,
1.137     bouyer    671:                    0, 0, "wdcspl", NULL);
                    672:                inited++;
1.133     bouyer    673:        }
1.165     thorpej   674:        TAILQ_INIT(&chp->ch_queue->queue_xfer);
1.148     bouyer    675:        chp->ch_queue->queue_freeze = 0;
1.126     enami     676:
1.169     thorpej   677:        chp->atabus = config_found(&wdc->sc_dev, chp, atabusprint);
1.74      enami     678: }
                    679:
1.163     thorpej   680: int
                    681: wdcactivate(struct device *self, enum devact act)
1.137     bouyer    682: {
                    683:        struct wdc_softc *wdc = (struct wdc_softc *)self;
                    684:        int s, i, error = 0;
                    685:
                    686:        s = splbio();
                    687:        switch (act) {
                    688:        case DVACT_ACTIVATE:
                    689:                error = EOPNOTSUPP;
                    690:                break;
                    691:
                    692:        case DVACT_DEACTIVATE:
                    693:                for (i = 0; i < wdc->nchannels; i++) {
                    694:                        error = config_deactivate(wdc->channels[i]->atabus);
                    695:                        if (error)
                    696:                                break;
                    697:                }
                    698:                break;
                    699:        }
                    700:        splx(s);
                    701:        return (error);
                    702: }
                    703:
                    704: int
1.163     thorpej   705: wdcdetach(struct device *self, int flags)
1.137     bouyer    706: {
                    707:        struct wdc_softc *wdc = (struct wdc_softc *)self;
1.168     thorpej   708:        struct wdc_channel *chp;
1.137     bouyer    709:        int i, error = 0;
                    710:
                    711:        for (i = 0; i < wdc->nchannels; i++) {
                    712:                chp = wdc->channels[i];
                    713:                WDCDEBUG_PRINT(("wdcdetach: %s: detaching %s\n",
                    714:                    wdc->sc_dev.dv_xname, chp->atabus->dv_xname), DEBUG_DETACH);
                    715:                error = config_detach(chp->atabus, flags);
                    716:                if (error)
                    717:                        break;
                    718:        }
                    719:        return (error);
                    720: }
                    721:
1.31      bouyer    722: /*
                    723:  * Start I/O on a controller, for the given channel.
                    724:  * The first xfer may be not for our channel if the channel queues
                    725:  * are shared.
                    726:  */
                    727: void
1.168     thorpej   728: wdcstart(struct wdc_channel *chp)
1.31      bouyer    729: {
1.169     thorpej   730:        struct wdc_softc *wdc = chp->ch_wdc;
1.165     thorpej   731:        struct ata_xfer *xfer;
1.38      bouyer    732:
                    733: #ifdef WDC_DIAGNOSTIC
                    734:        int spl1, spl2;
                    735:
                    736:        spl1 = splbio();
                    737:        spl2 = splbio();
                    738:        if (spl2 != spl1) {
                    739:                printf("wdcstart: not at splbio()\n");
                    740:                panic("wdcstart");
                    741:        }
                    742:        splx(spl2);
                    743:        splx(spl1);
                    744: #endif /* WDC_DIAGNOSTIC */
1.12      cgd       745:
1.31      bouyer    746:        /* is there a xfer ? */
1.165     thorpej   747:        if ((xfer = TAILQ_FIRST(&chp->ch_queue->queue_xfer)) == NULL)
1.31      bouyer    748:                return;
1.47      bouyer    749:
                    750:        /* adjust chp, in case we have a shared queue */
1.165     thorpej   751:        chp = xfer->c_chp;
1.47      bouyer    752:
1.31      bouyer    753:        if ((chp->ch_flags & WDCF_ACTIVE) != 0 ) {
                    754:                return; /* channel aleady active */
                    755:        }
1.148     bouyer    756:        if (__predict_false(chp->ch_queue->queue_freeze > 0)) {
1.147     bouyer    757:                return; /* queue froozen */
1.137     bouyer    758:        }
1.31      bouyer    759: #ifdef DIAGNOSTIC
                    760:        if ((chp->ch_flags & WDCF_IRQ_WAIT) != 0)
1.118     provos    761:                panic("wdcstart: channel waiting for irq");
1.31      bouyer    762: #endif
1.169     thorpej   763:        if (wdc->cap & WDC_CAPABILITY_HWLOCK)
                    764:                if (!(*wdc->claim_hw)(chp, 0))
1.31      bouyer    765:                        return;
1.12      cgd       766:
1.31      bouyer    767:        WDCDEBUG_PRINT(("wdcstart: xfer %p channel %d drive %d\n", xfer,
1.169     thorpej   768:            chp->ch_channel, xfer->c_drive), DEBUG_XFERS);
1.31      bouyer    769:        chp->ch_flags |= WDCF_ACTIVE;
1.165     thorpej   770:        if (chp->ch_drive[xfer->c_drive].drive_flags & DRIVE_RESET) {
                    771:                chp->ch_drive[xfer->c_drive].drive_flags &= ~DRIVE_RESET;
                    772:                chp->ch_drive[xfer->c_drive].state = 0;
1.37      bouyer    773:        }
1.169     thorpej   774:        if (wdc->cap & WDC_CAPABILITY_NOIRQ)
1.98      bjh21     775:                KASSERT(xfer->c_flags & C_POLL);
1.31      bouyer    776:        xfer->c_start(chp, xfer);
                    777: }
1.2       bouyer    778:
1.31      bouyer    779: /* restart an interrupted I/O */
                    780: void
1.163     thorpej   781: wdcrestart(void *v)
1.31      bouyer    782: {
1.168     thorpej   783:        struct wdc_channel *chp = v;
1.31      bouyer    784:        int s;
1.2       bouyer    785:
1.31      bouyer    786:        s = splbio();
1.45      drochner  787:        wdcstart(chp);
1.31      bouyer    788:        splx(s);
1.2       bouyer    789: }
1.31      bouyer    790:
1.2       bouyer    791:
1.31      bouyer    792: /*
                    793:  * Interrupt routine for the controller.  Acknowledge the interrupt, check for
                    794:  * errors on the current operation, mark it done if necessary, and start the
                    795:  * next request.  Also check for a partially done transfer, and continue with
                    796:  * the next chunk if so.
                    797:  */
1.12      cgd       798: int
1.163     thorpej   799: wdcintr(void *arg)
1.12      cgd       800: {
1.168     thorpej   801:        struct wdc_channel *chp = arg;
1.169     thorpej   802:        struct wdc_softc *wdc = chp->ch_wdc;
1.165     thorpej   803:        struct ata_xfer *xfer;
1.76      bouyer    804:        int ret;
1.12      cgd       805:
1.169     thorpej   806:        if ((wdc->sc_dev.dv_flags & DVF_ACTIVE) == 0) {
1.80      enami     807:                WDCDEBUG_PRINT(("wdcintr: deactivated controller\n"),
                    808:                    DEBUG_INTR);
                    809:                return (0);
                    810:        }
1.31      bouyer    811:        if ((chp->ch_flags & WDCF_IRQ_WAIT) == 0) {
                    812:                WDCDEBUG_PRINT(("wdcintr: inactive controller\n"), DEBUG_INTR);
1.113     bouyer    813:                /* try to clear the pending interrupt anyway */
1.157     fvdl      814:                (void)bus_space_read_1(chp->cmd_iot,
                    815:                    chp->cmd_iohs[wd_status], 0);
1.80      enami     816:                return (0);
1.31      bouyer    817:        }
1.12      cgd       818:
1.31      bouyer    819:        WDCDEBUG_PRINT(("wdcintr\n"), DEBUG_INTR);
1.165     thorpej   820:        xfer = TAILQ_FIRST(&chp->ch_queue->queue_xfer);
1.84      bouyer    821:        if (chp->ch_flags & WDCF_DMA_WAIT) {
1.169     thorpej   822:                wdc->dma_status =
                    823:                    (*wdc->dma_finish)(wdc->dma_arg, chp->ch_channel,
1.165     thorpej   824:                        xfer->c_drive, 0);
1.169     thorpej   825:                if (wdc->dma_status & WDC_DMAST_NOIRQ) {
1.84      bouyer    826:                        /* IRQ not for us, not detected by DMA engine */
                    827:                        return 0;
                    828:                }
                    829:                chp->ch_flags &= ~WDCF_DMA_WAIT;
                    830:        }
1.31      bouyer    831:        chp->ch_flags &= ~WDCF_IRQ_WAIT;
1.76      bouyer    832:        ret = xfer->c_intr(chp, xfer, 1);
                    833:        if (ret == 0) /* irq was not for us, still waiting for irq */
                    834:                chp->ch_flags |= WDCF_IRQ_WAIT;
                    835:        return (ret);
1.12      cgd       836: }
                    837:
1.31      bouyer    838: /* Put all disk in RESET state */
1.125     mycroft   839: void
1.163     thorpej   840: wdc_reset_channel(struct ata_drive_datas *drvp, int flags)
1.2       bouyer    841: {
1.168     thorpej   842:        struct wdc_channel *chp = drvp->chnl_softc;
1.169     thorpej   843:        struct wdc_softc *wdc = chp->ch_wdc;
1.2       bouyer    844:        int drive;
1.163     thorpej   845:
1.34      bouyer    846:        WDCDEBUG_PRINT(("ata_reset_channel %s:%d for drive %d\n",
1.169     thorpej   847:            wdc->sc_dev.dv_xname, chp->ch_channel, drvp->drive),
1.34      bouyer    848:            DEBUG_FUNCS);
1.147     bouyer    849:        if ((flags & AT_POLL) == 0) {
1.153     bouyer    850:                if (chp->ch_flags & WDCF_TH_RESET) {
                    851:                        /* no need to schedule a reset more than one time */
                    852:                        return;
                    853:                }
1.137     bouyer    854:                chp->ch_flags |= WDCF_TH_RESET;
1.148     bouyer    855:                chp->ch_queue->queue_freeze++;
1.170     thorpej   856:                wakeup(&chp->ch_thread);
1.137     bouyer    857:                return;
                    858:        }
1.147     bouyer    859:        (void) wdcreset(chp, RESET_POLL);
1.31      bouyer    860:        for (drive = 0; drive < 2; drive++) {
                    861:                chp->ch_drive[drive].state = 0;
1.12      cgd       862:        }
1.31      bouyer    863: }
1.12      cgd       864:
1.31      bouyer    865: int
1.168     thorpej   866: wdcreset(struct wdc_channel *chp, int poll)
1.31      bouyer    867: {
1.169     thorpej   868:        struct wdc_softc *wdc = chp->ch_wdc;
1.31      bouyer    869:        int drv_mask1, drv_mask2;
1.156     bouyer    870:        int s = 0;
1.2       bouyer    871:
1.169     thorpej   872:        if (wdc->cap & WDC_CAPABILITY_SELECT)
                    873:                wdc->select(chp,0);
1.156     bouyer    874:        if (poll != RESET_SLEEP)
                    875:                s = splbio();
1.157     fvdl      876:        /* master */
                    877:        bus_space_write_1(chp->cmd_iot, chp->cmd_iohs[wd_sdh], 0, WDSD_IBM);
1.131     mycroft   878:        delay(10);      /* 400ns delay */
1.31      bouyer    879:        bus_space_write_1(chp->ctl_iot, chp->ctl_ioh, wd_aux_ctlr,
1.131     mycroft   880:            WDCTL_RST | WDCTL_IDS | WDCTL_4BIT);
                    881:        delay(2000);
1.157     fvdl      882:        (void) bus_space_read_1(chp->cmd_iot, chp->cmd_iohs[wd_error], 0);
1.137     bouyer    883:        bus_space_write_1(chp->ctl_iot, chp->ctl_ioh, wd_aux_ctlr,
                    884:            WDCTL_4BIT | WDCTL_IDS);
1.131     mycroft   885:        delay(10);      /* 400ns delay */
1.156     bouyer    886:        if (poll != RESET_SLEEP) {
1.169     thorpej   887:                if (wdc->cap & WDC_CAPABILITY_IRQACK)
                    888:                        wdc->irqack(chp);
1.156     bouyer    889:                splx(s);
                    890:        }
1.2       bouyer    891:
1.31      bouyer    892:        drv_mask1 = (chp->ch_drive[0].drive_flags & DRIVE) ? 0x01:0x00;
                    893:        drv_mask1 |= (chp->ch_drive[1].drive_flags & DRIVE) ? 0x02:0x00;
1.137     bouyer    894:        drv_mask2 = __wdcwait_reset(chp, drv_mask1,
                    895:            (poll == RESET_SLEEP) ? 0 : 1);
                    896:        if (drv_mask2 != drv_mask1) {
1.31      bouyer    897:                printf("%s channel %d: reset failed for",
1.169     thorpej   898:                    wdc->sc_dev.dv_xname, chp->ch_channel);
1.31      bouyer    899:                if ((drv_mask1 & 0x01) != 0 && (drv_mask2 & 0x01) == 0)
                    900:                        printf(" drive 0");
                    901:                if ((drv_mask1 & 0x02) != 0 && (drv_mask2 & 0x02) == 0)
                    902:                        printf(" drive 1");
                    903:                printf("\n");
                    904:        }
1.137     bouyer    905:        bus_space_write_1(chp->ctl_iot, chp->ctl_ioh, wd_aux_ctlr, WDCTL_4BIT);
1.31      bouyer    906:        return  (drv_mask1 != drv_mask2) ? 1 : 0;
                    907: }
                    908:
                    909: static int
1.168     thorpej   910: __wdcwait_reset(struct wdc_channel *chp, int drv_mask, int poll)
1.31      bouyer    911: {
1.169     thorpej   912:        struct wdc_softc *wdc = chp->ch_wdc;
1.137     bouyer    913:        int timeout, nloop;
1.149     bouyer    914:        u_int8_t st0 = 0, st1 = 0;
1.70      bouyer    915: #ifdef WDCDEBUG
1.146     christos  916:        u_int8_t sc0 = 0, sn0 = 0, cl0 = 0, ch0 = 0;
                    917:        u_int8_t sc1 = 0, sn1 = 0, cl1 = 0, ch1 = 0;
1.70      bouyer    918: #endif
1.137     bouyer    919:
                    920:        if (poll)
                    921:                nloop = WDCNDELAY_RST;
                    922:        else
                    923:                nloop = WDC_RESET_WAIT * hz / 1000;
1.31      bouyer    924:        /* wait for BSY to deassert */
1.137     bouyer    925:        for (timeout = 0; timeout < nloop; timeout++) {
1.169     thorpej   926:                if (wdc && wdc->cap & WDC_CAPABILITY_SELECT)
                    927:                        wdc->select(chp,0);
1.157     fvdl      928:                bus_space_write_1(chp->cmd_iot, chp->cmd_iohs[wd_sdh], 0,
1.31      bouyer    929:                    WDSD_IBM); /* master */
1.65      bouyer    930:                delay(10);
1.157     fvdl      931:                st0 = bus_space_read_1(chp->cmd_iot,
                    932:                    chp->cmd_iohs[wd_status], 0);
1.70      bouyer    933: #ifdef WDCDEBUG
1.157     fvdl      934:                sc0 = bus_space_read_1(chp->cmd_iot,
                    935:                    chp->cmd_iohs[wd_seccnt], 0);
                    936:                sn0 = bus_space_read_1(chp->cmd_iot,
                    937:                    chp->cmd_iohs[wd_sector], 0);
                    938:                cl0 = bus_space_read_1(chp->cmd_iot,
                    939:                    chp->cmd_iohs[wd_cyl_lo], 0);
                    940:                ch0 = bus_space_read_1(chp->cmd_iot,
                    941:                    chp->cmd_iohs[wd_cyl_hi], 0);
1.70      bouyer    942: #endif
1.169     thorpej   943:                if (wdc && wdc->cap & WDC_CAPABILITY_SELECT)
                    944:                        wdc->select(chp,1);
1.157     fvdl      945:                bus_space_write_1(chp->cmd_iot, chp->cmd_iohs[wd_sdh], 0,
1.31      bouyer    946:                    WDSD_IBM | 0x10); /* slave */
1.65      bouyer    947:                delay(10);
1.157     fvdl      948:                st1 = bus_space_read_1(chp->cmd_iot,
                    949:                    chp->cmd_iohs[wd_status], 0);
1.70      bouyer    950: #ifdef WDCDEBUG
1.157     fvdl      951:                sc1 = bus_space_read_1(chp->cmd_iot,
                    952:                    chp->cmd_iohs[wd_seccnt], 0);
                    953:                sn1 = bus_space_read_1(chp->cmd_iot,
                    954:                    chp->cmd_iohs[wd_sector], 0);
                    955:                cl1 = bus_space_read_1(chp->cmd_iot,
                    956:                    chp->cmd_iohs[wd_cyl_lo], 0);
                    957:                ch1 = bus_space_read_1(chp->cmd_iot,
                    958:                    chp->cmd_iohs[wd_cyl_hi], 0);
1.70      bouyer    959: #endif
1.31      bouyer    960:
                    961:                if ((drv_mask & 0x01) == 0) {
                    962:                        /* no master */
                    963:                        if ((drv_mask & 0x02) != 0 && (st1 & WDCS_BSY) == 0) {
                    964:                                /* No master, slave is ready, it's done */
1.65      bouyer    965:                                goto end;
1.31      bouyer    966:                        }
                    967:                } else if ((drv_mask & 0x02) == 0) {
                    968:                        /* no slave */
                    969:                        if ((drv_mask & 0x01) != 0 && (st0 & WDCS_BSY) == 0) {
                    970:                                /* No slave, master is ready, it's done */
1.65      bouyer    971:                                goto end;
1.31      bouyer    972:                        }
1.2       bouyer    973:                } else {
1.31      bouyer    974:                        /* Wait for both master and slave to be ready */
                    975:                        if ((st0 & WDCS_BSY) == 0 && (st1 & WDCS_BSY) == 0) {
1.65      bouyer    976:                                goto end;
1.2       bouyer    977:                        }
                    978:                }
1.137     bouyer    979:                if (poll)
                    980:                        delay(WDCDELAY);
                    981:                else
                    982:                        tsleep(&nloop, PRIBIO, "atarst", 1);
1.2       bouyer    983:        }
1.116     wiz       984:        /* Reset timed out. Maybe it's because drv_mask was not right */
1.31      bouyer    985:        if (st0 & WDCS_BSY)
                    986:                drv_mask &= ~0x01;
                    987:        if (st1 & WDCS_BSY)
                    988:                drv_mask &= ~0x02;
1.65      bouyer    989: end:
1.70      bouyer    990:        WDCDEBUG_PRINT(("%s:%d:0: after reset, sc=0x%x sn=0x%x "
                    991:            "cl=0x%x ch=0x%x\n",
1.169     thorpej   992:             wdc != NULL ? wdc->sc_dev.dv_xname : "wdcprobe",
                    993:             chp->ch_channel, sc0, sn0, cl0, ch0), DEBUG_PROBE);
1.70      bouyer    994:        WDCDEBUG_PRINT(("%s:%d:1: after reset, sc=0x%x sn=0x%x "
                    995:            "cl=0x%x ch=0x%x\n",
1.169     thorpej   996:             wdc != NULL ? wdc->sc_dev.dv_xname : "wdcprobe",
                    997:             chp->ch_channel, sc1, sn1, cl1, ch1), DEBUG_PROBE);
1.70      bouyer    998:
1.149     bouyer    999:        WDCDEBUG_PRINT(("%s:%d: wdcwait_reset() end, st0=0x%x st1=0x%x\n",
1.169     thorpej  1000:            wdc != NULL ? wdc->sc_dev.dv_xname : "wdcprobe", chp->ch_channel,
1.149     bouyer   1001:            st0, st1), DEBUG_PROBE);
1.65      bouyer   1002:
1.31      bouyer   1003:        return drv_mask;
1.2       bouyer   1004: }
                   1005:
                   1006: /*
1.31      bouyer   1007:  * Wait for a drive to be !BSY, and have mask in its status register.
                   1008:  * return -1 for a timeout after "timeout" ms.
1.2       bouyer   1009:  */
1.167     thorpej  1010: static int
1.168     thorpej  1011: __wdcwait(struct wdc_channel *chp, int mask, int bits, int timeout)
1.2       bouyer   1012: {
1.169     thorpej  1013:        struct wdc_softc *wdc = chp->ch_wdc;
1.31      bouyer   1014:        u_char status;
                   1015:        int time = 0;
1.60      abs      1016:
1.169     thorpej  1017:        WDCDEBUG_PRINT(("__wdcwait %s:%d\n", wdc != NULL ?
                   1018:                        wdc->sc_dev.dv_xname : "none",
                   1019:                        chp->ch_channel), DEBUG_STATUS);
1.31      bouyer   1020:        chp->ch_error = 0;
                   1021:
                   1022:        timeout = timeout * 1000 / WDCDELAY; /* delay uses microseconds */
1.2       bouyer   1023:
1.31      bouyer   1024:        for (;;) {
                   1025:                chp->ch_status = status =
1.157     fvdl     1026:                    bus_space_read_1(chp->cmd_iot, chp->cmd_iohs[wd_status], 0);
1.131     mycroft  1027:                if ((status & (WDCS_BSY | mask)) == bits)
1.31      bouyer   1028:                        break;
                   1029:                if (++time > timeout) {
1.137     bouyer   1030:                        WDCDEBUG_PRINT(("__wdcwait: timeout (time=%d), "
1.87      bouyer   1031:                            "status %x error %x (mask 0x%x bits 0x%x)\n",
                   1032:                            time, status,
1.157     fvdl     1033:                            bus_space_read_1(chp->cmd_iot,
                   1034:                                chp->cmd_iohs[wd_error], 0), mask, bits),
1.87      bouyer   1035:                            DEBUG_STATUS | DEBUG_PROBE | DEBUG_DELAY);
1.137     bouyer   1036:                        return(WDCWAIT_TOUT);
1.31      bouyer   1037:                }
                   1038:                delay(WDCDELAY);
1.2       bouyer   1039:        }
1.87      bouyer   1040: #ifdef WDCDEBUG
                   1041:        if (time > 0 && (wdcdebug_mask & DEBUG_DELAY))
1.137     bouyer   1042:                printf("__wdcwait: did busy-wait, time=%d\n", time);
1.87      bouyer   1043: #endif
1.31      bouyer   1044:        if (status & WDCS_ERR)
1.157     fvdl     1045:                chp->ch_error = bus_space_read_1(chp->cmd_iot,
                   1046:                    chp->cmd_iohs[wd_error], 0);
1.31      bouyer   1047: #ifdef WDCNDELAY_DEBUG
                   1048:        /* After autoconfig, there should be no long delays. */
                   1049:        if (!cold && time > WDCNDELAY_DEBUG) {
1.165     thorpej  1050:                struct ata_xfer *xfer = TAILQ_FIRST(&chp->ch_queue->queue_xfer);
1.31      bouyer   1051:                if (xfer == NULL)
                   1052:                        printf("%s channel %d: warning: busy-wait took %dus\n",
1.169     thorpej  1053:                            wdc->sc_dev.dv_xname, chp->ch_channel,
1.31      bouyer   1054:                            WDCDELAY * time);
                   1055:                else
                   1056:                        printf("%s:%d:%d: warning: busy-wait took %dus\n",
1.169     thorpej  1057:                            wdc->sc_dev.dv_xname, chp->ch_channel,
1.31      bouyer   1058:                            xfer->drive,
                   1059:                            WDCDELAY * time);
1.2       bouyer   1060:        }
                   1061: #endif
1.137     bouyer   1062:        return(WDCWAIT_OK);
                   1063: }
                   1064:
                   1065: /*
                   1066:  * Call __wdcwait(), polling using tsleep() or waking up the kernel
                   1067:  * thread if possible
                   1068:  */
                   1069: int
1.168     thorpej  1070: wdcwait(struct wdc_channel *chp, int mask, int bits, int timeout, int flags)
1.137     bouyer   1071: {
                   1072:        int error, i, timeout_hz = mstohz(timeout);
                   1073:
                   1074:        if (timeout_hz == 0 ||
                   1075:            (flags & (AT_WAIT | AT_POLL)) == AT_POLL)
                   1076:                error = __wdcwait(chp, mask, bits, timeout);
                   1077:        else {
                   1078:                error = __wdcwait(chp, mask, bits, WDCDELAY_POLL);
                   1079:                if (error != 0) {
1.147     bouyer   1080:                        if ((chp->ch_flags & WDCF_TH_RUN) ||
                   1081:                            (flags & AT_WAIT)) {
1.137     bouyer   1082:                                /*
1.147     bouyer   1083:                                 * we're running in the channel thread
                   1084:                                 * or some userland thread context
1.137     bouyer   1085:                                 */
                   1086:                                for (i = 0; i < timeout_hz; i++) {
                   1087:                                        if (__wdcwait(chp, mask, bits,
                   1088:                                            WDCDELAY_POLL) == 0) {
                   1089:                                                error = 0;
                   1090:                                                break;
                   1091:                                        }
                   1092:                                        tsleep(&chp, PRIBIO, "atapoll", 1);
                   1093:                                }
                   1094:                        } else {
                   1095:                                /*
                   1096:                                 * we're probably in interrupt context,
                   1097:                                 * ask the thread to come back here
                   1098:                                 */
1.147     bouyer   1099: #ifdef DIAGNOSTIC
1.148     bouyer   1100:                                if (chp->ch_queue->queue_freeze > 0)
                   1101:                                        panic("wdcwait: queue_freeze");
1.147     bouyer   1102: #endif
1.148     bouyer   1103:                                chp->ch_queue->queue_freeze++;
1.170     thorpej  1104:                                wakeup(&chp->ch_thread);
1.137     bouyer   1105:                                return(WDCWAIT_THR);
                   1106:                        }
                   1107:                }
                   1108:        }
1.163     thorpej  1109:        return (error);
1.2       bouyer   1110: }
                   1111:
1.137     bouyer   1112:
1.84      bouyer   1113: /*
                   1114:  * Busy-wait for DMA to complete
                   1115:  */
                   1116: int
1.168     thorpej  1117: wdc_dmawait(struct wdc_channel *chp, struct ata_xfer *xfer, int timeout)
1.84      bouyer   1118: {
1.169     thorpej  1119:        struct wdc_softc *wdc = chp->ch_wdc;
1.84      bouyer   1120:        int time;
1.169     thorpej  1121:
1.84      bouyer   1122:        for (time = 0;  time < timeout * 1000 / WDCDELAY; time++) {
1.169     thorpej  1123:                wdc->dma_status =
                   1124:                    (*wdc->dma_finish)(wdc->dma_arg,
                   1125:                        chp->ch_channel, xfer->c_drive, 0);
                   1126:                if ((wdc->dma_status & WDC_DMAST_NOIRQ) == 0)
1.84      bouyer   1127:                        return 0;
                   1128:                delay(WDCDELAY);
                   1129:        }
                   1130:        /* timeout, force a DMA halt */
1.169     thorpej  1131:        wdc->dma_status = (*wdc->dma_finish)(wdc->dma_arg,
                   1132:            chp->ch_channel, xfer->c_drive, 1);
1.84      bouyer   1133:        return 1;
                   1134: }
                   1135:
1.31      bouyer   1136: void
1.163     thorpej  1137: wdctimeout(void *arg)
1.2       bouyer   1138: {
1.168     thorpej  1139:        struct wdc_channel *chp = (struct wdc_channel *)arg;
1.169     thorpej  1140:        struct wdc_softc *wdc = chp->ch_wdc;
1.165     thorpej  1141:        struct ata_xfer *xfer = TAILQ_FIRST(&chp->ch_queue->queue_xfer);
1.31      bouyer   1142:        int s;
1.2       bouyer   1143:
1.31      bouyer   1144:        WDCDEBUG_PRINT(("wdctimeout\n"), DEBUG_FUNCS);
                   1145:
                   1146:        s = splbio();
                   1147:        if ((chp->ch_flags & WDCF_IRQ_WAIT) != 0) {
                   1148:                __wdcerror(chp, "lost interrupt");
1.88      mrg      1149:                printf("\ttype: %s tc_bcount: %d tc_skip: %d\n",
                   1150:                    (xfer->c_flags & C_ATAPI) ?  "atapi" : "ata",
                   1151:                    xfer->c_bcount,
                   1152:                    xfer->c_skip);
1.84      bouyer   1153:                if (chp->ch_flags & WDCF_DMA_WAIT) {
1.169     thorpej  1154:                        wdc->dma_status =
                   1155:                            (*wdc->dma_finish)(wdc->dma_arg,
                   1156:                                chp->ch_channel, xfer->c_drive, 1);
1.84      bouyer   1157:                        chp->ch_flags &= ~WDCF_DMA_WAIT;
                   1158:                }
1.31      bouyer   1159:                /*
1.119     drochner 1160:                 * Call the interrupt routine. If we just missed an interrupt,
1.31      bouyer   1161:                 * it will do what's needed. Else, it will take the needed
                   1162:                 * action (reset the device).
1.70      bouyer   1163:                 * Before that we need to reinstall the timeout callback,
                   1164:                 * in case it will miss another irq while in this transfer
                   1165:                 * We arbitray chose it to be 1s
1.31      bouyer   1166:                 */
1.81      thorpej  1167:                callout_reset(&chp->ch_callout, hz, wdctimeout, chp);
1.31      bouyer   1168:                xfer->c_flags |= C_TIMEOU;
                   1169:                chp->ch_flags &= ~WDCF_IRQ_WAIT;
1.66      bouyer   1170:                xfer->c_intr(chp, xfer, 1);
1.31      bouyer   1171:        } else
                   1172:                __wdcerror(chp, "missing untimeout");
                   1173:        splx(s);
1.2       bouyer   1174: }
                   1175:
1.31      bouyer   1176: /*
1.152     wiz      1177:  * Probe drive's capabilities, for use by the controller later
1.31      bouyer   1178:  * Assumes drvp points to an existing drive.
                   1179:  * XXX this should be a controller-indep function
                   1180:  */
1.2       bouyer   1181: void
1.163     thorpej  1182: wdc_probe_caps(struct ata_drive_datas *drvp)
1.2       bouyer   1183: {
1.31      bouyer   1184:        struct ataparams params, params2;
1.168     thorpej  1185:        struct wdc_channel *chp = drvp->chnl_softc;
1.169     thorpej  1186:        struct wdc_softc *wdc = chp->ch_wdc;
1.31      bouyer   1187:        struct device *drv_dev = drvp->drv_softc;
                   1188:        int i, printed;
                   1189:        char *sep = "";
1.48      bouyer   1190:        int cf_flags;
1.31      bouyer   1191:
1.125     mycroft  1192:        if (ata_get_params(drvp, AT_WAIT, &params) != CMD_OK) {
1.31      bouyer   1193:                /* IDENTIFY failed. Can't tell more about the device */
1.2       bouyer   1194:                return;
                   1195:        }
1.31      bouyer   1196:        if ((wdc->cap & (WDC_CAPABILITY_DATA16 | WDC_CAPABILITY_DATA32)) ==
                   1197:            (WDC_CAPABILITY_DATA16 | WDC_CAPABILITY_DATA32)) {
1.2       bouyer   1198:                /*
1.39      bouyer   1199:                 * Controller claims 16 and 32 bit transfers.
                   1200:                 * Re-do an IDENTIFY with 32-bit transfers,
1.31      bouyer   1201:                 * and compare results.
1.2       bouyer   1202:                 */
1.31      bouyer   1203:                drvp->drive_flags |= DRIVE_CAP32;
1.125     mycroft  1204:                ata_get_params(drvp, AT_WAIT, &params2);
1.31      bouyer   1205:                if (memcmp(&params, &params2, sizeof(struct ataparams)) != 0) {
                   1206:                        /* Not good. fall back to 16bits */
                   1207:                        drvp->drive_flags &= ~DRIVE_CAP32;
                   1208:                } else {
1.125     mycroft  1209:                        aprint_normal("%s: 32-bit data port\n",
1.123     thorpej  1210:                            drv_dev->dv_xname);
1.2       bouyer   1211:                }
                   1212:        }
1.55      bouyer   1213: #if 0 /* Some ultra-DMA drives claims to only support ATA-3. sigh */
                   1214:        if (params.atap_ata_major > 0x01 &&
                   1215:            params.atap_ata_major != 0xffff) {
                   1216:                for (i = 14; i > 0; i--) {
                   1217:                        if (params.atap_ata_major & (1 << i)) {
1.125     mycroft  1218:                                aprint_normal("%s: ATA version %d\n",
                   1219:                                    drv_dev->dv_xname, i);
1.55      bouyer   1220:                                drvp->ata_vers = i;
                   1221:                                break;
                   1222:                        }
                   1223:                }
1.125     mycroft  1224:        }
1.55      bouyer   1225: #endif
1.2       bouyer   1226:
1.31      bouyer   1227:        /* An ATAPI device is at last PIO mode 3 */
                   1228:        if (drvp->drive_flags & DRIVE_ATAPI)
                   1229:                drvp->PIO_mode = 3;
1.2       bouyer   1230:
                   1231:        /*
1.31      bouyer   1232:         * It's not in the specs, but it seems that some drive
                   1233:         * returns 0xffff in atap_extensions when this field is invalid
1.2       bouyer   1234:         */
1.31      bouyer   1235:        if (params.atap_extensions != 0xffff &&
                   1236:            (params.atap_extensions & WDC_EXT_MODES)) {
                   1237:                printed = 0;
                   1238:                /*
                   1239:                 * XXX some drives report something wrong here (they claim to
                   1240:                 * support PIO mode 8 !). As mode is coded on 3 bits in
                   1241:                 * SET FEATURE, limit it to 7 (so limit i to 4).
1.116     wiz      1242:                 * If higher mode than 7 is found, abort.
1.31      bouyer   1243:                 */
1.39      bouyer   1244:                for (i = 7; i >= 0; i--) {
1.31      bouyer   1245:                        if ((params.atap_piomode_supp & (1 << i)) == 0)
                   1246:                                continue;
1.39      bouyer   1247:                        if (i > 4)
                   1248:                                return;
1.31      bouyer   1249:                        /*
                   1250:                         * See if mode is accepted.
                   1251:                         * If the controller can't set its PIO mode,
                   1252:                         * assume the defaults are good, so don't try
                   1253:                         * to set it
                   1254:                         */
                   1255:                        if ((wdc->cap & WDC_CAPABILITY_MODE) != 0)
1.137     bouyer   1256:                                /*
                   1257:                                 * It's OK to pool here, it's fast enouth
                   1258:                                 * to not bother waiting for interrupt
                   1259:                                 */
1.31      bouyer   1260:                                if (ata_set_mode(drvp, 0x08 | (i + 3),
1.125     mycroft  1261:                                   AT_WAIT) != CMD_OK)
1.2       bouyer   1262:                                        continue;
1.31      bouyer   1263:                        if (!printed) {
1.123     thorpej  1264:                                aprint_normal("%s: drive supports PIO mode %d",
1.39      bouyer   1265:                                    drv_dev->dv_xname, i + 3);
1.31      bouyer   1266:                                sep = ",";
                   1267:                                printed = 1;
                   1268:                        }
                   1269:                        /*
                   1270:                         * If controller's driver can't set its PIO mode,
                   1271:                         * get the highter one for the drive.
                   1272:                         */
                   1273:                        if ((wdc->cap & WDC_CAPABILITY_MODE) == 0 ||
1.52      bouyer   1274:                            wdc->PIO_cap >= i + 3) {
1.31      bouyer   1275:                                drvp->PIO_mode = i + 3;
1.48      bouyer   1276:                                drvp->PIO_cap = i + 3;
1.2       bouyer   1277:                                break;
                   1278:                        }
                   1279:                }
1.31      bouyer   1280:                if (!printed) {
                   1281:                        /*
                   1282:                         * We didn't find a valid PIO mode.
                   1283:                         * Assume the values returned for DMA are buggy too
                   1284:                         */
                   1285:                        return;
1.2       bouyer   1286:                }
1.35      bouyer   1287:                drvp->drive_flags |= DRIVE_MODE;
1.31      bouyer   1288:                printed = 0;
                   1289:                for (i = 7; i >= 0; i--) {
                   1290:                        if ((params.atap_dmamode_supp & (1 << i)) == 0)
                   1291:                                continue;
                   1292:                        if ((wdc->cap & WDC_CAPABILITY_DMA) &&
                   1293:                            (wdc->cap & WDC_CAPABILITY_MODE))
1.125     mycroft  1294:                                if (ata_set_mode(drvp, 0x20 | i, AT_WAIT)
1.31      bouyer   1295:                                    != CMD_OK)
                   1296:                                        continue;
                   1297:                        if (!printed) {
1.123     thorpej  1298:                                aprint_normal("%s DMA mode %d", sep, i);
1.31      bouyer   1299:                                sep = ",";
                   1300:                                printed = 1;
                   1301:                        }
                   1302:                        if (wdc->cap & WDC_CAPABILITY_DMA) {
                   1303:                                if ((wdc->cap & WDC_CAPABILITY_MODE) &&
1.52      bouyer   1304:                                    wdc->DMA_cap < i)
1.31      bouyer   1305:                                        continue;
                   1306:                                drvp->DMA_mode = i;
1.48      bouyer   1307:                                drvp->DMA_cap = i;
1.31      bouyer   1308:                                drvp->drive_flags |= DRIVE_DMA;
                   1309:                        }
1.2       bouyer   1310:                        break;
                   1311:                }
1.31      bouyer   1312:                if (params.atap_extensions & WDC_EXT_UDMA_MODES) {
1.71      bouyer   1313:                        printed = 0;
1.31      bouyer   1314:                        for (i = 7; i >= 0; i--) {
                   1315:                                if ((params.atap_udmamode_supp & (1 << i))
                   1316:                                    == 0)
                   1317:                                        continue;
                   1318:                                if ((wdc->cap & WDC_CAPABILITY_MODE) &&
                   1319:                                    (wdc->cap & WDC_CAPABILITY_UDMA))
                   1320:                                        if (ata_set_mode(drvp, 0x40 | i,
1.125     mycroft  1321:                                            AT_WAIT) != CMD_OK)
1.31      bouyer   1322:                                                continue;
1.71      bouyer   1323:                                if (!printed) {
1.123     thorpej  1324:                                        aprint_normal("%s Ultra-DMA mode %d",
                   1325:                                            sep, i);
1.93      wrstuden 1326:                                        if (i == 2)
1.123     thorpej  1327:                                                aprint_normal(" (Ultra/33)");
1.93      wrstuden 1328:                                        else if (i == 4)
1.123     thorpej  1329:                                                aprint_normal(" (Ultra/66)");
1.93      wrstuden 1330:                                        else if (i == 5)
1.123     thorpej  1331:                                                aprint_normal(" (Ultra/100)");
1.117     bouyer   1332:                                        else if (i == 6)
1.123     thorpej  1333:                                                aprint_normal(" (Ultra/133)");
1.71      bouyer   1334:                                        sep = ",";
                   1335:                                        printed = 1;
                   1336:                                }
1.31      bouyer   1337:                                if (wdc->cap & WDC_CAPABILITY_UDMA) {
1.50      bouyer   1338:                                        if ((wdc->cap & WDC_CAPABILITY_MODE) &&
1.52      bouyer   1339:                                            wdc->UDMA_cap < i)
1.50      bouyer   1340:                                                continue;
1.31      bouyer   1341:                                        drvp->UDMA_mode = i;
1.48      bouyer   1342:                                        drvp->UDMA_cap = i;
1.31      bouyer   1343:                                        drvp->drive_flags |= DRIVE_UDMA;
                   1344:                                }
                   1345:                                break;
                   1346:                        }
                   1347:                }
1.123     thorpej  1348:                aprint_normal("\n");
1.55      bouyer   1349:        }
                   1350:
                   1351:        /* Try to guess ATA version here, if it didn't get reported */
                   1352:        if (drvp->ata_vers == 0) {
                   1353:                if (drvp->drive_flags & DRIVE_UDMA)
                   1354:                        drvp->ata_vers = 4; /* should be at last ATA-4 */
                   1355:                else if (drvp->PIO_cap > 2)
                   1356:                        drvp->ata_vers = 2; /* should be at last ATA-2 */
1.48      bouyer   1357:        }
                   1358:        cf_flags = drv_dev->dv_cfdata->cf_flags;
                   1359:        if (cf_flags & ATA_CONFIG_PIO_SET) {
                   1360:                drvp->PIO_mode =
                   1361:                    (cf_flags & ATA_CONFIG_PIO_MODES) >> ATA_CONFIG_PIO_OFF;
                   1362:                drvp->drive_flags |= DRIVE_MODE;
                   1363:        }
                   1364:        if ((wdc->cap & WDC_CAPABILITY_DMA) == 0) {
                   1365:                /* don't care about DMA modes */
                   1366:                return;
                   1367:        }
                   1368:        if (cf_flags & ATA_CONFIG_DMA_SET) {
                   1369:                if ((cf_flags & ATA_CONFIG_DMA_MODES) ==
                   1370:                    ATA_CONFIG_DMA_DISABLE) {
                   1371:                        drvp->drive_flags &= ~DRIVE_DMA;
                   1372:                } else {
                   1373:                        drvp->DMA_mode = (cf_flags & ATA_CONFIG_DMA_MODES) >>
                   1374:                            ATA_CONFIG_DMA_OFF;
                   1375:                        drvp->drive_flags |= DRIVE_DMA | DRIVE_MODE;
                   1376:                }
1.101     bouyer   1377:        }
                   1378:        if ((wdc->cap & WDC_CAPABILITY_UDMA) == 0) {
                   1379:                /* don't care about UDMA modes */
                   1380:                return;
1.48      bouyer   1381:        }
                   1382:        if (cf_flags & ATA_CONFIG_UDMA_SET) {
                   1383:                if ((cf_flags & ATA_CONFIG_UDMA_MODES) ==
                   1384:                    ATA_CONFIG_UDMA_DISABLE) {
                   1385:                        drvp->drive_flags &= ~DRIVE_UDMA;
                   1386:                } else {
                   1387:                        drvp->UDMA_mode = (cf_flags & ATA_CONFIG_UDMA_MODES) >>
                   1388:                            ATA_CONFIG_UDMA_OFF;
                   1389:                        drvp->drive_flags |= DRIVE_UDMA | DRIVE_MODE;
                   1390:                }
1.2       bouyer   1391:        }
1.54      bouyer   1392: }
                   1393:
                   1394: /*
1.56      bouyer   1395:  * downgrade the transfer mode of a drive after an error. return 1 if
1.54      bouyer   1396:  * downgrade was possible, 0 otherwise.
                   1397:  */
                   1398: int
1.163     thorpej  1399: wdc_downgrade_mode(struct ata_drive_datas *drvp, int flags)
1.54      bouyer   1400: {
1.168     thorpej  1401:        struct wdc_channel *chp = drvp->chnl_softc;
1.169     thorpej  1402:        struct wdc_softc *wdc = chp->ch_wdc;
1.54      bouyer   1403:        struct device *drv_dev = drvp->drv_softc;
                   1404:        int cf_flags = drv_dev->dv_cfdata->cf_flags;
                   1405:
                   1406:        /* if drive or controller don't know its mode, we can't do much */
                   1407:        if ((drvp->drive_flags & DRIVE_MODE) == 0 ||
                   1408:            (wdc->cap & WDC_CAPABILITY_MODE) == 0)
                   1409:                return 0;
                   1410:        /* current drive mode was set by a config flag, let it this way */
                   1411:        if ((cf_flags & ATA_CONFIG_PIO_SET) ||
                   1412:            (cf_flags & ATA_CONFIG_DMA_SET) ||
                   1413:            (cf_flags & ATA_CONFIG_UDMA_SET))
                   1414:                return 0;
                   1415:
1.61      bouyer   1416:        /*
1.73      bouyer   1417:         * If we were using Ultra-DMA mode > 2, downgrade to mode 2 first.
                   1418:         * Maybe we didn't properly notice the cable type
1.78      bouyer   1419:         * If we were using Ultra-DMA mode 2, downgrade to mode 1 first.
                   1420:         * It helps in some cases.
1.73      bouyer   1421:         */
1.78      bouyer   1422:        if ((drvp->drive_flags & DRIVE_UDMA) && drvp->UDMA_mode >= 2) {
                   1423:                drvp->UDMA_mode = (drvp->UDMA_mode == 2) ? 1 : 2;
                   1424:                printf("%s: transfer error, downgrading to Ultra-DMA mode %d\n",
1.73      bouyer   1425:                    drv_dev->dv_xname, drvp->UDMA_mode);
                   1426:        }
                   1427:
                   1428:        /*
1.61      bouyer   1429:         * If we were using ultra-DMA, don't downgrade to multiword DMA
                   1430:         * if we noticed a CRC error. It has been noticed that CRC errors
                   1431:         * in ultra-DMA lead to silent data corruption in multiword DMA.
                   1432:         * Data corruption is less likely to occur in PIO mode.
                   1433:         */
1.73      bouyer   1434:        else if ((drvp->drive_flags & DRIVE_UDMA) &&
1.61      bouyer   1435:            (drvp->drive_flags & DRIVE_DMAERR) == 0) {
1.54      bouyer   1436:                drvp->drive_flags &= ~DRIVE_UDMA;
                   1437:                drvp->drive_flags |= DRIVE_DMA;
                   1438:                drvp->DMA_mode = drvp->DMA_cap;
1.56      bouyer   1439:                printf("%s: transfer error, downgrading to DMA mode %d\n",
1.54      bouyer   1440:                    drv_dev->dv_xname, drvp->DMA_mode);
1.61      bouyer   1441:        } else if (drvp->drive_flags & (DRIVE_DMA | DRIVE_UDMA)) {
                   1442:                drvp->drive_flags &= ~(DRIVE_DMA | DRIVE_UDMA);
1.54      bouyer   1443:                drvp->PIO_mode = drvp->PIO_cap;
1.56      bouyer   1444:                printf("%s: transfer error, downgrading to PIO mode %d\n",
1.54      bouyer   1445:                    drv_dev->dv_xname, drvp->PIO_mode);
                   1446:        } else /* already using PIO, can't downgrade */
                   1447:                return 0;
                   1448:
                   1449:        wdc->set_modes(chp);
1.137     bouyer   1450:        wdc_print_modes(chp);
                   1451:        /* reset the channel, which will shedule all drives for setup */
                   1452:        wdc_reset_channel(drvp, flags);
1.54      bouyer   1453:        return 1;
1.2       bouyer   1454: }
                   1455:
                   1456: int
1.163     thorpej  1457: wdc_exec_command(struct ata_drive_datas *drvp, struct wdc_command *wdc_c)
1.31      bouyer   1458: {
1.168     thorpej  1459:        struct wdc_channel *chp = drvp->chnl_softc;
1.169     thorpej  1460:        struct wdc_softc *wdc = chp->ch_wdc;
1.165     thorpej  1461:        struct ata_xfer *xfer;
1.31      bouyer   1462:        int s, ret;
1.2       bouyer   1463:
1.34      bouyer   1464:        WDCDEBUG_PRINT(("wdc_exec_command %s:%d:%d\n",
1.169     thorpej  1465:            wdc->sc_dev.dv_xname, chp->ch_channel, drvp->drive),
1.34      bouyer   1466:            DEBUG_FUNCS);
1.2       bouyer   1467:
1.31      bouyer   1468:        /* set up an xfer and queue. Wait for completion */
                   1469:        xfer = wdc_get_xfer(wdc_c->flags & AT_WAIT ? WDC_CANSLEEP :
                   1470:            WDC_NOSLEEP);
                   1471:        if (xfer == NULL) {
                   1472:                return WDC_TRY_AGAIN;
                   1473:         }
1.2       bouyer   1474:
1.169     thorpej  1475:        if (wdc->cap & WDC_CAPABILITY_NOIRQ)
1.98      bjh21    1476:                wdc_c->flags |= AT_POLL;
1.31      bouyer   1477:        if (wdc_c->flags & AT_POLL)
                   1478:                xfer->c_flags |= C_POLL;
1.165     thorpej  1479:        xfer->c_drive = drvp->drive;
                   1480:        xfer->c_databuf = wdc_c->data;
1.31      bouyer   1481:        xfer->c_bcount = wdc_c->bcount;
1.165     thorpej  1482:        xfer->c_cmd = wdc_c;
1.31      bouyer   1483:        xfer->c_start = __wdccommand_start;
                   1484:        xfer->c_intr = __wdccommand_intr;
1.75      enami    1485:        xfer->c_kill_xfer = __wdccommand_done;
1.2       bouyer   1486:
1.31      bouyer   1487:        s = splbio();
                   1488:        wdc_exec_xfer(chp, xfer);
                   1489: #ifdef DIAGNOSTIC
                   1490:        if ((wdc_c->flags & AT_POLL) != 0 &&
                   1491:            (wdc_c->flags & AT_DONE) == 0)
1.118     provos   1492:                panic("wdc_exec_command: polled command not done");
1.2       bouyer   1493: #endif
1.31      bouyer   1494:        if (wdc_c->flags & AT_DONE) {
                   1495:                ret = WDC_COMPLETE;
                   1496:        } else {
                   1497:                if (wdc_c->flags & AT_WAIT) {
1.69      bouyer   1498:                        while ((wdc_c->flags & AT_DONE) == 0) {
                   1499:                                tsleep(wdc_c, PRIBIO, "wdccmd", 0);
                   1500:                        }
1.31      bouyer   1501:                        ret = WDC_COMPLETE;
                   1502:                } else {
                   1503:                        ret = WDC_QUEUED;
1.2       bouyer   1504:                }
                   1505:        }
1.31      bouyer   1506:        splx(s);
                   1507:        return ret;
1.2       bouyer   1508: }
                   1509:
1.167     thorpej  1510: static void
1.168     thorpej  1511: __wdccommand_start(struct wdc_channel *chp, struct ata_xfer *xfer)
1.31      bouyer   1512: {
1.169     thorpej  1513:        struct wdc_softc *wdc = chp->ch_wdc;
1.165     thorpej  1514:        int drive = xfer->c_drive;
                   1515:        struct wdc_command *wdc_c = xfer->c_cmd;
1.31      bouyer   1516:
1.34      bouyer   1517:        WDCDEBUG_PRINT(("__wdccommand_start %s:%d:%d\n",
1.169     thorpej  1518:            wdc->sc_dev.dv_xname, chp->ch_channel, xfer->c_drive),
1.34      bouyer   1519:            DEBUG_FUNCS);
1.31      bouyer   1520:
1.169     thorpej  1521:        if (wdc->cap & WDC_CAPABILITY_SELECT)
                   1522:                wdc->select(chp,drive);
1.157     fvdl     1523:        bus_space_write_1(chp->cmd_iot, chp->cmd_iohs[wd_sdh], 0,
1.31      bouyer   1524:            WDSD_IBM | (drive << 4));
1.137     bouyer   1525:        switch(wdcwait(chp, wdc_c->r_st_bmask | WDCS_DRQ,
                   1526:            wdc_c->r_st_bmask, wdc_c->timeout, wdc_c->flags)) {
                   1527:        case WDCWAIT_OK:
                   1528:                break;
                   1529:        case WDCWAIT_TOUT:
1.31      bouyer   1530:                wdc_c->flags |= AT_TIMEOU;
                   1531:                __wdccommand_done(chp, xfer);
1.53      bouyer   1532:                return;
1.137     bouyer   1533:        case WDCWAIT_THR:
                   1534:                return;
1.31      bouyer   1535:        }
1.135     bouyer   1536:        if (wdc_c->flags & AT_POLL) {
                   1537:                /* polled command, disable interrupts */
                   1538:                bus_space_write_1(chp->ctl_iot, chp->ctl_ioh, wd_aux_ctlr,
                   1539:                    WDCTL_4BIT | WDCTL_IDS);
                   1540:        }
1.31      bouyer   1541:        wdccommand(chp, drive, wdc_c->r_command, wdc_c->r_cyl, wdc_c->r_head,
                   1542:            wdc_c->r_sector, wdc_c->r_count, wdc_c->r_precomp);
1.139     bouyer   1543:
1.31      bouyer   1544:        if ((wdc_c->flags & AT_POLL) == 0) {
                   1545:                chp->ch_flags |= WDCF_IRQ_WAIT; /* wait for interrupt */
1.81      thorpej  1546:                callout_reset(&chp->ch_callout, wdc_c->timeout / 1000 * hz,
                   1547:                    wdctimeout, chp);
1.31      bouyer   1548:                return;
1.2       bouyer   1549:        }
                   1550:        /*
1.31      bouyer   1551:         * Polled command. Wait for drive ready or drq. Done in intr().
                   1552:         * Wait for at last 400ns for status bit to be valid.
1.2       bouyer   1553:         */
1.134     mycroft  1554:        delay(10);      /* 400ns delay */
1.66      bouyer   1555:        __wdccommand_intr(chp, xfer, 0);
1.2       bouyer   1556: }
                   1557:
1.167     thorpej  1558: static int
1.168     thorpej  1559: __wdccommand_intr(struct wdc_channel *chp, struct ata_xfer *xfer, int irq)
1.2       bouyer   1560: {
1.169     thorpej  1561:        struct wdc_softc *wdc = chp->ch_wdc;
1.165     thorpej  1562:        struct wdc_command *wdc_c = xfer->c_cmd;
1.31      bouyer   1563:        int bcount = wdc_c->bcount;
                   1564:        char *data = wdc_c->data;
1.137     bouyer   1565:        int wflags;
                   1566:
                   1567:        if ((wdc_c->flags & (AT_WAIT | AT_POLL)) == (AT_WAIT | AT_POLL)) {
                   1568:                /* both wait and poll, we can tsleep here */
1.147     bouyer   1569:                wflags = AT_WAIT | AT_POLL;
1.137     bouyer   1570:        } else {
                   1571:                wflags = AT_POLL;
                   1572:        }
1.31      bouyer   1573:
1.163     thorpej  1574:  again:
1.34      bouyer   1575:        WDCDEBUG_PRINT(("__wdccommand_intr %s:%d:%d\n",
1.169     thorpej  1576:            wdc->sc_dev.dv_xname, chp->ch_channel, xfer->c_drive),
1.165     thorpej  1577:            DEBUG_INTR);
1.137     bouyer   1578:        /*
                   1579:         * after a ATAPI_SOFT_RESET, the device will have released the bus.
                   1580:         * Reselect again, it doesn't hurt for others commands, and the time
                   1581:         * penalty for the extra regiter write is acceptable,
                   1582:         * wdc_exec_command() isn't called often (mosly for autoconfig)
                   1583:         */
1.157     fvdl     1584:        bus_space_write_1(chp->cmd_iot, chp->cmd_iohs[wd_sdh], 0,
1.165     thorpej  1585:            WDSD_IBM | (xfer->c_drive << 4));
1.114     bouyer   1586:        if ((wdc_c->flags & AT_XFDONE) != 0) {
                   1587:                /*
                   1588:                 * We have completed a data xfer. The drive should now be
                   1589:                 * in its initial state
                   1590:                 */
                   1591:                if (wdcwait(chp, wdc_c->r_st_bmask | WDCS_DRQ,
1.137     bouyer   1592:                    wdc_c->r_st_bmask, (irq == 0)  ? wdc_c->timeout : 0,
                   1593:                    wflags) ==  WDCWAIT_TOUT) {
1.114     bouyer   1594:                        if (irq && (xfer->c_flags & C_TIMEOU) == 0)
                   1595:                                return 0; /* IRQ was not for us */
                   1596:                        wdc_c->flags |= AT_TIMEOU;
                   1597:                }
1.131     mycroft  1598:                goto out;
1.114     bouyer   1599:        }
1.31      bouyer   1600:        if (wdcwait(chp, wdc_c->r_st_pmask, wdc_c->r_st_pmask,
1.137     bouyer   1601:             (irq == 0)  ? wdc_c->timeout : 0, wflags) == WDCWAIT_TOUT) {
1.66      bouyer   1602:                if (irq && (xfer->c_flags & C_TIMEOU) == 0)
1.63      bouyer   1603:                        return 0; /* IRQ was not for us */
                   1604:                wdc_c->flags |= AT_TIMEOU;
1.131     mycroft  1605:                goto out;
1.2       bouyer   1606:        }
1.169     thorpej  1607:        if (wdc->cap & WDC_CAPABILITY_IRQACK)
                   1608:                wdc->irqack(chp);
1.31      bouyer   1609:        if (wdc_c->flags & AT_READ) {
1.131     mycroft  1610:                if ((chp->ch_status & WDCS_DRQ) == 0) {
                   1611:                        wdc_c->flags |= AT_TIMEOU;
                   1612:                        goto out;
                   1613:                }
1.165     thorpej  1614:                if (chp->ch_drive[xfer->c_drive].drive_flags & DRIVE_CAP32) {
1.31      bouyer   1615:                        bus_space_read_multi_4(chp->data32iot, chp->data32ioh,
                   1616:                            0, (u_int32_t*)data, bcount >> 2);
                   1617:                        data += bcount & 0xfffffffc;
                   1618:                        bcount = bcount & 0x03;
                   1619:                }
                   1620:                if (bcount > 0)
1.157     fvdl     1621:                        bus_space_read_multi_2(chp->cmd_iot,
                   1622:                            chp->cmd_iohs[wd_data], 0,
                   1623:                            (u_int16_t *)data, bcount >> 1);
1.114     bouyer   1624:                /* at this point the drive should be in its initial state */
                   1625:                wdc_c->flags |= AT_XFDONE;
1.137     bouyer   1626:                /* XXX should read status register here ? */
1.131     mycroft  1627:        } else if (wdc_c->flags & AT_WRITE) {
                   1628:                if ((chp->ch_status & WDCS_DRQ) == 0) {
1.114     bouyer   1629:                        wdc_c->flags |= AT_TIMEOU;
1.131     mycroft  1630:                        goto out;
                   1631:                }
1.165     thorpej  1632:                if (chp->ch_drive[xfer->c_drive].drive_flags & DRIVE_CAP32) {
1.31      bouyer   1633:                        bus_space_write_multi_4(chp->data32iot, chp->data32ioh,
                   1634:                            0, (u_int32_t*)data, bcount >> 2);
                   1635:                        data += bcount & 0xfffffffc;
                   1636:                        bcount = bcount & 0x03;
                   1637:                }
                   1638:                if (bcount > 0)
1.157     fvdl     1639:                        bus_space_write_multi_2(chp->cmd_iot,
                   1640:                            chp->cmd_iohs[wd_data], 0,
                   1641:                            (u_int16_t *)data, bcount >> 1);
1.114     bouyer   1642:                wdc_c->flags |= AT_XFDONE;
                   1643:                if ((wdc_c->flags & AT_POLL) == 0) {
                   1644:                        chp->ch_flags |= WDCF_IRQ_WAIT; /* wait for interrupt */
                   1645:                        callout_reset(&chp->ch_callout,
                   1646:                            wdc_c->timeout / 1000 * hz, wdctimeout, chp);
                   1647:                        return 1;
                   1648:                } else {
                   1649:                        goto again;
                   1650:                }
1.2       bouyer   1651:        }
1.163     thorpej  1652:  out:
1.31      bouyer   1653:        __wdccommand_done(chp, xfer);
                   1654:        return 1;
1.2       bouyer   1655: }
                   1656:
1.167     thorpej  1657: static void
1.168     thorpej  1658: __wdccommand_done(struct wdc_channel *chp, struct ata_xfer *xfer)
1.2       bouyer   1659: {
1.169     thorpej  1660:        struct wdc_softc *wdc = chp->ch_wdc;
1.165     thorpej  1661:        struct wdc_command *wdc_c = xfer->c_cmd;
1.2       bouyer   1662:
1.34      bouyer   1663:        WDCDEBUG_PRINT(("__wdccommand_done %s:%d:%d\n",
1.169     thorpej  1664:            wdc->sc_dev.dv_xname, chp->ch_channel, xfer->c_drive),
1.165     thorpej  1665:            DEBUG_FUNCS);
1.70      bouyer   1666:
1.81      thorpej  1667:        callout_stop(&chp->ch_callout);
1.70      bouyer   1668:
1.31      bouyer   1669:        if (chp->ch_status & WDCS_DWF)
                   1670:                wdc_c->flags |= AT_DF;
                   1671:        if (chp->ch_status & WDCS_ERR) {
                   1672:                wdc_c->flags |= AT_ERROR;
                   1673:                wdc_c->r_error = chp->ch_error;
                   1674:        }
                   1675:        wdc_c->flags |= AT_DONE;
1.80      enami    1676:        if ((wdc_c->flags & AT_READREG) != 0 &&
1.169     thorpej  1677:            (wdc->sc_dev.dv_flags & DVF_ACTIVE) != 0 &&
1.75      enami    1678:            (wdc_c->flags & (AT_ERROR | AT_DF)) == 0) {
1.157     fvdl     1679:                wdc_c->r_head = bus_space_read_1(chp->cmd_iot,
                   1680:                    chp->cmd_iohs[wd_sdh], 0);
                   1681:                wdc_c->r_cyl = bus_space_read_1(chp->cmd_iot,
                   1682:                    chp->cmd_iohs[wd_cyl_hi], 0) << 8;
                   1683:                wdc_c->r_cyl |= bus_space_read_1(chp->cmd_iot,
                   1684:                    chp->cmd_iohs[wd_cyl_lo], 0);
                   1685:                wdc_c->r_sector = bus_space_read_1(chp->cmd_iot,
                   1686:                    chp->cmd_iohs[wd_sector], 0);
                   1687:                wdc_c->r_count = bus_space_read_1(chp->cmd_iot,
                   1688:                    chp->cmd_iohs[wd_seccnt], 0);
                   1689:                wdc_c->r_error = bus_space_read_1(chp->cmd_iot,
                   1690:                    chp->cmd_iohs[wd_error], 0);
                   1691:                wdc_c->r_precomp = bus_space_read_1(chp->cmd_iot,
                   1692:                    chp->cmd_iohs[wd_precomp], 0);
1.135     bouyer   1693:        }
1.137     bouyer   1694:
1.135     bouyer   1695:        if (wdc_c->flags & AT_POLL) {
                   1696:                /* enable interrupts */
                   1697:                bus_space_write_1(chp->ctl_iot, chp->ctl_ioh, wd_aux_ctlr,
                   1698:                    WDCTL_4BIT);
1.46      kenh     1699:        }
1.31      bouyer   1700:        wdc_free_xfer(chp, xfer);
1.71      bouyer   1701:        if (wdc_c->flags & AT_WAIT)
                   1702:                wakeup(wdc_c);
                   1703:        else if (wdc_c->callback)
                   1704:                wdc_c->callback(wdc_c->callback_arg);
1.45      drochner 1705:        wdcstart(chp);
1.31      bouyer   1706:        return;
1.2       bouyer   1707: }
                   1708:
                   1709: /*
1.31      bouyer   1710:  * Send a command. The drive should be ready.
1.2       bouyer   1711:  * Assumes interrupts are blocked.
                   1712:  */
1.31      bouyer   1713: void
1.168     thorpej  1714: wdccommand(struct wdc_channel *chp, u_int8_t drive, u_int8_t command,
1.163     thorpej  1715:     u_int16_t cylin, u_int8_t head, u_int8_t sector, u_int8_t count,
                   1716:     u_int8_t precomp)
1.31      bouyer   1717: {
1.169     thorpej  1718:        struct wdc_softc *wdc = chp->ch_wdc;
1.163     thorpej  1719:
1.31      bouyer   1720:        WDCDEBUG_PRINT(("wdccommand %s:%d:%d: command=0x%x cylin=%d head=%d "
1.169     thorpej  1721:            "sector=%d count=%d precomp=%d\n", wdc->sc_dev.dv_xname,
                   1722:            chp->ch_channel, drive, command, cylin, head, sector, count,
                   1723:            precomp), DEBUG_FUNCS);
1.31      bouyer   1724:
1.169     thorpej  1725:        if (wdc->cap & WDC_CAPABILITY_SELECT)
                   1726:                wdc->select(chp,drive);
1.107     dbj      1727:
1.31      bouyer   1728:        /* Select drive, head, and addressing mode. */
1.157     fvdl     1729:        bus_space_write_1(chp->cmd_iot, chp->cmd_iohs[wd_sdh], 0,
1.31      bouyer   1730:            WDSD_IBM | (drive << 4) | head);
                   1731:        /* Load parameters. wd_features(ATA/ATAPI) = wd_precomp(ST506) */
1.157     fvdl     1732:        bus_space_write_1(chp->cmd_iot, chp->cmd_iohs[wd_precomp], 0,
1.31      bouyer   1733:            precomp);
1.157     fvdl     1734:        bus_space_write_1(chp->cmd_iot, chp->cmd_iohs[wd_cyl_lo], 0, cylin);
                   1735:        bus_space_write_1(chp->cmd_iot, chp->cmd_iohs[wd_cyl_hi],
                   1736:            0, cylin >> 8);
                   1737:        bus_space_write_1(chp->cmd_iot, chp->cmd_iohs[wd_sector], 0, sector);
                   1738:        bus_space_write_1(chp->cmd_iot, chp->cmd_iohs[wd_seccnt], 0, count);
1.108     christos 1739:
                   1740:        /* Send command. */
1.157     fvdl     1741:        bus_space_write_1(chp->cmd_iot, chp->cmd_iohs[wd_command], 0, command);
1.108     christos 1742:        return;
                   1743: }
                   1744:
                   1745: /*
                   1746:  * Send a 48-bit addressing command. The drive should be ready.
                   1747:  * Assumes interrupts are blocked.
                   1748:  */
                   1749: void
1.168     thorpej  1750: wdccommandext(struct wdc_channel *chp, u_int8_t drive, u_int8_t command,
1.163     thorpej  1751:     u_int64_t blkno, u_int16_t count)
1.108     christos 1752: {
1.169     thorpej  1753:        struct wdc_softc *wdc = chp->ch_wdc;
1.163     thorpej  1754:
1.108     christos 1755:        WDCDEBUG_PRINT(("wdccommandext %s:%d:%d: command=0x%x blkno=%d "
1.169     thorpej  1756:            "count=%d\n", wdc->sc_dev.dv_xname,
                   1757:            chp->ch_channel, drive, command, (u_int32_t) blkno, count),
1.108     christos 1758:            DEBUG_FUNCS);
                   1759:
1.169     thorpej  1760:        if (wdc->cap & WDC_CAPABILITY_SELECT)
                   1761:                wdc->select(chp,drive);
1.108     christos 1762:
                   1763:        /* Select drive, head, and addressing mode. */
1.157     fvdl     1764:        bus_space_write_1(chp->cmd_iot, chp->cmd_iohs[wd_sdh], 0,
1.108     christos 1765:            (drive << 4) | WDSD_LBA);
                   1766:
                   1767:        /* previous */
1.157     fvdl     1768:        bus_space_write_1(chp->cmd_iot, chp->cmd_iohs[wd_features], 0, 0);
                   1769:        bus_space_write_1(chp->cmd_iot, chp->cmd_iohs[wd_seccnt],
                   1770:            0, count >> 8);
                   1771:        bus_space_write_1(chp->cmd_iot, chp->cmd_iohs[wd_lba_hi],
                   1772:            0, blkno >> 40);
                   1773:        bus_space_write_1(chp->cmd_iot, chp->cmd_iohs[wd_lba_mi],
                   1774:            0, blkno >> 32);
                   1775:        bus_space_write_1(chp->cmd_iot, chp->cmd_iohs[wd_lba_lo],
                   1776:            0, blkno >> 24);
1.108     christos 1777:
                   1778:        /* current */
1.157     fvdl     1779:        bus_space_write_1(chp->cmd_iot, chp->cmd_iohs[wd_features], 0, 0);
                   1780:        bus_space_write_1(chp->cmd_iot, chp->cmd_iohs[wd_seccnt], 0, count);
                   1781:        bus_space_write_1(chp->cmd_iot, chp->cmd_iohs[wd_lba_hi],
                   1782:            0, blkno >> 16);
                   1783:        bus_space_write_1(chp->cmd_iot, chp->cmd_iohs[wd_lba_mi],
                   1784:            0, blkno >> 8);
                   1785:        bus_space_write_1(chp->cmd_iot, chp->cmd_iohs[wd_lba_lo], 0, blkno);
1.2       bouyer   1786:
1.31      bouyer   1787:        /* Send command. */
1.157     fvdl     1788:        bus_space_write_1(chp->cmd_iot, chp->cmd_iohs[wd_command], 0, command);
1.31      bouyer   1789:        return;
1.2       bouyer   1790: }
                   1791:
                   1792: /*
1.31      bouyer   1793:  * Simplified version of wdccommand().  Unbusy/ready/drq must be
                   1794:  * tested by the caller.
1.2       bouyer   1795:  */
1.31      bouyer   1796: void
1.168     thorpej  1797: wdccommandshort(struct wdc_channel *chp, int drive, int command)
1.2       bouyer   1798: {
1.169     thorpej  1799:        struct wdc_softc *wdc = chp->ch_wdc;
1.2       bouyer   1800:
1.31      bouyer   1801:        WDCDEBUG_PRINT(("wdccommandshort %s:%d:%d command 0x%x\n",
1.169     thorpej  1802:            wdc->sc_dev.dv_xname, chp->ch_channel, drive, command),
1.31      bouyer   1803:            DEBUG_FUNCS);
1.107     dbj      1804:
1.169     thorpej  1805:        if (wdc->cap & WDC_CAPABILITY_SELECT)
                   1806:                wdc->select(chp,drive);
1.2       bouyer   1807:
1.31      bouyer   1808:        /* Select drive. */
1.157     fvdl     1809:        bus_space_write_1(chp->cmd_iot, chp->cmd_iohs[wd_sdh], 0,
1.31      bouyer   1810:            WDSD_IBM | (drive << 4));
1.2       bouyer   1811:
1.157     fvdl     1812:        bus_space_write_1(chp->cmd_iot, chp->cmd_iohs[wd_command], 0, command);
1.31      bouyer   1813: }
1.2       bouyer   1814:
1.31      bouyer   1815: /* Add a command to the queue and start controller. Must be called at splbio */
1.2       bouyer   1816: void
1.168     thorpej  1817: wdc_exec_xfer(struct wdc_channel *chp, struct ata_xfer *xfer)
1.2       bouyer   1818: {
1.163     thorpej  1819:
1.33      bouyer   1820:        WDCDEBUG_PRINT(("wdc_exec_xfer %p channel %d drive %d\n", xfer,
1.169     thorpej  1821:            chp->ch_channel, xfer->c_drive), DEBUG_XFERS);
1.2       bouyer   1822:
1.31      bouyer   1823:        /* complete xfer setup */
1.165     thorpej  1824:        xfer->c_chp = chp;
1.2       bouyer   1825:
1.31      bouyer   1826:        /*
                   1827:         * If we are a polled command, and the list is not empty,
                   1828:         * we are doing a dump. Drop the list to allow the polled command
                   1829:         * to complete, we're going to reboot soon anyway.
                   1830:         */
                   1831:        if ((xfer->c_flags & C_POLL) != 0 &&
1.165     thorpej  1832:            TAILQ_FIRST(&chp->ch_queue->queue_xfer) != NULL) {
                   1833:                TAILQ_INIT(&chp->ch_queue->queue_xfer);
1.31      bouyer   1834:        }
1.2       bouyer   1835:        /* insert at the end of command list */
1.165     thorpej  1836:        TAILQ_INSERT_TAIL(&chp->ch_queue->queue_xfer, xfer, c_xferchain);
1.31      bouyer   1837:        WDCDEBUG_PRINT(("wdcstart from wdc_exec_xfer, flags 0x%x\n",
1.33      bouyer   1838:            chp->ch_flags), DEBUG_XFERS);
1.45      drochner 1839:        wdcstart(chp);
1.31      bouyer   1840: }
1.2       bouyer   1841:
1.165     thorpej  1842: struct ata_xfer *
1.163     thorpej  1843: wdc_get_xfer(int flags)
1.2       bouyer   1844: {
1.165     thorpej  1845:        struct ata_xfer *xfer;
1.72      bouyer   1846:        int s;
1.2       bouyer   1847:
1.72      bouyer   1848:        s = splbio();
1.71      bouyer   1849:        xfer = pool_get(&wdc_xfer_pool,
                   1850:            ((flags & WDC_NOSLEEP) != 0 ? PR_NOWAIT : PR_WAITOK));
1.72      bouyer   1851:        splx(s);
1.99      chs      1852:        if (xfer != NULL) {
1.165     thorpej  1853:                memset(xfer, 0, sizeof(struct ata_xfer));
1.99      chs      1854:        }
1.2       bouyer   1855:        return xfer;
                   1856: }
                   1857:
                   1858: void
1.168     thorpej  1859: wdc_free_xfer(struct wdc_channel *chp, struct ata_xfer *xfer)
1.2       bouyer   1860: {
1.169     thorpej  1861:        struct wdc_softc *wdc = chp->ch_wdc;
1.2       bouyer   1862:        int s;
                   1863:
1.31      bouyer   1864:        if (wdc->cap & WDC_CAPABILITY_HWLOCK)
                   1865:                (*wdc->free_hw)(chp);
1.2       bouyer   1866:        s = splbio();
1.31      bouyer   1867:        chp->ch_flags &= ~WDCF_ACTIVE;
1.165     thorpej  1868:        TAILQ_REMOVE(&chp->ch_queue->queue_xfer, xfer, c_xferchain);
1.72      bouyer   1869:        pool_put(&wdc_xfer_pool, xfer);
1.2       bouyer   1870:        splx(s);
1.75      enami    1871: }
                   1872:
                   1873: /*
1.168     thorpej  1874:  * Kill off all pending xfers for a wdc_channel.
1.75      enami    1875:  *
                   1876:  * Must be called at splbio().
                   1877:  */
                   1878: void
1.168     thorpej  1879: wdc_kill_pending(struct wdc_channel *chp)
1.75      enami    1880: {
1.165     thorpej  1881:        struct ata_xfer *xfer;
1.75      enami    1882:
1.165     thorpej  1883:        while ((xfer = TAILQ_FIRST(&chp->ch_queue->queue_xfer)) != NULL) {
                   1884:                chp = xfer->c_chp;
1.75      enami    1885:                (*xfer->c_kill_xfer)(chp, xfer);
                   1886:        }
1.2       bouyer   1887: }
                   1888:
1.31      bouyer   1889: static void
1.168     thorpej  1890: __wdcerror(struct wdc_channel *chp, char *msg)
1.2       bouyer   1891: {
1.169     thorpej  1892:        struct wdc_softc *wdc = chp->ch_wdc;
1.165     thorpej  1893:        struct ata_xfer *xfer = TAILQ_FIRST(&chp->ch_queue->queue_xfer);
1.88      mrg      1894:
1.2       bouyer   1895:        if (xfer == NULL)
1.169     thorpej  1896:                printf("%s:%d: %s\n", wdc->sc_dev.dv_xname, chp->ch_channel,
1.31      bouyer   1897:                    msg);
1.2       bouyer   1898:        else
1.169     thorpej  1899:                printf("%s:%d:%d: %s\n", wdc->sc_dev.dv_xname,
                   1900:                    chp->ch_channel, xfer->c_drive, msg);
1.2       bouyer   1901: }
                   1902:
                   1903: /*
                   1904:  * the bit bucket
                   1905:  */
                   1906: void
1.168     thorpej  1907: wdcbit_bucket(struct wdc_channel *chp, int size)
1.2       bouyer   1908: {
                   1909:
1.12      cgd      1910:        for (; size >= 2; size -= 2)
1.157     fvdl     1911:                (void)bus_space_read_2(chp->cmd_iot, chp->cmd_iohs[wd_data], 0);
1.12      cgd      1912:        if (size)
1.157     fvdl     1913:                (void)bus_space_read_1(chp->cmd_iot, chp->cmd_iohs[wd_data], 0);
1.44      thorpej  1914: }
                   1915:
                   1916: int
1.168     thorpej  1917: wdc_addref(struct wdc_channel *chp)
1.44      thorpej  1918: {
1.169     thorpej  1919:        struct wdc_softc *wdc = chp->ch_wdc;
1.96      bouyer   1920:        struct scsipi_adapter *adapt = &wdc->sc_atapi_adapter._generic;
1.44      thorpej  1921:        int s, error = 0;
                   1922:
                   1923:        s = splbio();
1.96      bouyer   1924:        if (adapt->adapt_refcnt++ == 0 &&
                   1925:            adapt->adapt_enable != NULL) {
                   1926:                error = (*adapt->adapt_enable)(&wdc->sc_dev, 1);
1.44      thorpej  1927:                if (error)
1.96      bouyer   1928:                        adapt->adapt_refcnt--;
1.44      thorpej  1929:        }
                   1930:        splx(s);
                   1931:        return (error);
                   1932: }
                   1933:
                   1934: void
1.168     thorpej  1935: wdc_delref(struct wdc_channel *chp)
1.44      thorpej  1936: {
1.169     thorpej  1937:        struct wdc_softc *wdc = chp->ch_wdc;
1.96      bouyer   1938:        struct scsipi_adapter *adapt = &wdc->sc_atapi_adapter._generic;
1.44      thorpej  1939:        int s;
                   1940:
                   1941:        s = splbio();
1.96      bouyer   1942:        if (adapt->adapt_refcnt-- == 1 &&
                   1943:            adapt->adapt_enable != NULL)
                   1944:                (void) (*adapt->adapt_enable)(&wdc->sc_dev, 0);
1.44      thorpej  1945:        splx(s);
1.93      wrstuden 1946: }
                   1947:
                   1948: void
1.168     thorpej  1949: wdc_print_modes(struct wdc_channel *chp)
1.93      wrstuden 1950: {
1.169     thorpej  1951:        struct wdc_softc *wdc = chp->ch_wdc;
1.93      wrstuden 1952:        int drive;
                   1953:        struct ata_drive_datas *drvp;
                   1954:
                   1955:        for (drive = 0; drive < 2; drive++) {
                   1956:                drvp = &chp->ch_drive[drive];
                   1957:                if ((drvp->drive_flags & DRIVE) == 0)
                   1958:                        continue;
1.123     thorpej  1959:                aprint_normal("%s(%s:%d:%d): using PIO mode %d",
1.93      wrstuden 1960:                        drvp->drv_softc->dv_xname,
1.169     thorpej  1961:                        wdc->sc_dev.dv_xname,
                   1962:                        chp->ch_channel, drive, drvp->PIO_mode);
1.93      wrstuden 1963:                if (drvp->drive_flags & DRIVE_DMA)
1.123     thorpej  1964:                        aprint_normal(", DMA mode %d", drvp->DMA_mode);
1.93      wrstuden 1965:                if (drvp->drive_flags & DRIVE_UDMA) {
1.123     thorpej  1966:                        aprint_normal(", Ultra-DMA mode %d", drvp->UDMA_mode);
1.93      wrstuden 1967:                        if (drvp->UDMA_mode == 2)
1.123     thorpej  1968:                                aprint_normal(" (Ultra/33)");
1.93      wrstuden 1969:                        else if (drvp->UDMA_mode == 4)
1.123     thorpej  1970:                                aprint_normal(" (Ultra/66)");
1.93      wrstuden 1971:                        else if (drvp->UDMA_mode == 5)
1.123     thorpej  1972:                                aprint_normal(" (Ultra/100)");
                   1973:                        else if (drvp->UDMA_mode == 6)
                   1974:                                aprint_normal(" (Ultra/133)");
1.93      wrstuden 1975:                }
                   1976:                if (drvp->drive_flags & (DRIVE_DMA | DRIVE_UDMA))
1.123     thorpej  1977:                        aprint_normal(" (using DMA data transfers)");
                   1978:                aprint_normal("\n");
1.93      wrstuden 1979:        }
1.2       bouyer   1980: }

CVSweb <webmaster@jp.NetBSD.org>