Annotation of src/sys/dev/ic/ncr53c9x.c, Revision 1.28
1.28 ! thorpej 1: /* $NetBSD: ncr53c9x.c,v 1.27 1998/08/15 10:51:18 mycroft Exp $ */
1.1 thorpej 2:
1.27 mycroft 3: /*-
4: * Copyright (c) 1998 The NetBSD Foundation, Inc.
5: * All rights reserved.
6: *
7: * This code is derived from software contributed to The NetBSD Foundation
8: * by Charles M. Hannum.
1.1 thorpej 9: *
10: * Redistribution and use in source and binary forms, with or without
11: * modification, are permitted provided that the following conditions
12: * are met:
13: * 1. Redistributions of source code must retain the above copyright
14: * notice, this list of conditions and the following disclaimer.
15: * 2. Redistributions in binary form must reproduce the above copyright
16: * notice, this list of conditions and the following disclaimer in the
17: * documentation and/or other materials provided with the distribution.
18: * 3. All advertising materials mentioning features or use of this software
19: * must display the following acknowledgement:
1.27 mycroft 20: * This product includes software developed by the NetBSD
21: * Foundation, Inc. and its contributors.
22: * 4. Neither the name of The NetBSD Foundation nor the names of its
23: * contributors may be used to endorse or promote products derived
24: * from this software without specific prior written permission.
1.1 thorpej 25: *
1.27 mycroft 26: * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
27: * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
28: * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
29: * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
30: * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
31: * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
32: * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
33: * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
34: * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
35: * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
36: * POSSIBILITY OF SUCH DAMAGE.
1.1 thorpej 37: */
38:
39: /*
40: * Copyright (c) 1994 Peter Galbavy
41: * Copyright (c) 1995 Paul Kranenburg
42: * All rights reserved.
43: *
44: * Redistribution and use in source and binary forms, with or without
45: * modification, are permitted provided that the following conditions
46: * are met:
47: * 1. Redistributions of source code must retain the above copyright
48: * notice, this list of conditions and the following disclaimer.
49: * 2. Redistributions in binary form must reproduce the above copyright
50: * notice, this list of conditions and the following disclaimer in the
51: * documentation and/or other materials provided with the distribution.
52: * 3. All advertising materials mentioning features or use of this software
53: * must display the following acknowledgement:
54: * This product includes software developed by Peter Galbavy
55: * 4. The name of the author may not be used to endorse or promote products
56: * derived from this software without specific prior written permission.
57: *
58: * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
59: * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
60: * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
61: * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
62: * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
63: * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
64: * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
65: * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
66: * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
67: * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
68: * POSSIBILITY OF SUCH DAMAGE.
69: */
70:
71: /*
72: * Based on aic6360 by Jarle Greipsland
73: *
74: * Acknowledgements: Many of the algorithms used in this driver are
75: * inspired by the work of Julian Elischer (julian@tfs.com) and
76: * Charles Hannum (mycroft@duality.gnu.ai.mit.edu). Thanks a million!
77: */
78:
79: #include <sys/types.h>
80: #include <sys/param.h>
81: #include <sys/systm.h>
82: #include <sys/kernel.h>
83: #include <sys/errno.h>
84: #include <sys/ioctl.h>
85: #include <sys/device.h>
86: #include <sys/buf.h>
1.24 pk 87: #include <sys/malloc.h>
1.1 thorpej 88: #include <sys/proc.h>
89: #include <sys/user.h>
90: #include <sys/queue.h>
91:
1.18 bouyer 92: #include <dev/scsipi/scsi_all.h>
93: #include <dev/scsipi/scsipi_all.h>
94: #include <dev/scsipi/scsiconf.h>
95: #include <dev/scsipi/scsi_message.h>
1.1 thorpej 96:
97: #include <machine/cpu.h>
98:
99: #include <dev/ic/ncr53c9xreg.h>
100: #include <dev/ic/ncr53c9xvar.h>
101:
102: int ncr53c9x_debug = 0; /*NCR_SHOWPHASE|NCR_SHOWMISC|NCR_SHOWTRAC|NCR_SHOWCMDS;*/
103:
104: /*static*/ void ncr53c9x_readregs __P((struct ncr53c9x_softc *));
105: /*static*/ void ncr53c9x_select __P((struct ncr53c9x_softc *,
106: struct ncr53c9x_ecb *));
107: /*static*/ int ncr53c9x_reselect __P((struct ncr53c9x_softc *, int));
108: /*static*/ void ncr53c9x_scsi_reset __P((struct ncr53c9x_softc *));
109: /*static*/ void ncr53c9x_init __P((struct ncr53c9x_softc *, int));
110: /*static*/ int ncr53c9x_poll __P((struct ncr53c9x_softc *,
1.18 bouyer 111: struct scsipi_xfer *, int));
1.1 thorpej 112: /*static*/ void ncr53c9x_sched __P((struct ncr53c9x_softc *));
113: /*static*/ void ncr53c9x_done __P((struct ncr53c9x_softc *,
114: struct ncr53c9x_ecb *));
115: /*static*/ void ncr53c9x_msgin __P((struct ncr53c9x_softc *));
116: /*static*/ void ncr53c9x_msgout __P((struct ncr53c9x_softc *));
117: /*static*/ void ncr53c9x_timeout __P((void *arg));
118: /*static*/ void ncr53c9x_abort __P((struct ncr53c9x_softc *,
119: struct ncr53c9x_ecb *));
120: /*static*/ void ncr53c9x_dequeue __P((struct ncr53c9x_softc *,
121: struct ncr53c9x_ecb *));
122:
123: void ncr53c9x_sense __P((struct ncr53c9x_softc *,
124: struct ncr53c9x_ecb *));
125: void ncr53c9x_free_ecb __P((struct ncr53c9x_softc *,
126: struct ncr53c9x_ecb *, int));
127: struct ncr53c9x_ecb *ncr53c9x_get_ecb __P((struct ncr53c9x_softc *, int));
128:
129: static inline int ncr53c9x_stp2cpb __P((struct ncr53c9x_softc *, int));
130: static inline void ncr53c9x_setsync __P((struct ncr53c9x_softc *,
131: struct ncr53c9x_tinfo *));
132:
133: /*
134: * Names for the NCR53c9x variants, correspnding to the variant tags
135: * in ncr53c9xvar.h.
136: */
137: const char *ncr53c9x_variant_names[] = {
138: "ESP100",
139: "ESP100A",
140: "ESP200",
141: "NCR53C94",
1.2 briggs 142: "NCR53C96",
1.10 pk 143: "ESP406",
144: "FAS408",
1.20 mhitch 145: "FAS216",
1.1 thorpej 146: };
147:
148: /*
149: * Attach this instance, and then all the sub-devices
150: */
151: void
1.28 ! thorpej 152: ncr53c9x_attach(sc, dev)
1.1 thorpej 153: struct ncr53c9x_softc *sc;
1.18 bouyer 154: struct scsipi_device *dev;
1.1 thorpej 155: {
156:
157: /*
1.24 pk 158: * Allocate SCSI message buffers.
159: * Front-ends can override allocation to avoid alignment
160: * handling in the DMA engines. Note that that ncr53c9x_msgout()
161: * can request a 1 byte DMA transfer.
162: */
163: if (sc->sc_omess == NULL)
164: sc->sc_omess = malloc(NCR_MAX_MSG_LEN, M_DEVBUF, M_NOWAIT);
165:
166: if (sc->sc_imess == NULL)
167: sc->sc_imess = malloc(NCR_MAX_MSG_LEN+1, M_DEVBUF, M_NOWAIT);
168:
169: if (sc->sc_omess == NULL || sc->sc_imess == NULL) {
170: printf("out of memory\n");
171: return;
172: }
173:
174: /*
1.1 thorpej 175: * Note, the front-end has set us up to print the chip variation.
176: */
177: if (sc->sc_rev >= NCR_VARIANT_MAX) {
178: printf("\n%s: unknown variant %d, devices not attached\n",
179: sc->sc_dev.dv_xname, sc->sc_rev);
180: return;
181: }
182:
183: printf(": %s, %dMHz, SCSI ID %d\n",
184: ncr53c9x_variant_names[sc->sc_rev], sc->sc_freq, sc->sc_id);
185:
186: sc->sc_ccf = FREQTOCCF(sc->sc_freq);
187:
188: /* The value *must not* be == 1. Make it 2 */
189: if (sc->sc_ccf == 1)
190: sc->sc_ccf = 2;
191:
192: /*
193: * The recommended timeout is 250ms. This register is loaded
194: * with a value calculated as follows, from the docs:
195: *
196: * (timout period) x (CLK frequency)
197: * reg = -------------------------------------
198: * 8192 x (Clock Conversion Factor)
199: *
200: * Since CCF has a linear relation to CLK, this generally computes
201: * to the constant of 153.
202: */
203: sc->sc_timeout = ((250 * 1000) * sc->sc_freq) / (8192 * sc->sc_ccf);
204:
205: /* CCF register only has 3 bits; 0 is actually 8 */
206: sc->sc_ccf &= 7;
207:
208: /* Reset state & bus */
1.16 pk 209: sc->sc_cfflags = sc->sc_dev.dv_cfdata->cf_flags;
1.1 thorpej 210: sc->sc_state = 0;
211: ncr53c9x_init(sc, 1);
212:
213: /*
1.18 bouyer 214: * fill in the prototype scsipi_link.
1.1 thorpej 215: */
1.18 bouyer 216: sc->sc_link.scsipi_scsi.channel = SCSI_CHANNEL_ONLY_ONE;
1.1 thorpej 217: sc->sc_link.adapter_softc = sc;
1.18 bouyer 218: sc->sc_link.scsipi_scsi.adapter_target = sc->sc_id;
1.28 ! thorpej 219: sc->sc_link.adapter = &sc->sc_adapter;
1.1 thorpej 220: sc->sc_link.device = dev;
221: sc->sc_link.openings = 2;
1.18 bouyer 222: sc->sc_link.scsipi_scsi.max_target = 7;
223: sc->sc_link.type = BUS_SCSI;
1.1 thorpej 224:
225: /*
226: * Now try to attach all the sub-devices
227: */
228: config_found(&sc->sc_dev, &sc->sc_link, scsiprint);
1.10 pk 229:
230: /*
231: * Enable interupts from the SCSI core
232: */
233: if ((sc->sc_rev == NCR_VARIANT_ESP406) ||
234: (sc->sc_rev == NCR_VARIANT_FAS408)) {
235: NCR_PIOREGS(sc);
236: NCR_WRITE_REG(sc, NCR_CFG5, NCRCFG5_SINT |
237: NCR_READ_REG(sc, NCR_CFG5));
238: NCR_SCSIREGS(sc);
239: }
1.24 pk 240:
1.1 thorpej 241: }
242:
243: /*
244: * This is the generic esp reset function. It does not reset the SCSI bus,
245: * only this controllers, but kills any on-going commands, and also stops
246: * and resets the DMA.
247: *
248: * After reset, registers are loaded with the defaults from the attach
249: * routine above.
250: */
251: void
252: ncr53c9x_reset(sc)
253: struct ncr53c9x_softc *sc;
254: {
255:
256: /* reset DMA first */
257: NCRDMA_RESET(sc);
258:
259: /* reset SCSI chip */
260: NCRCMD(sc, NCRCMD_RSTCHIP);
261: NCRCMD(sc, NCRCMD_NOP);
262: DELAY(500);
263:
264: /* do these backwards, and fall through */
265: switch (sc->sc_rev) {
1.10 pk 266: case NCR_VARIANT_ESP406:
267: case NCR_VARIANT_FAS408:
268: NCR_SCSIREGS(sc);
1.20 mhitch 269: case NCR_VARIANT_FAS216:
1.1 thorpej 270: case NCR_VARIANT_NCR53C94:
1.2 briggs 271: case NCR_VARIANT_NCR53C96:
1.1 thorpej 272: case NCR_VARIANT_ESP200:
1.26 thorpej 273: sc->sc_features |= NCR_F_HASCFG3;
1.1 thorpej 274: NCR_WRITE_REG(sc, NCR_CFG3, sc->sc_cfg3);
275: case NCR_VARIANT_ESP100A:
276: NCR_WRITE_REG(sc, NCR_CFG2, sc->sc_cfg2);
277: case NCR_VARIANT_ESP100:
278: NCR_WRITE_REG(sc, NCR_CFG1, sc->sc_cfg1);
279: NCR_WRITE_REG(sc, NCR_CCF, sc->sc_ccf);
280: NCR_WRITE_REG(sc, NCR_SYNCOFF, 0);
281: NCR_WRITE_REG(sc, NCR_TIMEOUT, sc->sc_timeout);
282: break;
283: default:
284: printf("%s: unknown revision code, assuming ESP100\n",
285: sc->sc_dev.dv_xname);
286: NCR_WRITE_REG(sc, NCR_CFG1, sc->sc_cfg1);
287: NCR_WRITE_REG(sc, NCR_CCF, sc->sc_ccf);
288: NCR_WRITE_REG(sc, NCR_SYNCOFF, 0);
289: NCR_WRITE_REG(sc, NCR_TIMEOUT, sc->sc_timeout);
290: }
291: }
292:
293: /*
294: * Reset the SCSI bus, but not the chip
295: */
296: void
297: ncr53c9x_scsi_reset(sc)
298: struct ncr53c9x_softc *sc;
299: {
300:
301: (*sc->sc_glue->gl_dma_stop)(sc);
302:
303: printf("%s: resetting SCSI bus\n", sc->sc_dev.dv_xname);
304: NCRCMD(sc, NCRCMD_RSTSCSI);
305: }
306:
307: /*
308: * Initialize esp state machine
309: */
310: void
311: ncr53c9x_init(sc, doreset)
312: struct ncr53c9x_softc *sc;
313: int doreset;
314: {
315: struct ncr53c9x_ecb *ecb;
316: int r;
317:
318: NCR_TRACE(("[NCR_INIT(%d)] ", doreset));
319:
320: if (sc->sc_state == 0) {
321: /* First time through; initialize. */
322: TAILQ_INIT(&sc->ready_list);
323: TAILQ_INIT(&sc->nexus_list);
324: TAILQ_INIT(&sc->free_list);
325: sc->sc_nexus = NULL;
326: ecb = sc->sc_ecb;
327: bzero(ecb, sizeof(sc->sc_ecb));
328: for (r = 0; r < sizeof(sc->sc_ecb) / sizeof(*ecb); r++) {
329: TAILQ_INSERT_TAIL(&sc->free_list, ecb, chain);
330: ecb++;
331: }
332: bzero(sc->sc_tinfo, sizeof(sc->sc_tinfo));
333: } else {
334: /* Cancel any active commands. */
335: sc->sc_state = NCR_CLEANING;
336: if ((ecb = sc->sc_nexus) != NULL) {
1.16 pk 337: ecb->xs->error = XS_TIMEOUT;
1.1 thorpej 338: ncr53c9x_done(sc, ecb);
339: }
340: while ((ecb = sc->nexus_list.tqh_first) != NULL) {
1.16 pk 341: ecb->xs->error = XS_TIMEOUT;
1.1 thorpej 342: ncr53c9x_done(sc, ecb);
343: }
344: }
345:
346: /*
347: * reset the chip to a known state
348: */
349: ncr53c9x_reset(sc);
350:
351: sc->sc_phase = sc->sc_prevphase = INVALID_PHASE;
352: for (r = 0; r < 8; r++) {
353: struct ncr53c9x_tinfo *ti = &sc->sc_tinfo[r];
354: /* XXX - config flags per target: low bits: no reselect; high bits: no synch */
355:
1.16 pk 356: ti->flags = ((sc->sc_minsync && !(sc->sc_cfflags & (1<<(r+8))))
1.1 thorpej 357: ? T_NEGOTIATE : 0) |
1.16 pk 358: ((sc->sc_cfflags & (1<<r)) ? T_RSELECTOFF : 0) |
1.1 thorpej 359: T_NEED_TO_RESET;
360: ti->period = sc->sc_minsync;
361: ti->offset = 0;
362: }
363:
364: if (doreset) {
365: sc->sc_state = NCR_SBR;
366: NCRCMD(sc, NCRCMD_RSTSCSI);
367: } else {
368: sc->sc_state = NCR_IDLE;
1.15 pk 369: ncr53c9x_sched(sc);
1.1 thorpej 370: }
371: }
372:
373: /*
374: * Read the NCR registers, and save their contents for later use.
375: * NCR_STAT, NCR_STEP & NCR_INTR are mostly zeroed out when reading
376: * NCR_INTR - so make sure it is the last read.
377: *
378: * I think that (from reading the docs) most bits in these registers
379: * only make sense when he DMA CSR has an interrupt showing. Call only
380: * if an interrupt is pending.
381: */
1.25 pk 382: __inline__ void
1.1 thorpej 383: ncr53c9x_readregs(sc)
384: struct ncr53c9x_softc *sc;
385: {
386:
387: sc->sc_espstat = NCR_READ_REG(sc, NCR_STAT);
388: /* Only the stepo bits are of interest */
389: sc->sc_espstep = NCR_READ_REG(sc, NCR_STEP) & NCRSTEP_MASK;
390: sc->sc_espintr = NCR_READ_REG(sc, NCR_INTR);
391:
392: if (sc->sc_glue->gl_clear_latched_intr != NULL)
393: (*sc->sc_glue->gl_clear_latched_intr)(sc);
394:
395: /*
396: * Determine the SCSI bus phase, return either a real SCSI bus phase
397: * or some pseudo phase we use to detect certain exceptions.
398: */
399:
400: sc->sc_phase = (sc->sc_espintr & NCRINTR_DIS)
401: ? /* Disconnected */ BUSFREE_PHASE
402: : sc->sc_espstat & NCRSTAT_PHASE;
403:
404: NCR_MISC(("regs[intr=%02x,stat=%02x,step=%02x] ",
405: sc->sc_espintr, sc->sc_espstat, sc->sc_espstep));
406: }
407:
408: /*
409: * Convert Synchronous Transfer Period to chip register Clock Per Byte value.
410: */
411: static inline int
412: ncr53c9x_stp2cpb(sc, period)
413: struct ncr53c9x_softc *sc;
414: int period;
415: {
416: int v;
417: v = (sc->sc_freq * period) / 250;
418: if (ncr53c9x_cpb2stp(sc, v) < period)
419: /* Correct round-down error */
420: v++;
1.25 pk 421: return (v);
1.1 thorpej 422: }
423:
424: static inline void
425: ncr53c9x_setsync(sc, ti)
426: struct ncr53c9x_softc *sc;
427: struct ncr53c9x_tinfo *ti;
428: {
1.26 thorpej 429: u_char syncoff, synctp, cfg3 = sc->sc_cfg3;
1.1 thorpej 430:
431: if (ti->flags & T_SYNCMODE) {
1.26 thorpej 432: syncoff = ti->offset;
433: synctp = ncr53c9x_stp2cpb(sc, ti->period);
434: if (sc->sc_features & NCR_F_FASTSCSI) {
435: /*
436: * If the period is 200ns or less (ti->period <= 50),
437: * put the chip in Fast SCSI mode.
438: */
439: if (ti->period <= 50)
440: cfg3 |= NCRCFG3_FSCSI;
441: }
1.1 thorpej 442: } else {
1.26 thorpej 443: syncoff = 0;
444: synctp = 0;
1.1 thorpej 445: }
1.26 thorpej 446:
447: if (sc->sc_features & NCR_F_HASCFG3)
448: NCR_WRITE_REG(sc, NCR_CFG3, cfg3);
449:
450: NCR_WRITE_REG(sc, NCR_SYNCOFF, syncoff);
451: NCR_WRITE_REG(sc, NCR_SYNCTP, synctp);
1.1 thorpej 452: }
453:
1.8 pk 454: int ncr53c9x_dmaselect = 0;
1.1 thorpej 455: /*
456: * Send a command to a target, set the driver state to NCR_SELECTING
457: * and let the caller take care of the rest.
458: *
459: * Keeping this as a function allows me to say that this may be done
460: * by DMA instead of programmed I/O soon.
461: */
462: void
463: ncr53c9x_select(sc, ecb)
464: struct ncr53c9x_softc *sc;
465: struct ncr53c9x_ecb *ecb;
466: {
1.18 bouyer 467: struct scsipi_link *sc_link = ecb->xs->sc_link;
468: int target = sc_link->scsipi_scsi.target;
1.22 pk 469: int lun = sc_link->scsipi_scsi.lun;
1.1 thorpej 470: struct ncr53c9x_tinfo *ti = &sc->sc_tinfo[target];
1.22 pk 471: int tiflags = ti->flags;
1.1 thorpej 472: u_char *cmd;
473: int clen;
474:
475: NCR_TRACE(("[ncr53c9x_select(t%d,l%d,cmd:%x)] ",
1.22 pk 476: target, lun, ecb->cmd.cmd.opcode));
1.1 thorpej 477:
478: sc->sc_state = NCR_SELECTING;
479:
1.7 gwr 480: /*
481: * Schedule the timeout now, the first time we will go away
482: * expecting to come back due to an interrupt, because it is
483: * always possible that the interrupt may never happen.
484: */
485: if ((ecb->xs->flags & SCSI_POLL) == 0)
486: timeout(ncr53c9x_timeout, ecb,
487: (ecb->timeout * hz) / 1000);
488:
1.1 thorpej 489: /*
490: * The docs say the target register is never reset, and I
491: * can't think of a better place to set it
492: */
493: NCR_WRITE_REG(sc, NCR_SELID, target);
494: ncr53c9x_setsync(sc, ti);
495:
1.22 pk 496: if (ncr53c9x_dmaselect && (tiflags & T_NEGOTIATE) == 0) {
497: size_t dmasize;
498:
1.8 pk 499: ecb->cmd.id =
1.22 pk 500: MSG_IDENTIFY(lun, (tiflags & T_RSELECTOFF)?0:1);
501:
1.8 pk 502:
503: /* setup DMA transfer for command */
1.22 pk 504: dmasize = clen = ecb->clen + 1;
1.8 pk 505: sc->sc_cmdlen = clen;
506: sc->sc_cmdp = (caddr_t)&ecb->cmd;
1.22 pk 507: NCRDMA_SETUP(sc, &sc->sc_cmdp, &sc->sc_cmdlen, 0, &dmasize);
508:
1.8 pk 509: /* Program the SCSI counter */
1.22 pk 510: NCR_WRITE_REG(sc, NCR_TCL, dmasize);
511: NCR_WRITE_REG(sc, NCR_TCM, dmasize >> 8);
1.8 pk 512: if (sc->sc_cfg2 & NCRCFG2_FE) {
1.22 pk 513: NCR_WRITE_REG(sc, NCR_TCH, dmasize >> 16);
1.8 pk 514: }
515:
1.22 pk 516: /* load the count in */
517: NCRCMD(sc, NCRCMD_NOP|NCRCMD_DMA);
518:
1.8 pk 519: /* And get the targets attention */
520: NCRCMD(sc, NCRCMD_SELATN | NCRCMD_DMA);
521: NCRDMA_GO(sc);
522: return;
523: }
1.22 pk 524:
1.1 thorpej 525: /*
526: * Who am I. This is where we tell the target that we are
527: * happy for it to disconnect etc.
528: */
529: NCR_WRITE_REG(sc, NCR_FIFO,
1.22 pk 530: MSG_IDENTIFY(lun, (tiflags & T_RSELECTOFF)?0:1));
1.1 thorpej 531:
532: if (ti->flags & T_NEGOTIATE) {
533: /* Arbitrate, select and stop after IDENTIFY message */
534: NCRCMD(sc, NCRCMD_SELATNS);
535: return;
536: }
537:
538: /* Now the command into the FIFO */
1.8 pk 539: cmd = (u_char *)&ecb->cmd.cmd;
1.1 thorpej 540: clen = ecb->clen;
541: while (clen--)
542: NCR_WRITE_REG(sc, NCR_FIFO, *cmd++);
543:
544: /* And get the targets attention */
545: NCRCMD(sc, NCRCMD_SELATN);
546: }
547:
548: void
549: ncr53c9x_free_ecb(sc, ecb, flags)
550: struct ncr53c9x_softc *sc;
551: struct ncr53c9x_ecb *ecb;
552: int flags;
553: {
554: int s;
555:
556: s = splbio();
557:
558: ecb->flags = 0;
559: TAILQ_INSERT_HEAD(&sc->free_list, ecb, chain);
560:
561: /*
562: * If there were none, wake anybody waiting for one to come free,
563: * starting with queued entries.
564: */
565: if (ecb->chain.tqe_next == 0)
566: wakeup(&sc->free_list);
567:
568: splx(s);
569: }
570:
571: struct ncr53c9x_ecb *
572: ncr53c9x_get_ecb(sc, flags)
573: struct ncr53c9x_softc *sc;
574: int flags;
575: {
576: struct ncr53c9x_ecb *ecb;
577: int s;
578:
579: s = splbio();
580:
581: while ((ecb = sc->free_list.tqh_first) == NULL &&
582: (flags & SCSI_NOSLEEP) == 0)
583: tsleep(&sc->free_list, PRIBIO, "especb", 0);
584: if (ecb) {
585: TAILQ_REMOVE(&sc->free_list, ecb, chain);
586: ecb->flags |= ECB_ALLOC;
587: }
588:
589: splx(s);
1.25 pk 590: return (ecb);
1.1 thorpej 591: }
592:
593: /*
594: * DRIVER FUNCTIONS CALLABLE FROM HIGHER LEVEL DRIVERS
595: */
596:
597: /*
598: * Start a SCSI-command
599: * This function is called by the higher level SCSI-driver to queue/run
600: * SCSI-commands.
601: */
602: int
603: ncr53c9x_scsi_cmd(xs)
1.18 bouyer 604: struct scsipi_xfer *xs;
1.1 thorpej 605: {
1.18 bouyer 606: struct scsipi_link *sc_link = xs->sc_link;
1.1 thorpej 607: struct ncr53c9x_softc *sc = sc_link->adapter_softc;
608: struct ncr53c9x_ecb *ecb;
609: int s, flags;
610:
611: NCR_TRACE(("[ncr53c9x_scsi_cmd] "));
612: NCR_CMDS(("[0x%x, %d]->%d ", (int)xs->cmd->opcode, xs->cmdlen,
1.18 bouyer 613: sc_link->scsipi_scsi.target));
1.1 thorpej 614:
615: flags = xs->flags;
1.16 pk 616: if ((ecb = ncr53c9x_get_ecb(sc, flags)) == NULL)
1.25 pk 617: return (TRY_AGAIN_LATER);
1.1 thorpej 618:
619: /* Initialize ecb */
620: ecb->xs = xs;
621: ecb->timeout = xs->timeout;
622:
1.4 gwr 623: if (flags & SCSI_RESET) {
1.1 thorpej 624: ecb->flags |= ECB_RESET;
625: ecb->clen = 0;
626: ecb->dleft = 0;
627: } else {
1.8 pk 628: bcopy(xs->cmd, &ecb->cmd.cmd, xs->cmdlen);
1.1 thorpej 629: ecb->clen = xs->cmdlen;
630: ecb->daddr = xs->data;
631: ecb->dleft = xs->datalen;
632: }
633: ecb->stat = 0;
634:
635: s = splbio();
636:
637: TAILQ_INSERT_TAIL(&sc->ready_list, ecb, chain);
638: if (sc->sc_state == NCR_IDLE)
639: ncr53c9x_sched(sc);
640:
641: splx(s);
642:
643: if ((flags & SCSI_POLL) == 0)
1.25 pk 644: return (SUCCESSFULLY_QUEUED);
1.1 thorpej 645:
646: /* Not allowed to use interrupts, use polling instead */
647: if (ncr53c9x_poll(sc, xs, ecb->timeout)) {
648: ncr53c9x_timeout(ecb);
649: if (ncr53c9x_poll(sc, xs, ecb->timeout))
650: ncr53c9x_timeout(ecb);
651: }
1.25 pk 652: return (COMPLETE);
1.1 thorpej 653: }
654:
655: /*
656: * Used when interrupt driven I/O isn't allowed, e.g. during boot.
657: */
658: int
659: ncr53c9x_poll(sc, xs, count)
660: struct ncr53c9x_softc *sc;
1.18 bouyer 661: struct scsipi_xfer *xs;
1.1 thorpej 662: int count;
663: {
664:
665: NCR_TRACE(("[ncr53c9x_poll] "));
666: while (count) {
667: if (NCRDMA_ISINTR(sc)) {
668: ncr53c9x_intr(sc);
669: }
670: #if alternatively
671: if (NCR_READ_REG(sc, NCR_STAT) & NCRSTAT_INT)
672: ncr53c9x_intr(sc);
673: #endif
674: if ((xs->flags & ITSDONE) != 0)
1.25 pk 675: return (0);
1.1 thorpej 676: if (sc->sc_state == NCR_IDLE) {
677: NCR_TRACE(("[ncr53c9x_poll: rescheduling] "));
678: ncr53c9x_sched(sc);
679: }
680: DELAY(1000);
681: count--;
682: }
1.25 pk 683: return (1);
1.1 thorpej 684: }
685:
686:
687: /*
688: * LOW LEVEL SCSI UTILITIES
689: */
690:
691: /*
692: * Schedule a scsi operation. This has now been pulled out of the interrupt
693: * handler so that we may call it from ncr53c9x_scsi_cmd and ncr53c9x_done.
694: * This may save us an unecessary interrupt just to get things going.
695: * Should only be called when state == NCR_IDLE and at bio pl.
696: */
697: void
698: ncr53c9x_sched(sc)
699: struct ncr53c9x_softc *sc;
700: {
701: struct ncr53c9x_ecb *ecb;
1.18 bouyer 702: struct scsipi_link *sc_link;
1.1 thorpej 703: struct ncr53c9x_tinfo *ti;
704:
705: NCR_TRACE(("[ncr53c9x_sched] "));
706: if (sc->sc_state != NCR_IDLE)
707: panic("ncr53c9x_sched: not IDLE (state=%d)", sc->sc_state);
708:
709: /*
710: * Find first ecb in ready queue that is for a target/lunit
711: * combinations that is not busy.
712: */
713: for (ecb = sc->ready_list.tqh_first; ecb; ecb = ecb->chain.tqe_next) {
714: sc_link = ecb->xs->sc_link;
1.18 bouyer 715: ti = &sc->sc_tinfo[sc_link->scsipi_scsi.target];
716: if ((ti->lubusy & (1 << sc_link->scsipi_scsi.lun)) == 0) {
1.1 thorpej 717: TAILQ_REMOVE(&sc->ready_list, ecb, chain);
718: sc->sc_nexus = ecb;
719: ncr53c9x_select(sc, ecb);
720: break;
721: } else
722: NCR_MISC(("%d:%d busy\n",
1.22 pk 723: sc_link->scsipi_scsi.target,
724: sc_link->scsipi_scsi.lun));
1.1 thorpej 725: }
726: }
727:
728: void
729: ncr53c9x_sense(sc, ecb)
730: struct ncr53c9x_softc *sc;
731: struct ncr53c9x_ecb *ecb;
732: {
1.18 bouyer 733: struct scsipi_xfer *xs = ecb->xs;
734: struct scsipi_link *sc_link = xs->sc_link;
735: struct ncr53c9x_tinfo *ti = &sc->sc_tinfo[sc_link->scsipi_scsi.target];
736: struct scsipi_sense *ss = (void *)&ecb->cmd.cmd;
1.1 thorpej 737:
738: NCR_MISC(("requesting sense "));
739: /* Next, setup a request sense command block */
740: bzero(ss, sizeof(*ss));
741: ss->opcode = REQUEST_SENSE;
1.18 bouyer 742: ss->byte2 = sc_link->scsipi_scsi.lun << 5;
743: ss->length = sizeof(struct scsipi_sense_data);
1.1 thorpej 744: ecb->clen = sizeof(*ss);
1.18 bouyer 745: ecb->daddr = (char *)&xs->sense.scsi_sense;
746: ecb->dleft = sizeof(struct scsipi_sense_data);
1.1 thorpej 747: ecb->flags |= ECB_SENSE;
1.7 gwr 748: ecb->timeout = NCR_SENSE_TIMEOUT;
1.1 thorpej 749: ti->senses++;
750: if (ecb->flags & ECB_NEXUS)
1.18 bouyer 751: ti->lubusy &= ~(1 << sc_link->scsipi_scsi.lun);
1.1 thorpej 752: if (ecb == sc->sc_nexus) {
1.23 pk 753: ecb->flags &= ~ECB_NEXUS;
1.1 thorpej 754: ncr53c9x_select(sc, ecb);
755: } else {
756: ncr53c9x_dequeue(sc, ecb);
757: TAILQ_INSERT_HEAD(&sc->ready_list, ecb, chain);
758: if (sc->sc_state == NCR_IDLE)
759: ncr53c9x_sched(sc);
760: }
761: }
762:
763: /*
764: * POST PROCESSING OF SCSI_CMD (usually current)
765: */
766: void
767: ncr53c9x_done(sc, ecb)
768: struct ncr53c9x_softc *sc;
769: struct ncr53c9x_ecb *ecb;
770: {
1.18 bouyer 771: struct scsipi_xfer *xs = ecb->xs;
772: struct scsipi_link *sc_link = xs->sc_link;
773: struct ncr53c9x_tinfo *ti = &sc->sc_tinfo[sc_link->scsipi_scsi.target];
1.1 thorpej 774:
775: NCR_TRACE(("[ncr53c9x_done(error:%x)] ", xs->error));
776:
1.7 gwr 777: untimeout(ncr53c9x_timeout, ecb);
778:
1.1 thorpej 779: /*
780: * Now, if we've come here with no error code, i.e. we've kept the
781: * initial XS_NOERROR, and the status code signals that we should
782: * check sense, we'll need to set up a request sense cmd block and
783: * push the command back into the ready queue *before* any other
784: * commands for this target/lunit, else we lose the sense info.
785: * We don't support chk sense conditions for the request sense cmd.
786: */
787: if (xs->error == XS_NOERROR) {
1.12 pk 788: xs->status = ecb->stat;
1.1 thorpej 789: if ((ecb->flags & ECB_ABORT) != 0) {
1.16 pk 790: xs->error = XS_TIMEOUT;
1.1 thorpej 791: } else if ((ecb->flags & ECB_SENSE) != 0) {
792: xs->error = XS_SENSE;
793: } else if ((ecb->stat & ST_MASK) == SCSI_CHECK) {
794: /* First, save the return values */
795: xs->resid = ecb->dleft;
796: ncr53c9x_sense(sc, ecb);
797: return;
798: } else {
799: xs->resid = ecb->dleft;
800: }
801: }
802:
803: xs->flags |= ITSDONE;
804:
805: #ifdef NCR53C9X_DEBUG
806: if (ncr53c9x_debug & NCR_SHOWMISC) {
807: if (xs->resid != 0)
808: printf("resid=%d ", xs->resid);
809: if (xs->error == XS_SENSE)
1.18 bouyer 810: printf("sense=0x%02x\n", xs->sense.scsi_sense.error_code);
1.1 thorpej 811: else
812: printf("error=%d\n", xs->error);
813: }
814: #endif
815:
816: /*
817: * Remove the ECB from whatever queue it's on.
818: */
819: if (ecb->flags & ECB_NEXUS)
1.18 bouyer 820: ti->lubusy &= ~(1 << sc_link->scsipi_scsi.lun);
1.1 thorpej 821: if (ecb == sc->sc_nexus) {
822: sc->sc_nexus = NULL;
1.15 pk 823: if (sc->sc_state != NCR_CLEANING) {
824: sc->sc_state = NCR_IDLE;
825: ncr53c9x_sched(sc);
826: }
1.1 thorpej 827: } else
828: ncr53c9x_dequeue(sc, ecb);
829:
830: ncr53c9x_free_ecb(sc, ecb, xs->flags);
831: ti->cmds++;
1.18 bouyer 832: scsipi_done(xs);
1.1 thorpej 833: }
834:
835: void
836: ncr53c9x_dequeue(sc, ecb)
837: struct ncr53c9x_softc *sc;
838: struct ncr53c9x_ecb *ecb;
839: {
840:
841: if (ecb->flags & ECB_NEXUS) {
842: TAILQ_REMOVE(&sc->nexus_list, ecb, chain);
1.23 pk 843: ecb->flags &= ~ECB_NEXUS;
1.1 thorpej 844: } else {
845: TAILQ_REMOVE(&sc->ready_list, ecb, chain);
846: }
847: }
848:
849: /*
850: * INTERRUPT/PROTOCOL ENGINE
851: */
852:
853: /*
854: * Schedule an outgoing message by prioritizing it, and asserting
855: * attention on the bus. We can only do this when we are the initiator
856: * else there will be an illegal command interrupt.
857: */
858: #define ncr53c9x_sched_msgout(m) \
859: do { \
860: NCR_MISC(("ncr53c9x_sched_msgout %d ", m)); \
861: NCRCMD(sc, NCRCMD_SETATN); \
862: sc->sc_flags |= NCR_ATN; \
863: sc->sc_msgpriq |= (m); \
864: } while (0)
865:
866: int
867: ncr53c9x_reselect(sc, message)
868: struct ncr53c9x_softc *sc;
869: int message;
870: {
871: u_char selid, target, lun;
872: struct ncr53c9x_ecb *ecb;
1.18 bouyer 873: struct scsipi_link *sc_link;
1.1 thorpej 874: struct ncr53c9x_tinfo *ti;
875:
876: /*
877: * The SCSI chip made a snapshot of the data bus while the reselection
878: * was being negotiated. This enables us to determine which target did
879: * the reselect.
880: */
881: selid = sc->sc_selid & ~(1 << sc->sc_id);
882: if (selid & (selid - 1)) {
883: printf("%s: reselect with invalid selid %02x;"
884: " sending DEVICE RESET\n", sc->sc_dev.dv_xname, selid);
885: goto reset;
886: }
887:
888: /*
889: * Search wait queue for disconnected cmd
890: * The list should be short, so I haven't bothered with
891: * any more sophisticated structures than a simple
892: * singly linked list.
893: */
894: target = ffs(selid) - 1;
895: lun = message & 0x07;
896: for (ecb = sc->nexus_list.tqh_first; ecb != NULL;
897: ecb = ecb->chain.tqe_next) {
898: sc_link = ecb->xs->sc_link;
1.23 pk 899: if (sc_link->scsipi_scsi.target == target &&
900: sc_link->scsipi_scsi.lun == lun)
1.1 thorpej 901: break;
902: }
903: if (ecb == NULL) {
904: printf("%s: reselect from target %d lun %d with no nexus;"
905: " sending ABORT\n", sc->sc_dev.dv_xname, target, lun);
906: goto abort;
907: }
908:
909: /* Make this nexus active again. */
910: TAILQ_REMOVE(&sc->nexus_list, ecb, chain);
911: sc->sc_state = NCR_CONNECTED;
912: sc->sc_nexus = ecb;
913: ti = &sc->sc_tinfo[target];
1.23 pk 914: #ifdef NCR53C9X_DEBUG
915: if ((ti->lubusy & (1 << lun)) == 0) {
916: printf("%s: reselect: target %d, lun %d: should be busy\n",
917: sc->sc_dev.dv_xname, target, lun);
918: ti->lubusy |= (1 << lun);
919: }
920: #endif
1.1 thorpej 921: ncr53c9x_setsync(sc, ti);
922:
923: if (ecb->flags & ECB_RESET)
924: ncr53c9x_sched_msgout(SEND_DEV_RESET);
925: else if (ecb->flags & ECB_ABORT)
926: ncr53c9x_sched_msgout(SEND_ABORT);
927:
928: /* Do an implicit RESTORE POINTERS. */
929: sc->sc_dp = ecb->daddr;
930: sc->sc_dleft = ecb->dleft;
931:
932: return (0);
933:
934: reset:
935: ncr53c9x_sched_msgout(SEND_DEV_RESET);
936: return (1);
937:
938: abort:
939: ncr53c9x_sched_msgout(SEND_ABORT);
940: return (1);
941: }
942:
943: #define IS1BYTEMSG(m) (((m) != 1 && (m) < 0x20) || (m) & 0x80)
944: #define IS2BYTEMSG(m) (((m) & 0xf0) == 0x20)
945: #define ISEXTMSG(m) ((m) == 1)
946:
947: /*
948: * Get an incoming message as initiator.
949: *
950: * The SCSI bus must already be in MESSAGE_IN_PHASE and there is a
951: * byte in the FIFO
952: */
953: void
954: ncr53c9x_msgin(sc)
955: register struct ncr53c9x_softc *sc;
956: {
957: register int v;
958:
959: NCR_TRACE(("[ncr53c9x_msgin(curmsglen:%ld)] ", (long)sc->sc_imlen));
960:
961: if ((NCR_READ_REG(sc, NCR_FFLAG) & NCRFIFO_FF) == 0) {
962: printf("%s: msgin: no msg byte available\n",
963: sc->sc_dev.dv_xname);
964: return;
965: }
966:
967: /*
968: * Prepare for a new message. A message should (according
969: * to the SCSI standard) be transmitted in one single
970: * MESSAGE_IN_PHASE. If we have been in some other phase,
971: * then this is a new message.
972: */
973: if (sc->sc_prevphase != MESSAGE_IN_PHASE) {
974: sc->sc_flags &= ~NCR_DROP_MSGI;
975: sc->sc_imlen = 0;
976: }
977:
978: v = NCR_READ_REG(sc, NCR_FIFO);
979: NCR_MISC(("<msgbyte:0x%02x>", v));
980:
981: #if 0
982: if (sc->sc_state == NCR_RESELECTED && sc->sc_imlen == 0) {
983: /*
984: * Which target is reselecting us? (The ID bit really)
985: */
986: sc->sc_selid = v;
987: NCR_MISC(("selid=0x%2x ", sc->sc_selid));
988: return;
989: }
990: #endif
991:
992: sc->sc_imess[sc->sc_imlen] = v;
993:
994: /*
995: * If we're going to reject the message, don't bother storing
996: * the incoming bytes. But still, we need to ACK them.
997: */
998:
999: if ((sc->sc_flags & NCR_DROP_MSGI)) {
1000: NCRCMD(sc, NCRCMD_MSGOK);
1001: printf("<dropping msg byte %x>",
1002: sc->sc_imess[sc->sc_imlen]);
1003: return;
1004: }
1005:
1006: if (sc->sc_imlen >= NCR_MAX_MSG_LEN) {
1007: ncr53c9x_sched_msgout(SEND_REJECT);
1008: sc->sc_flags |= NCR_DROP_MSGI;
1009: } else {
1010: sc->sc_imlen++;
1011: /*
1012: * This testing is suboptimal, but most
1013: * messages will be of the one byte variety, so
1014: * it should not effect performance
1015: * significantly.
1016: */
1017: if (sc->sc_imlen == 1 && IS1BYTEMSG(sc->sc_imess[0]))
1018: goto gotit;
1019: if (sc->sc_imlen == 2 && IS2BYTEMSG(sc->sc_imess[0]))
1020: goto gotit;
1021: if (sc->sc_imlen >= 3 && ISEXTMSG(sc->sc_imess[0]) &&
1022: sc->sc_imlen == sc->sc_imess[1] + 2)
1023: goto gotit;
1024: }
1025: /* Ack what we have so far */
1026: NCRCMD(sc, NCRCMD_MSGOK);
1027: return;
1028:
1029: gotit:
1030: NCR_MSGS(("gotmsg(%x)", sc->sc_imess[0]));
1031: /*
1032: * Now we should have a complete message (1 byte, 2 byte
1033: * and moderately long extended messages). We only handle
1034: * extended messages which total length is shorter than
1035: * NCR_MAX_MSG_LEN. Longer messages will be amputated.
1036: */
1037: switch (sc->sc_state) {
1038: struct ncr53c9x_ecb *ecb;
1039: struct ncr53c9x_tinfo *ti;
1040:
1041: case NCR_CONNECTED:
1042: ecb = sc->sc_nexus;
1.18 bouyer 1043: ti = &sc->sc_tinfo[ecb->xs->sc_link->scsipi_scsi.target];
1.1 thorpej 1044:
1045: switch (sc->sc_imess[0]) {
1046: case MSG_CMDCOMPLETE:
1047: NCR_MSGS(("cmdcomplete "));
1048: if (sc->sc_dleft < 0) {
1.18 bouyer 1049: struct scsipi_link *sc_link = ecb->xs->sc_link;
1.1 thorpej 1050: printf("%s: %ld extra bytes from %d:%d\n",
1051: sc->sc_dev.dv_xname, -(long)sc->sc_dleft,
1.18 bouyer 1052: sc_link->scsipi_scsi.target, sc_link->scsipi_scsi.lun);
1.1 thorpej 1053: sc->sc_dleft = 0;
1054: }
1.13 pk 1055: ecb->dleft = (ecb->flags & ECB_TENTATIVE_DONE)
1056: ? 0
1057: : sc->sc_dleft;
1058: if ((ecb->flags & ECB_SENSE) == 0)
1059: ecb->xs->resid = ecb->dleft;
1.1 thorpej 1060: sc->sc_state = NCR_CMDCOMPLETE;
1061: break;
1062:
1063: case MSG_MESSAGE_REJECT:
1.23 pk 1064: NCR_MSGS(("msg reject (msgout=%x) ", sc->sc_msgout));
1.1 thorpej 1065: switch (sc->sc_msgout) {
1066: case SEND_SDTR:
1067: sc->sc_flags &= ~NCR_SYNCHNEGO;
1068: ti->flags &= ~(T_NEGOTIATE | T_SYNCMODE);
1069: ncr53c9x_setsync(sc, ti);
1070: break;
1071: case SEND_INIT_DET_ERR:
1072: goto abort;
1073: }
1074: break;
1075:
1076: case MSG_NOOP:
1077: NCR_MSGS(("noop "));
1078: break;
1079:
1080: case MSG_DISCONNECT:
1081: NCR_MSGS(("disconnect "));
1082: ti->dconns++;
1083: sc->sc_state = NCR_DISCONNECT;
1.8 pk 1084:
1.13 pk 1085: /*
1086: * Mark the fact that all bytes have moved. The
1087: * target may not bother to do a SAVE POINTERS
1088: * at this stage. This flag will set the residual
1089: * count to zero on MSG COMPLETE.
1090: */
1091: if (sc->sc_dleft == 0)
1092: ecb->flags |= ECB_TENTATIVE_DONE;
1093:
1094: break;
1.1 thorpej 1095:
1096: case MSG_SAVEDATAPOINTER:
1097: NCR_MSGS(("save datapointer "));
1098: ecb->daddr = sc->sc_dp;
1099: ecb->dleft = sc->sc_dleft;
1100: break;
1101:
1102: case MSG_RESTOREPOINTERS:
1103: NCR_MSGS(("restore datapointer "));
1104: sc->sc_dp = ecb->daddr;
1105: sc->sc_dleft = ecb->dleft;
1106: break;
1107:
1108: case MSG_EXTENDED:
1109: NCR_MSGS(("extended(%x) ", sc->sc_imess[2]));
1110: switch (sc->sc_imess[2]) {
1111: case MSG_EXT_SDTR:
1112: NCR_MSGS(("SDTR period %d, offset %d ",
1113: sc->sc_imess[3], sc->sc_imess[4]));
1114: if (sc->sc_imess[1] != 3)
1115: goto reject;
1116: ti->period = sc->sc_imess[3];
1117: ti->offset = sc->sc_imess[4];
1118: ti->flags &= ~T_NEGOTIATE;
1119: if (sc->sc_minsync == 0 ||
1120: ti->offset == 0 ||
1121: ti->period > 124) {
1122: printf("%s:%d: async\n", "esp",
1.18 bouyer 1123: ecb->xs->sc_link->scsipi_scsi.target);
1.1 thorpej 1124: if ((sc->sc_flags&NCR_SYNCHNEGO)
1125: == 0) {
1126: /*
1127: * target initiated negotiation
1128: */
1129: ti->offset = 0;
1130: ti->flags &= ~T_SYNCMODE;
1131: ncr53c9x_sched_msgout(
1132: SEND_SDTR);
1133: } else {
1134: /* we are async */
1135: ti->flags &= ~T_SYNCMODE;
1136: }
1137: } else {
1138: int r = 250/ti->period;
1139: int s = (100*250)/ti->period - 100*r;
1140: int p;
1141:
1142: p = ncr53c9x_stp2cpb(sc, ti->period);
1143: ti->period = ncr53c9x_cpb2stp(sc, p);
1144: #ifdef NCR53C9X_DEBUG
1.18 bouyer 1145: scsi_print_addr(ecb->xs->sc_link);
1146: printf("max sync rate %d.%02dMb/s\n",
1.1 thorpej 1147: r, s);
1148: #endif
1.22 pk 1149: if ((sc->sc_flags&NCR_SYNCHNEGO) == 0) {
1.1 thorpej 1150: /*
1151: * target initiated negotiation
1152: */
1153: if (ti->period <
1154: sc->sc_minsync)
1155: ti->period =
1156: sc->sc_minsync;
1157: if (ti->offset > 15)
1158: ti->offset = 15;
1159: ti->flags &= ~T_SYNCMODE;
1160: ncr53c9x_sched_msgout(
1161: SEND_SDTR);
1162: } else {
1163: /* we are sync */
1164: ti->flags |= T_SYNCMODE;
1165: }
1166: }
1167: sc->sc_flags &= ~NCR_SYNCHNEGO;
1168: ncr53c9x_setsync(sc, ti);
1169: break;
1170:
1171: default:
1172: printf("%s: unrecognized MESSAGE EXTENDED;"
1173: " sending REJECT\n", sc->sc_dev.dv_xname);
1174: goto reject;
1175: }
1176: break;
1177:
1178: default:
1179: NCR_MSGS(("ident "));
1180: printf("%s: unrecognized MESSAGE; sending REJECT\n",
1181: sc->sc_dev.dv_xname);
1182: reject:
1183: ncr53c9x_sched_msgout(SEND_REJECT);
1184: break;
1185: }
1186: break;
1187:
1188: case NCR_RESELECTED:
1189: if (!MSG_ISIDENTIFY(sc->sc_imess[0])) {
1190: printf("%s: reselect without IDENTIFY;"
1191: " sending DEVICE RESET\n", sc->sc_dev.dv_xname);
1192: goto reset;
1193: }
1194:
1195: (void) ncr53c9x_reselect(sc, sc->sc_imess[0]);
1196: break;
1197:
1198: default:
1199: printf("%s: unexpected MESSAGE IN; sending DEVICE RESET\n",
1200: sc->sc_dev.dv_xname);
1201: reset:
1202: ncr53c9x_sched_msgout(SEND_DEV_RESET);
1203: break;
1204:
1205: abort:
1206: ncr53c9x_sched_msgout(SEND_ABORT);
1207: break;
1208: }
1209:
1210: /* Ack last message byte */
1211: NCRCMD(sc, NCRCMD_MSGOK);
1212:
1213: /* Done, reset message pointer. */
1214: sc->sc_flags &= ~NCR_DROP_MSGI;
1215: sc->sc_imlen = 0;
1216: }
1217:
1218:
1219: /*
1220: * Send the highest priority, scheduled message
1221: */
1222: void
1223: ncr53c9x_msgout(sc)
1224: register struct ncr53c9x_softc *sc;
1225: {
1226: struct ncr53c9x_tinfo *ti;
1227: struct ncr53c9x_ecb *ecb;
1228: size_t size;
1229:
1230: NCR_TRACE(("[ncr53c9x_msgout(priq:%x, prevphase:%x)]",
1231: sc->sc_msgpriq, sc->sc_prevphase));
1232:
1.22 pk 1233: /*
1234: * XXX - the NCR_ATN flag is not in sync with the actual ATN
1235: * condition on the SCSI bus. The 53c9x chip
1236: * automatically turns off ATN before sending the
1237: * message byte. (see also the comment below in the
1238: * default case when picking out a message to send)
1239: */
1.1 thorpej 1240: if (sc->sc_flags & NCR_ATN) {
1241: if (sc->sc_prevphase != MESSAGE_OUT_PHASE) {
1242: new:
1243: NCRCMD(sc, NCRCMD_FLUSH);
1244: DELAY(1);
1245: sc->sc_msgoutq = 0;
1246: sc->sc_omlen = 0;
1247: }
1248: } else {
1249: if (sc->sc_prevphase == MESSAGE_OUT_PHASE) {
1250: ncr53c9x_sched_msgout(sc->sc_msgoutq);
1251: goto new;
1252: } else {
1253: printf("%s at line %d: unexpected MESSAGE OUT phase\n",
1254: sc->sc_dev.dv_xname, __LINE__);
1255: }
1256: }
1257:
1258: if (sc->sc_omlen == 0) {
1259: /* Pick up highest priority message */
1260: sc->sc_msgout = sc->sc_msgpriq & -sc->sc_msgpriq;
1261: sc->sc_msgoutq |= sc->sc_msgout;
1262: sc->sc_msgpriq &= ~sc->sc_msgout;
1263: sc->sc_omlen = 1; /* "Default" message len */
1264: switch (sc->sc_msgout) {
1265: case SEND_SDTR:
1266: ecb = sc->sc_nexus;
1.18 bouyer 1267: ti = &sc->sc_tinfo[ecb->xs->sc_link->scsipi_scsi.target];
1.1 thorpej 1268: sc->sc_omess[0] = MSG_EXTENDED;
1269: sc->sc_omess[1] = 3;
1270: sc->sc_omess[2] = MSG_EXT_SDTR;
1271: sc->sc_omess[3] = ti->period;
1272: sc->sc_omess[4] = ti->offset;
1273: sc->sc_omlen = 5;
1274: if ((sc->sc_flags & NCR_SYNCHNEGO) == 0) {
1275: ti->flags |= T_SYNCMODE;
1276: ncr53c9x_setsync(sc, ti);
1277: }
1278: break;
1279: case SEND_IDENTIFY:
1280: if (sc->sc_state != NCR_CONNECTED) {
1281: printf("%s at line %d: no nexus\n",
1282: sc->sc_dev.dv_xname, __LINE__);
1283: }
1284: ecb = sc->sc_nexus;
1285: sc->sc_omess[0] =
1.18 bouyer 1286: MSG_IDENTIFY(ecb->xs->sc_link->scsipi_scsi.lun, 0);
1.1 thorpej 1287: break;
1288: case SEND_DEV_RESET:
1289: sc->sc_flags |= NCR_ABORTING;
1290: sc->sc_omess[0] = MSG_BUS_DEV_RESET;
1291: ecb = sc->sc_nexus;
1.18 bouyer 1292: ti = &sc->sc_tinfo[ecb->xs->sc_link->scsipi_scsi.target];
1.1 thorpej 1293: ti->flags &= ~T_SYNCMODE;
1294: ti->flags |= T_NEGOTIATE;
1295: break;
1296: case SEND_PARITY_ERROR:
1297: sc->sc_omess[0] = MSG_PARITY_ERROR;
1298: break;
1299: case SEND_ABORT:
1300: sc->sc_flags |= NCR_ABORTING;
1301: sc->sc_omess[0] = MSG_ABORT;
1302: break;
1303: case SEND_INIT_DET_ERR:
1304: sc->sc_omess[0] = MSG_INITIATOR_DET_ERR;
1305: break;
1306: case SEND_REJECT:
1307: sc->sc_omess[0] = MSG_MESSAGE_REJECT;
1308: break;
1309: default:
1.22 pk 1310: /*
1311: * We normally do not get here, since the chip
1312: * automatically turns off ATN before the last
1313: * byte of a message is sent to the target.
1314: * However, if the target rejects our (multi-byte)
1315: * message early by switching to MSG IN phase
1316: * ATN remains on, so the target may return to
1317: * MSG OUT phase. If there are no scheduled messages
1318: * left we send a NO-OP.
1319: *
1320: * XXX - Note that this leaves no useful purpose for
1321: * the NCR_ATN flag.
1322: */
1.1 thorpej 1323: sc->sc_flags &= ~NCR_ATN;
1324: sc->sc_omess[0] = MSG_NOOP;
1325: break;
1326: }
1327: sc->sc_omp = sc->sc_omess;
1328: }
1329:
1330: /* (re)send the message */
1331: size = min(sc->sc_omlen, sc->sc_maxxfer);
1332: NCRDMA_SETUP(sc, &sc->sc_omp, &sc->sc_omlen, 0, &size);
1333: /* Program the SCSI counter */
1334: NCR_WRITE_REG(sc, NCR_TCL, size);
1335: NCR_WRITE_REG(sc, NCR_TCM, size >> 8);
1336: if (sc->sc_cfg2 & NCRCFG2_FE) {
1337: NCR_WRITE_REG(sc, NCR_TCH, size >> 16);
1338: }
1.22 pk 1339: /* Load the count in and start the message-out transfer */
1.1 thorpej 1340: NCRCMD(sc, NCRCMD_NOP|NCRCMD_DMA);
1341: NCRCMD(sc, NCRCMD_TRANS|NCRCMD_DMA);
1342: NCRDMA_GO(sc);
1343: }
1344:
1345: /*
1346: * This is the most critical part of the driver, and has to know
1347: * how to deal with *all* error conditions and phases from the SCSI
1348: * bus. If there are no errors and the DMA was active, then call the
1349: * DMA pseudo-interrupt handler. If this returns 1, then that was it
1350: * and we can return from here without further processing.
1351: *
1352: * Most of this needs verifying.
1353: */
1.25 pk 1354: int sdebug = 0;
1.1 thorpej 1355: int
1356: ncr53c9x_intr(sc)
1357: register struct ncr53c9x_softc *sc;
1358: {
1359: register struct ncr53c9x_ecb *ecb;
1.18 bouyer 1360: register struct scsipi_link *sc_link;
1.1 thorpej 1361: struct ncr53c9x_tinfo *ti;
1362: size_t size;
1.5 pk 1363: int nfifo;
1.1 thorpej 1364:
1.10 pk 1365: NCR_TRACE(("[ncr53c9x_intr] "));
1.1 thorpej 1366:
1.25 pk 1367: if (!NCRDMA_ISINTR(sc))
1368: return (0);
1369:
1370: again:
1371: /* and what do the registers say... */
1372: ncr53c9x_readregs(sc);
1373:
1374: sc->sc_intrcnt.ev_count++;
1375:
1.1 thorpej 1376: /*
1.25 pk 1377: * At the moment, only a SCSI Bus Reset or Illegal
1378: * Command are classed as errors. A disconnect is a
1379: * valid condition, and we let the code check is the
1380: * "NCR_BUSFREE_OK" flag was set before declaring it
1381: * and error.
1.1 thorpej 1382: *
1.25 pk 1383: * Also, the status register tells us about "Gross
1384: * Errors" and "Parity errors". Only the Gross Error
1385: * is really bad, and the parity errors are dealt
1386: * with later
1.1 thorpej 1387: *
1.25 pk 1388: * TODO
1389: * If there are too many parity error, go to slow
1390: * cable mode ?
1.1 thorpej 1391: */
1.25 pk 1392:
1393: /* SCSI Reset */
1394: if (sc->sc_espintr & NCRINTR_SBR) {
1395: if (NCR_READ_REG(sc, NCR_FFLAG) & NCRFIFO_FF) {
1396: NCRCMD(sc, NCRCMD_FLUSH);
1397: DELAY(1);
1398: }
1399: if (sc->sc_state != NCR_SBR) {
1400: printf("%s: SCSI bus reset\n",
1401: sc->sc_dev.dv_xname);
1402: ncr53c9x_init(sc, 0); /* Restart everything */
1403: return (1);
1404: }
1.1 thorpej 1405: #if 0
1.25 pk 1406: /*XXX*/ printf("<expected bus reset: "
1407: "[intr %x, stat %x, step %d]>\n",
1408: sc->sc_espintr, sc->sc_espstat,
1409: sc->sc_espstep);
1.1 thorpej 1410: #endif
1.25 pk 1411: if (sc->sc_nexus)
1412: panic("%s: nexus in reset state",
1413: sc->sc_dev.dv_xname);
1414: goto sched;
1415: }
1.1 thorpej 1416:
1.25 pk 1417: ecb = sc->sc_nexus;
1.1 thorpej 1418:
1.25 pk 1419: #define NCRINTR_ERR (NCRINTR_SBR|NCRINTR_ILL)
1420: if (sc->sc_espintr & NCRINTR_ERR ||
1421: sc->sc_espstat & NCRSTAT_GE) {
1.1 thorpej 1422:
1.25 pk 1423: if (sc->sc_espstat & NCRSTAT_GE) {
1424: /* Gross Error; no target ? */
1.1 thorpej 1425: if (NCR_READ_REG(sc, NCR_FFLAG) & NCRFIFO_FF) {
1426: NCRCMD(sc, NCRCMD_FLUSH);
1427: DELAY(1);
1428: }
1.25 pk 1429: if (sc->sc_state == NCR_CONNECTED ||
1430: sc->sc_state == NCR_SELECTING) {
1431: ecb->xs->error = XS_TIMEOUT;
1432: ncr53c9x_done(sc, ecb);
1.1 thorpej 1433: }
1.25 pk 1434: return (1);
1.1 thorpej 1435: }
1436:
1.25 pk 1437: if (sc->sc_espintr & NCRINTR_ILL) {
1438: if (sc->sc_flags & NCR_EXPECT_ILLCMD) {
1439: /*
1440: * Eat away "Illegal command" interrupt
1441: * on a ESP100 caused by a re-selection
1442: * while we were trying to select
1443: * another target.
1444: */
1.19 pk 1445: #ifdef DEBUG
1.25 pk 1446: printf("%s: ESP100 work-around activated\n",
1447: sc->sc_dev.dv_xname);
1.19 pk 1448: #endif
1.25 pk 1449: sc->sc_flags &= ~NCR_EXPECT_ILLCMD;
1450: return (1);
1451: }
1452: /* illegal command, out of sync ? */
1453: printf("%s: illegal command: 0x%x "
1454: "(state %d, phase %x, prevphase %x)\n",
1455: sc->sc_dev.dv_xname, sc->sc_lastcmd,
1456: sc->sc_state, sc->sc_phase,
1457: sc->sc_prevphase);
1458: if (NCR_READ_REG(sc, NCR_FFLAG) & NCRFIFO_FF) {
1459: NCRCMD(sc, NCRCMD_FLUSH);
1460: DELAY(1);
1.1 thorpej 1461: }
1.25 pk 1462: ncr53c9x_init(sc, 1); /* Restart everything */
1463: return (1);
1.1 thorpej 1464: }
1.25 pk 1465: }
1466: sc->sc_flags &= ~NCR_EXPECT_ILLCMD;
1.1 thorpej 1467:
1.25 pk 1468: /*
1469: * Call if DMA is active.
1470: *
1471: * If DMA_INTR returns true, then maybe go 'round the loop
1472: * again in case there is no more DMA queued, but a phase
1473: * change is expected.
1474: */
1475: if (NCRDMA_ISACTIVE(sc)) {
1476: int r = NCRDMA_INTR(sc);
1477: if (r == -1) {
1478: printf("%s: DMA error; resetting\n",
1479: sc->sc_dev.dv_xname);
1480: ncr53c9x_init(sc, 1);
1481: }
1482: /* If DMA active here, then go back to work... */
1483: if (NCRDMA_ISACTIVE(sc))
1484: return (1);
1.1 thorpej 1485:
1.25 pk 1486: if ((sc->sc_espstat & NCRSTAT_TC) == 0) {
1487: /*
1488: * DMA not completed. If we can not find a
1489: * acceptable explanation, print a diagnostic.
1490: */
1491: if (sc->sc_state == NCR_SELECTING)
1492: /*
1493: * This can happen if we are reselected
1494: * while using DMA to select a target.
1495: */
1496: /*void*/;
1497: else if (sc->sc_prevphase == MESSAGE_OUT_PHASE) {
1498: /*
1499: * Our (multi-byte) message (eg SDTR) was
1500: * interrupted by the target to send
1501: * a MSG REJECT.
1502: * Print diagnostic if current phase
1503: * is not MESSAGE IN.
1504: */
1505: if (sc->sc_phase != MESSAGE_IN_PHASE)
1506: printf("%s: !TC on MSG OUT"
1507: " [intr %x, stat %x, step %d]"
1508: " prevphase %x, resid %x\n",
1509: sc->sc_dev.dv_xname,
1510: sc->sc_espintr,
1511: sc->sc_espstat,
1512: sc->sc_espstep,
1513: sc->sc_prevphase,
1514: sc->sc_omlen);
1515: } else if (sc->sc_dleft == 0) {
1.22 pk 1516: /*
1.25 pk 1517: * The DMA operation was started for
1518: * a DATA transfer. Print a diagnostic
1519: * if the DMA counter and TC bit
1520: * appear to be out of sync.
1.22 pk 1521: */
1.25 pk 1522: printf("%s: !TC on DATA XFER"
1523: " [intr %x, stat %x, step %d]"
1524: " prevphase %x, resid %x\n",
1525: sc->sc_dev.dv_xname,
1526: sc->sc_espintr,
1527: sc->sc_espstat,
1528: sc->sc_espstep,
1529: sc->sc_prevphase,
1530: ecb?ecb->dleft:-1);
1.22 pk 1531: }
1.1 thorpej 1532: }
1.25 pk 1533: }
1534:
1535: /*
1536: * Check for less serious errors.
1537: */
1538: if (sc->sc_espstat & NCRSTAT_PE) {
1539: printf("%s: SCSI bus parity error\n", sc->sc_dev.dv_xname);
1540: if (sc->sc_prevphase == MESSAGE_IN_PHASE)
1541: ncr53c9x_sched_msgout(SEND_PARITY_ERROR);
1542: else
1543: ncr53c9x_sched_msgout(SEND_INIT_DET_ERR);
1544: }
1.1 thorpej 1545:
1.25 pk 1546: if (sc->sc_espintr & NCRINTR_DIS) {
1547: NCR_MISC(("<DISC [intr %x, stat %x, step %d]>",
1548: sc->sc_espintr,sc->sc_espstat,sc->sc_espstep));
1549: if (NCR_READ_REG(sc, NCR_FFLAG) & NCRFIFO_FF) {
1550: NCRCMD(sc, NCRCMD_FLUSH);
1551: DELAY(1);
1.1 thorpej 1552: }
1553: /*
1.25 pk 1554: * This command must (apparently) be issued within
1555: * 250mS of a disconnect. So here you are...
1.1 thorpej 1556: */
1.25 pk 1557: NCRCMD(sc, NCRCMD_ENSEL);
1.1 thorpej 1558:
1.25 pk 1559: switch (sc->sc_state) {
1560: case NCR_RESELECTED:
1561: goto sched;
1.22 pk 1562:
1.25 pk 1563: case NCR_SELECTING:
1564: ecb->xs->error = XS_SELTIMEOUT;
1565: goto finish;
1.1 thorpej 1566:
1.25 pk 1567: case NCR_CONNECTED:
1568: if ((sc->sc_flags & NCR_SYNCHNEGO)) {
1.1 thorpej 1569: #ifdef NCR53C9X_DEBUG
1.25 pk 1570: if (ecb)
1571: scsi_print_addr(ecb->xs->sc_link);
1572: printf("sync nego not completed!\n");
1.1 thorpej 1573: #endif
1.25 pk 1574: ti = &sc->sc_tinfo[ecb->xs->sc_link->scsipi_scsi.target];
1575: sc->sc_flags &= ~NCR_SYNCHNEGO;
1576: ti->flags &= ~(T_NEGOTIATE | T_SYNCMODE);
1577: }
1.1 thorpej 1578:
1.25 pk 1579: /* it may be OK to disconnect */
1580: if ((sc->sc_flags & NCR_ABORTING) == 0) {
1581: /*
1582: * Section 5.1.1 of the SCSI 2 spec
1583: * suggests issuing a REQUEST SENSE
1584: * following an unexpected disconnect.
1585: * Some devices go into a contingent
1586: * allegiance condition when
1587: * disconnecting, and this is necessary
1588: * to clean up their state.
1589: */
1590: printf("%s: unexpected disconnect; ",
1591: sc->sc_dev.dv_xname);
1592: if (ecb->flags & ECB_SENSE) {
1593: printf("resetting\n");
1594: goto reset;
1.1 thorpej 1595: }
1.25 pk 1596: printf("sending REQUEST SENSE\n");
1597: untimeout(ncr53c9x_timeout, ecb);
1598: ncr53c9x_sense(sc, ecb);
1599: goto out;
1600: }
1.1 thorpej 1601:
1.25 pk 1602: ecb->xs->error = XS_TIMEOUT;
1603: goto finish;
1.1 thorpej 1604:
1.25 pk 1605: case NCR_DISCONNECT:
1606: TAILQ_INSERT_HEAD(&sc->nexus_list, ecb, chain);
1607: sc->sc_nexus = NULL;
1608: goto sched;
1.1 thorpej 1609:
1.25 pk 1610: case NCR_CMDCOMPLETE:
1611: goto finish;
1.1 thorpej 1612: }
1.25 pk 1613: }
1.1 thorpej 1614:
1.25 pk 1615: switch (sc->sc_state) {
1616:
1617: case NCR_SBR:
1618: printf("%s: waiting for SCSI Bus Reset to happen\n",
1619: sc->sc_dev.dv_xname);
1620: return (1);
1.1 thorpej 1621:
1.25 pk 1622: case NCR_RESELECTED:
1623: /*
1624: * we must be continuing a message ?
1625: */
1626: if (sc->sc_phase != MESSAGE_IN_PHASE) {
1627: printf("%s: target didn't identify\n",
1.1 thorpej 1628: sc->sc_dev.dv_xname);
1.25 pk 1629: ncr53c9x_init(sc, 1);
1630: return (1);
1631: }
1632: printf("<<RESELECT CONT'd>>");
1633: #if XXXX
1634: ncr53c9x_msgin(sc);
1635: if (sc->sc_state != NCR_CONNECTED) {
1636: /* IDENTIFY fail?! */
1637: printf("%s: identify failed\n",
1638: sc->sc_dev.dv_xname);
1639: ncr53c9x_init(sc, 1);
1640: return (1);
1641: }
1642: #endif
1643: break;
1644:
1645: case NCR_IDLE:
1646: case NCR_SELECTING:
1647: sc->sc_msgpriq = sc->sc_msgout = sc->sc_msgoutq = 0;
1648: sc->sc_flags = 0;
1649: ecb = sc->sc_nexus;
1650: if (ecb != NULL && (ecb->flags & ECB_NEXUS)) {
1651: scsi_print_addr(ecb->xs->sc_link);
1652: printf("ECB_NEXUS while in state %x\n", sc->sc_state);
1653: }
1.1 thorpej 1654:
1.25 pk 1655: if (sc->sc_espintr & NCRINTR_RESEL) {
1.1 thorpej 1656: /*
1.25 pk 1657: * If we're trying to select a
1658: * target ourselves, push our command
1659: * back into the ready list.
1.1 thorpej 1660: */
1.25 pk 1661: if (sc->sc_state == NCR_SELECTING) {
1662: NCR_MISC(("backoff selector "));
1663: untimeout(ncr53c9x_timeout, ecb);
1664: sc_link = ecb->xs->sc_link;
1665: ti = &sc->sc_tinfo[sc_link->scsipi_scsi.target];
1666: TAILQ_INSERT_HEAD(&sc->ready_list, ecb, chain);
1667: ecb = sc->sc_nexus = NULL;
1668: }
1669: sc->sc_state = NCR_RESELECTED;
1.1 thorpej 1670: if (sc->sc_phase != MESSAGE_IN_PHASE) {
1.25 pk 1671: /*
1672: * Things are seriously fucked up.
1673: * Pull the brakes, i.e. reset
1674: */
1.1 thorpej 1675: printf("%s: target didn't identify\n",
1676: sc->sc_dev.dv_xname);
1677: ncr53c9x_init(sc, 1);
1.25 pk 1678: return (1);
1.1 thorpej 1679: }
1.25 pk 1680: /*
1681: * The C90 only inhibits FIFO writes until
1682: * reselection is complete, instead of
1683: * waiting until the interrupt status register
1684: * has been read. So, if the reselect happens
1685: * while we were entering a command bytes (for
1686: * another target) some of those bytes can
1687: * appear in the FIFO here, after the
1688: * interrupt is taken.
1689: */
1690: nfifo = NCR_READ_REG(sc,NCR_FFLAG) & NCRFIFO_FF;
1691: if (nfifo < 2 ||
1692: (nfifo > 2 &&
1693: sc->sc_rev != NCR_VARIANT_ESP100)) {
1694: printf("%s: RESELECT: %d bytes in FIFO! "
1695: "[intr %x, stat %x, step %d, prevphase %x]\n",
1696: sc->sc_dev.dv_xname,
1697: nfifo,
1698: sc->sc_espintr,
1699: sc->sc_espstat,
1700: sc->sc_espstep,
1701: sc->sc_prevphase);
1702: ncr53c9x_init(sc, 1);
1703: return (1);
1704: }
1705: sc->sc_selid = NCR_READ_REG(sc, NCR_FIFO);
1706: NCR_MISC(("selid=0x%2x ", sc->sc_selid));
1707:
1708: /* Handle identify message */
1.1 thorpej 1709: ncr53c9x_msgin(sc);
1.25 pk 1710: if (nfifo != 2) {
1711: /*
1712: * Note: this should not happen
1713: * with `dmaselect' on.
1714: */
1715: sc->sc_flags |= NCR_EXPECT_ILLCMD;
1716: NCRCMD(sc, NCRCMD_FLUSH);
1717: } else if (ncr53c9x_dmaselect &&
1718: sc->sc_rev == NCR_VARIANT_ESP100) {
1719: sc->sc_flags |= NCR_EXPECT_ILLCMD;
1720: }
1721:
1.1 thorpej 1722: if (sc->sc_state != NCR_CONNECTED) {
1723: /* IDENTIFY fail?! */
1724: printf("%s: identify failed\n",
1725: sc->sc_dev.dv_xname);
1726: ncr53c9x_init(sc, 1);
1.25 pk 1727: return (1);
1.1 thorpej 1728: }
1.25 pk 1729: goto shortcut; /* ie. next phase expected soon */
1730: }
1.1 thorpej 1731:
1.25 pk 1732: #define NCRINTR_DONE (NCRINTR_FC|NCRINTR_BS)
1733: if ((sc->sc_espintr & NCRINTR_DONE) == NCRINTR_DONE) {
1734: /*
1735: * Arbitration won; examine the `step' register
1736: * to determine how far the selection could progress.
1737: */
1.7 gwr 1738: ecb = sc->sc_nexus;
1.25 pk 1739: if (!ecb)
1740: panic("esp: no nexus");
1741:
1742: sc_link = ecb->xs->sc_link;
1743: ti = &sc->sc_tinfo[sc_link->scsipi_scsi.target];
1.1 thorpej 1744:
1.25 pk 1745: switch (sc->sc_espstep) {
1746: case 0:
1.1 thorpej 1747: /*
1.25 pk 1748: * The target did not respond with a
1749: * message out phase - probably an old
1750: * device that doesn't recognize ATN.
1751: * Clear ATN and just continue, the
1752: * target should be in the command
1753: * phase.
1754: * XXXX check for command phase?
1.1 thorpej 1755: */
1.25 pk 1756: NCRCMD(sc, NCRCMD_RSTATN);
1757: break;
1758: case 1:
1759: if ((ti->flags & T_NEGOTIATE) == 0) {
1760: printf("%s: step 1 & !NEG\n",
1761: sc->sc_dev.dv_xname);
1762: goto reset;
1.1 thorpej 1763: }
1.25 pk 1764: if (sc->sc_phase != MESSAGE_OUT_PHASE) {
1765: printf("%s: !MSGOUT\n",
1.1 thorpej 1766: sc->sc_dev.dv_xname);
1.25 pk 1767: goto reset;
1.1 thorpej 1768: }
1.25 pk 1769: /* Start negotiating */
1770: ti->period = sc->sc_minsync;
1771: ti->offset = 15;
1772: sc->sc_flags |= NCR_SYNCHNEGO;
1773: ncr53c9x_sched_msgout(SEND_SDTR);
1774: break;
1775: case 3:
1.5 pk 1776: /*
1.25 pk 1777: * Grr, this is supposed to mean
1778: * "target left command phase prematurely".
1779: * It seems to happen regularly when
1780: * sync mode is on.
1781: * Look at FIFO to see if command went out.
1782: * (Timing problems?)
1.5 pk 1783: */
1.25 pk 1784: if (ncr53c9x_dmaselect) {
1785: if (sc->sc_cmdlen == 0)
1.8 pk 1786: /* Hope for the best.. */
1787: break;
1.25 pk 1788: } else if ((NCR_READ_REG(sc, NCR_FFLAG)
1.1 thorpej 1789: & NCRFIFO_FF) == 0) {
1.25 pk 1790: /* Hope for the best.. */
1.1 thorpej 1791: break;
1792: }
1.25 pk 1793: printf("(%s:%d:%d): selection failed;"
1794: " %d left in FIFO "
1795: "[intr %x, stat %x, step %d]\n",
1.1 thorpej 1796: sc->sc_dev.dv_xname,
1.25 pk 1797: sc_link->scsipi_scsi.target,
1798: sc_link->scsipi_scsi.lun,
1799: NCR_READ_REG(sc, NCR_FFLAG)
1800: & NCRFIFO_FF,
1.1 thorpej 1801: sc->sc_espintr, sc->sc_espstat,
1802: sc->sc_espstep);
1803: NCRCMD(sc, NCRCMD_FLUSH);
1.25 pk 1804: ncr53c9x_sched_msgout(SEND_ABORT);
1805: return (1);
1806: case 2:
1807: /* Select stuck at Command Phase */
1808: NCRCMD(sc, NCRCMD_FLUSH);
1809: case 4:
1810: if (ncr53c9x_dmaselect &&
1811: sc->sc_cmdlen != 0)
1812: printf("(%s:%d:%d): select; "
1813: "%d left in DMA buffer "
1814: "[intr %x, stat %x, step %d]\n",
1815: sc->sc_dev.dv_xname,
1816: sc_link->scsipi_scsi.target,
1817: sc_link->scsipi_scsi.lun,
1818: sc->sc_cmdlen,
1819: sc->sc_espintr,
1820: sc->sc_espstat,
1821: sc->sc_espstep);
1822: /* So far, everything went fine */
1823: break;
1.1 thorpej 1824: }
1.25 pk 1825:
1826: ecb->flags |= ECB_NEXUS;
1827: ti->lubusy |= (1 << sc_link->scsipi_scsi.lun);
1828:
1829: sc->sc_prevphase = INVALID_PHASE; /* ?? */
1830: /* Do an implicit RESTORE POINTERS. */
1831: sc->sc_dp = ecb->daddr;
1832: sc->sc_dleft = ecb->dleft;
1833: sc->sc_state = NCR_CONNECTED;
1.1 thorpej 1834: break;
1835:
1.25 pk 1836: } else {
1.1 thorpej 1837:
1.25 pk 1838: printf("%s: unexpected status after select"
1839: ": [intr %x, stat %x, step %x]\n",
1840: sc->sc_dev.dv_xname,
1841: sc->sc_espintr, sc->sc_espstat,
1842: sc->sc_espstep);
1843: NCRCMD(sc, NCRCMD_FLUSH);
1844: DELAY(1);
1845: goto reset;
1.1 thorpej 1846: }
1.25 pk 1847: if (sc->sc_state == NCR_IDLE) {
1848: printf("%s: stray interrupt\n",
1849: sc->sc_dev.dv_xname);
1850: return (0);
1.1 thorpej 1851: }
1.25 pk 1852: break;
1.1 thorpej 1853:
1.25 pk 1854: case NCR_CONNECTED:
1855: if (sc->sc_flags & NCR_ICCS) {
1856: /* "Initiate Command Complete Steps" in progress */
1857: u_char msg;
1858:
1859: sc->sc_flags &= ~NCR_ICCS;
1860:
1861: if (!(sc->sc_espintr & NCRINTR_DONE)) {
1862: printf("%s: ICCS: "
1863: ": [intr %x, stat %x, step %x]\n",
1.1 thorpej 1864: sc->sc_dev.dv_xname,
1865: sc->sc_espintr, sc->sc_espstat,
1866: sc->sc_espstep);
1867: }
1.25 pk 1868: if ((NCR_READ_REG(sc, NCR_FFLAG)
1869: & NCRFIFO_FF) != 2) {
1870: int i = (NCR_READ_REG(sc, NCR_FFLAG)
1871: & NCRFIFO_FF) - 2;
1872: while (i--)
1873: (void) NCR_READ_REG(sc, NCR_FIFO);
1.1 thorpej 1874: }
1.25 pk 1875: ecb->stat = NCR_READ_REG(sc, NCR_FIFO);
1876: msg = NCR_READ_REG(sc, NCR_FIFO);
1877: NCR_PHASE(("<stat:(%x,%x)>", ecb->stat, msg));
1878: if (msg == MSG_CMDCOMPLETE) {
1879: ecb->dleft = (ecb->flags & ECB_TENTATIVE_DONE)
1880: ? 0
1881: : sc->sc_dleft;
1882: if ((ecb->flags & ECB_SENSE) == 0)
1883: ecb->xs->resid = ecb->dleft;
1884: sc->sc_state = NCR_CMDCOMPLETE;
1885: } else
1886: printf("%s: STATUS_PHASE: msg %d\n",
1887: sc->sc_dev.dv_xname, msg);
1888: NCRCMD(sc, NCRCMD_MSGOK);
1889: goto shortcut; /* ie. wait for disconnect */
1890: }
1891: break;
1892: default:
1893: panic("%s: invalid state: %d",
1894: sc->sc_dev.dv_xname,
1895: sc->sc_state);
1896: }
1.8 pk 1897:
1.25 pk 1898: /*
1899: * Driver is now in state NCR_CONNECTED, i.e. we
1900: * have a current command working the SCSI bus.
1901: */
1902: if (sc->sc_state != NCR_CONNECTED || ecb == NULL) {
1903: panic("esp no nexus");
1904: }
1.22 pk 1905:
1.25 pk 1906: switch (sc->sc_phase) {
1907: case MESSAGE_OUT_PHASE:
1908: NCR_PHASE(("MESSAGE_OUT_PHASE "));
1909: ncr53c9x_msgout(sc);
1910: sc->sc_prevphase = MESSAGE_OUT_PHASE;
1911: break;
1912: case MESSAGE_IN_PHASE:
1913: NCR_PHASE(("MESSAGE_IN_PHASE "));
1914: sc->sc_prevphase = MESSAGE_IN_PHASE;
1915: if (sc->sc_espintr & NCRINTR_BS) {
1916: NCRCMD(sc, NCRCMD_FLUSH);
1917: sc->sc_flags |= NCR_WAITI;
1918: NCRCMD(sc, NCRCMD_TRANS);
1919: } else if (sc->sc_espintr & NCRINTR_FC) {
1920: if ((sc->sc_flags & NCR_WAITI) == 0) {
1921: printf("%s: MSGIN: unexpected FC bit: "
1922: "[intr %x, stat %x, step %x]\n",
1923: sc->sc_dev.dv_xname,
1924: sc->sc_espintr, sc->sc_espstat,
1925: sc->sc_espstep);
1.8 pk 1926: }
1.25 pk 1927: sc->sc_flags &= ~NCR_WAITI;
1928: ncr53c9x_msgin(sc);
1929: } else {
1930: printf("%s: MSGIN: weird bits: "
1931: "[intr %x, stat %x, step %x]\n",
1932: sc->sc_dev.dv_xname,
1933: sc->sc_espintr, sc->sc_espstat,
1934: sc->sc_espstep);
1935: }
1936: goto shortcut; /* i.e. expect data to be ready */
1937: break;
1938: case COMMAND_PHASE:
1939: /*
1940: * Send the command block. Normally we don't see this
1941: * phase because the SEL_ATN command takes care of
1942: * all this. However, we end up here if either the
1943: * target or we wanted to exchange some more messages
1944: * first (e.g. to start negotiations).
1945: */
1946:
1947: NCR_PHASE(("COMMAND_PHASE 0x%02x (%d) ",
1948: ecb->cmd.cmd.opcode, ecb->clen));
1949: if (NCR_READ_REG(sc, NCR_FFLAG) & NCRFIFO_FF) {
1.1 thorpej 1950: NCRCMD(sc, NCRCMD_FLUSH);
1.25 pk 1951: DELAY(1);
1952: }
1953: if (ncr53c9x_dmaselect) {
1954: size_t size;
1955: /* setup DMA transfer for command */
1956: size = ecb->clen;
1957: sc->sc_cmdlen = size;
1958: sc->sc_cmdp = (caddr_t)&ecb->cmd.cmd;
1959: NCRDMA_SETUP(sc, &sc->sc_cmdp, &sc->sc_cmdlen,
1960: 0, &size);
1.1 thorpej 1961: /* Program the SCSI counter */
1962: NCR_WRITE_REG(sc, NCR_TCL, size);
1963: NCR_WRITE_REG(sc, NCR_TCM, size >> 8);
1964: if (sc->sc_cfg2 & NCRCFG2_FE) {
1965: NCR_WRITE_REG(sc, NCR_TCH, size >> 16);
1966: }
1.25 pk 1967:
1.1 thorpej 1968: /* load the count in */
1969: NCRCMD(sc, NCRCMD_NOP|NCRCMD_DMA);
1970:
1.25 pk 1971: /* start the command transfer */
1972: NCRCMD(sc, NCRCMD_TRANS | NCRCMD_DMA);
1.1 thorpej 1973: NCRDMA_GO(sc);
1.25 pk 1974: } else {
1975: u_char *cmd = (u_char *)&ecb->cmd.cmd;
1976: int i;
1977: /* Now the command into the FIFO */
1978: for (i = 0; i < ecb->clen; i++)
1979: NCR_WRITE_REG(sc, NCR_FIFO, *cmd++);
1980: NCRCMD(sc, NCRCMD_TRANS);
1981: }
1982: sc->sc_prevphase = COMMAND_PHASE;
1983: break;
1984: case DATA_OUT_PHASE:
1985: NCR_PHASE(("DATA_OUT_PHASE [%ld] ",(long)sc->sc_dleft));
1986: NCRCMD(sc, NCRCMD_FLUSH);
1987: size = min(sc->sc_dleft, sc->sc_maxxfer);
1988: NCRDMA_SETUP(sc, &sc->sc_dp, &sc->sc_dleft,
1989: 0, &size);
1990: sc->sc_prevphase = DATA_OUT_PHASE;
1991: goto setup_xfer;
1992: case DATA_IN_PHASE:
1993: NCR_PHASE(("DATA_IN_PHASE "));
1994: if (sc->sc_rev == NCR_VARIANT_ESP100)
1995: NCRCMD(sc, NCRCMD_FLUSH);
1996: size = min(sc->sc_dleft, sc->sc_maxxfer);
1997: NCRDMA_SETUP(sc, &sc->sc_dp, &sc->sc_dleft,
1998: 1, &size);
1999: sc->sc_prevphase = DATA_IN_PHASE;
2000: setup_xfer:
2001: /* Target returned to data phase: wipe "done" memory */
2002: ecb->flags &= ~ECB_TENTATIVE_DONE;
2003:
2004: /* Program the SCSI counter */
2005: NCR_WRITE_REG(sc, NCR_TCL, size);
2006: NCR_WRITE_REG(sc, NCR_TCM, size >> 8);
2007: if (sc->sc_cfg2 & NCRCFG2_FE) {
2008: NCR_WRITE_REG(sc, NCR_TCH, size >> 16);
1.1 thorpej 2009: }
1.25 pk 2010: /* load the count in */
2011: NCRCMD(sc, NCRCMD_NOP|NCRCMD_DMA);
2012:
2013: /*
2014: * Note that if `size' is 0, we've already transceived
2015: * all the bytes we want but we're still in DATA PHASE.
2016: * Apparently, the device needs padding. Also, a
2017: * transfer size of 0 means "maximum" to the chip
2018: * DMA logic.
2019: */
2020: NCRCMD(sc,
2021: (size==0?NCRCMD_TRPAD:NCRCMD_TRANS)|NCRCMD_DMA);
2022: NCRDMA_GO(sc);
2023: return (1);
2024: case STATUS_PHASE:
2025: NCR_PHASE(("STATUS_PHASE "));
2026: sc->sc_flags |= NCR_ICCS;
2027: NCRCMD(sc, NCRCMD_ICCS);
2028: sc->sc_prevphase = STATUS_PHASE;
2029: goto shortcut; /* i.e. expect status results soon */
2030: break;
2031: case INVALID_PHASE:
2032: break;
2033: default:
2034: printf("%s: unexpected bus phase; resetting\n",
2035: sc->sc_dev.dv_xname);
2036: goto reset;
1.1 thorpej 2037: }
1.25 pk 2038:
2039: out:
2040: return (1);
1.1 thorpej 2041:
2042: reset:
2043: ncr53c9x_init(sc, 1);
1.25 pk 2044: goto out;
1.1 thorpej 2045:
2046: finish:
2047: ncr53c9x_done(sc, ecb);
2048: goto out;
2049:
2050: sched:
2051: sc->sc_state = NCR_IDLE;
2052: ncr53c9x_sched(sc);
2053: goto out;
2054:
1.25 pk 2055: shortcut:
2056: /*
2057: * The idea is that many of the SCSI operations take very little
2058: * time, and going away and getting interrupted is too high an
2059: * overhead to pay. For example, selecting, sending a message
2060: * and command and then doing some work can be done in one "pass".
2061: *
2062: * The delay is a heuristic. It is 2 when at 20Mhz, 2 at 25Mhz and 1
2063: * at 40Mhz. This needs testing.
2064: */
2065: DELAY(50/sc->sc_freq);
2066: if (NCRDMA_ISINTR(sc))
2067: goto again;
2068: goto out;
1.1 thorpej 2069: }
2070:
2071: void
2072: ncr53c9x_abort(sc, ecb)
2073: struct ncr53c9x_softc *sc;
2074: struct ncr53c9x_ecb *ecb;
2075: {
2076:
2077: /* 2 secs for the abort */
2078: ecb->timeout = NCR_ABORT_TIMEOUT;
2079: ecb->flags |= ECB_ABORT;
2080:
2081: if (ecb == sc->sc_nexus) {
2082: /*
2083: * If we're still selecting, the message will be scheduled
2084: * after selection is complete.
2085: */
2086: if (sc->sc_state == NCR_CONNECTED)
2087: ncr53c9x_sched_msgout(SEND_ABORT);
2088:
2089: /*
2090: * Reschedule timeout. First, cancel a queued timeout (if any)
2091: * in case someone decides to call ncr53c9x_abort() from
2092: * elsewhere.
2093: */
2094: untimeout(ncr53c9x_timeout, ecb);
2095: timeout(ncr53c9x_timeout, ecb, (ecb->timeout * hz) / 1000);
2096: } else {
1.23 pk 2097: /* The command should be on the nexus list */
2098: if ((ecb->flags & ECB_NEXUS) == 0) {
2099: scsi_print_addr(ecb->xs->sc_link);
2100: printf("ncr53c9x_abort: not NEXUS\n");
2101: ncr53c9x_init(sc, 1);
2102: }
2103: /*
2104: * Just leave the command on the nexus list.
2105: * XXX - what choice do we have but to reset the SCSI
2106: * eventually?
2107: */
1.1 thorpej 2108: if (sc->sc_state == NCR_IDLE)
2109: ncr53c9x_sched(sc);
2110: }
2111: }
2112:
2113: void
2114: ncr53c9x_timeout(arg)
2115: void *arg;
2116: {
2117: struct ncr53c9x_ecb *ecb = arg;
1.18 bouyer 2118: struct scsipi_xfer *xs = ecb->xs;
2119: struct scsipi_link *sc_link = xs->sc_link;
1.1 thorpej 2120: struct ncr53c9x_softc *sc = sc_link->adapter_softc;
1.18 bouyer 2121: struct ncr53c9x_tinfo *ti = &sc->sc_tinfo[sc_link->scsipi_scsi.target];
1.1 thorpej 2122: int s;
2123:
1.18 bouyer 2124: scsi_print_addr(sc_link);
1.1 thorpej 2125: printf("%s: timed out [ecb %p (flags 0x%x, dleft %x, stat %x)], "
1.23 pk 2126: "<state %d, nexus %p, phase(l %x, c %x, p %x), resid %lx, "
1.1 thorpej 2127: "msg(q %x,o %x) %s>",
2128: sc->sc_dev.dv_xname,
2129: ecb, ecb->flags, ecb->dleft, ecb->stat,
1.23 pk 2130: sc->sc_state, sc->sc_nexus,
2131: NCR_READ_REG(sc, NCR_STAT),
2132: sc->sc_phase, sc->sc_prevphase,
1.1 thorpej 2133: (long)sc->sc_dleft, sc->sc_msgpriq, sc->sc_msgout,
2134: NCRDMA_ISACTIVE(sc) ? "DMA active" : "");
1.7 gwr 2135: #if NCR53C9X_DEBUG > 1
1.1 thorpej 2136: printf("TRACE: %s.", ecb->trace);
2137: #endif
2138:
2139: s = splbio();
2140:
2141: if (ecb->flags & ECB_ABORT) {
2142: /* abort timed out */
2143: printf(" AGAIN\n");
1.16 pk 2144:
1.1 thorpej 2145: ncr53c9x_init(sc, 1);
2146: } else {
2147: /* abort the operation that has timed out */
2148: printf("\n");
2149: xs->error = XS_TIMEOUT;
2150: ncr53c9x_abort(sc, ecb);
1.16 pk 2151:
2152: /* Disable sync mode if stuck in a data phase */
2153: if (ecb == sc->sc_nexus &&
2154: (ti->flags & T_SYNCMODE) != 0 &&
2155: (sc->sc_phase & (MSGI|CDI)) == 0) {
1.18 bouyer 2156: scsi_print_addr(sc_link);
1.16 pk 2157: printf("sync negotiation disabled\n");
1.18 bouyer 2158: sc->sc_cfflags |= (1<<(sc_link->scsipi_scsi.target+8));
1.16 pk 2159: }
1.1 thorpej 2160: }
2161:
2162: splx(s);
2163: }
CVSweb <webmaster@jp.NetBSD.org>