CVS log for src/sys/dev/ic/dwc_gmac_var.h

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awge(4): Narrow scope of `core' lock and rename to mcast lock.

Sprinkle locking notes.

Proposed at:

https://mail-index.netbsd.org/source-changes-d/2024/08/10/msg014251.html

Comment-only changes from the updated patch at:

https://mail-index.netbsd.org/source-changes-d/2024/08/10/msg014252.html

awge(4): MP improvements

Remove the non-MP-safe scaffolding and make the locking less
coarse.

KNF

Use __BIT.

Fix a comment. arm32 stopped using 8K pages a long time ago.

Eliminate use of IFF_OACTIVE.

Mostly merge changes from HEAD upto 20200411

 if_flags is neither int nor short. It's unsigned short.

move DWCGMAC_MPSAFE into dwc_gmac_var.h and introduce an
additional define that is 0 or FDT_INTR_MPSAFE that the
frontends can use when passing to fdtbus_intr_establish().

with NET_MPSAFE enabled, this avoids hangs seen on rock64,
as well as finishing the MPSAFE port for this driver.

XXX: still don't know why the existing hangs occur.

 Add rnd(9) support.

Sync with HEAD

Pass the phy ID to dwc_gmac_attach.

Sync with head

Bring back support for enhanced descriptor format in newer core versions.
Fix a few endian bugs and check the main core version before trying to
read the hardware feature mask. Only read the hardware feature register
if core version reported is >= 3.5 (all my older hardware reports 0).
With some hints and patches from jared, and ok from aymeric

Ssync with HEAD

Revert the recent support for enhanced descriptors until a viable solution is
found.

It broke at least Cubietruck, Orange Pi One, and maybe Rock64 ethernets in
different ways. Unfortunately it works on my Olinuxino Micro and Lime 2 so I
can't reproduce the bugs for now.

Should fix PR#53637

Add support for the enhanced descriptors feature.

This makes "recent" dwc gmac controllers, as found e.g. on the Cyclone V, work.
The change was also tested working on an Allwinner A20 which doesn't have the
feature.

No negative reaction on port-arm.

Sync with HEAD

dwc_gmac_attach: return non-zero on failure

Sync with HEAD

Add flag for disabling store-and-forward mode, and a callback for notifying
bus glue that the link speed has changed.

update from HEAD

Sync with HEAD

Sync with HEAD

file dwc_gmac_var.h was added on branch tls-maxphys on 2017-12-03 11:37:03 +0000

Merge from nick-nhusb - some MPification

First pass at making this driver and attachments NET_MPSAFE aware.

I've not tested this yet.

Pull up following revision(s) (requested by snj in ticket #481):
	sys/dev/ic/dwc_gmac_var.h: revision 1.6
	sys/dev/ic/dwc_gmac_reg.h: revision 1.13
	sys/dev/ic/dwc_gmac.c: revision 1.25
	sys/dev/ic/dwc_gmac.c: revision 1.26
	sys/dev/ic/dwc_gmac.c: revision 1.28
	sys/dev/ic/dwc_gmac.c: revision 1.31
- Add MII flow control support
- Set "disable jabber" and "auto padding/CRC stripping" bits in MAC conf
- Write intr mask to intr mask register, not status
- Setup both TX and RX burst modes
- Setup both TX and RX store & forward modes
- Correct an issue with the "end" descriptor passed to dwc_gmac_txdesc_sync
  in dwc_gmac_tx_intr
ok martin@
Revert previous change to dwc_gmac_txintr() - while it looks strange at
first sight (and sorry I didn't spot it when reviewing), it is a small
optimization and actually correct.
Add a comment explaining it.
After handling an interrupt, try to handle more packets as we may have
space in the descriptor ring now.
Pointed out by Jared.
fix a couple txq fencepost issues, from FUKAUMI Naoki <fun@naobsd.org>

- Add MII flow control support
- Set "disable jabber" and "auto padding/CRC stripping" bits in MAC conf
- Write intr mask to intr mask register, not status
- Setup both TX and RX burst modes
- Setup both TX and RX store & forward modes
- Correct an issue with the "end" descriptor passed to dwc_gmac_txdesc_sync
  in dwc_gmac_tx_intr

ok martin@

Pull up following revision(s) (requested by martin in ticket #189):
	sys/dev/ic/dwc_gmac.c: revision 1.1-1.24
	sys/dev/ic/dwc_gmac_reg.h: revision 1.1-1.12
	sys/dev/ic/dwc_gmac_var.h: revision 1.1-1.5
Add support for Synopsis Designware GMAC ethernet core, as found on
various Allwiner boards and used by the awge(4) driver.

file dwc_gmac_var.h was added on branch netbsd-7 on 2014-11-09 19:06:57 +0000

Greatly simplify ioctl handling by fully relying on ether_ioctl and a
ifflags-change callback, together with a shadow copy of the last active
interface flags.
Fix ALLMULTI vs. PROMISC handling.
Fix mac hash filter calculation by reversing the crc bits (pointed out
by Jared).

add $NetBSD$ to top of files

Simplify device property handling by moving it into the core driver.
Overriding the MAC address now works again.

Make the MII clock variable and passed in from the frontend.

Add work-in-progress driver for the Designware GMAC core, found on some
allwinner chips.