Annotation of src/sys/dev/ic/com.c, Revision 1.346
1.346 ! bouyer 1: /* $NetBSD: com.c,v 1.345 2017/10/31 10:45:19 martin Exp $ */
1.38 cgd 2:
1.1 cgd 3: /*-
1.269 ad 4: * Copyright (c) 1998, 1999, 2004, 2008 The NetBSD Foundation, Inc.
1.146 mycroft 5: * All rights reserved.
1.99 mycroft 6: *
1.146 mycroft 7: * This code is derived from software contributed to The NetBSD Foundation
8: * by Charles M. Hannum.
1.99 mycroft 9: *
10: * Redistribution and use in source and binary forms, with or without
11: * modification, are permitted provided that the following conditions
12: * are met:
13: * 1. Redistributions of source code must retain the above copyright
14: * notice, this list of conditions and the following disclaimer.
15: * 2. Redistributions in binary form must reproduce the above copyright
16: * notice, this list of conditions and the following disclaimer in the
17: * documentation and/or other materials provided with the distribution.
18: *
1.146 mycroft 19: * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20: * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21: * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22: * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23: * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24: * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25: * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26: * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27: * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28: * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29: * POSSIBILITY OF SUCH DAMAGE.
1.99 mycroft 30: */
31:
32: /*
1.1 cgd 33: * Copyright (c) 1991 The Regents of the University of California.
34: * All rights reserved.
35: *
36: * Redistribution and use in source and binary forms, with or without
37: * modification, are permitted provided that the following conditions
38: * are met:
39: * 1. Redistributions of source code must retain the above copyright
40: * notice, this list of conditions and the following disclaimer.
41: * 2. Redistributions in binary form must reproduce the above copyright
42: * notice, this list of conditions and the following disclaimer in the
43: * documentation and/or other materials provided with the distribution.
1.217 agc 44: * 3. Neither the name of the University nor the names of its contributors
1.1 cgd 45: * may be used to endorse or promote products derived from this software
46: * without specific prior written permission.
47: *
48: * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
49: * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
50: * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
51: * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
52: * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
53: * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
54: * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
55: * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
56: * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
57: * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
58: * SUCH DAMAGE.
59: *
1.38 cgd 60: * @(#)com.c 7.5 (Berkeley) 5/16/91
1.1 cgd 61: */
62:
63: /*
1.99 mycroft 64: * COM driver, uses National Semiconductor NS16450/NS16550AF UART
1.116 fvdl 65: * Supports automatic hardware flow control on StarTech ST16C650A UART
1.1 cgd 66: */
1.191 lukem 67:
68: #include <sys/cdefs.h>
1.346 ! bouyer 69: __KERNEL_RCSID(0, "$NetBSD: com.c,v 1.345 2017/10/31 10:45:19 martin Exp $");
1.145 jonathan 70:
1.185 lukem 71: #include "opt_com.h"
1.145 jonathan 72: #include "opt_ddb.h"
1.185 lukem 73: #include "opt_kgdb.h"
1.213 martin 74: #include "opt_lockdebug.h"
75: #include "opt_multiprocessor.h"
1.224 simonb 76: #include "opt_ntp.h"
1.115 explorer 77:
1.227 thorpej 78: /* The COM16650 option was renamed to COM_16650. */
79: #ifdef COM16650
80: #error Obsolete COM16650 option; use COM_16650 instead.
81: #endif
82:
1.186 uwe 83: /*
84: * Override cnmagic(9) macro before including <sys/systm.h>.
85: * We need to know if cn_check_magic triggered debugger, so set a flag.
86: * Callers of cn_check_magic must declare int cn_trapped = 0;
87: * XXX: this is *ugly*!
88: */
89: #define cn_trap() \
90: do { \
91: console_debugger(); \
92: cn_trapped = 1; \
1.316 martin 93: (void)cn_trapped; \
1.186 uwe 94: } while (/* CONSTCOND */ 0)
95:
1.14 mycroft 96: #include <sys/param.h>
97: #include <sys/systm.h>
98: #include <sys/ioctl.h>
99: #include <sys/select.h>
1.234 ws 100: #include <sys/poll.h>
1.14 mycroft 101: #include <sys/tty.h>
102: #include <sys/proc.h>
103: #include <sys/conf.h>
104: #include <sys/file.h>
105: #include <sys/uio.h>
106: #include <sys/kernel.h>
107: #include <sys/syslog.h>
1.21 mycroft 108: #include <sys/device.h>
1.127 mycroft 109: #include <sys/malloc.h>
1.144 jonathan 110: #include <sys/timepps.h>
1.149 thorpej 111: #include <sys/vnode.h>
1.243 elad 112: #include <sys/kauth.h>
1.263 ad 113: #include <sys/intr.h>
1.305 christos 114: #ifdef RND_COM
1.333 riastrad 115: #include <sys/rndsource.h>
1.305 christos 116: #endif
117:
1.14 mycroft 118:
1.265 ad 119: #include <sys/bus.h>
1.14 mycroft 120:
1.113 thorpej 121: #include <dev/ic/comreg.h>
122: #include <dev/ic/comvar.h>
1.60 cgd 123: #include <dev/ic/ns16550reg.h>
1.116 fvdl 124: #include <dev/ic/st16650reg.h>
1.65 christos 125: #include <dev/ic/hayespreg.h>
1.62 mycroft 126: #define com_lcr com_cfcr
1.106 drochner 127: #include <dev/cons.h>
1.14 mycroft 128:
1.343 riastrad 129: #include "ioconf.h"
130:
1.247 gdamore 131: #ifdef COM_REGMAP
132: #define CSR_WRITE_1(r, o, v) \
133: bus_space_write_1((r)->cr_iot, (r)->cr_ioh, (r)->cr_map[o], v)
134: #define CSR_READ_1(r, o) \
135: bus_space_read_1((r)->cr_iot, (r)->cr_ioh, (r)->cr_map[o])
136: #define CSR_WRITE_2(r, o, v) \
137: bus_space_write_2((r)->cr_iot, (r)->cr_ioh, (r)->cr_map[o], v)
138: #define CSR_READ_2(r, o) \
139: bus_space_read_2((r)->cr_iot, (r)->cr_ioh, (r)->cr_map[o])
140: #define CSR_WRITE_MULTI(r, o, p, n) \
141: bus_space_write_multi_1((r)->cr_iot, (r)->cr_ioh, (r)->cr_map[o], p, n)
142: #else
143: #define CSR_WRITE_1(r, o, v) \
144: bus_space_write_1((r)->cr_iot, (r)->cr_ioh, o, v)
145: #define CSR_READ_1(r, o) \
146: bus_space_read_1((r)->cr_iot, (r)->cr_ioh, o)
147: #define CSR_WRITE_2(r, o, v) \
148: bus_space_write_2((r)->cr_iot, (r)->cr_ioh, o, v)
149: #define CSR_READ_2(r, o) \
150: bus_space_read_2((r)->cr_iot, (r)->cr_ioh, o)
151: #define CSR_WRITE_MULTI(r, o, p, n) \
152: bus_space_write_multi_1((r)->cr_iot, (r)->cr_ioh, o, p, n)
1.65 christos 153: #endif
1.102 thorpej 154:
1.247 gdamore 155:
1.197 simonb 156: static void com_enable_debugport(struct com_softc *);
1.186 uwe 157:
1.197 simonb 158: void com_config(struct com_softc *);
159: void com_shutdown(struct com_softc *);
1.210 thorpej 160: int comspeed(long, long, int);
1.197 simonb 161: static u_char cflag2lcr(tcflag_t);
162: int comparam(struct tty *, struct termios *);
163: void comstart(struct tty *);
164: int comhwiflow(struct tty *, int);
165:
166: void com_loadchannelregs(struct com_softc *);
167: void com_hwiflow(struct com_softc *);
168: void com_break(struct com_softc *, int);
169: void com_modem(struct com_softc *, int);
170: void tiocm_to_com(struct com_softc *, u_long, int);
171: int com_to_tiocm(struct com_softc *);
172: void com_iflush(struct com_softc *);
1.80 christos 173:
1.247 gdamore 174: int com_common_getc(dev_t, struct com_regs *);
1.289 dyoung 175: static void com_common_putc(dev_t, struct com_regs *, int);
1.102 thorpej 176:
1.247 gdamore 177: int cominit(struct com_regs *, int, int, int, tcflag_t);
1.187 simonb 178:
1.289 dyoung 179: static int comcnreattach(void);
180:
1.197 simonb 181: int comcngetc(dev_t);
182: void comcnputc(dev_t, int);
183: void comcnpollc(dev_t, int);
1.80 christos 184:
1.99 mycroft 185: #define integrate static inline
1.302 jakllsch 186: void comsoft(void *);
1.197 simonb 187: integrate void com_rxsoft(struct com_softc *, struct tty *);
188: integrate void com_txsoft(struct com_softc *, struct tty *);
189: integrate void com_stsoft(struct com_softc *, struct tty *);
190: integrate void com_schedrx(struct com_softc *);
191: void comdiag(void *);
1.127 mycroft 192:
1.199 gehenna 193: dev_type_open(comopen);
194: dev_type_close(comclose);
195: dev_type_read(comread);
196: dev_type_write(comwrite);
197: dev_type_ioctl(comioctl);
198: dev_type_stop(comstop);
199: dev_type_tty(comtty);
200: dev_type_poll(compoll);
201:
1.289 dyoung 202: static struct comcons_info comcons_info;
203:
204: /*
205: * Following are all routines needed for COM to act as console
206: */
207: static struct consdev comcons = {
208: NULL, NULL, comcngetc, comcnputc, comcnpollc, NULL, NULL, NULL,
209: NODEV, CN_NORMAL
210: };
211:
212:
1.199 gehenna 213: const struct cdevsw com_cdevsw = {
1.323 dholland 214: .d_open = comopen,
215: .d_close = comclose,
216: .d_read = comread,
217: .d_write = comwrite,
218: .d_ioctl = comioctl,
219: .d_stop = comstop,
220: .d_tty = comtty,
221: .d_poll = compoll,
222: .d_mmap = nommap,
223: .d_kqfilter = ttykqfilter,
1.326 dholland 224: .d_discard = nodiscard,
1.323 dholland 225: .d_flag = D_TTY
1.199 gehenna 226: };
227:
1.127 mycroft 228: /*
229: * Make this an option variable one can patch.
230: * But be warned: this must be a power of 2!
231: */
232: u_int com_rbuf_size = COM_RING_SIZE;
233:
234: /* Stop input when 3/4 of the ring is full; restart when only 1/4 is full. */
235: u_int com_rbuf_hiwat = (COM_RING_SIZE * 1) / 4;
236: u_int com_rbuf_lowat = (COM_RING_SIZE * 3) / 4;
237:
1.247 gdamore 238: static int comconsattached;
1.186 uwe 239: static struct cnm_state com_cnm_state;
1.99 mycroft 240:
1.1 cgd 241: #ifdef KGDB
1.102 thorpej 242: #include <sys/kgdb.h>
1.106 drochner 243:
1.247 gdamore 244: static struct com_regs comkgdbregs;
1.106 drochner 245: static int com_kgdb_attached;
1.102 thorpej 246:
1.197 simonb 247: int com_kgdb_getc(void *);
248: void com_kgdb_putc(void *, int);
1.102 thorpej 249: #endif /* KGDB */
1.1 cgd 250:
1.247 gdamore 251: #ifdef COM_REGMAP
252: /* initializer for typical 16550-ish hardware */
1.344 jmcneill 253: #define COM_REG_STD { \
1.317 kiyohara 254: com_data, com_data, com_dlbl, com_dlbh, com_ier, com_iir, com_fifo, \
255: com_efr, com_lcr, com_mcr, com_lsr, com_msr, 0, 0, 0, 0, 0, 0, 0, 0, \
1.346 ! bouyer 256: 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, com_usr, com_tfl, com_rfl, \
! 257: 0, 0, 0, 0, 0, 0, 0, com_halt }
1.317 kiyohara 258:
1.346 ! bouyer 259: const bus_size_t com_std_map[42] = COM_REG_STD;
1.247 gdamore 260: #endif /* COM_REGMAP */
261:
1.328 christos 262: #define COMDIALOUT_MASK TTDIALOUT_MASK
1.149 thorpej 263:
1.328 christos 264: #define COMUNIT(x) TTUNIT(x)
265: #define COMDIALOUT(x) TTDIALOUT(x)
1.149 thorpej 266:
267: #define COM_ISALIVE(sc) ((sc)->enabled != 0 && \
1.276 cube 268: device_is_active((sc)->sc_dev))
1.1 cgd 269:
1.160 thorpej 270: #define BR BUS_SPACE_BARRIER_READ
271: #define BW BUS_SPACE_BARRIER_WRITE
1.247 gdamore 272: #define COM_BARRIER(r, f) \
273: bus_space_barrier((r)->cr_iot, (r)->cr_ioh, 0, (r)->cr_nports, (f))
1.160 thorpej 274:
1.210 thorpej 275: /*ARGSUSED*/
1.21 mycroft 276: int
1.256 christos 277: comspeed(long speed, long frequency, int type)
1.1 cgd 278: {
1.21 mycroft 279: #define divrnd(n, q) (((n)*2/(q)+1)/2) /* divide and round off */
280:
281: int x, err;
1.281 matt 282: int divisor = 16;
283:
284: if ((type == COM_TYPE_OMAP) && (speed > 230400)) {
285: divisor = 13;
286: }
1.21 mycroft 287:
288: if (speed == 0)
1.99 mycroft 289: return (0);
1.324 christos 290: if (speed < 0)
1.99 mycroft 291: return (-1);
1.281 matt 292: x = divrnd(frequency / divisor, speed);
1.21 mycroft 293: if (x <= 0)
1.99 mycroft 294: return (-1);
1.281 matt 295: err = divrnd(((quad_t)frequency) * 1000 / divisor, speed * x) - 1000;
1.21 mycroft 296: if (err < 0)
297: err = -err;
298: if (err > COM_TOLERANCE)
1.99 mycroft 299: return (-1);
300: return (x);
1.21 mycroft 301:
1.172 thorpej 302: #undef divrnd
1.21 mycroft 303: }
304:
1.99 mycroft 305: #ifdef COM_DEBUG
1.101 mycroft 306: int com_debug = 0;
307:
1.235 kleink 308: void comstatus(struct com_softc *, const char *);
1.99 mycroft 309: void
1.235 kleink 310: comstatus(struct com_softc *sc, const char *str)
1.99 mycroft 311: {
312: struct tty *tp = sc->sc_tty;
313:
1.277 cube 314: aprint_normal_dev(sc->sc_dev,
315: "%s %cclocal %cdcd %cts_carr_on %cdtr %ctx_stopped\n",
316: str,
1.218 christos 317: ISSET(tp->t_cflag, CLOCAL) ? '+' : '-',
318: ISSET(sc->sc_msr, MSR_DCD) ? '+' : '-',
319: ISSET(tp->t_state, TS_CARR_ON) ? '+' : '-',
320: ISSET(sc->sc_mcr, MCR_DTR) ? '+' : '-',
321: sc->sc_tx_stopped ? '+' : '-');
1.99 mycroft 322:
1.277 cube 323: aprint_normal_dev(sc->sc_dev,
324: "%s %ccrtscts %ccts %cts_ttstop %crts rx_flags=0x%x\n",
325: str,
1.218 christos 326: ISSET(tp->t_cflag, CRTSCTS) ? '+' : '-',
327: ISSET(sc->sc_msr, MSR_CTS) ? '+' : '-',
328: ISSET(tp->t_state, TS_TTSTOP) ? '+' : '-',
329: ISSET(sc->sc_mcr, MCR_RTS) ? '+' : '-',
1.101 mycroft 330: sc->sc_rx_flags);
1.99 mycroft 331: }
332: #endif
333:
1.21 mycroft 334: int
1.247 gdamore 335: com_probe_subr(struct com_regs *regs)
1.21 mycroft 336: {
337:
1.1 cgd 338: /* force access to id reg */
1.247 gdamore 339: CSR_WRITE_1(regs, COM_REG_LCR, LCR_8BITS);
340: CSR_WRITE_1(regs, COM_REG_IIR, 0);
341: if ((CSR_READ_1(regs, COM_REG_LCR) != LCR_8BITS) ||
342: (CSR_READ_1(regs, COM_REG_IIR) & 0x38))
1.99 mycroft 343: return (0);
1.21 mycroft 344:
1.99 mycroft 345: return (1);
1.1 cgd 346: }
347:
1.65 christos 348: int
1.247 gdamore 349: comprobe1(bus_space_tag_t iot, bus_space_handle_t ioh)
1.64 christos 350: {
1.247 gdamore 351: struct com_regs regs;
1.64 christos 352:
1.247 gdamore 353: regs.cr_iot = iot;
354: regs.cr_ioh = ioh;
355: #ifdef COM_REGMAP
1.287 yamt 356: memcpy(regs.cr_map, com_std_map, sizeof (regs.cr_map));
1.247 gdamore 357: #endif
1.64 christos 358:
1.247 gdamore 359: return com_probe_subr(®s);
1.64 christos 360: }
361:
1.264 ad 362: /*
363: * No locking in this routine; it is only called during attach,
364: * or with the port already locked.
365: */
1.104 drochner 366: static void
1.197 simonb 367: com_enable_debugport(struct com_softc *sc)
1.104 drochner 368: {
1.263 ad 369:
1.104 drochner 370: /* Turn on line break interrupt, set carrier. */
1.337 christos 371: sc->sc_ier = IER_ERLS;
1.209 thorpej 372: if (sc->sc_type == COM_TYPE_PXA2x0)
1.208 scw 373: sc->sc_ier |= IER_EUART | IER_ERXTOUT;
1.336 jmcneill 374: if (sc->sc_type == COM_TYPE_INGENIC ||
375: sc->sc_type == COM_TYPE_TEGRA)
1.330 macallan 376: sc->sc_ier |= IER_ERXTOUT;
1.247 gdamore 377: CSR_WRITE_1(&sc->sc_regs, COM_REG_IER, sc->sc_ier);
1.104 drochner 378: SET(sc->sc_mcr, MCR_DTR | MCR_RTS);
1.247 gdamore 379: CSR_WRITE_1(&sc->sc_regs, COM_REG_MCR, sc->sc_mcr);
1.104 drochner 380: }
1.1 cgd 381:
1.29 mycroft 382: void
1.197 simonb 383: com_attach_subr(struct com_softc *sc)
1.29 mycroft 384: {
1.247 gdamore 385: struct com_regs *regsp = &sc->sc_regs;
1.127 mycroft 386: struct tty *tp;
1.116 fvdl 387: u_int8_t lcr;
1.208 scw 388: const char *fifo_msg = NULL;
1.307 macallan 389: prop_dictionary_t dict;
390: bool is_console = true;
1.117 mycroft 391:
1.257 uwe 392: aprint_naive("\n");
393:
1.307 macallan 394: dict = device_properties(sc->sc_dev);
395: prop_dictionary_get_bool(dict, "is_console", &is_console);
1.260 ad 396: callout_init(&sc->sc_diag_callout, 0);
1.267 ad 397: mutex_init(&sc->sc_lock, MUTEX_DEFAULT, IPL_HIGH);
1.170 thorpej 398:
1.344 jmcneill 399: #if defined(COM_16650)
400: sc->sc_type = COM_TYPE_16650;
401: #elif defined(COM_16750)
402: sc->sc_type = COM_TYPE_16750;
403: #elif defined(COM_AWIN)
404: sc->sc_type = COM_TYPE_SUNXI;
405: #elif defined(COM_HAYESP)
406: sc->sc_type = COM_TYPE_HAYESP;
407: #elif defined(COM_PXA2X0)
408: sc->sc_type = COM_TYPE_PXA2x0;
409: #endif
410:
1.117 mycroft 411: /* Disable interrupts before configuring the device. */
1.209 thorpej 412: if (sc->sc_type == COM_TYPE_PXA2x0)
1.208 scw 413: sc->sc_ier = IER_EUART;
414: else
415: sc->sc_ier = 0;
1.1 cgd 416:
1.247 gdamore 417: CSR_WRITE_1(regsp, COM_REG_IER, sc->sc_ier);
418:
1.297 dyoung 419: if (bus_space_is_equal(regsp->cr_iot, comcons_info.regs.cr_iot) &&
1.289 dyoung 420: regsp->cr_iobase == comcons_info.regs.cr_iobase) {
1.105 drochner 421: comconsattached = 1;
422:
1.289 dyoung 423: if (cn_tab == NULL && comcnreattach() != 0) {
1.294 tsutsui 424: printf("can't re-init serial console @%lx\n",
425: (u_long)comcons_info.regs.cr_iobase);
1.289 dyoung 426: }
427:
1.344 jmcneill 428: switch (sc->sc_type) {
429: case COM_TYPE_16750:
430: case COM_TYPE_SUNXI:
431: /* Use in comintr(). */
432: sc->sc_lcr = cflag2lcr(comcons_info.cflag);
433: break;
434: }
1.312 kiyohara 435:
1.96 mycroft 436: /* Make sure the console is always "hardwired". */
1.226 thorpej 437: delay(10000); /* wait for output to finish */
1.307 macallan 438: if (is_console) {
439: SET(sc->sc_hwflags, COM_HW_CONSOLE);
440: }
441:
1.99 mycroft 442: SET(sc->sc_swflags, TIOCFLAG_SOFTCAR);
1.75 cgd 443: }
1.26 cgd 444:
1.247 gdamore 445: /* Probe for FIFO */
446: switch (sc->sc_type) {
447: case COM_TYPE_HAYESP:
448: goto fifodone;
449:
450: case COM_TYPE_AU1x00:
451: sc->sc_fifolen = 16;
452: fifo_msg = "Au1X00 UART, working fifo";
453: SET(sc->sc_hwflags, COM_HW_FIFO);
454: goto fifodelay;
1.311 kiyohara 455:
1.286 matt 456: case COM_TYPE_16550_NOERS:
457: sc->sc_fifolen = 16;
458: fifo_msg = "ns16650, no ERS, working fifo";
459: SET(sc->sc_hwflags, COM_HW_FIFO);
460: goto fifodelay;
461:
1.302 jakllsch 462: case COM_TYPE_OMAP:
463: sc->sc_fifolen = 64;
464: fifo_msg = "OMAP UART, working fifo";
465: SET(sc->sc_hwflags, COM_HW_FIFO);
466: goto fifodelay;
1.329 macallan 467:
468: case COM_TYPE_INGENIC:
1.330 macallan 469: sc->sc_fifolen = 16;
1.329 macallan 470: fifo_msg = "Ingenic UART, working fifo";
471: SET(sc->sc_hwflags, COM_HW_FIFO);
1.330 macallan 472: SET(sc->sc_hwflags, COM_HW_NOIEN);
1.329 macallan 473: goto fifodelay;
1.338 jmcneill 474:
475: case COM_TYPE_TEGRA:
476: sc->sc_fifolen = 8;
477: fifo_msg = "Tegra UART, working fifo";
478: SET(sc->sc_hwflags, COM_HW_FIFO);
479: CSR_WRITE_1(regsp, COM_REG_FIFO,
480: FIFO_ENABLE | FIFO_RCV_RST | FIFO_XMT_RST | FIFO_TRIGGER_1);
481: goto fifodelay;
1.340 jmcneill 482:
483: case COM_TYPE_BCMAUXUART:
1.342 nat 484: sc->sc_fifolen = 1;
1.340 jmcneill 485: fifo_msg = "BCM AUX UART, working fifo";
486: SET(sc->sc_hwflags, COM_HW_FIFO);
487: CSR_WRITE_1(regsp, COM_REG_FIFO,
488: FIFO_ENABLE | FIFO_RCV_RST | FIFO_XMT_RST | FIFO_TRIGGER_1);
489: goto fifodelay;
1.302 jakllsch 490: }
1.99 mycroft 491:
492: sc->sc_fifolen = 1;
1.1 cgd 493: /* look for a NS 16550AF UART with FIFOs */
1.332 skrll 494: if (sc->sc_type == COM_TYPE_INGENIC) {
1.330 macallan 495: CSR_WRITE_1(regsp, COM_REG_FIFO,
496: FIFO_ENABLE | FIFO_RCV_RST | FIFO_XMT_RST |
497: FIFO_TRIGGER_14 | FIFO_UART_ON);
498: } else
499: CSR_WRITE_1(regsp, COM_REG_FIFO,
500: FIFO_ENABLE | FIFO_RCV_RST | FIFO_XMT_RST | FIFO_TRIGGER_14);
1.20 mycroft 501: delay(100);
1.247 gdamore 502: if (ISSET(CSR_READ_1(regsp, COM_REG_IIR), IIR_FIFO_MASK)
1.99 mycroft 503: == IIR_FIFO_MASK)
1.247 gdamore 504: if (ISSET(CSR_READ_1(regsp, COM_REG_FIFO), FIFO_TRIGGER_14)
1.99 mycroft 505: == FIFO_TRIGGER_14) {
1.62 mycroft 506: SET(sc->sc_hwflags, COM_HW_FIFO);
1.116 fvdl 507:
1.344 jmcneill 508: fifo_msg = "ns16550a, working fifo";
509:
1.116 fvdl 510: /*
511: * IIR changes into the EFR if LCR is set to LCR_EERS
512: * on 16650s. We also know IIR != 0 at this point.
513: * Write 0 into the EFR, and read it. If the result
514: * is 0, we have a 16650.
515: *
516: * Older 16650s were broken; the test to detect them
517: * is taken from the Linux driver. Apparently
518: * setting DLAB enable gives access to the EFR on
519: * these chips.
520: */
1.344 jmcneill 521: if (sc->sc_type == COM_TYPE_16650) {
522: lcr = CSR_READ_1(regsp, COM_REG_LCR);
523: CSR_WRITE_1(regsp, COM_REG_LCR, LCR_EERS);
524: CSR_WRITE_1(regsp, COM_REG_EFR, 0);
1.247 gdamore 525: if (CSR_READ_1(regsp, COM_REG_EFR) == 0) {
1.344 jmcneill 526: CSR_WRITE_1(regsp, COM_REG_LCR,
527: lcr | LCR_DLAB);
528: if (CSR_READ_1(regsp, COM_REG_EFR) == 0) {
529: CLR(sc->sc_hwflags, COM_HW_FIFO);
530: sc->sc_fifolen = 0;
531: } else {
532: SET(sc->sc_hwflags, COM_HW_FLOW);
533: sc->sc_fifolen = 32;
534: }
535: } else
536: sc->sc_fifolen = 16;
537:
538: CSR_WRITE_1(regsp, COM_REG_LCR, lcr);
539: if (sc->sc_fifolen == 0)
540: fifo_msg = "st16650, broken fifo";
541: else if (sc->sc_fifolen == 32)
542: fifo_msg = "st16650a, working fifo";
543: else
544: fifo_msg = "ns16550a, working fifo";
545: }
1.116 fvdl 546:
1.314 kiyohara 547: /*
548: * TL16C750 can enable 64byte FIFO, only when DLAB
549: * is 1. However, some 16750 may always enable. For
550: * example, restrictions according to DLAB in a data
551: * sheet for SC16C750 were not described.
552: * Please enable 'options COM_16650', supposing you
553: * use SC16C750. Probably 32 bytes of FIFO and HW FLOW
554: * should become effective.
555: */
1.344 jmcneill 556: if (sc->sc_type == COM_TYPE_16750) {
557: uint8_t iir1, iir2;
558: uint8_t fcr = FIFO_ENABLE | FIFO_TRIGGER_14;
559:
560: lcr = CSR_READ_1(regsp, COM_REG_LCR);
561: CSR_WRITE_1(regsp, COM_REG_LCR,
562: lcr & ~LCR_DLAB);
563: CSR_WRITE_1(regsp, COM_REG_FIFO,
564: fcr | FIFO_64B_ENABLE);
565: iir1 = CSR_READ_1(regsp, COM_REG_IIR);
1.314 kiyohara 566: CSR_WRITE_1(regsp, COM_REG_FIFO, fcr);
1.344 jmcneill 567: CSR_WRITE_1(regsp, COM_REG_LCR, lcr | LCR_DLAB);
568: CSR_WRITE_1(regsp, COM_REG_FIFO,
569: fcr | FIFO_64B_ENABLE);
570: iir2 = CSR_READ_1(regsp, COM_REG_IIR);
571:
572: CSR_WRITE_1(regsp, COM_REG_LCR, lcr);
573:
574: if (!ISSET(iir1, IIR_64B_FIFO) &&
575: ISSET(iir2, IIR_64B_FIFO)) {
576: /* It is TL16C750. */
577: sc->sc_fifolen = 64;
578: SET(sc->sc_hwflags, COM_HW_AFE);
579: } else
580: CSR_WRITE_1(regsp, COM_REG_FIFO, fcr);
1.314 kiyohara 581:
1.344 jmcneill 582: if (sc->sc_fifolen == 64)
583: fifo_msg = "tl16c750, working fifo";
584: else
585: fifo_msg = "ns16750, working fifo";
586: }
1.21 mycroft 587: } else
1.208 scw 588: fifo_msg = "ns16550, broken fifo";
1.21 mycroft 589: else
1.208 scw 590: fifo_msg = "ns8250 or ns16450, no fifo";
1.344 jmcneill 591: CSR_WRITE_1(regsp, COM_REG_FIFO, 0);
592:
1.247 gdamore 593: fifodelay:
1.208 scw 594: /*
595: * Some chips will clear down both Tx and Rx FIFOs when zero is
596: * written to com_fifo. If this chip is the console, writing zero
597: * results in some of the chip/FIFO description being lost, so delay
598: * printing it until now.
599: */
600: delay(10);
601: aprint_normal(": %s\n", fifo_msg);
1.166 soda 602: if (ISSET(sc->sc_hwflags, COM_HW_TXFIFO_DISABLE)) {
603: sc->sc_fifolen = 1;
1.276 cube 604: aprint_normal_dev(sc->sc_dev, "txfifo disabled\n");
1.166 soda 605: }
1.247 gdamore 606:
607: fifodone:
1.21 mycroft 608:
1.300 rmind 609: tp = tty_alloc();
1.127 mycroft 610: tp->t_oproc = comstart;
611: tp->t_param = comparam;
612: tp->t_hwiflow = comhwiflow;
1.308 matt 613: tp->t_softc = sc;
1.127 mycroft 614:
615: sc->sc_tty = tp;
1.147 thorpej 616: sc->sc_rbuf = malloc(com_rbuf_size << 1, M_DEVBUF, M_NOWAIT);
1.182 sommerfe 617: sc->sc_rbput = sc->sc_rbget = sc->sc_rbuf;
618: sc->sc_rbavail = com_rbuf_size;
1.147 thorpej 619: if (sc->sc_rbuf == NULL) {
1.276 cube 620: aprint_error_dev(sc->sc_dev,
621: "unable to allocate ring buffer\n");
1.147 thorpej 622: return;
623: }
1.127 mycroft 624: sc->sc_ebuf = sc->sc_rbuf + (com_rbuf_size << 1);
1.147 thorpej 625:
626: tty_attach(tp);
627:
1.99 mycroft 628: if (!ISSET(sc->sc_hwflags, COM_HW_NOIEN))
629: SET(sc->sc_mcr, MCR_IENABLE);
1.30 mycroft 630:
1.96 mycroft 631: if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) {
1.106 drochner 632: int maj;
633:
634: /* locate the major number */
1.199 gehenna 635: maj = cdevsw_lookup_major(&com_cdevsw);
1.106 drochner 636:
1.242 thorpej 637: tp->t_dev = cn_tab->cn_dev = makedev(maj,
1.276 cube 638: device_unit(sc->sc_dev));
1.131 marc 639:
1.276 cube 640: aprint_normal_dev(sc->sc_dev, "console\n");
1.96 mycroft 641: }
642:
1.1 cgd 643: #ifdef KGDB
1.102 thorpej 644: /*
645: * Allow kgdb to "take over" this port. If this is
1.206 briggs 646: * not the console and is the kgdb device, it has
647: * exclusive use. If it's the console _and_ the
648: * kgdb device, it doesn't.
1.102 thorpej 649: */
1.297 dyoung 650: if (bus_space_is_equal(regsp->cr_iot, comkgdbregs.cr_iot) &&
1.247 gdamore 651: regsp->cr_iobase == comkgdbregs.cr_iobase) {
1.206 briggs 652: if (!ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) {
653: com_kgdb_attached = 1;
1.106 drochner 654:
1.206 briggs 655: SET(sc->sc_hwflags, COM_HW_KGDB);
656: }
1.276 cube 657: aprint_normal_dev(sc->sc_dev, "kgdb\n");
1.103 drochner 658: }
1.99 mycroft 659: #endif
660:
1.263 ad 661: sc->sc_si = softint_establish(SOFTINT_SERIAL, comsoft, sc);
1.115 explorer 662:
1.304 tls 663: #ifdef RND_COM
1.277 cube 664: rnd_attach_source(&sc->rnd_source, device_xname(sc->sc_dev),
1.327 tls 665: RND_TYPE_TTY, RND_FLAG_DEFAULT);
1.115 explorer 666: #endif
1.131 marc 667:
668: /* if there are no enable/disable functions, assume the device
669: is always enabled */
670: if (!sc->enable)
671: sc->enabled = 1;
672:
673: com_config(sc);
1.132 cgd 674:
675: SET(sc->sc_hwflags, COM_HW_DEV_OK);
1.131 marc 676: }
677:
678: void
1.197 simonb 679: com_config(struct com_softc *sc)
1.131 marc 680: {
1.247 gdamore 681: struct com_regs *regsp = &sc->sc_regs;
1.131 marc 682:
683: /* Disable interrupts before configuring the device. */
1.209 thorpej 684: if (sc->sc_type == COM_TYPE_PXA2x0)
1.208 scw 685: sc->sc_ier = IER_EUART;
686: else
687: sc->sc_ier = 0;
1.247 gdamore 688: CSR_WRITE_1(regsp, COM_REG_IER, sc->sc_ier);
689: (void) CSR_READ_1(regsp, COM_REG_IIR);
1.131 marc 690:
691: /* Look for a Hayes ESP board. */
1.209 thorpej 692: if (sc->sc_type == COM_TYPE_HAYESP) {
1.131 marc 693:
694: /* Set 16550 compatibility mode */
1.258 cube 695: bus_space_write_1(regsp->cr_iot, sc->sc_hayespioh, HAYESP_CMD1,
1.131 marc 696: HAYESP_SETMODE);
1.258 cube 697: bus_space_write_1(regsp->cr_iot, sc->sc_hayespioh, HAYESP_CMD2,
1.131 marc 698: HAYESP_MODE_FIFO|HAYESP_MODE_RTS|
699: HAYESP_MODE_SCALE);
700:
701: /* Set RTS/CTS flow control */
1.258 cube 702: bus_space_write_1(regsp->cr_iot, sc->sc_hayespioh, HAYESP_CMD1,
1.131 marc 703: HAYESP_SETFLOWTYPE);
1.258 cube 704: bus_space_write_1(regsp->cr_iot, sc->sc_hayespioh, HAYESP_CMD2,
1.131 marc 705: HAYESP_FLOW_RTS);
1.258 cube 706: bus_space_write_1(regsp->cr_iot, sc->sc_hayespioh, HAYESP_CMD2,
1.131 marc 707: HAYESP_FLOW_CTS);
708:
709: /* Set flow control levels */
1.258 cube 710: bus_space_write_1(regsp->cr_iot, sc->sc_hayespioh, HAYESP_CMD1,
1.131 marc 711: HAYESP_SETRXFLOW);
1.258 cube 712: bus_space_write_1(regsp->cr_iot, sc->sc_hayespioh, HAYESP_CMD2,
1.131 marc 713: HAYESP_HIBYTE(HAYESP_RXHIWMARK));
1.258 cube 714: bus_space_write_1(regsp->cr_iot, sc->sc_hayespioh, HAYESP_CMD2,
1.131 marc 715: HAYESP_LOBYTE(HAYESP_RXHIWMARK));
1.258 cube 716: bus_space_write_1(regsp->cr_iot, sc->sc_hayespioh, HAYESP_CMD2,
1.131 marc 717: HAYESP_HIBYTE(HAYESP_RXLOWMARK));
1.258 cube 718: bus_space_write_1(regsp->cr_iot, sc->sc_hayespioh, HAYESP_CMD2,
1.131 marc 719: HAYESP_LOBYTE(HAYESP_RXLOWMARK));
720: }
721:
1.186 uwe 722: if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE|COM_HW_KGDB))
1.131 marc 723: com_enable_debugport(sc);
1.1 cgd 724: }
725:
1.292 dyoung 726: #if 0
727: static int
728: comcngetc_detached(dev_t dev)
729: {
730: return 0;
731: }
732:
733: static void
734: comcnputc_detached(dev_t dev, int c)
735: {
736: }
737: #endif
738:
1.149 thorpej 739: int
1.274 dyoung 740: com_detach(device_t self, int flags)
1.149 thorpej 741: {
1.274 dyoung 742: struct com_softc *sc = device_private(self);
1.149 thorpej 743: int maj, mn;
744:
1.289 dyoung 745: if (ISSET(sc->sc_hwflags, COM_HW_KGDB))
746: return EBUSY;
747:
1.303 jakllsch 748: if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE) &&
1.289 dyoung 749: (flags & DETACH_SHUTDOWN) != 0)
1.272 dyoung 750: return EBUSY;
751:
1.289 dyoung 752: if (sc->disable != NULL && sc->enabled != 0) {
753: (*sc->disable)(sc);
754: sc->enabled = 0;
755: }
756:
1.303 jakllsch 757: if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) {
1.289 dyoung 758: comconsattached = 0;
759: cn_tab = NULL;
760: }
761:
1.149 thorpej 762: /* locate the major number */
1.199 gehenna 763: maj = cdevsw_lookup_major(&com_cdevsw);
1.149 thorpej 764:
765: /* Nuke the vnodes for any open instances. */
1.242 thorpej 766: mn = device_unit(self);
1.149 thorpej 767: vdevgone(maj, mn, mn, VCHR);
768:
769: mn |= COMDIALOUT_MASK;
770: vdevgone(maj, mn, mn, VCHR);
771:
1.196 christos 772: if (sc->sc_rbuf == NULL) {
773: /*
774: * Ring buffer allocation failed in the com_attach_subr,
775: * only the tty is allocated, and nothing else.
776: */
1.300 rmind 777: tty_free(sc->sc_tty);
1.196 christos 778: return 0;
779: }
1.232 perry 780:
1.149 thorpej 781: /* Free the receive buffer. */
782: free(sc->sc_rbuf, M_DEVBUF);
783:
784: /* Detach and free the tty. */
785: tty_detach(sc->sc_tty);
1.300 rmind 786: tty_free(sc->sc_tty);
1.149 thorpej 787:
788: /* Unhook the soft interrupt handler. */
1.263 ad 789: softint_disestablish(sc->sc_si);
1.149 thorpej 790:
1.304 tls 791: #ifdef RND_COM
1.149 thorpej 792: /* Unhook the entropy source. */
793: rnd_detach_source(&sc->rnd_source);
794: #endif
1.273 dyoung 795: callout_destroy(&sc->sc_diag_callout);
1.149 thorpej 796:
1.271 ad 797: /* Destroy the lock. */
798: mutex_destroy(&sc->sc_lock);
799:
1.149 thorpej 800: return (0);
801: }
802:
1.141 mycroft 803: void
1.197 simonb 804: com_shutdown(struct com_softc *sc)
1.141 mycroft 805: {
806: struct tty *tp = sc->sc_tty;
807:
1.263 ad 808: mutex_spin_enter(&sc->sc_lock);
1.141 mycroft 809:
810: /* If we were asserting flow control, then deassert it. */
811: SET(sc->sc_rx_flags, RX_IBUF_BLOCKED);
812: com_hwiflow(sc);
813:
814: /* Clear any break condition set with TIOCSBRK. */
815: com_break(sc, 0);
816:
817: /*
818: * Hang up if necessary. Wait a bit, so the other side has time to
819: * notice even if we immediately open the port again.
1.175 sommerfe 820: * Avoid tsleeping above splhigh().
1.141 mycroft 821: */
822: if (ISSET(tp->t_cflag, HUPCL)) {
823: com_modem(sc, 0);
1.263 ad 824: mutex_spin_exit(&sc->sc_lock);
825: /* XXX will only timeout */
826: (void) kpause(ttclos, false, hz, NULL);
827: mutex_spin_enter(&sc->sc_lock);
1.141 mycroft 828: }
829:
830: /* Turn off interrupts. */
1.208 scw 831: if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) {
1.337 christos 832: sc->sc_ier = IER_ERLS; /* interrupt on line break */
1.330 macallan 833: if ((sc->sc_type == COM_TYPE_PXA2x0) ||
1.336 jmcneill 834: (sc->sc_type == COM_TYPE_INGENIC) ||
835: (sc->sc_type == COM_TYPE_TEGRA))
1.208 scw 836: sc->sc_ier |= IER_ERXTOUT;
837: } else
1.141 mycroft 838: sc->sc_ier = 0;
1.208 scw 839:
1.209 thorpej 840: if (sc->sc_type == COM_TYPE_PXA2x0)
1.208 scw 841: sc->sc_ier |= IER_EUART;
842:
1.247 gdamore 843: CSR_WRITE_1(&sc->sc_regs, COM_REG_IER, sc->sc_ier);
1.141 mycroft 844:
1.269 ad 845: mutex_spin_exit(&sc->sc_lock);
846:
1.141 mycroft 847: if (sc->disable) {
848: #ifdef DIAGNOSTIC
849: if (!sc->enabled)
850: panic("com_shutdown: not enabled?");
851: #endif
852: (*sc->disable)(sc);
853: sc->enabled = 0;
854: }
855: }
856:
1.21 mycroft 857: int
1.256 christos 858: comopen(dev_t dev, int flag, int mode, struct lwp *l)
1.1 cgd 859: {
1.21 mycroft 860: struct com_softc *sc;
861: struct tty *tp;
1.263 ad 862: int s;
1.142 mycroft 863: int error;
1.173 thorpej 864:
1.276 cube 865: sc = device_lookup_private(&com_cd, COMUNIT(dev));
1.173 thorpej 866: if (sc == NULL || !ISSET(sc->sc_hwflags, COM_HW_DEV_OK) ||
1.177 eeh 867: sc->sc_rbuf == NULL)
1.99 mycroft 868: return (ENXIO);
1.21 mycroft 869:
1.276 cube 870: if (!device_is_active(sc->sc_dev))
1.149 thorpej 871: return (ENXIO);
872:
1.102 thorpej 873: #ifdef KGDB
874: /*
875: * If this is the kgdb port, no other use is permitted.
876: */
877: if (ISSET(sc->sc_hwflags, COM_HW_KGDB))
878: return (EBUSY);
879: #endif
880:
1.120 mycroft 881: tp = sc->sc_tty;
1.21 mycroft 882:
1.345 martin 883: /*
884: * If the device is exclusively for kernel use, deny userland
885: * open.
886: */
887: if (ISSET(tp->t_state, TS_KERN_ONLY))
888: return (EBUSY);
889:
1.253 elad 890: if (kauth_authorize_device_tty(l->l_cred, KAUTH_DEVICE_TTY_OPEN, tp))
1.99 mycroft 891: return (EBUSY);
892:
893: s = spltty();
894:
895: /*
896: * Do the following iff this is a first open.
897: */
1.141 mycroft 898: if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) {
1.99 mycroft 899: struct termios t;
900:
1.127 mycroft 901: tp->t_dev = dev;
902:
1.131 marc 903: if (sc->enable) {
904: if ((*sc->enable)(sc)) {
1.134 enami 905: splx(s);
1.276 cube 906: aprint_error_dev(sc->sc_dev,
907: "device enable failed\n");
1.131 marc 908: return (EIO);
909: }
1.269 ad 910: mutex_spin_enter(&sc->sc_lock);
1.131 marc 911: sc->enabled = 1;
912: com_config(sc);
1.269 ad 913: } else {
914: mutex_spin_enter(&sc->sc_lock);
1.131 marc 915: }
916:
1.99 mycroft 917: /* Turn on interrupts. */
1.301 matt 918: sc->sc_ier = IER_ERXRDY | IER_ERLS;
919: if (!ISSET(tp->t_cflag, CLOCAL))
920: sc->sc_ier |= IER_EMSC;
921:
1.209 thorpej 922: if (sc->sc_type == COM_TYPE_PXA2x0)
1.208 scw 923: sc->sc_ier |= IER_EUART | IER_ERXTOUT;
1.336 jmcneill 924: else if (sc->sc_type == COM_TYPE_INGENIC ||
925: sc->sc_type == COM_TYPE_TEGRA)
1.330 macallan 926: sc->sc_ier |= IER_ERXTOUT;
1.247 gdamore 927: CSR_WRITE_1(&sc->sc_regs, COM_REG_IER, sc->sc_ier);
1.99 mycroft 928:
929: /* Fetch the current modem control status, needed later. */
1.247 gdamore 930: sc->sc_msr = CSR_READ_1(&sc->sc_regs, COM_REG_MSR);
1.99 mycroft 931:
1.144 jonathan 932: /* Clear PPS capture state on first open. */
1.279 ad 933: mutex_spin_enter(&timecounter_lock);
1.244 kardel 934: memset(&sc->sc_pps_state, 0, sizeof(sc->sc_pps_state));
935: sc->sc_pps_state.ppscap = PPS_CAPTUREASSERT | PPS_CAPTURECLEAR;
936: pps_init(&sc->sc_pps_state);
1.279 ad 937: mutex_spin_exit(&timecounter_lock);
1.144 jonathan 938:
1.263 ad 939: mutex_spin_exit(&sc->sc_lock);
1.99 mycroft 940:
941: /*
942: * Initialize the termios status to the defaults. Add in the
943: * sticky bits from TIOCSFLAGS.
944: */
1.98 mycroft 945: if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) {
1.289 dyoung 946: t.c_ospeed = comcons_info.rate;
947: t.c_cflag = comcons_info.cflag;
1.98 mycroft 948: } else {
1.99 mycroft 949: t.c_ospeed = TTYDEF_SPEED;
950: t.c_cflag = TTYDEF_CFLAG;
1.98 mycroft 951: }
1.237 dsl 952: t.c_ispeed = t.c_ospeed;
1.99 mycroft 953: if (ISSET(sc->sc_swflags, TIOCFLAG_CLOCAL))
954: SET(t.c_cflag, CLOCAL);
955: if (ISSET(sc->sc_swflags, TIOCFLAG_CRTSCTS))
956: SET(t.c_cflag, CRTSCTS);
957: if (ISSET(sc->sc_swflags, TIOCFLAG_MDMBUF))
958: SET(t.c_cflag, MDMBUF);
1.129 mycroft 959: /* Make sure comparam() will do something. */
960: tp->t_ospeed = 0;
1.120 mycroft 961: (void) comparam(tp, &t);
1.99 mycroft 962: tp->t_iflag = TTYDEF_IFLAG;
963: tp->t_oflag = TTYDEF_OFLAG;
1.16 ws 964: tp->t_lflag = TTYDEF_LFLAG;
1.99 mycroft 965: ttychars(tp);
1.1 cgd 966: ttsetwater(tp);
1.21 mycroft 967:
1.263 ad 968: mutex_spin_enter(&sc->sc_lock);
1.136 mycroft 969:
1.99 mycroft 970: /*
971: * Turn on DTR. We must always do this, even if carrier is not
972: * present, because otherwise we'd have to use TIOCSDTR
1.121 mycroft 973: * immediately after setting CLOCAL, which applications do not
974: * expect. We always assert DTR while the device is open
975: * unless explicitly requested to deassert it.
1.99 mycroft 976: */
977: com_modem(sc, 1);
1.65 christos 978:
1.99 mycroft 979: /* Clear the input ring, and unblock. */
1.127 mycroft 980: sc->sc_rbput = sc->sc_rbget = sc->sc_rbuf;
981: sc->sc_rbavail = com_rbuf_size;
1.99 mycroft 982: com_iflush(sc);
1.101 mycroft 983: CLR(sc->sc_rx_flags, RX_ANY_BLOCK);
984: com_hwiflow(sc);
1.65 christos 985:
1.99 mycroft 986: #ifdef COM_DEBUG
1.101 mycroft 987: if (com_debug)
988: comstatus(sc, "comopen ");
1.65 christos 989: #endif
1.21 mycroft 990:
1.263 ad 991: mutex_spin_exit(&sc->sc_lock);
1.99 mycroft 992: }
1.232 perry 993:
1.143 mycroft 994: splx(s);
1.21 mycroft 995:
1.143 mycroft 996: error = ttyopen(tp, COMDIALOUT(dev), ISSET(flag, O_NONBLOCK));
997: if (error)
998: goto bad;
1.141 mycroft 999:
1.181 eeh 1000: error = (*tp->t_linesw->l_open)(dev, tp);
1.139 enami 1001: if (error)
1.141 mycroft 1002: goto bad;
1.139 enami 1003:
1.141 mycroft 1004: return (0);
1.139 enami 1005:
1.141 mycroft 1006: bad:
1007: if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) {
1008: /*
1009: * We failed to open the device, and nobody else had it opened.
1010: * Clean up the state as appropriate.
1011: */
1012: com_shutdown(sc);
1013: }
1.139 enami 1014:
1.99 mycroft 1015: return (error);
1.1 cgd 1016: }
1.232 perry 1017:
1.21 mycroft 1018: int
1.256 christos 1019: comclose(dev_t dev, int flag, int mode, struct lwp *l)
1.1 cgd 1020: {
1.276 cube 1021: struct com_softc *sc =
1022: device_lookup_private(&com_cd, COMUNIT(dev));
1.50 mycroft 1023: struct tty *tp = sc->sc_tty;
1.57 mycroft 1024:
1025: /* XXX This is for cons.c. */
1.62 mycroft 1026: if (!ISSET(tp->t_state, TS_ISOPEN))
1.99 mycroft 1027: return (0);
1.345 martin 1028: /*
1029: * If the device is exclusively for kernel use, deny userland
1030: * close.
1031: */
1032: if (ISSET(tp->t_state, TS_KERN_ONLY))
1033: return (0);
1.21 mycroft 1034:
1.181 eeh 1035: (*tp->t_linesw->l_close)(tp, flag);
1.1 cgd 1036: ttyclose(tp);
1.99 mycroft 1037:
1.149 thorpej 1038: if (COM_ISALIVE(sc) == 0)
1039: return (0);
1040:
1.143 mycroft 1041: if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) {
1042: /*
1043: * Although we got a last close, the device may still be in
1044: * use; e.g. if this was the dialout node, and there are still
1045: * processes waiting for carrier on the non-dialout node.
1046: */
1047: com_shutdown(sc);
1048: }
1.120 mycroft 1049:
1.99 mycroft 1050: return (0);
1.1 cgd 1051: }
1.232 perry 1052:
1.21 mycroft 1053: int
1.197 simonb 1054: comread(dev_t dev, struct uio *uio, int flag)
1.1 cgd 1055: {
1.276 cube 1056: struct com_softc *sc =
1057: device_lookup_private(&com_cd, COMUNIT(dev));
1.52 mycroft 1058: struct tty *tp = sc->sc_tty;
1.149 thorpej 1059:
1060: if (COM_ISALIVE(sc) == 0)
1061: return (EIO);
1.232 perry 1062:
1.181 eeh 1063: return ((*tp->t_linesw->l_read)(tp, uio, flag));
1.1 cgd 1064: }
1.232 perry 1065:
1.21 mycroft 1066: int
1.197 simonb 1067: comwrite(dev_t dev, struct uio *uio, int flag)
1.1 cgd 1068: {
1.276 cube 1069: struct com_softc *sc =
1070: device_lookup_private(&com_cd, COMUNIT(dev));
1.52 mycroft 1071: struct tty *tp = sc->sc_tty;
1.149 thorpej 1072:
1073: if (COM_ISALIVE(sc) == 0)
1074: return (EIO);
1.232 perry 1075:
1.181 eeh 1076: return ((*tp->t_linesw->l_write)(tp, uio, flag));
1.184 scw 1077: }
1078:
1079: int
1.238 christos 1080: compoll(dev_t dev, int events, struct lwp *l)
1.184 scw 1081: {
1.276 cube 1082: struct com_softc *sc =
1083: device_lookup_private(&com_cd, COMUNIT(dev));
1.184 scw 1084: struct tty *tp = sc->sc_tty;
1085:
1086: if (COM_ISALIVE(sc) == 0)
1.234 ws 1087: return (POLLHUP);
1.232 perry 1088:
1.238 christos 1089: return ((*tp->t_linesw->l_poll)(tp, events, l));
1.1 cgd 1090: }
1.50 mycroft 1091:
1092: struct tty *
1.197 simonb 1093: comtty(dev_t dev)
1.50 mycroft 1094: {
1.276 cube 1095: struct com_softc *sc =
1096: device_lookup_private(&com_cd, COMUNIT(dev));
1.52 mycroft 1097: struct tty *tp = sc->sc_tty;
1.50 mycroft 1098:
1.52 mycroft 1099: return (tp);
1.50 mycroft 1100: }
1.111 christos 1101:
1.21 mycroft 1102: int
1.259 christos 1103: comioctl(dev_t dev, u_long cmd, void *data, int flag, struct lwp *l)
1.1 cgd 1104: {
1.273 dyoung 1105: struct com_softc *sc;
1106: struct tty *tp;
1.21 mycroft 1107: int error;
1108:
1.276 cube 1109: sc = device_lookup_private(&com_cd, COMUNIT(dev));
1.273 dyoung 1110: if (sc == NULL)
1111: return ENXIO;
1.149 thorpej 1112: if (COM_ISALIVE(sc) == 0)
1113: return (EIO);
1114:
1.273 dyoung 1115: tp = sc->sc_tty;
1116:
1.238 christos 1117: error = (*tp->t_linesw->l_ioctl)(tp, cmd, data, flag, l);
1.194 atatat 1118: if (error != EPASSTHROUGH)
1.99 mycroft 1119: return (error);
1120:
1.238 christos 1121: error = ttioctl(tp, cmd, data, flag, l);
1.194 atatat 1122: if (error != EPASSTHROUGH)
1.99 mycroft 1123: return (error);
1.138 mycroft 1124:
1125: error = 0;
1.249 elad 1126: switch (cmd) {
1127: case TIOCSFLAGS:
1.254 elad 1128: error = kauth_authorize_device_tty(l->l_cred,
1129: KAUTH_DEVICE_TTY_PRIVSET, tp);
1.249 elad 1130: break;
1131: default:
1132: /* nothing */
1133: break;
1134: }
1135: if (error) {
1136: return error;
1137: }
1.1 cgd 1138:
1.263 ad 1139: mutex_spin_enter(&sc->sc_lock);
1.136 mycroft 1140:
1.1 cgd 1141: switch (cmd) {
1142: case TIOCSBRK:
1.99 mycroft 1143: com_break(sc, 1);
1.1 cgd 1144: break;
1.99 mycroft 1145:
1.1 cgd 1146: case TIOCCBRK:
1.99 mycroft 1147: com_break(sc, 0);
1.1 cgd 1148: break;
1.99 mycroft 1149:
1.1 cgd 1150: case TIOCSDTR:
1.99 mycroft 1151: com_modem(sc, 1);
1.1 cgd 1152: break;
1.99 mycroft 1153:
1.1 cgd 1154: case TIOCCDTR:
1.99 mycroft 1155: com_modem(sc, 0);
1.1 cgd 1156: break;
1.99 mycroft 1157:
1158: case TIOCGFLAGS:
1159: *(int *)data = sc->sc_swflags;
1160: break;
1161:
1162: case TIOCSFLAGS:
1163: sc->sc_swflags = *(int *)data;
1164: break;
1165:
1.1 cgd 1166: case TIOCMSET:
1167: case TIOCMBIS:
1168: case TIOCMBIC:
1.153 mycroft 1169: tiocm_to_com(sc, cmd, *(int *)data);
1.111 christos 1170: break;
1171:
1.153 mycroft 1172: case TIOCMGET:
1173: *(int *)data = com_to_tiocm(sc);
1.111 christos 1174: break;
1.144 jonathan 1175:
1.244 kardel 1176: case PPS_IOC_CREATE:
1177: case PPS_IOC_DESTROY:
1178: case PPS_IOC_GETPARAMS:
1179: case PPS_IOC_SETPARAMS:
1180: case PPS_IOC_GETCAP:
1181: case PPS_IOC_FETCH:
1182: #ifdef PPS_SYNC
1183: case PPS_IOC_KCBIND:
1184: #endif
1.279 ad 1185: mutex_spin_enter(&timecounter_lock);
1.244 kardel 1186: error = pps_ioctl(cmd, data, &sc->sc_pps_state);
1.279 ad 1187: mutex_spin_exit(&timecounter_lock);
1.244 kardel 1188: break;
1.224 simonb 1189:
1.144 jonathan 1190: case TIOCDCDTIMESTAMP: /* XXX old, overloaded API used by xntpd v3 */
1.279 ad 1191: mutex_spin_enter(&timecounter_lock);
1.244 kardel 1192: #ifndef PPS_TRAILING_EDGE
1193: TIMESPEC_TO_TIMEVAL((struct timeval *)data,
1194: &sc->sc_pps_state.ppsinfo.assert_timestamp);
1195: #else
1196: TIMESPEC_TO_TIMEVAL((struct timeval *)data,
1197: &sc->sc_pps_state.ppsinfo.clear_timestamp);
1198: #endif
1.279 ad 1199: mutex_spin_exit(&timecounter_lock);
1.144 jonathan 1200: break;
1201:
1.99 mycroft 1202: default:
1.194 atatat 1203: error = EPASSTHROUGH;
1.136 mycroft 1204: break;
1.21 mycroft 1205: }
1.22 cgd 1206:
1.263 ad 1207: mutex_spin_exit(&sc->sc_lock);
1.136 mycroft 1208:
1.99 mycroft 1209: #ifdef COM_DEBUG
1.101 mycroft 1210: if (com_debug)
1.99 mycroft 1211: comstatus(sc, "comioctl ");
1212: #endif
1213:
1.136 mycroft 1214: return (error);
1.99 mycroft 1215: }
1216:
1.101 mycroft 1217: integrate void
1.197 simonb 1218: com_schedrx(struct com_softc *sc)
1.101 mycroft 1219: {
1220:
1221: sc->sc_rx_ready = 1;
1222:
1223: /* Wake up the poller. */
1.263 ad 1224: softint_schedule(sc->sc_si);
1.101 mycroft 1225: }
1226:
1.99 mycroft 1227: void
1.197 simonb 1228: com_break(struct com_softc *sc, int onoff)
1.99 mycroft 1229: {
1230:
1231: if (onoff)
1232: SET(sc->sc_lcr, LCR_SBREAK);
1233: else
1234: CLR(sc->sc_lcr, LCR_SBREAK);
1.22 cgd 1235:
1.99 mycroft 1236: if (!sc->sc_heldchange) {
1237: if (sc->sc_tx_busy) {
1238: sc->sc_heldtbc = sc->sc_tbc;
1239: sc->sc_tbc = 0;
1240: sc->sc_heldchange = 1;
1241: } else
1242: com_loadchannelregs(sc);
1.22 cgd 1243: }
1.99 mycroft 1244: }
1.22 cgd 1245:
1.99 mycroft 1246: void
1.197 simonb 1247: com_modem(struct com_softc *sc, int onoff)
1.99 mycroft 1248: {
1.22 cgd 1249:
1.153 mycroft 1250: if (sc->sc_mcr_dtr == 0)
1251: return;
1252:
1.99 mycroft 1253: if (onoff)
1254: SET(sc->sc_mcr, sc->sc_mcr_dtr);
1255: else
1256: CLR(sc->sc_mcr, sc->sc_mcr_dtr);
1.22 cgd 1257:
1.99 mycroft 1258: if (!sc->sc_heldchange) {
1259: if (sc->sc_tx_busy) {
1260: sc->sc_heldtbc = sc->sc_tbc;
1261: sc->sc_tbc = 0;
1262: sc->sc_heldchange = 1;
1263: } else
1264: com_loadchannelregs(sc);
1.22 cgd 1265: }
1.153 mycroft 1266: }
1267:
1268: void
1.197 simonb 1269: tiocm_to_com(struct com_softc *sc, u_long how, int ttybits)
1.153 mycroft 1270: {
1271: u_char combits;
1272:
1273: combits = 0;
1274: if (ISSET(ttybits, TIOCM_DTR))
1275: SET(combits, MCR_DTR);
1276: if (ISSET(ttybits, TIOCM_RTS))
1277: SET(combits, MCR_RTS);
1.232 perry 1278:
1.153 mycroft 1279: switch (how) {
1280: case TIOCMBIC:
1281: CLR(sc->sc_mcr, combits);
1282: break;
1283:
1284: case TIOCMBIS:
1285: SET(sc->sc_mcr, combits);
1286: break;
1287:
1288: case TIOCMSET:
1289: CLR(sc->sc_mcr, MCR_DTR | MCR_RTS);
1290: SET(sc->sc_mcr, combits);
1291: break;
1292: }
1293:
1294: if (!sc->sc_heldchange) {
1295: if (sc->sc_tx_busy) {
1296: sc->sc_heldtbc = sc->sc_tbc;
1297: sc->sc_tbc = 0;
1298: sc->sc_heldchange = 1;
1299: } else
1300: com_loadchannelregs(sc);
1301: }
1302: }
1303:
1304: int
1.197 simonb 1305: com_to_tiocm(struct com_softc *sc)
1.153 mycroft 1306: {
1307: u_char combits;
1308: int ttybits = 0;
1309:
1310: combits = sc->sc_mcr;
1311: if (ISSET(combits, MCR_DTR))
1312: SET(ttybits, TIOCM_DTR);
1313: if (ISSET(combits, MCR_RTS))
1314: SET(ttybits, TIOCM_RTS);
1315:
1316: combits = sc->sc_msr;
1.330 macallan 1317: if (sc->sc_type == COM_TYPE_INGENIC) {
1.153 mycroft 1318: SET(ttybits, TIOCM_CD);
1.330 macallan 1319: } else {
1320: if (ISSET(combits, MSR_DCD))
1321: SET(ttybits, TIOCM_CD);
1322: }
1.153 mycroft 1323: if (ISSET(combits, MSR_CTS))
1324: SET(ttybits, TIOCM_CTS);
1325: if (ISSET(combits, MSR_DSR))
1326: SET(ttybits, TIOCM_DSR);
1327: if (ISSET(combits, MSR_RI | MSR_TERI))
1328: SET(ttybits, TIOCM_RI);
1329:
1.228 mycroft 1330: if (ISSET(sc->sc_ier, IER_ERXRDY | IER_ETXRDY | IER_ERLS | IER_EMSC))
1.153 mycroft 1331: SET(ttybits, TIOCM_LE);
1332:
1333: return (ttybits);
1.1 cgd 1334: }
1335:
1.106 drochner 1336: static u_char
1.197 simonb 1337: cflag2lcr(tcflag_t cflag)
1.106 drochner 1338: {
1339: u_char lcr = 0;
1340:
1341: switch (ISSET(cflag, CSIZE)) {
1.127 mycroft 1342: case CS5:
1.106 drochner 1343: SET(lcr, LCR_5BITS);
1344: break;
1.127 mycroft 1345: case CS6:
1.106 drochner 1346: SET(lcr, LCR_6BITS);
1347: break;
1.127 mycroft 1348: case CS7:
1.106 drochner 1349: SET(lcr, LCR_7BITS);
1350: break;
1.127 mycroft 1351: case CS8:
1.106 drochner 1352: SET(lcr, LCR_8BITS);
1353: break;
1354: }
1355: if (ISSET(cflag, PARENB)) {
1356: SET(lcr, LCR_PENAB);
1357: if (!ISSET(cflag, PARODD))
1358: SET(lcr, LCR_PEVEN);
1359: }
1360: if (ISSET(cflag, CSTOPB))
1361: SET(lcr, LCR_STOPB);
1362:
1.110 enami 1363: return (lcr);
1.106 drochner 1364: }
1365:
1.21 mycroft 1366: int
1.197 simonb 1367: comparam(struct tty *tp, struct termios *t)
1.1 cgd 1368: {
1.276 cube 1369: struct com_softc *sc =
1370: device_lookup_private(&com_cd, COMUNIT(tp->t_dev));
1.188 enami 1371: int ospeed;
1.62 mycroft 1372: u_char lcr;
1.21 mycroft 1373:
1.149 thorpej 1374: if (COM_ISALIVE(sc) == 0)
1375: return (EIO);
1376:
1.209 thorpej 1377: if (sc->sc_type == COM_TYPE_HAYESP) {
1.188 enami 1378: int prescaler, speed;
1379:
1380: /*
1381: * Calculate UART clock prescaler. It should be in
1382: * range of 0 .. 3.
1383: */
1384: for (prescaler = 0, speed = t->c_ospeed; prescaler < 4;
1385: prescaler++, speed /= 2)
1.210 thorpej 1386: if ((ospeed = comspeed(speed, sc->sc_frequency,
1387: sc->sc_type)) > 0)
1.188 enami 1388: break;
1389:
1390: if (prescaler == 4)
1391: return (EINVAL);
1392: sc->sc_prescaler = prescaler;
1393: } else
1.344 jmcneill 1394: ospeed = comspeed(t->c_ospeed, sc->sc_frequency, sc->sc_type);
1.188 enami 1395:
1.127 mycroft 1396: /* Check requested parameters. */
1.99 mycroft 1397: if (ospeed < 0)
1398: return (EINVAL);
1399: if (t->c_ispeed && t->c_ispeed != t->c_ospeed)
1400: return (EINVAL);
1.21 mycroft 1401:
1.99 mycroft 1402: /*
1403: * For the console, always force CLOCAL and !HUPCL, so that the port
1404: * is always active.
1405: */
1406: if (ISSET(sc->sc_swflags, TIOCFLAG_SOFTCAR) ||
1407: ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) {
1408: SET(t->c_cflag, CLOCAL);
1409: CLR(t->c_cflag, HUPCL);
1.62 mycroft 1410: }
1.129 mycroft 1411:
1412: /*
1413: * If there were no changes, don't do anything. This avoids dropping
1414: * input and improves performance when all we did was frob things like
1415: * VMIN and VTIME.
1416: */
1417: if (tp->t_ospeed == t->c_ospeed &&
1418: tp->t_cflag == t->c_cflag)
1419: return (0);
1.126 mycroft 1420:
1421: lcr = ISSET(sc->sc_lcr, LCR_SBREAK) | cflag2lcr(t->c_cflag);
1422:
1.263 ad 1423: mutex_spin_enter(&sc->sc_lock);
1.126 mycroft 1424:
1425: sc->sc_lcr = lcr;
1.36 mycroft 1426:
1427: /*
1.99 mycroft 1428: * If we're not in a mode that assumes a connection is present, then
1429: * ignore carrier changes.
1.36 mycroft 1430: */
1.99 mycroft 1431: if (ISSET(t->c_cflag, CLOCAL | MDMBUF))
1432: sc->sc_msr_dcd = 0;
1433: else
1434: sc->sc_msr_dcd = MSR_DCD;
1435: /*
1436: * Set the flow control pins depending on the current flow control
1437: * mode.
1438: */
1439: if (ISSET(t->c_cflag, CRTSCTS)) {
1440: sc->sc_mcr_dtr = MCR_DTR;
1441: sc->sc_mcr_rts = MCR_RTS;
1442: sc->sc_msr_cts = MSR_CTS;
1.315 jmcneill 1443: if (ISSET(sc->sc_hwflags, COM_HW_AFE)) {
1444: SET(sc->sc_mcr, MCR_AFE);
1445: } else {
1446: sc->sc_efr = EFR_AUTORTS | EFR_AUTOCTS;
1447: }
1.99 mycroft 1448: } else if (ISSET(t->c_cflag, MDMBUF)) {
1449: /*
1450: * For DTR/DCD flow control, make sure we don't toggle DTR for
1451: * carrier detection.
1452: */
1453: sc->sc_mcr_dtr = 0;
1454: sc->sc_mcr_rts = MCR_DTR;
1455: sc->sc_msr_cts = MSR_DCD;
1.315 jmcneill 1456: if (ISSET(sc->sc_hwflags, COM_HW_AFE)) {
1457: CLR(sc->sc_mcr, MCR_AFE);
1458: } else {
1459: sc->sc_efr = 0;
1460: }
1.99 mycroft 1461: } else {
1462: /*
1463: * If no flow control, then always set RTS. This will make
1464: * the other side happy if it mistakenly thinks we're doing
1465: * RTS/CTS flow control.
1466: */
1467: sc->sc_mcr_dtr = MCR_DTR | MCR_RTS;
1468: sc->sc_mcr_rts = 0;
1469: sc->sc_msr_cts = 0;
1.315 jmcneill 1470: if (ISSET(sc->sc_hwflags, COM_HW_AFE)) {
1471: CLR(sc->sc_mcr, MCR_AFE);
1472: } else {
1473: sc->sc_efr = 0;
1474: }
1.99 mycroft 1475: if (ISSET(sc->sc_mcr, MCR_DTR))
1476: SET(sc->sc_mcr, MCR_RTS);
1477: else
1478: CLR(sc->sc_mcr, MCR_RTS);
1479: }
1480: sc->sc_msr_mask = sc->sc_msr_cts | sc->sc_msr_dcd;
1481:
1.325 christos 1482: if (t->c_ospeed == 0 && tp->t_ospeed != 0)
1.99 mycroft 1483: CLR(sc->sc_mcr, sc->sc_mcr_dtr);
1.325 christos 1484: else if (t->c_ospeed != 0 && tp->t_ospeed == 0)
1.99 mycroft 1485: SET(sc->sc_mcr, sc->sc_mcr_dtr);
1.66 mycroft 1486:
1.99 mycroft 1487: sc->sc_dlbl = ospeed;
1488: sc->sc_dlbh = ospeed >> 8;
1.66 mycroft 1489:
1.99 mycroft 1490: /*
1491: * Set the FIFO threshold based on the receive speed.
1492: *
1493: * * If it's a low speed, it's probably a mouse or some other
1494: * interactive device, so set the threshold low.
1495: * * If it's a high speed, trim the trigger level down to prevent
1496: * overflows.
1497: * * Otherwise set it a bit higher.
1498: */
1.338 jmcneill 1499: if (sc->sc_type == COM_TYPE_HAYESP) {
1.99 mycroft 1500: sc->sc_fifo = FIFO_DMA_MODE | FIFO_ENABLE | FIFO_TRIGGER_8;
1.338 jmcneill 1501: } else if (sc->sc_type == COM_TYPE_TEGRA) {
1502: sc->sc_fifo = FIFO_ENABLE | FIFO_TRIGGER_1;
1503: } else if (ISSET(sc->sc_hwflags, COM_HW_FIFO)) {
1.278 tsutsui 1504: if (t->c_ospeed <= 1200)
1505: sc->sc_fifo = FIFO_ENABLE | FIFO_TRIGGER_1;
1506: else if (t->c_ospeed <= 38400)
1507: sc->sc_fifo = FIFO_ENABLE | FIFO_TRIGGER_8;
1508: else
1509: sc->sc_fifo = FIFO_ENABLE | FIFO_TRIGGER_4;
1.338 jmcneill 1510: } else {
1.99 mycroft 1511: sc->sc_fifo = 0;
1.338 jmcneill 1512: }
1.21 mycroft 1513:
1.332 skrll 1514: if (sc->sc_type == COM_TYPE_INGENIC)
1.330 macallan 1515: sc->sc_fifo |= FIFO_UART_ON;
1516:
1.127 mycroft 1517: /* And copy to tty. */
1.240 dsl 1518: tp->t_ispeed = t->c_ospeed;
1.57 mycroft 1519: tp->t_ospeed = t->c_ospeed;
1520: tp->t_cflag = t->c_cflag;
1.25 cgd 1521:
1.99 mycroft 1522: if (!sc->sc_heldchange) {
1523: if (sc->sc_tx_busy) {
1524: sc->sc_heldtbc = sc->sc_tbc;
1525: sc->sc_tbc = 0;
1526: sc->sc_heldchange = 1;
1527: } else
1528: com_loadchannelregs(sc);
1529: }
1530:
1.124 mycroft 1531: if (!ISSET(t->c_cflag, CHWFLOW)) {
1.125 mycroft 1532: /* Disable the high water mark. */
1533: sc->sc_r_hiwat = 0;
1534: sc->sc_r_lowat = 0;
1.124 mycroft 1535: if (ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) {
1536: CLR(sc->sc_rx_flags, RX_TTY_OVERFLOWED);
1537: com_schedrx(sc);
1538: }
1539: if (ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED|RX_IBUF_BLOCKED)) {
1540: CLR(sc->sc_rx_flags, RX_TTY_BLOCKED|RX_IBUF_BLOCKED);
1541: com_hwiflow(sc);
1542: }
1.125 mycroft 1543: } else {
1.127 mycroft 1544: sc->sc_r_hiwat = com_rbuf_hiwat;
1545: sc->sc_r_lowat = com_rbuf_lowat;
1.124 mycroft 1546: }
1547:
1.263 ad 1548: mutex_spin_exit(&sc->sc_lock);
1.99 mycroft 1549:
1.25 cgd 1550: /*
1.99 mycroft 1551: * Update the tty layer's idea of the carrier bit, in case we changed
1.124 mycroft 1552: * CLOCAL or MDMBUF. We don't hang up here; we only do that by
1553: * explicit request.
1.25 cgd 1554: */
1.330 macallan 1555: if (sc->sc_type == COM_TYPE_INGENIC) {
1556: /* no DCD here */
1557: (void) (*tp->t_linesw->l_modem)(tp, 1);
1558: } else
1559: (void) (*tp->t_linesw->l_modem)(tp, ISSET(sc->sc_msr, MSR_DCD));
1.99 mycroft 1560:
1561: #ifdef COM_DEBUG
1.101 mycroft 1562: if (com_debug)
1563: comstatus(sc, "comparam ");
1.99 mycroft 1564: #endif
1565:
1566: if (!ISSET(t->c_cflag, CHWFLOW)) {
1567: if (sc->sc_tx_stopped) {
1568: sc->sc_tx_stopped = 0;
1569: comstart(tp);
1570: }
1.21 mycroft 1571: }
1.1 cgd 1572:
1.99 mycroft 1573: return (0);
1574: }
1575:
1576: void
1.197 simonb 1577: com_iflush(struct com_softc *sc)
1.99 mycroft 1578: {
1.247 gdamore 1579: struct com_regs *regsp = &sc->sc_regs;
1.344 jmcneill 1580: uint8_t fifo;
1.131 marc 1581: #ifdef DIAGNOSTIC
1582: int reg;
1583: #endif
1584: int timo;
1.99 mycroft 1585:
1.131 marc 1586: #ifdef DIAGNOSTIC
1587: reg = 0xffff;
1588: #endif
1589: timo = 50000;
1.99 mycroft 1590: /* flush any pending I/O */
1.247 gdamore 1591: while (ISSET(CSR_READ_1(regsp, COM_REG_LSR), LSR_RXRDY)
1.131 marc 1592: && --timo)
1593: #ifdef DIAGNOSTIC
1594: reg =
1595: #else
1596: (void)
1597: #endif
1.247 gdamore 1598: CSR_READ_1(regsp, COM_REG_RXDATA);
1.131 marc 1599: #ifdef DIAGNOSTIC
1600: if (!timo)
1.276 cube 1601: aprint_error_dev(sc->sc_dev, "com_iflush timeout %02x\n", reg);
1.131 marc 1602: #endif
1.309 rkujawa 1603:
1.344 jmcneill 1604: switch (sc->sc_type) {
1605: case COM_TYPE_16750:
1606: case COM_TYPE_SUNXI:
1607: /*
1608: * Reset all Rx/Tx FIFO, preserve current FIFO length.
1609: * This should prevent triggering busy interrupt while
1610: * manipulating divisors.
1611: */
1612: fifo = CSR_READ_1(regsp, COM_REG_FIFO) & (FIFO_TRIGGER_1 |
1613: FIFO_TRIGGER_4 | FIFO_TRIGGER_8 | FIFO_TRIGGER_14);
1614: CSR_WRITE_1(regsp, COM_REG_FIFO,
1615: fifo | FIFO_ENABLE | FIFO_RCV_RST | FIFO_XMT_RST);
1616: delay(100);
1617: break;
1618: }
1.99 mycroft 1619: }
1620:
1621: void
1.197 simonb 1622: com_loadchannelregs(struct com_softc *sc)
1.99 mycroft 1623: {
1.247 gdamore 1624: struct com_regs *regsp = &sc->sc_regs;
1.99 mycroft 1625:
1626: /* XXXXX necessary? */
1627: com_iflush(sc);
1628:
1.209 thorpej 1629: if (sc->sc_type == COM_TYPE_PXA2x0)
1.247 gdamore 1630: CSR_WRITE_1(regsp, COM_REG_IER, IER_EUART);
1.208 scw 1631: else
1.247 gdamore 1632: CSR_WRITE_1(regsp, COM_REG_IER, 0);
1.99 mycroft 1633:
1.281 matt 1634: if (sc->sc_type == COM_TYPE_OMAP) {
1635: /* disable before changing settings */
1636: CSR_WRITE_1(regsp, COM_REG_MDR1, MDR1_MODE_DISABLE);
1637: }
1638:
1.116 fvdl 1639: if (ISSET(sc->sc_hwflags, COM_HW_FLOW)) {
1.286 matt 1640: KASSERT(sc->sc_type != COM_TYPE_AU1x00);
1641: KASSERT(sc->sc_type != COM_TYPE_16550_NOERS);
1642: /* no EFR on alchemy */
1.298 jklos 1643: CSR_WRITE_1(regsp, COM_REG_LCR, LCR_EERS);
1.286 matt 1644: CSR_WRITE_1(regsp, COM_REG_EFR, sc->sc_efr);
1.116 fvdl 1645: }
1.247 gdamore 1646: if (sc->sc_type == COM_TYPE_AU1x00) {
1647: /* alchemy has single separate 16-bit clock divisor register */
1648: CSR_WRITE_2(regsp, COM_REG_DLBL, sc->sc_dlbl +
1649: (sc->sc_dlbh << 8));
1650: } else {
1651: CSR_WRITE_1(regsp, COM_REG_LCR, sc->sc_lcr | LCR_DLAB);
1652: CSR_WRITE_1(regsp, COM_REG_DLBL, sc->sc_dlbl);
1653: CSR_WRITE_1(regsp, COM_REG_DLBH, sc->sc_dlbh);
1654: }
1655: CSR_WRITE_1(regsp, COM_REG_LCR, sc->sc_lcr);
1656: CSR_WRITE_1(regsp, COM_REG_MCR, sc->sc_mcr_active = sc->sc_mcr);
1657: CSR_WRITE_1(regsp, COM_REG_FIFO, sc->sc_fifo);
1.209 thorpej 1658: if (sc->sc_type == COM_TYPE_HAYESP) {
1.258 cube 1659: bus_space_write_1(regsp->cr_iot, sc->sc_hayespioh, HAYESP_CMD1,
1.188 enami 1660: HAYESP_SETPRESCALER);
1.258 cube 1661: bus_space_write_1(regsp->cr_iot, sc->sc_hayespioh, HAYESP_CMD2,
1.188 enami 1662: sc->sc_prescaler);
1663: }
1.281 matt 1664: if (sc->sc_type == COM_TYPE_OMAP) {
1665: /* setup the fifos. the FCR value is not used as long
1666: as SCR[6] and SCR[7] are 0, which they are at reset
1667: and we never touch the SCR register */
1668: uint8_t rx_fifo_trig = 40;
1669: uint8_t tx_fifo_trig = 60;
1670: uint8_t rx_start = 8;
1671: uint8_t rx_halt = 60;
1672: uint8_t tlr_value = ((rx_fifo_trig>>2) << 4) | (tx_fifo_trig>>2);
1673: uint8_t tcr_value = ((rx_start>>2) << 4) | (rx_halt>>2);
1674:
1675: /* enable access to TCR & TLR */
1676: CSR_WRITE_1(regsp, COM_REG_MCR, sc->sc_mcr | MCR_TCR_TLR);
1677:
1678: /* write tcr and tlr values */
1679: CSR_WRITE_1(regsp, COM_REG_TLR, tlr_value);
1680: CSR_WRITE_1(regsp, COM_REG_TCR, tcr_value);
1681:
1682: /* disable access to TCR & TLR */
1683: CSR_WRITE_1(regsp, COM_REG_MCR, sc->sc_mcr);
1684:
1685: /* enable again, but mode is based on speed */
1686: if (sc->sc_tty->t_termios.c_ospeed > 230400) {
1687: CSR_WRITE_1(regsp, COM_REG_MDR1, MDR1_MODE_UART_13X);
1688: } else {
1689: CSR_WRITE_1(regsp, COM_REG_MDR1, MDR1_MODE_UART_16X);
1690: }
1691: }
1.99 mycroft 1692:
1.247 gdamore 1693: CSR_WRITE_1(regsp, COM_REG_IER, sc->sc_ier);
1.99 mycroft 1694: }
1695:
1696: int
1.197 simonb 1697: comhwiflow(struct tty *tp, int block)
1.99 mycroft 1698: {
1.276 cube 1699: struct com_softc *sc =
1700: device_lookup_private(&com_cd, COMUNIT(tp->t_dev));
1.99 mycroft 1701:
1.149 thorpej 1702: if (COM_ISALIVE(sc) == 0)
1703: return (0);
1704:
1.99 mycroft 1705: if (sc->sc_mcr_rts == 0)
1706: return (0);
1707:
1.263 ad 1708: mutex_spin_enter(&sc->sc_lock);
1.232 perry 1709:
1.99 mycroft 1710: if (block) {
1.101 mycroft 1711: if (!ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) {
1712: SET(sc->sc_rx_flags, RX_TTY_BLOCKED);
1713: com_hwiflow(sc);
1714: }
1.99 mycroft 1715: } else {
1.101 mycroft 1716: if (ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) {
1717: CLR(sc->sc_rx_flags, RX_TTY_OVERFLOWED);
1718: com_schedrx(sc);
1719: }
1720: if (ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) {
1721: CLR(sc->sc_rx_flags, RX_TTY_BLOCKED);
1722: com_hwiflow(sc);
1723: }
1.99 mycroft 1724: }
1.179 sommerfe 1725:
1.263 ad 1726: mutex_spin_exit(&sc->sc_lock);
1.99 mycroft 1727: return (1);
1728: }
1.232 perry 1729:
1.99 mycroft 1730: /*
1731: * (un)block input via hw flowcontrol
1732: */
1733: void
1.197 simonb 1734: com_hwiflow(struct com_softc *sc)
1.99 mycroft 1735: {
1.247 gdamore 1736: struct com_regs *regsp= &sc->sc_regs;
1.99 mycroft 1737:
1738: if (sc->sc_mcr_rts == 0)
1739: return;
1740:
1.101 mycroft 1741: if (ISSET(sc->sc_rx_flags, RX_ANY_BLOCK)) {
1.99 mycroft 1742: CLR(sc->sc_mcr, sc->sc_mcr_rts);
1743: CLR(sc->sc_mcr_active, sc->sc_mcr_rts);
1744: } else {
1745: SET(sc->sc_mcr, sc->sc_mcr_rts);
1746: SET(sc->sc_mcr_active, sc->sc_mcr_rts);
1747: }
1.247 gdamore 1748: CSR_WRITE_1(regsp, COM_REG_MCR, sc->sc_mcr_active);
1.1 cgd 1749: }
1.21 mycroft 1750:
1.99 mycroft 1751:
1.12 deraadt 1752: void
1.197 simonb 1753: comstart(struct tty *tp)
1.1 cgd 1754: {
1.276 cube 1755: struct com_softc *sc =
1756: device_lookup_private(&com_cd, COMUNIT(tp->t_dev));
1.247 gdamore 1757: struct com_regs *regsp = &sc->sc_regs;
1.21 mycroft 1758: int s;
1759:
1.149 thorpej 1760: if (COM_ISALIVE(sc) == 0)
1761: return;
1762:
1.1 cgd 1763: s = spltty();
1.178 eeh 1764: if (ISSET(tp->t_state, TS_BUSY | TS_TIMEOUT | TS_TTSTOP))
1.70 mycroft 1765: goto out;
1.178 eeh 1766: if (sc->sc_tx_stopped)
1.127 mycroft 1767: goto out;
1.266 ad 1768: if (!ttypull(tp))
1769: goto out;
1.99 mycroft 1770:
1771: /* Grab the first contiguous region of buffer space. */
1772: {
1773: u_char *tba;
1774: int tbc;
1775:
1776: tba = tp->t_outq.c_cf;
1777: tbc = ndqb(&tp->t_outq, 0);
1778:
1.263 ad 1779: mutex_spin_enter(&sc->sc_lock);
1.99 mycroft 1780:
1781: sc->sc_tba = tba;
1782: sc->sc_tbc = tbc;
1783: }
1784:
1.62 mycroft 1785: SET(tp->t_state, TS_BUSY);
1.99 mycroft 1786: sc->sc_tx_busy = 1;
1.64 christos 1787:
1.99 mycroft 1788: /* Enable transmit completion interrupts if necessary. */
1.70 mycroft 1789: if (!ISSET(sc->sc_ier, IER_ETXRDY)) {
1790: SET(sc->sc_ier, IER_ETXRDY);
1.247 gdamore 1791: CSR_WRITE_1(regsp, COM_REG_IER, sc->sc_ier);
1.70 mycroft 1792: }
1.99 mycroft 1793:
1794: /* Output the first chunk of the contiguous buffer. */
1.195 thorpej 1795: if (!ISSET(sc->sc_hwflags, COM_HW_NO_TXPRELOAD)) {
1.201 thorpej 1796: u_int n;
1.99 mycroft 1797:
1.127 mycroft 1798: n = sc->sc_tbc;
1799: if (n > sc->sc_fifolen)
1800: n = sc->sc_fifolen;
1.247 gdamore 1801: CSR_WRITE_MULTI(regsp, COM_REG_TXDATA, sc->sc_tba, n);
1.99 mycroft 1802: sc->sc_tbc -= n;
1803: sc->sc_tba += n;
1.64 christos 1804: }
1.233 tls 1805:
1.263 ad 1806: mutex_spin_exit(&sc->sc_lock);
1.99 mycroft 1807: out:
1.1 cgd 1808: splx(s);
1.99 mycroft 1809: return;
1.1 cgd 1810: }
1.21 mycroft 1811:
1.1 cgd 1812: /*
1813: * Stop output on a line.
1814: */
1.85 mycroft 1815: void
1.256 christos 1816: comstop(struct tty *tp, int flag)
1.1 cgd 1817: {
1.276 cube 1818: struct com_softc *sc =
1819: device_lookup_private(&com_cd, COMUNIT(tp->t_dev));
1.1 cgd 1820:
1.263 ad 1821: mutex_spin_enter(&sc->sc_lock);
1.99 mycroft 1822: if (ISSET(tp->t_state, TS_BUSY)) {
1823: /* Stop transmitting at the next chunk. */
1824: sc->sc_tbc = 0;
1825: sc->sc_heldtbc = 0;
1.62 mycroft 1826: if (!ISSET(tp->t_state, TS_TTSTOP))
1827: SET(tp->t_state, TS_FLUSH);
1.99 mycroft 1828: }
1.263 ad 1829: mutex_spin_exit(&sc->sc_lock);
1.1 cgd 1830: }
1831:
1.33 mycroft 1832: void
1.197 simonb 1833: comdiag(void *arg)
1.33 mycroft 1834: {
1835: struct com_softc *sc = arg;
1.99 mycroft 1836: int overflows, floods;
1.33 mycroft 1837:
1.263 ad 1838: mutex_spin_enter(&sc->sc_lock);
1.33 mycroft 1839: overflows = sc->sc_overflows;
1840: sc->sc_overflows = 0;
1.57 mycroft 1841: floods = sc->sc_floods;
1842: sc->sc_floods = 0;
1.99 mycroft 1843: sc->sc_errors = 0;
1.263 ad 1844: mutex_spin_exit(&sc->sc_lock);
1.57 mycroft 1845:
1.127 mycroft 1846: log(LOG_WARNING, "%s: %d silo overflow%s, %d ibuf flood%s\n",
1.276 cube 1847: device_xname(sc->sc_dev),
1.57 mycroft 1848: overflows, overflows == 1 ? "" : "s",
1.99 mycroft 1849: floods, floods == 1 ? "" : "s");
1.57 mycroft 1850: }
1851:
1.99 mycroft 1852: integrate void
1.197 simonb 1853: com_rxsoft(struct com_softc *sc, struct tty *tp)
1.99 mycroft 1854: {
1.198 simonb 1855: int (*rint)(int, struct tty *) = tp->t_linesw->l_rint;
1.127 mycroft 1856: u_char *get, *end;
1857: u_int cc, scc;
1858: u_char lsr;
1859: int code;
1.57 mycroft 1860:
1.127 mycroft 1861: end = sc->sc_ebuf;
1.99 mycroft 1862: get = sc->sc_rbget;
1.127 mycroft 1863: scc = cc = com_rbuf_size - sc->sc_rbavail;
1.99 mycroft 1864:
1.127 mycroft 1865: if (cc == com_rbuf_size) {
1.99 mycroft 1866: sc->sc_floods++;
1867: if (sc->sc_errors++ == 0)
1.170 thorpej 1868: callout_reset(&sc->sc_diag_callout, 60 * hz,
1869: comdiag, sc);
1.99 mycroft 1870: }
1871:
1.205 gson 1872: /* If not yet open, drop the entire buffer content here */
1873: if (!ISSET(tp->t_state, TS_ISOPEN)) {
1874: get += cc << 1;
1875: if (get >= end)
1876: get -= com_rbuf_size << 1;
1877: cc = 0;
1878: }
1.101 mycroft 1879: while (cc) {
1.128 mycroft 1880: code = get[0];
1.127 mycroft 1881: lsr = get[1];
1.128 mycroft 1882: if (ISSET(lsr, LSR_OE | LSR_BI | LSR_FE | LSR_PE)) {
1883: if (ISSET(lsr, LSR_OE)) {
1884: sc->sc_overflows++;
1885: if (sc->sc_errors++ == 0)
1.170 thorpej 1886: callout_reset(&sc->sc_diag_callout,
1887: 60 * hz, comdiag, sc);
1.128 mycroft 1888: }
1.127 mycroft 1889: if (ISSET(lsr, LSR_BI | LSR_FE))
1890: SET(code, TTY_FE);
1891: if (ISSET(lsr, LSR_PE))
1892: SET(code, TTY_PE);
1893: }
1894: if ((*rint)(code, tp) == -1) {
1.101 mycroft 1895: /*
1896: * The line discipline's buffer is out of space.
1897: */
1898: if (!ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) {
1899: /*
1900: * We're either not using flow control, or the
1901: * line discipline didn't tell us to block for
1902: * some reason. Either way, we have no way to
1903: * know when there's more space available, so
1904: * just drop the rest of the data.
1905: */
1.127 mycroft 1906: get += cc << 1;
1907: if (get >= end)
1908: get -= com_rbuf_size << 1;
1.101 mycroft 1909: cc = 0;
1910: } else {
1911: /*
1912: * Don't schedule any more receive processing
1913: * until the line discipline tells us there's
1914: * space available (through comhwiflow()).
1915: * Leave the rest of the data in the input
1916: * buffer.
1917: */
1918: SET(sc->sc_rx_flags, RX_TTY_OVERFLOWED);
1919: }
1920: break;
1921: }
1.127 mycroft 1922: get += 2;
1923: if (get >= end)
1924: get = sc->sc_rbuf;
1.101 mycroft 1925: cc--;
1.99 mycroft 1926: }
1927:
1.101 mycroft 1928: if (cc != scc) {
1929: sc->sc_rbget = get;
1.263 ad 1930: mutex_spin_enter(&sc->sc_lock);
1.232 perry 1931:
1.101 mycroft 1932: cc = sc->sc_rbavail += scc - cc;
1933: /* Buffers should be ok again, release possible block. */
1934: if (cc >= sc->sc_r_lowat) {
1935: if (ISSET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED)) {
1936: CLR(sc->sc_rx_flags, RX_IBUF_OVERFLOWED);
1937: SET(sc->sc_ier, IER_ERXRDY);
1.209 thorpej 1938: if (sc->sc_type == COM_TYPE_PXA2x0)
1.208 scw 1939: SET(sc->sc_ier, IER_ERXTOUT);
1.336 jmcneill 1940: if (sc->sc_type == COM_TYPE_INGENIC ||
1941: sc->sc_type == COM_TYPE_TEGRA)
1.335 macallan 1942: SET(sc->sc_ier, IER_ERXTOUT);
1943:
1.330 macallan 1944: CSR_WRITE_1(&sc->sc_regs, COM_REG_IER,
1945: sc->sc_ier);
1.101 mycroft 1946: }
1947: if (ISSET(sc->sc_rx_flags, RX_IBUF_BLOCKED)) {
1948: CLR(sc->sc_rx_flags, RX_IBUF_BLOCKED);
1949: com_hwiflow(sc);
1950: }
1951: }
1.263 ad 1952: mutex_spin_exit(&sc->sc_lock);
1.57 mycroft 1953: }
1.99 mycroft 1954: }
1955:
1956: integrate void
1.197 simonb 1957: com_txsoft(struct com_softc *sc, struct tty *tp)
1.99 mycroft 1958: {
1.33 mycroft 1959:
1.99 mycroft 1960: CLR(tp->t_state, TS_BUSY);
1961: if (ISSET(tp->t_state, TS_FLUSH))
1962: CLR(tp->t_state, TS_FLUSH);
1963: else
1964: ndflush(&tp->t_outq, (int)(sc->sc_tba - tp->t_outq.c_cf));
1.181 eeh 1965: (*tp->t_linesw->l_start)(tp);
1.99 mycroft 1966: }
1.57 mycroft 1967:
1.99 mycroft 1968: integrate void
1.197 simonb 1969: com_stsoft(struct com_softc *sc, struct tty *tp)
1.99 mycroft 1970: {
1971: u_char msr, delta;
1.57 mycroft 1972:
1.263 ad 1973: mutex_spin_enter(&sc->sc_lock);
1.99 mycroft 1974: msr = sc->sc_msr;
1975: delta = sc->sc_msr_delta;
1976: sc->sc_msr_delta = 0;
1.263 ad 1977: mutex_spin_exit(&sc->sc_lock);
1.57 mycroft 1978:
1.99 mycroft 1979: if (ISSET(delta, sc->sc_msr_dcd)) {
1980: /*
1981: * Inform the tty layer that carrier detect changed.
1982: */
1.181 eeh 1983: (void) (*tp->t_linesw->l_modem)(tp, ISSET(msr, MSR_DCD));
1.99 mycroft 1984: }
1.61 mycroft 1985:
1.99 mycroft 1986: if (ISSET(delta, sc->sc_msr_cts)) {
1987: /* Block or unblock output according to flow control. */
1988: if (ISSET(msr, sc->sc_msr_cts)) {
1989: sc->sc_tx_stopped = 0;
1.181 eeh 1990: (*tp->t_linesw->l_start)(tp);
1.99 mycroft 1991: } else {
1992: sc->sc_tx_stopped = 1;
1.61 mycroft 1993: }
1.99 mycroft 1994: }
1995:
1996: #ifdef COM_DEBUG
1.101 mycroft 1997: if (com_debug)
1.127 mycroft 1998: comstatus(sc, "com_stsoft");
1.99 mycroft 1999: #endif
2000: }
2001:
2002: void
1.197 simonb 2003: comsoft(void *arg)
1.99 mycroft 2004: {
2005: struct com_softc *sc = arg;
2006: struct tty *tp;
2007:
1.149 thorpej 2008: if (COM_ISALIVE(sc) == 0)
1.131 marc 2009: return;
2010:
1.261 ad 2011: tp = sc->sc_tty;
1.99 mycroft 2012:
1.261 ad 2013: if (sc->sc_rx_ready) {
2014: sc->sc_rx_ready = 0;
2015: com_rxsoft(sc, tp);
2016: }
1.57 mycroft 2017:
1.261 ad 2018: if (sc->sc_st_check) {
2019: sc->sc_st_check = 0;
2020: com_stsoft(sc, tp);
2021: }
1.57 mycroft 2022:
1.261 ad 2023: if (sc->sc_tx_done) {
2024: sc->sc_tx_done = 0;
2025: com_txsoft(sc, tp);
1.57 mycroft 2026: }
1.21 mycroft 2027: }
1.140 ross 2028:
1.21 mycroft 2029: int
1.197 simonb 2030: comintr(void *arg)
1.21 mycroft 2031: {
1.49 cgd 2032: struct com_softc *sc = arg;
1.247 gdamore 2033: struct com_regs *regsp = &sc->sc_regs;
2034:
1.127 mycroft 2035: u_char *put, *end;
2036: u_int cc;
2037: u_char lsr, iir;
1.55 mycroft 2038:
1.149 thorpej 2039: if (COM_ISALIVE(sc) == 0)
1.131 marc 2040: return (0);
2041:
1.288 cegger 2042: KASSERT(regsp != NULL);
2043:
1.263 ad 2044: mutex_spin_enter(&sc->sc_lock);
1.247 gdamore 2045: iir = CSR_READ_1(regsp, COM_REG_IIR);
1.309 rkujawa 2046:
1.317 kiyohara 2047: /* Handle ns16750-specific busy interrupt. */
1.344 jmcneill 2048: if (sc->sc_type == COM_TYPE_16750 &&
2049: (iir & IIR_BUSY) == IIR_BUSY) {
2050: for (int timeout = 10000;
1.317 kiyohara 2051: (CSR_READ_1(regsp, COM_REG_USR) & 0x1) != 0; timeout--)
2052: if (timeout <= 0) {
2053: aprint_error_dev(sc->sc_dev,
2054: "timeout while waiting for BUSY interrupt "
2055: "acknowledge\n");
2056: mutex_spin_exit(&sc->sc_lock);
2057: return (0);
2058: }
2059:
2060: CSR_WRITE_1(regsp, COM_REG_LCR, sc->sc_lcr);
2061: iir = CSR_READ_1(regsp, COM_REG_IIR);
2062: }
1.344 jmcneill 2063:
1.339 bouyer 2064: /* Allwinner BUSY interrupt */
1.344 jmcneill 2065: if (sc->sc_type == COM_TYPE_SUNXI &&
2066: (iir & IIR_BUSY) == IIR_BUSY) {
1.339 bouyer 2067: if ((CSR_READ_1(regsp, COM_REG_USR) & 0x1) != 0) {
2068: CSR_WRITE_1(regsp, COM_REG_HALT, HALT_CHCFG_EN);
2069: CSR_WRITE_1(regsp, COM_REG_LCR, sc->sc_lcr | LCR_DLAB);
2070: CSR_WRITE_1(regsp, COM_REG_DLBL, sc->sc_dlbl);
2071: CSR_WRITE_1(regsp, COM_REG_DLBH, sc->sc_dlbh);
2072: CSR_WRITE_1(regsp, COM_REG_LCR, sc->sc_lcr);
2073: CSR_WRITE_1(regsp, COM_REG_HALT,
2074: HALT_CHCFG_EN | HALT_CHCFG_UD);
2075: for (int timeout = 10000000;
2076: (CSR_READ_1(regsp, COM_REG_HALT) & HALT_CHCFG_UD) != 0;
2077: timeout--) {
2078: if (timeout <= 0) {
2079: aprint_error_dev(sc->sc_dev,
2080: "timeout while waiting for HALT "
2081: "update acknowledge 0x%x 0x%x\n",
2082: CSR_READ_1(regsp, COM_REG_HALT),
2083: CSR_READ_1(regsp, COM_REG_USR));
2084: break;
2085: }
2086: }
2087: CSR_WRITE_1(regsp, COM_REG_HALT, 0);
2088: (void)CSR_READ_1(regsp, COM_REG_USR);
2089: } else {
2090: CSR_WRITE_1(regsp, COM_REG_LCR, sc->sc_lcr | LCR_DLAB);
2091: CSR_WRITE_1(regsp, COM_REG_DLBL, sc->sc_dlbl);
2092: CSR_WRITE_1(regsp, COM_REG_DLBH, sc->sc_dlbh);
2093: CSR_WRITE_1(regsp, COM_REG_LCR, sc->sc_lcr);
2094: }
2095: }
1.317 kiyohara 2096:
1.179 sommerfe 2097: if (ISSET(iir, IIR_NOPEND)) {
1.263 ad 2098: mutex_spin_exit(&sc->sc_lock);
1.55 mycroft 2099: return (0);
1.179 sommerfe 2100: }
1.21 mycroft 2101:
1.127 mycroft 2102: end = sc->sc_ebuf;
1.99 mycroft 2103: put = sc->sc_rbput;
2104: cc = sc->sc_rbavail;
2105:
1.189 briggs 2106: again: do {
1.168 jonathan 2107: u_char msr, delta;
1.21 mycroft 2108:
1.247 gdamore 2109: lsr = CSR_READ_1(regsp, COM_REG_LSR);
1.103 drochner 2110: if (ISSET(lsr, LSR_BI)) {
1.316 martin 2111: int cn_trapped = 0; /* see above: cn_trap() */
1.207 fvdl 2112:
1.186 uwe 2113: cn_check_magic(sc->sc_tty->t_dev,
2114: CNC_BREAK, com_cnm_state);
2115: if (cn_trapped)
1.103 drochner 2116: continue;
1.206 briggs 2117: #if defined(KGDB) && !defined(DDB)
1.103 drochner 2118: if (ISSET(sc->sc_hwflags, COM_HW_KGDB)) {
2119: kgdb_connect(1);
2120: continue;
2121: }
2122: #endif
1.102 thorpej 2123: }
2124:
1.341 jmcneill 2125: if (sc->sc_type == COM_TYPE_BCMAUXUART && ISSET(iir, IIR_RXRDY))
2126: lsr |= LSR_RXRDY;
2127:
1.101 mycroft 2128: if (ISSET(lsr, LSR_RCV_MASK) &&
2129: !ISSET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED)) {
1.127 mycroft 2130: while (cc > 0) {
1.186 uwe 2131: int cn_trapped = 0;
1.247 gdamore 2132: put[0] = CSR_READ_1(regsp, COM_REG_RXDATA);
1.127 mycroft 2133: put[1] = lsr;
1.186 uwe 2134: cn_check_magic(sc->sc_tty->t_dev,
2135: put[0], com_cnm_state);
1.229 mycroft 2136: if (cn_trapped)
2137: goto next;
1.127 mycroft 2138: put += 2;
2139: if (put >= end)
2140: put = sc->sc_rbuf;
2141: cc--;
1.229 mycroft 2142: next:
1.247 gdamore 2143: lsr = CSR_READ_1(regsp, COM_REG_LSR);
1.127 mycroft 2144: if (!ISSET(lsr, LSR_RCV_MASK))
2145: break;
1.99 mycroft 2146: }
1.127 mycroft 2147:
1.99 mycroft 2148: /*
2149: * Current string of incoming characters ended because
1.127 mycroft 2150: * no more data was available or we ran out of space.
2151: * Schedule a receive event if any data was received.
2152: * If we're out of space, turn off receive interrupts.
1.99 mycroft 2153: */
2154: sc->sc_rbput = put;
2155: sc->sc_rbavail = cc;
1.101 mycroft 2156: if (!ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED))
2157: sc->sc_rx_ready = 1;
1.127 mycroft 2158:
1.99 mycroft 2159: /*
2160: * See if we are in danger of overflowing a buffer. If
2161: * so, use hardware flow control to ease the pressure.
2162: */
1.101 mycroft 2163: if (!ISSET(sc->sc_rx_flags, RX_IBUF_BLOCKED) &&
1.99 mycroft 2164: cc < sc->sc_r_hiwat) {
1.101 mycroft 2165: SET(sc->sc_rx_flags, RX_IBUF_BLOCKED);
2166: com_hwiflow(sc);
1.99 mycroft 2167: }
1.127 mycroft 2168:
1.99 mycroft 2169: /*
1.101 mycroft 2170: * If we're out of space, disable receive interrupts
2171: * until the queue has drained a bit.
1.99 mycroft 2172: */
2173: if (!cc) {
1.101 mycroft 2174: SET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED);
1.344 jmcneill 2175: switch (sc->sc_type) {
2176: case COM_TYPE_PXA2x0:
1.229 mycroft 2177: CLR(sc->sc_ier, IER_ERXRDY|IER_ERXTOUT);
1.344 jmcneill 2178: break;
2179: case COM_TYPE_INGENIC:
2180: case COM_TYPE_TEGRA:
1.335 macallan 2181: CLR(sc->sc_ier,
2182: IER_ERXRDY | IER_ERXTOUT);
1.344 jmcneill 2183: break;
2184: default:
1.229 mycroft 2185: CLR(sc->sc_ier, IER_ERXRDY);
1.344 jmcneill 2186: break;
2187: }
1.247 gdamore 2188: CSR_WRITE_1(regsp, COM_REG_IER, sc->sc_ier);
1.99 mycroft 2189: }
1.88 mycroft 2190: } else {
1.228 mycroft 2191: if ((iir & (IIR_RXRDY|IIR_TXRDY)) == IIR_RXRDY) {
1.247 gdamore 2192: (void) CSR_READ_1(regsp, COM_REG_RXDATA);
1.88 mycroft 2193: continue;
2194: }
2195: }
1.55 mycroft 2196:
1.247 gdamore 2197: msr = CSR_READ_1(regsp, COM_REG_MSR);
1.99 mycroft 2198: delta = msr ^ sc->sc_msr;
2199: sc->sc_msr = msr;
1.244 kardel 2200: if ((sc->sc_pps_state.ppsparam.mode & PPS_CAPTUREBOTH) &&
2201: (delta & MSR_DCD)) {
1.279 ad 2202: mutex_spin_enter(&timecounter_lock);
1.244 kardel 2203: pps_capture(&sc->sc_pps_state);
2204: pps_event(&sc->sc_pps_state,
2205: (msr & MSR_DCD) ?
2206: PPS_CAPTUREASSERT :
2207: PPS_CAPTURECLEAR);
1.279 ad 2208: mutex_spin_exit(&timecounter_lock);
1.244 kardel 2209: }
1.168 jonathan 2210:
1.167 jonathan 2211: /*
2212: * Process normal status changes
2213: */
2214: if (ISSET(delta, sc->sc_msr_mask)) {
2215: SET(sc->sc_msr_delta, delta);
1.99 mycroft 2216:
2217: /*
2218: * Stop output immediately if we lose the output
2219: * flow control signal or carrier detect.
2220: */
2221: if (ISSET(~msr, sc->sc_msr_mask)) {
2222: sc->sc_tbc = 0;
2223: sc->sc_heldtbc = 0;
1.69 mycroft 2224: #ifdef COM_DEBUG
1.101 mycroft 2225: if (com_debug)
2226: comstatus(sc, "comintr ");
1.69 mycroft 2227: #endif
1.99 mycroft 2228: }
1.55 mycroft 2229:
1.99 mycroft 2230: sc->sc_st_check = 1;
1.55 mycroft 2231: }
1.225 enami 2232: } while (!ISSET((iir =
1.247 gdamore 2233: CSR_READ_1(regsp, COM_REG_IIR)), IIR_NOPEND) &&
1.225 enami 2234: /*
2235: * Since some device (e.g., ST16C1550) doesn't clear IIR_TXRDY
2236: * by IIR read, so we can't do this way: `process all interrupts,
1.303 jakllsch 2237: * then do TX if possible'.
1.225 enami 2238: */
2239: (iir & IIR_IMASK) != IIR_TXRDY);
1.55 mycroft 2240:
1.99 mycroft 2241: /*
1.225 enami 2242: * Read LSR again, since there may be an interrupt between
2243: * the last LSR read and IIR read above.
2244: */
1.247 gdamore 2245: lsr = CSR_READ_1(regsp, COM_REG_LSR);
1.225 enami 2246:
2247: /*
2248: * See if data can be transmitted as well.
2249: * Schedule tx done event if no data left
1.99 mycroft 2250: * and tty was marked busy.
2251: */
2252: if (ISSET(lsr, LSR_TXRDY)) {
2253: /*
2254: * If we've delayed a parameter change, do it now, and restart
2255: * output.
2256: */
2257: if (sc->sc_heldchange) {
2258: com_loadchannelregs(sc);
2259: sc->sc_heldchange = 0;
2260: sc->sc_tbc = sc->sc_heldtbc;
2261: sc->sc_heldtbc = 0;
2262: }
1.127 mycroft 2263:
1.99 mycroft 2264: /* Output the next chunk of the contiguous buffer, if any. */
2265: if (sc->sc_tbc > 0) {
1.201 thorpej 2266: u_int n;
1.99 mycroft 2267:
1.127 mycroft 2268: n = sc->sc_tbc;
2269: if (n > sc->sc_fifolen)
2270: n = sc->sc_fifolen;
1.247 gdamore 2271: CSR_WRITE_MULTI(regsp, COM_REG_TXDATA, sc->sc_tba, n);
1.99 mycroft 2272: sc->sc_tbc -= n;
2273: sc->sc_tba += n;
1.127 mycroft 2274: } else {
2275: /* Disable transmit completion interrupts if necessary. */
2276: if (ISSET(sc->sc_ier, IER_ETXRDY)) {
2277: CLR(sc->sc_ier, IER_ETXRDY);
1.247 gdamore 2278: CSR_WRITE_1(regsp, COM_REG_IER, sc->sc_ier);
1.127 mycroft 2279: }
2280: if (sc->sc_tx_busy) {
2281: sc->sc_tx_busy = 0;
2282: sc->sc_tx_done = 1;
2283: }
1.62 mycroft 2284: }
1.99 mycroft 2285: }
1.189 briggs 2286:
1.247 gdamore 2287: if (!ISSET((iir = CSR_READ_1(regsp, COM_REG_IIR)), IIR_NOPEND))
1.189 briggs 2288: goto again;
2289:
1.263 ad 2290: mutex_spin_exit(&sc->sc_lock);
1.62 mycroft 2291:
1.99 mycroft 2292: /* Wake up the poller. */
1.263 ad 2293: softint_schedule(sc->sc_si);
1.115 explorer 2294:
1.304 tls 2295: #ifdef RND_COM
1.115 explorer 2296: rnd_add_uint32(&sc->rnd_source, iir | lsr);
2297: #endif
2298:
1.88 mycroft 2299: return (1);
1.1 cgd 2300: }
2301:
2302: /*
1.102 thorpej 2303: * The following functions are polled getc and putc routines, shared
2304: * by the console and kgdb glue.
1.232 perry 2305: *
1.186 uwe 2306: * The read-ahead code is so that you can detect pending in-band
2307: * cn_magic in polled mode while doing output rather than having to
2308: * wait until the kernel decides it needs input.
1.102 thorpej 2309: */
2310:
1.186 uwe 2311: #define MAX_READAHEAD 20
2312: static int com_readahead[MAX_READAHEAD];
2313: static int com_readaheadcount = 0;
1.174 jeffs 2314:
1.102 thorpej 2315: int
1.247 gdamore 2316: com_common_getc(dev_t dev, struct com_regs *regsp)
1.102 thorpej 2317: {
2318: int s = splserial();
2319: u_char stat, c;
2320:
1.174 jeffs 2321: /* got a character from reading things earlier */
1.186 uwe 2322: if (com_readaheadcount > 0) {
1.174 jeffs 2323: int i;
2324:
1.186 uwe 2325: c = com_readahead[0];
2326: for (i = 1; i < com_readaheadcount; i++) {
2327: com_readahead[i-1] = com_readahead[i];
1.174 jeffs 2328: }
1.186 uwe 2329: com_readaheadcount--;
1.174 jeffs 2330: splx(s);
2331: return (c);
2332: }
2333:
1.322 matt 2334: /* don't block until a character becomes available */
2335: if (!ISSET(stat = CSR_READ_1(regsp, COM_REG_LSR), LSR_RXRDY)) {
2336: splx(s);
2337: return -1;
2338: }
1.135 thorpej 2339:
1.247 gdamore 2340: c = CSR_READ_1(regsp, COM_REG_RXDATA);
2341: stat = CSR_READ_1(regsp, COM_REG_IIR);
1.186 uwe 2342: {
1.316 martin 2343: int cn_trapped = 0; /* required by cn_trap, see above */
1.186 uwe 2344: #ifdef DDB
1.174 jeffs 2345: extern int db_active;
1.186 uwe 2346: if (!db_active)
2347: #endif
2348: cn_check_magic(dev, c, com_cnm_state);
1.174 jeffs 2349: }
1.102 thorpej 2350: splx(s);
2351: return (c);
2352: }
2353:
1.289 dyoung 2354: static void
1.247 gdamore 2355: com_common_putc(dev_t dev, struct com_regs *regsp, int c)
1.102 thorpej 2356: {
2357: int s = splserial();
1.204 simonb 2358: int cin, stat, timo;
1.174 jeffs 2359:
1.232 perry 2360: if (com_readaheadcount < MAX_READAHEAD
1.247 gdamore 2361: && ISSET(stat = CSR_READ_1(regsp, COM_REG_LSR), LSR_RXRDY)) {
1.186 uwe 2362: int cn_trapped = 0;
1.247 gdamore 2363: cin = CSR_READ_1(regsp, COM_REG_RXDATA);
2364: stat = CSR_READ_1(regsp, COM_REG_IIR);
1.186 uwe 2365: cn_check_magic(dev, cin, com_cnm_state);
2366: com_readahead[com_readaheadcount++] = cin;
1.174 jeffs 2367: }
1.102 thorpej 2368:
2369: /* wait for any pending transmission to finish */
1.161 ross 2370: timo = 150000;
1.247 gdamore 2371: while (!ISSET(CSR_READ_1(regsp, COM_REG_LSR), LSR_TXRDY) && --timo)
1.161 ross 2372: continue;
1.135 thorpej 2373:
1.247 gdamore 2374: CSR_WRITE_1(regsp, COM_REG_TXDATA, c);
2375: COM_BARRIER(regsp, BR | BW);
1.160 thorpej 2376:
1.157 mycroft 2377: splx(s);
1.102 thorpej 2378: }
2379:
2380: /*
1.165 drochner 2381: * Initialize UART for use as console or KGDB line.
1.99 mycroft 2382: */
1.106 drochner 2383: int
1.247 gdamore 2384: cominit(struct com_regs *regsp, int rate, int frequency, int type,
2385: tcflag_t cflag)
1.1 cgd 2386: {
1.106 drochner 2387:
1.247 gdamore 2388: if (bus_space_map(regsp->cr_iot, regsp->cr_iobase, regsp->cr_nports, 0,
2389: ®sp->cr_ioh))
1.110 enami 2390: return (ENOMEM); /* ??? */
1.1 cgd 2391:
1.281 matt 2392: if (type == COM_TYPE_OMAP) {
2393: /* disable before changing settings */
2394: CSR_WRITE_1(regsp, COM_REG_MDR1, MDR1_MODE_DISABLE);
2395: }
2396:
1.210 thorpej 2397: rate = comspeed(rate, frequency, type);
1.301 matt 2398: if (__predict_true(rate != -1)) {
2399: if (type == COM_TYPE_AU1x00) {
2400: CSR_WRITE_2(regsp, COM_REG_DLBL, rate);
2401: } else {
1.311 kiyohara 2402: /* no EFR on alchemy */
1.330 macallan 2403: if ((type != COM_TYPE_16550_NOERS) &&
2404: (type != COM_TYPE_INGENIC)) {
1.301 matt 2405: CSR_WRITE_1(regsp, COM_REG_LCR, LCR_EERS);
2406: CSR_WRITE_1(regsp, COM_REG_EFR, 0);
2407: }
2408: CSR_WRITE_1(regsp, COM_REG_LCR, LCR_DLAB);
2409: CSR_WRITE_1(regsp, COM_REG_DLBL, rate & 0xff);
2410: CSR_WRITE_1(regsp, COM_REG_DLBH, rate >> 8);
1.283 matt 2411: }
1.247 gdamore 2412: }
2413: CSR_WRITE_1(regsp, COM_REG_LCR, cflag2lcr(cflag));
2414: CSR_WRITE_1(regsp, COM_REG_MCR, MCR_DTR | MCR_RTS);
1.329 macallan 2415:
2416: if (type == COM_TYPE_INGENIC) {
2417: CSR_WRITE_1(regsp, COM_REG_FIFO,
2418: FIFO_ENABLE | FIFO_RCV_RST | FIFO_XMT_RST |
2419: FIFO_TRIGGER_1 | FIFO_UART_ON);
2420: } else {
2421: CSR_WRITE_1(regsp, COM_REG_FIFO,
2422: FIFO_ENABLE | FIFO_RCV_RST | FIFO_XMT_RST |
2423: FIFO_TRIGGER_1);
2424: }
1.281 matt 2425:
2426: if (type == COM_TYPE_OMAP) {
2427: /* setup the fifos. the FCR value is not used as long
2428: as SCR[6] and SCR[7] are 0, which they are at reset
2429: and we never touch the SCR register */
2430: uint8_t rx_fifo_trig = 40;
2431: uint8_t tx_fifo_trig = 60;
2432: uint8_t rx_start = 8;
2433: uint8_t rx_halt = 60;
2434: uint8_t tlr_value = ((rx_fifo_trig>>2) << 4) | (tx_fifo_trig>>2);
2435: uint8_t tcr_value = ((rx_start>>2) << 4) | (rx_halt>>2);
2436:
2437: /* enable access to TCR & TLR */
2438: CSR_WRITE_1(regsp, COM_REG_MCR, MCR_DTR | MCR_RTS | MCR_TCR_TLR);
2439:
2440: /* write tcr and tlr values */
2441: CSR_WRITE_1(regsp, COM_REG_TLR, tlr_value);
2442: CSR_WRITE_1(regsp, COM_REG_TCR, tcr_value);
2443:
2444: /* disable access to TCR & TLR */
2445: CSR_WRITE_1(regsp, COM_REG_MCR, MCR_DTR | MCR_RTS);
2446:
2447: /* enable again, but mode is based on speed */
2448: if (rate > 230400) {
2449: CSR_WRITE_1(regsp, COM_REG_MDR1, MDR1_MODE_UART_13X);
2450: } else {
2451: CSR_WRITE_1(regsp, COM_REG_MDR1, MDR1_MODE_UART_16X);
2452: }
2453: }
2454:
1.223 simonb 2455: if (type == COM_TYPE_PXA2x0)
1.247 gdamore 2456: CSR_WRITE_1(regsp, COM_REG_IER, IER_EUART);
1.221 simonb 2457: else
1.247 gdamore 2458: CSR_WRITE_1(regsp, COM_REG_IER, 0);
1.106 drochner 2459:
1.110 enami 2460: return (0);
1.99 mycroft 2461: }
2462:
1.106 drochner 2463: int
1.247 gdamore 2464: comcnattach1(struct com_regs *regsp, int rate, int frequency, int type,
2465: tcflag_t cflag)
1.99 mycroft 2466: {
1.106 drochner 2467: int res;
2468:
1.289 dyoung 2469: comcons_info.regs = *regsp;
1.247 gdamore 2470:
1.289 dyoung 2471: res = cominit(&comcons_info.regs, rate, frequency, type, cflag);
1.110 enami 2472: if (res)
2473: return (res);
1.106 drochner 2474:
2475: cn_tab = &comcons;
1.186 uwe 2476: cn_init_magic(&com_cnm_state);
2477: cn_set_magic("\047\001"); /* default magic is BREAK */
1.106 drochner 2478:
1.289 dyoung 2479: comcons_info.frequency = frequency;
2480: comcons_info.type = type;
2481: comcons_info.rate = rate;
2482: comcons_info.cflag = cflag;
1.99 mycroft 2483:
1.110 enami 2484: return (0);
1.1 cgd 2485: }
2486:
1.80 christos 2487: int
1.247 gdamore 2488: comcnattach(bus_space_tag_t iot, bus_addr_t iobase, int rate, int frequency,
2489: int type, tcflag_t cflag)
2490: {
2491: struct com_regs regs;
2492:
1.251 mrg 2493: memset(®s, 0, sizeof regs);
1.247 gdamore 2494: regs.cr_iot = iot;
2495: regs.cr_iobase = iobase;
2496: regs.cr_nports = COM_NPORTS;
2497: #ifdef COM_REGMAP
2498: memcpy(regs.cr_map, com_std_map, sizeof (regs.cr_map));
2499: #endif
2500:
2501: return comcnattach1(®s, rate, frequency, type, cflag);
2502: }
2503:
1.289 dyoung 2504: static int
2505: comcnreattach(void)
2506: {
2507: return comcnattach1(&comcons_info.regs, comcons_info.rate,
2508: comcons_info.frequency, comcons_info.type, comcons_info.cflag);
2509: }
2510:
1.247 gdamore 2511: int
1.197 simonb 2512: comcngetc(dev_t dev)
1.1 cgd 2513: {
1.197 simonb 2514:
1.289 dyoung 2515: return (com_common_getc(dev, &comcons_info.regs));
1.1 cgd 2516: }
2517:
2518: /*
2519: * Console kernel output character routine.
2520: */
1.48 mycroft 2521: void
1.197 simonb 2522: comcnputc(dev_t dev, int c)
1.1 cgd 2523: {
1.197 simonb 2524:
1.289 dyoung 2525: com_common_putc(dev, &comcons_info.regs, c);
1.37 mycroft 2526: }
2527:
2528: void
1.256 christos 2529: comcnpollc(dev_t dev, int on)
1.37 mycroft 2530: {
2531:
1.310 mlelstv 2532: com_readaheadcount = 0;
1.106 drochner 2533: }
2534:
2535: #ifdef KGDB
2536: int
1.247 gdamore 2537: com_kgdb_attach1(struct com_regs *regsp, int rate, int frequency, int type,
2538: tcflag_t cflag)
1.106 drochner 2539: {
2540: int res;
1.107 drochner 2541:
1.297 dyoung 2542: if (bus_space_is_equal(regsp->cr_iot, comcons_info.regs.cr_iot) &&
1.289 dyoung 2543: regsp->cr_iobase == comcons_info.regs.cr_iobase) {
1.206 briggs 2544: #if !defined(DDB)
1.110 enami 2545: return (EBUSY); /* cannot share with console */
1.206 briggs 2546: #else
1.247 gdamore 2547: comkgdbregs = *regsp;
1.289 dyoung 2548: comkgdbregs.cr_ioh = comcons_info.regs.cr_ioh;
1.206 briggs 2549: #endif
2550: } else {
1.247 gdamore 2551: comkgdbregs = *regsp;
2552: res = cominit(&comkgdbregs, rate, frequency, type, cflag);
1.206 briggs 2553: if (res)
2554: return (res);
1.190 fvdl 2555:
1.206 briggs 2556: /*
2557: * XXXfvdl this shouldn't be needed, but the cn_magic goo
2558: * expects this to be initialized
2559: */
2560: cn_init_magic(&com_cnm_state);
2561: cn_set_magic("\047\001");
2562: }
1.106 drochner 2563:
2564: kgdb_attach(com_kgdb_getc, com_kgdb_putc, NULL);
2565: kgdb_dev = 123; /* unneeded, only to satisfy some tests */
2566:
1.247 gdamore 2567: return (0);
2568: }
2569:
2570: int
2571: com_kgdb_attach(bus_space_tag_t iot, bus_addr_t iobase, int rate,
2572: int frequency, int type, tcflag_t cflag)
2573: {
2574: struct com_regs regs;
2575:
2576: regs.cr_iot = iot;
2577: regs.cr_nports = COM_NPORTS;
2578: regs.cr_iobase = iobase;
2579: #ifdef COM_REGMAP
2580: memcpy(regs.cr_map, com_std_map, sizeof (regs.cr_map));
2581: #endif
1.106 drochner 2582:
1.247 gdamore 2583: return com_kgdb_attach1(®s, rate, frequency, type, cflag);
1.106 drochner 2584: }
2585:
2586: /* ARGSUSED */
2587: int
1.256 christos 2588: com_kgdb_getc(void *arg)
1.106 drochner 2589: {
1.197 simonb 2590:
1.247 gdamore 2591: return (com_common_getc(NODEV, &comkgdbregs));
1.106 drochner 2592: }
2593:
2594: /* ARGSUSED */
2595: void
1.256 christos 2596: com_kgdb_putc(void *arg, int c)
1.106 drochner 2597: {
1.197 simonb 2598:
1.247 gdamore 2599: com_common_putc(NODEV, &comkgdbregs, c);
1.106 drochner 2600: }
2601: #endif /* KGDB */
2602:
2603: /* helper function to identify the com ports used by
2604: console or KGDB (and not yet autoconf attached) */
2605: int
1.197 simonb 2606: com_is_console(bus_space_tag_t iot, bus_addr_t iobase, bus_space_handle_t *ioh)
1.106 drochner 2607: {
2608: bus_space_handle_t help;
2609:
1.110 enami 2610: if (!comconsattached &&
1.297 dyoung 2611: bus_space_is_equal(iot, comcons_info.regs.cr_iot) &&
1.289 dyoung 2612: iobase == comcons_info.regs.cr_iobase)
2613: help = comcons_info.regs.cr_ioh;
1.106 drochner 2614: #ifdef KGDB
1.110 enami 2615: else if (!com_kgdb_attached &&
1.297 dyoung 2616: bus_space_is_equal(iot, comkgdbregs.cr_iot) &&
2617: iobase == comkgdbregs.cr_iobase)
1.247 gdamore 2618: help = comkgdbregs.cr_ioh;
1.106 drochner 2619: #endif
2620: else
1.110 enami 2621: return (0);
1.106 drochner 2622:
1.110 enami 2623: if (ioh)
2624: *ioh = help;
2625: return (1);
1.2 cgd 2626: }
1.245 perry 2627:
1.247 gdamore 2628: /*
2629: * this routine exists to serve as a shutdown hook for systems that
2630: * have firmware which doesn't interact properly with a com device in
2631: * FIFO mode.
2632: */
1.273 dyoung 2633: bool
2634: com_cleanup(device_t self, int how)
1.247 gdamore 2635: {
1.273 dyoung 2636: struct com_softc *sc = device_private(self);
1.247 gdamore 2637:
2638: if (ISSET(sc->sc_hwflags, COM_HW_FIFO))
2639: CSR_WRITE_1(&sc->sc_regs, COM_REG_FIFO, 0);
1.273 dyoung 2640:
2641: return true;
2642: }
2643:
2644: bool
1.295 dyoung 2645: com_suspend(device_t self, const pmf_qual_t *qual)
1.273 dyoung 2646: {
2647: struct com_softc *sc = device_private(self);
2648:
1.292 dyoung 2649: #if 0
2650: if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE) && cn_tab == &comcons)
2651: cn_tab = &comcons_suspend;
2652: #endif
2653:
1.273 dyoung 2654: CSR_WRITE_1(&sc->sc_regs, COM_REG_IER, 0);
2655: (void)CSR_READ_1(&sc->sc_regs, COM_REG_IIR);
2656:
2657: return true;
1.247 gdamore 2658: }
2659:
1.268 dyoung 2660: bool
1.295 dyoung 2661: com_resume(device_t self, const pmf_qual_t *qual)
1.245 perry 2662: {
1.273 dyoung 2663: struct com_softc *sc = device_private(self);
1.245 perry 2664:
1.263 ad 2665: mutex_spin_enter(&sc->sc_lock);
1.268 dyoung 2666: com_loadchannelregs(sc);
1.263 ad 2667: mutex_spin_exit(&sc->sc_lock);
1.268 dyoung 2668:
2669: return true;
1.245 perry 2670: }
CVSweb <webmaster@jp.NetBSD.org>