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Annotation of src/sys/dev/ic/ahcisatavar.h, Revision 1.4.4.1

1.4.4.1 ! yamt        1: /*     $NetBSD: ahcisatavar.h,v 1.4 2008/03/18 20:46:36 cube Exp $     */
1.1       bouyer      2:
                      3: /*
                      4:  * Copyright (c) 2006 Manuel Bouyer.
                      5:  *
                      6:  * Redistribution and use in source and binary forms, with or without
                      7:  * modification, are permitted provided that the following conditions
                      8:  * are met:
                      9:  * 1. Redistributions of source code must retain the above copyright
                     10:  *    notice, this list of conditions and the following disclaimer.
                     11:  * 2. Redistributions in binary form must reproduce the above copyright
                     12:  *    notice, this list of conditions and the following disclaimer in the
                     13:  *    documentation and/or other materials provided with the distribution.
                     14:  *
                     15:  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
                     16:  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
                     17:  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
                     18:  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
                     19:  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
                     20:  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
                     21:  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
                     22:  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
                     23:  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
                     24:  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
                     25:  *
                     26:  */
                     27:
                     28: #include <dev/ic/ahcisatareg.h>
                     29:
                     30: #define AHCI_DEBUG
                     31:
                     32: #define DEBUG_INTR   0x01
                     33: #define DEBUG_XFERS  0x02
                     34: #define DEBUG_FUNCS  0x08
                     35: #define DEBUG_PROBE  0x10
                     36: #define DEBUG_DETACH 0x20
                     37: #ifdef AHCI_DEBUG
                     38: extern int ahcidebug_mask;
                     39: #define AHCIDEBUG_PRINT(args, level) \
                     40:         if (ahcidebug_mask & (level)) \
                     41:                printf args
                     42: #else
                     43: #define AHCIDEBUG_PRINT(args, level)
                     44: #endif
                     45:
                     46: struct ahci_softc {
                     47:        struct atac_softc sc_atac;
                     48:        bus_space_tag_t sc_ahcit; /* ahci registers mapping */
                     49:        bus_space_handle_t sc_ahcih;
                     50:        bus_dma_tag_t sc_dmat; /* DMA memory mappings: */
                     51:        void *sc_cmd_hdr; /* command tables and received FIS */
                     52:        bus_dmamap_t sc_cmd_hdrd;
1.3       xtraeme    53:        int sc_atac_capflags;
1.1       bouyer     54:
                     55:        int sc_ncmds; /* number of command slots */
                     56:        struct ata_channel *sc_chanarray[AHCI_MAX_PORTS];
                     57:        struct ahci_channel {
                     58:                struct ata_channel ata_channel; /* generic part */
                     59:                bus_space_handle_t ahcic_scontrol;
                     60:                bus_space_handle_t ahcic_sstatus;
                     61:                bus_space_handle_t ahcic_serror;
                     62:                /* pointers allocated from sc_cmd_hdrd */
                     63:                struct ahci_r_fis *ahcic_rfis; /* received FIS */
                     64:                bus_addr_t ahcic_bus_rfis;
                     65:                struct ahci_cmd_header *ahcic_cmdh; /* command headers */
                     66:                bus_addr_t ahcic_bus_cmdh;
                     67:                /* command tables (allocated per-channel) */
                     68:                bus_dmamap_t ahcic_cmd_tbld;
                     69:                struct ahci_cmd_tbl *ahcic_cmd_tbl[AHCI_MAX_CMDS];
                     70:                bus_addr_t ahcic_bus_cmd_tbl[AHCI_MAX_CMDS];
                     71:                bus_dmamap_t ahcic_datad[AHCI_MAX_CMDS];
                     72:                u_int32_t  ahcic_cmds_active; /* active commands */
                     73:        } sc_channels[AHCI_MAX_PORTS];
                     74: };
                     75:
1.4       cube       76: #define AHCINAME(sc) (device_xname((sc)->sc_atac.atac_dev))
1.1       bouyer     77:
                     78: #define AHCI_CMDH_SYNC(sc, achp, cmd, op) bus_dmamap_sync((sc)->sc_dmat, \
                     79:     (sc)->sc_cmd_hdrd, \
                     80:     (char *)(&(achp)->ahcic_cmdh[(cmd)]) - (char *)(sc)->sc_cmd_hdr, \
                     81:     sizeof(struct ahci_cmd_header), (op))
                     82: #define AHCI_RFIS_SYNC(sc, achp, op) bus_dmamap_sync((sc)->sc_dmat, \
                     83:     (sc)->sc_cmd_hdrd, (void *)(achp)->ahcic_rfis - (sc)->sc_cmd_hdr, \
                     84:     AHCI_RFIS_SIZE, (op))
                     85: #define AHCI_CMDTBL_SYNC(sc, achp, cmd, op) bus_dmamap_sync((sc)->sc_dmat, \
                     86:     (achp)->ahcic_cmd_tbld, AHCI_CMDTBL_SIZE * (cmd), \
                     87:     AHCI_CMDTBL_SIZE, (op))
                     88:
                     89: #define AHCI_READ(sc, reg) bus_space_read_4((sc)->sc_ahcit, \
                     90:     (sc)->sc_ahcih, (reg))
                     91: #define AHCI_WRITE(sc, reg, val) bus_space_write_4((sc)->sc_ahcit, \
                     92:     (sc)->sc_ahcih, (reg), (val))
                     93:
                     94:
                     95: void ahci_attach(struct ahci_softc *);
1.2       joerg      96: void ahci_enable_intrs(struct ahci_softc *);
                     97: int  ahci_reset(struct ahci_softc *);
                     98: void ahci_setup_ports(struct ahci_softc *);
                     99: void ahci_reprobe_drives(struct ahci_softc *);
1.1       bouyer    100:
                    101: int  ahci_intr(void *);
1.2       joerg     102: