version 1.7.8.2, 2014/05/22 11:40:21 |
version 1.8, 2012/07/02 18:15:46 |
Line 54 struct ahci_softc { |
|
Line 54 struct ahci_softc { |
|
bus_dma_segment_t sc_cmd_hdr_seg; |
bus_dma_segment_t sc_cmd_hdr_seg; |
int sc_cmd_hdr_nseg; |
int sc_cmd_hdr_nseg; |
int sc_atac_capflags; |
int sc_atac_capflags; |
int sc_ahci_quirks; |
|
#define AHCI_PCI_QUIRK_FORCE __BIT(0) /* force attach */ |
|
#define AHCI_PCI_QUIRK_BAD64 __BIT(1) /* broken 64-bit DMA */ |
|
#define AHCI_QUIRK_BADPMP __BIT(2) /* broken PMP support, ignore */ |
|
#define AHCI_QUIRK_BADPMPRESET __BIT(3) /* broken PMP support for reset */ |
|
|
|
uint32_t sc_ahci_cap; /* copy of AHCI_CAP */ |
int32_t sc_ahci_cap; /* copy of AHCI_CAP */ |
int sc_ncmds; /* number of command slots */ |
int sc_ncmds; /* number of command slots */ |
uint32_t sc_ahci_ports; |
|
struct ata_channel *sc_chanarray[AHCI_MAX_PORTS]; |
struct ata_channel *sc_chanarray[AHCI_MAX_PORTS]; |
struct ahci_channel { |
struct ahci_channel { |
struct ata_channel ata_channel; /* generic part */ |
struct ata_channel ata_channel; /* generic part */ |
Line 83 struct ahci_softc { |
|
Line 77 struct ahci_softc { |
|
bus_dmamap_t ahcic_datad[AHCI_MAX_CMDS]; |
bus_dmamap_t ahcic_datad[AHCI_MAX_CMDS]; |
uint32_t ahcic_cmds_active; /* active commands */ |
uint32_t ahcic_cmds_active; /* active commands */ |
} sc_channels[AHCI_MAX_PORTS]; |
} sc_channels[AHCI_MAX_PORTS]; |
|
|
void (*sc_channel_start)(struct ahci_softc *, struct ata_channel *); |
|
void (*sc_channel_stop)(struct ahci_softc *, struct ata_channel *); |
|
|
|
bool sc_save_init_data; |
|
struct { |
|
uint32_t cap; |
|
uint32_t cap2; |
|
uint32_t ports; |
|
} sc_init_data; |
|
}; |
}; |
|
|
#define AHCINAME(sc) (device_xname((sc)->sc_atac.atac_dev)) |
#define AHCINAME(sc) (device_xname((sc)->sc_atac.atac_dev)) |