CVS log for src/sys/dev/i2c/m41st84.c

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Sync w/ HEAD.

sync with head

add \n to attach output

Sync with HEAD.

Use DEVICE_COMPAT_EOL.

Since we're using designated initialisers for compat data, we should
use a completely empty initializer for the sentinel.

Change the device_compatible_match() function to only perform the match.
Introduce a device_compatible_lookup() function to return an entry based
on the same matching criteria (a'la of_search_compatible()).

Update iic_compatible_match() to reflect the above change, and introduce
iic_compatible_lookup().  This pattern is less awkward to use.

Change the device_compatible_entry struct to have a union of
a scalar value (uintptr_t value) and a pointer value (const void *data),
rather than just "uintptr_t data".  This eliminates the need for drivers
to cast this value, and doesn't lose const'ness of pointers assigned
to the field.

Update all of the users of this field to use the correct set of
designated initialisers for each specific case.

Merge changes from current as of 20200406

Eliminate all of the #ifdefs for the "strtc" driver.  Define model
properties (similar to what the "dsrtc" driver does), and provide
DT compat strings corresponding to those models.  Allow config flags
to specify the model for non-FDT platforms (also like "dsrtc").

- Use todr_gettime_ymdhms / todr_settime_ymdhms.
- Correctly propagate errors up the stack.

No need to use I2C_F_POLL here.

Sync with HEAD

More cleanup to i2c autoconfiguration:

- Get all of the drivers onto the new match quality constants.
- Introduce a new helper function, iic_use_direct_match(), that has
  all of the logic for direct-config matching.  If it returns true,
  the driver returns the match result (which may be 0).  If it returns
  false, the driver does indirect-config matching.
- iic_compat_match() now returns a weighted match quality; matches to
  lower-indexed "compatible" device property are more-specific matches,
  and return a better match quality accordingly.

update from HEAD

Kill some more extern struct cfdriver declarations.

Down with externs in .c!

use the inline bcdtobin and bintobcd directly instead through a macro.

Rebase to HEAD as of a few days ago.

Rebase.

Add d_discard to all struct cdevsw instances I could find.

All have been set to "nodiscard"; some should get a real implementation.

sync with head.

for a reference, the tree before this commit was tagged
as yamt-pagecache-tag8.

this commit was splitted into small chunks to avoid
a limitation of cvs.  ("Protocol error: too many arguments")

sync with head

Change (mostly mechanically) every cdevsw/bdevsw I can find to use
designated initializers.

I have not built every extant kernel so I have probably broken at
least one build; however I've also found and fixed some wrong
cdevsw/bdevsw entries so even if so I think we come out ahead.

fix an array bound error which was spotted by gcc 4.8

Sync with HEAD.

sync with head

Add direct config support for all devices used by sandpoint.

sync with head

Do not print "M41ST84 Real-time Clock/NVRAM", but "M41T8x Real-time Clock"
when STRTC_NO_USERRAM is defined. This driver should work for all M41T8x
compatible chips (tested on my DSM-G600 with M41T80).

sync with head

Sync with HEAD (-D20101022).

Add options STRTC_NO_USERRAM and STRTC_NO_WATCHDOG for m41t80.

sync with head

Remove `volatile' qualifier from argument types of
struct timeval passed to todr_gettime(9) and todr_settime(9).
We no longer have an ancient and volatile struct timeval `time'
global since we have switched to MI timercounter(9) on all port.

XXX1: some of these RTC drivers still assume 32bit time_t
XXX2: some of these should be rewritten to use todr_[gs]ettime_ymdhms()
XXX3: todr(9) man page doesn't mention todr_[gs]ettime_ymdhms()

sync with head.

Sync with HEAD.

Sync with HEAD.

Provide a utility routine to configure/write the watchdog.
XXX This watchdog should eventually be integrated into the generic
    watchdog framework.

Sync with HEAD.

Sync w/ -current. 34 merge conflicts to follow.

sync with head.

Replace device_lookup() with device_lookup_private() to get softc
after device_t/softc split.  PR kern/38885 from Jonathan A. Kollasch.

Sync with HEAD.

sync with head.

sync with head.

device_t/softc split and other related cosmetic changes.

use aprint_*_dev and device_xname

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sync with HEAD

Sync with head.

Sync with HEAD

sync with head.

use __KERNEL_RCSID()

sync with head.

Sync with head.

Add missing initializers in cdevsw structs.

sync with head.

sync with head.

sync with head

Remove unused todr_setcal/todr_getcal and all the assorted stub
implementations.

sync with head.

Sync with head.

sync with head.

sync with head.

Merge 2006-03-31 NetBSD-current into the "peter-altq" branch.

Use device_private().

Update some missed _close() and _open() functions from 'struct proc *p'
to 'struct lwp *l'.

merge ktrace-lwp.

Sync with HEAD. Here we go again...

Fix the various todr_gettime() and todr_settime() fallouts from
-Wcast-qual differently, by instead changing the signatore of those
"functions" to take a "volatile struct timeval*" instead of a
"struct timeval*".  Many places, these functions are called with
&time, and time is declared as volatile in <sys/kernel.h>.  This
way we can get rid of all the ugly casts which now also triggered
warnings, and caused more code to be added to work around the
problem.

Reviewed by thorpej.

Sync with HEAD.

Check and clear the HT bit in strtc_clock_read(), not just strtc_clock_write()
otherwise we end up reading the date/time of the previous powerfail event.

Fix the sync with head I botched.

Sync with HEAD.

Sync with HEAD

file m41st84.c was added on branch ktrace-lwp on 2004-08-03 10:46:06 +0000

Handle the Halt Update Bit (HT), stored in the Alarm Hour register.
This bit will be set if the clock lost power (and may therefore
not have the correct time).  If this bit is set, the stored time
does not advance.  So, when setting the clock, if that bit is set,
we simply clear it.  It might be nice in some applications to pass
the information up a few layers if the bit is set when we read the
register initially.  For now, though, we ignore it.

New generic I2C framework.  Supports bit-bang and "intelligent" I2C
interface controllers (of varying intelligence levels).

Contributed by Wasabi Systems, Inc.  Primarily written by Steve Woodford,
with some modification by me.