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Default branch: MAIN
Current tag: MAIN
Revision 1.44 / (download) - annotate - [select for diffs], Fri Apr 27 04:38:24 2012 UTC (12 months, 3 weeks ago) by jruoho
Branch: MAIN
CVS Tags: yamt-pagecache-base8,
yamt-pagecache-base7,
yamt-pagecache-base6,
yamt-pagecache-base5,
tls-maxphys-nbase,
tls-maxphys-base,
tls-maxphys,
khorben-n900,
jmcneill-usbmp-base9,
jmcneill-usbmp-base10,
agc-symver-base,
agc-symver,
HEAD
Changes since 1.43: +1 -2
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Diff to previous 1.43 (colored)
Remove the upper limit for the number of T-states.
Revision 1.43 / (download) - annotate - [select for diffs], Tue Oct 18 05:08:24 2011 UTC (19 months ago) by jruoho
Branch: MAIN
CVS Tags: yamt-pagecache-base4,
yamt-pagecache-base3,
yamt-pagecache-base2,
yamt-pagecache-base,
netbsd-6-base,
netbsd-6-1-RELEASE,
netbsd-6-1-RC4,
netbsd-6-1-RC3,
netbsd-6-1-RC2,
netbsd-6-1-RC1,
netbsd-6-1,
netbsd-6-0-RELEASE,
netbsd-6-0-RC2,
netbsd-6-0-RC1,
netbsd-6-0-2-RELEASE,
netbsd-6-0-1-RELEASE,
netbsd-6-0,
netbsd-6,
matt-nb6-plus-nbase,
matt-nb6-plus-base,
matt-nb6-plus,
jmcneill-usbmp-pre-base2,
jmcneill-usbmp-base8,
jmcneill-usbmp-base7,
jmcneill-usbmp-base6,
jmcneill-usbmp-base5,
jmcneill-usbmp-base4,
jmcneill-usbmp-base3,
jmcneill-usbmp-base2,
jmcneill-usbmp-base,
jmcneill-audiomp3-base,
jmcneill-audiomp3
Branch point for: yamt-pagecache,
jmcneill-usbmp
Changes since 1.42: +3 -4
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Diff to previous 1.42 (colored)
Convert to use cpufreq(9).
Revision 1.42 / (download) - annotate - [select for diffs], Wed Jun 22 08:49:54 2011 UTC (23 months ago) by jruoho
Branch: MAIN
Changes since 1.41: +4 -4
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Diff to previous 1.41 (colored)
Get rid of RUN_ONCE(9). Should fix PR # kern/44043.
Revision 1.41 / (download) - annotate - [select for diffs], Sun Jun 12 10:11:52 2011 UTC (23 months, 1 week ago) by jruoho
Branch: MAIN
Changes since 1.40: +1 -2
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Diff to previous 1.40 (colored)
Move the evaluation of the _PDC control method out from the acpicpu(4) driver to the main acpi(4) stack. Follow Linux and evaluate it early. Should fix PR port-amd64/42895, possibly also PR kern/42583, and many other comparable bugs. A common sense explanation is that Intel supplies additional CPU tables to OEMs. BIOS writers do not bother to modify their DSDTs, but instead load these extra tables dynamically as secondary SSDT tables. The actual Load() happens when the _PDC method is invoked, and thus namespace errors occur when the CPU-specific ACPI methods are not yet present but referenced in the AML by various drivers, including, but not limited to, acpitz(4).
Revision 1.40 / (download) - annotate - [select for diffs], Thu Mar 24 05:10:06 2011 UTC (2 years, 2 months ago) by jruoho
Branch: MAIN
CVS Tags: rmind-uvmplock-nbase,
rmind-uvmplock-base,
cherry-xenmp-base
Branch point for: cherry-xenmp
Changes since 1.39: +2 -3
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Diff to previous 1.39 (colored)
Remove the "simple CPU lock" that was unnecessary. Thanks to rmind@ for clarifications.
Revision 1.39 / (download) - annotate - [select for diffs], Sat Mar 19 12:57:31 2011 UTC (2 years, 2 months ago) by jruoho
Branch: MAIN
Changes since 1.38: +7 -7
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Diff to previous 1.38 (colored)
Like in rest of the acpi(4) stack, queue all resume hooks.
Revision 1.38 / (download) - annotate - [select for diffs], Thu Mar 17 15:59:36 2011 UTC (2 years, 2 months ago) by jruoho
Branch: MAIN
Changes since 1.37: +2 -1
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Diff to previous 1.37 (colored)
Properly set the frequency during suspend and resume. Should fix problems introduced in the revision 1.42. Pointed out by Taylor C. Campbell.
Revision 1.37 / (download) - annotate - [select for diffs], Sat Mar 5 09:47:19 2011 UTC (2 years, 2 months ago) by jruoho
Branch: MAIN
CVS Tags: bouyer-quota2-nbase
Branch point for: rmind-uvmplock
Changes since 1.36: +4 -3
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Diff to previous 1.36 (colored)
Add __cpu_simple_lock_t. Use it, x86_read_psl(), and x86_disable_intr() to disable interrupts locally and protect the access to APERF and MPERF. Also rationalize the MD initialization sequence.
Revision 1.36 / (download) - annotate - [select for diffs], Fri Mar 4 12:10:50 2011 UTC (2 years, 2 months ago) by jruoho
Branch: MAIN
Changes since 1.35: +3 -3
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Diff to previous 1.35 (colored)
Rename a badly named constant. Make it correspond with <x86/specialreg.h>.
Revision 1.35 / (download) - annotate - [select for diffs], Tue Mar 1 04:35:48 2011 UTC (2 years, 2 months ago) by jruoho
Branch: MAIN
Changes since 1.34: +5 -5
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Diff to previous 1.34 (colored)
Move the xcall(9) that does the P- and T-state transformations from the MD layer to the main code. Makes the caches coherent and provides consistent vmstat(1) output. This is still not quite right, given that most of the cross-calls are typically unnecessary with the dependency coordination.
Revision 1.34 / (download) - annotate - [select for diffs], Sun Feb 27 18:32:53 2011 UTC (2 years, 2 months ago) by jruoho
Branch: MAIN
Changes since 1.33: +44 -41
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Diff to previous 1.33 (colored)
Provide MD wrappers for match and attach.
Revision 1.33 / (download) - annotate - [select for diffs], Fri Feb 25 20:59:37 2011 UTC (2 years, 2 months ago) by jruoho
Branch: MAIN
Changes since 1.32: +4 -4
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Diff to previous 1.32 (colored)
Comment the coordination types.
Revision 1.32 / (download) - annotate - [select for diffs], Fri Feb 25 19:55:06 2011 UTC (2 years, 2 months ago) by jruoho
Branch: MAIN
Changes since 1.31: +37 -16
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Diff to previous 1.31 (colored)
Start to derive the percpu(9) (or per-domain) state coordination mechanisms by parsing the _CSD, _PSD, and _TSD objects by default.
Revision 1.31 / (download) - annotate - [select for diffs], Fri Feb 25 12:08:35 2011 UTC (2 years, 2 months ago) by jruoho
Branch: MAIN
Changes since 1.30: +6 -6
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Diff to previous 1.30 (colored)
Rename couple of badly named functions for consistency. No functional change.
Revision 1.30 / (download) - annotate - [select for diffs], Fri Feb 25 09:16:00 2011 UTC (2 years, 2 months ago) by jruoho
Branch: MAIN
Changes since 1.29: +6 -3
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Diff to previous 1.29 (colored)
Add preliminary support for the IA32_APERF and IA32_MPERF frequency counters. These are not yet used for anything and only Intel is supported at the moment.
Revision 1.29 / (download) - annotate - [select for diffs], Fri Feb 25 06:18:02 2011 UTC (2 years, 2 months ago) by jruoho
Branch: MAIN
Changes since 1.28: +2 -2
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Diff to previous 1.28 (colored)
Store a pointer to cpu_info rather than cpu_info::ci_acpiid alone.
Revision 1.28 / (download) - annotate - [select for diffs], Thu Jan 13 03:40:51 2011 UTC (2 years, 4 months ago) by jruoho
Branch: MAIN
CVS Tags: jruoho-x86intr-base,
bouyer-quota2-base
Branch point for: jruoho-x86intr,
bouyer-quota2
Changes since 1.27: +1 -2
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Diff to previous 1.27 (colored)
Move the function that counts the CPUs from acpicpu(4) to the MD layer.
Revision 1.27 / (download) - annotate - [select for diffs], Thu Dec 30 12:05:02 2010 UTC (2 years, 4 months ago) by jruoho
Branch: MAIN
CVS Tags: matt-mips64-premerge-20101231
Changes since 1.26: +1 -2
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Diff to previous 1.26 (colored)
Change the default behavior to enforce the maximum frequency when the firmware requests to do so. This cures severe overhating (> 120 C) observed on many laptops, being also on par with the specification(s). This can be reverted by using the new "hw.acpi.cpu.dynamic" sysctl variable.
Revision 1.26 / (download) - annotate - [select for diffs], Tue Nov 30 04:31:00 2010 UTC (2 years, 5 months ago) by jruoho
Branch: MAIN
Changes since 1.25: +2 -1
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Diff to previous 1.25 (colored)
Add AMD C1E quirk. Tested by cegger@.
(a) This should be removed once C-states are supported.
(b) As there seems to be no reliable way to detect whether C1E is present,
the quirk blindly assumes that C1E is used on families 10h and 11h.
Revision 1.25 / (download) - annotate - [select for diffs], Fri Aug 27 03:05:26 2010 UTC (2 years, 8 months ago) by jruoho
Branch: MAIN
CVS Tags: yamt-nfs-mp-base11,
uebayasi-xip-base4,
uebayasi-xip-base3
Changes since 1.24: +1 -5
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Diff to previous 1.24 (colored)
Fix PR kern/43765 from Scott Ellis. Note that the solution is not optimal. If ichlpcib(4) provides SpeedStep support, possible I/O resource conflicts may occur with acpicpu(4). Ideally, as noted for instance in Windows design documents, ichlpcib(4) should never expose SpeedStep when ACPI is being used. The probability for potential race conditions is however very small, being limited to few P4-era machines and being dependent on user actions.
Revision 1.24 / (download) - annotate - [select for diffs], Tue Aug 24 07:27:59 2010 UTC (2 years, 9 months ago) by jruoho
Branch: MAIN
Changes since 1.23: +4 -3
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Diff to previous 1.23 (colored)
Add native support for AMD family 0Fh processors. This is the furthest we will go backwards; K7 will not be supported already due doubts about availability and reliability of ACPI during that era. Some unfortunate code duplication is present (but not overly much). Thanks to cegger@ and jakllsch@ for patiently testing this.
Revision 1.23 / (download) - annotate - [select for diffs], Mon Aug 23 16:20:45 2010 UTC (2 years, 9 months ago) by jruoho
Branch: MAIN
Changes since 1.22: +2 -2
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Diff to previous 1.22 (colored)
Other entry points beyond x86_cpu_idle_halt() may use HLT as the idle-mechanism. Send an IPI also for these in cpu_need_resched().
Revision 1.22 / (download) - annotate - [select for diffs], Sat Aug 21 06:45:50 2010 UTC (2 years, 9 months ago) by jruoho
Branch: MAIN
Changes since 1.21: +11 -10
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Diff to previous 1.21 (colored)
Check from CPUID 0x06 %eax (on Intel) whether we might actually have an
invariant APIC timer or an "ARAT" ("always running APIC timer"). This means
that the APIC timer may keep ticking at the same rate also in deep C-states
with some new or forthcoming Intel CPUs.
Revision 1.21 / (download) - annotate - [select for diffs], Sat Aug 21 03:55:24 2010 UTC (2 years, 9 months ago) by jruoho
Branch: MAIN
Changes since 1.20: +9 -8
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Diff to previous 1.20 (colored)
Detect whether TSC is invariant, which may be the case on both new AMD and Intel processors. The invariance means that TSC runs at a constant rate during all ACPI state changes. If it is variant, skew may occur and TSC is generally unsuitable for wall clock services. This is especially relevant with C-states; with variant TSC, the whole counter may be stopped with states larger than C1. All x86 CPUs before circa mid-2000s can be assumed to have a variant time stamp counter.
Revision 1.20 / (download) - annotate - [select for diffs], Fri Aug 20 12:20:23 2010 UTC (2 years, 9 months ago) by jruoho
Branch: MAIN
Changes since 1.19: +6 -4
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Diff to previous 1.19 (colored)
Add two flags that needs to be dealt with (hardware vs. software coordination of P-state transitions, and Turbo Boost / Turbo Core).
Revision 1.19 / (download) - annotate - [select for diffs], Wed Aug 18 18:32:20 2010 UTC (2 years, 9 months ago) by jruoho
Branch: MAIN
Changes since 1.18: +2 -1
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Diff to previous 1.18 (colored)
Use the idea from cegger@ and fill the (X)PSS structure during initialization.
Revision 1.18 / (download) - annotate - [select for diffs], Tue Aug 17 10:17:52 2010 UTC (2 years, 9 months ago) by jruoho
Branch: MAIN
Changes since 1.17: +3 -1
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Diff to previous 1.17 (colored)
Add support for the optional dynamic minimum (in terms of MHz) via _PDL. Comparable to T-states, this gives effectively a window of available performance states for passive cooling. An example: Init: max = 0, min = Pn. Time j. Time j + 1. ----------- ----------- 2000 MHz P0 max P0 P1 P1 max P2 ==> P2 P3 P3 min P4 P4 P5 min P5 500 Mhz Pn Pn ----------- ----------- Search: repeat (i = P0; i <= P5) repeat (i = P1; i <= P3)
Revision 1.17 / (download) - annotate - [select for diffs], Mon Aug 16 17:58:42 2010 UTC (2 years, 9 months ago) by jruoho
Branch: MAIN
Branch point for: uebayasi-xip
Changes since 1.16: +4 -4
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Diff to previous 1.16 (colored)
Now that the deferred configuration actually works as expected and documented, use config_defer(9) instead of config_finalize_register(9), and simplify the code paths around the initialization.
Revision 1.16 / (download) - annotate - [select for diffs], Mon Aug 16 07:38:38 2010 UTC (2 years, 9 months ago) by jruoho
Branch: MAIN
CVS Tags: uebayasi-xip-base2
Changes since 1.15: +27 -14
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Diff to previous 1.15 (colored)
Add support for Extended PSS ACPI Method Specification from Microsoft. This will greatly simplify supporting PowerNow! on conforming systems.
Revision 1.15 / (download) - annotate - [select for diffs], Sat Aug 14 05:13:21 2010 UTC (2 years, 9 months ago) by jruoho
Branch: MAIN
Changes since 1.14: +8 -7
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Diff to previous 1.14 (colored)
Move the PIIX4-quirk to the MD file and disable T-states for PIIX4.
Revision 1.14 / (download) - annotate - [select for diffs], Fri Aug 13 16:21:50 2010 UTC (2 years, 9 months ago) by jruoho
Branch: MAIN
Changes since 1.13: +43 -15
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Diff to previous 1.13 (colored)
Merge T-state a.k.a. throttling support for acpicpu(4).
Remarks:
1. Native instructions are supported only on Intel. Native support for
other x86 vendors will be investigated. By assumption, AMD and others
use the I/O based approach.
2. The existing code, INTEL_ONDEMAND_CLOCKMOD, must be disabled in
order to use acpicpu(4). Otherwise fatal MSR races may occur.
Unlike with P-states, no attempt is done to disable the existing
implementation.
3. There is no rationale to export controls to user land.
4. Throttling is an artefact from the past. T-states will not be used for
power management per se. For CPU frequency management, P-states are
preferred in all circumstances. No noticeable additional power savings
were observed in various experiments. When the system has been scaled
to the highest (i.e. lowest power) P-state, it is preferable to move
from C0 to deeper C-states than it is to actively throttle the CPU.
5. But T-states need to be implemented for passive cooling via acpitz(4).
As specified by ACPI and Intel documents, these can be used as the
last line of defence against critical thermal conditions. Support
for this will be added later.
Revision 1.13 / (download) - annotate - [select for diffs], Wed Aug 11 11:48:21 2010 UTC (2 years, 9 months ago) by jruoho
Branch: MAIN
Branch point for: yamt-nfs-mp
Changes since 1.12: +2 -1
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Diff to previous 1.12 (colored)
Use a define instead of a magic constant for the arbitrary P-state limit.
Revision 1.12 / (download) - annotate - [select for diffs], Tue Aug 10 02:42:05 2010 UTC (2 years, 9 months ago) by jruoho
Branch: MAIN
CVS Tags: yamt-nfs-mp-base10
Changes since 1.11: +5 -3
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Diff to previous 1.11 (colored)
Use evcnt(9) for the counters.
Revision 1.11 / (download) - annotate - [select for diffs], Mon Aug 9 13:41:38 2010 UTC (2 years, 9 months ago) by jruoho
Branch: MAIN
Changes since 1.10: +1 -2
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Diff to previous 1.10 (colored)
Remove a redundant function.
Revision 1.10 / (download) - annotate - [select for diffs], Sun Aug 8 18:47:54 2010 UTC (2 years, 9 months ago) by jruoho
Branch: MAIN
Changes since 1.9: +2 -1
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Diff to previous 1.9 (colored)
jmcneill@: do not touch the bus_space(9) handle.
Revision 1.9 / (download) - annotate - [select for diffs], Sun Aug 8 16:58:42 2010 UTC (2 years, 9 months ago) by jruoho
Branch: MAIN
Changes since 1.8: +46 -12
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Diff to previous 1.8 (colored)
Merge P-state support for acpicpu(4).
Remarks:
1. All processors (x86 or not) for which the vendor has implemented
ACPI I/O access routines are supported. Native instructions are
currently supported only for Intel's "Enhanced Speedstep". Code for
"PowerNow!" (AMD) will be merged later. Native support for VIA's
"PowerSaver" will be investigated.
2. Backwards compatibility with existing userland code is maintained.
Comparable to the case with cpu_idle(9), the ACPI CPU driver
installs alternative functions for the existing sysctl(8) controls.
The "native" behavior (if any) is restored upon detachment.
3. The dynamic nature of ACPI-provided P-states needs more investigation.
The maximum frequency induced (but not forced) by the firmware may
change dynamically. Currently, the sysctl(8) controls error out with
a value larger than the dynamic maximum. The code itself does not
however yet react to the notifications from the firmware by changing
the frequencies in-place. Presumably the system administrator should
be able to choose whether to use dynamic or static frequencies.
Revision 1.8 / (download) - annotate - [select for diffs], Fri Jul 30 06:11:14 2010 UTC (2 years, 9 months ago) by jruoho
Branch: MAIN
Changes since 1.7: +21 -18
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Diff to previous 1.7 (colored)
On second thought, rename the mutex so it can be (logically) shared. We will not need such granularity that different states would require a different lock.
Revision 1.7 / (download) - annotate - [select for diffs], Thu Jul 29 22:42:58 2010 UTC (2 years, 9 months ago) by jruoho
Branch: MAIN
Changes since 1.6: +4 -2
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Diff to previous 1.6 (colored)
Add a per ACPI CPU mutex for C-states. Protect the _CST update with this: when the idle-information is being updated (e.g. due acpiacad(4) events), we can not enter the idle-loop. The lock must run at the same priority (IPL_NONE) as ACPICA's mutexes obtained via AcpiOsCreateMutex() a.k.a. AcpiOsCreateSemaphore(). Also check want_resched as the first thing and clarify the suspend/resume path. There is still one race condition identified: when the driver is loaded as a module, we must gracefully kick all CPUs out from the ACPI idle-loop upon detachment.
Revision 1.6 / (download) - annotate - [select for diffs], Tue Jul 27 05:11:32 2010 UTC (2 years, 9 months ago) by jruoho
Branch: MAIN
Changes since 1.5: +44 -26
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Diff to previous 1.5 (colored)
Move the GAS definition to the header so it can be shared. Make a basic sanity check before casting to the GAS. Rename the _CSD structure; the optional "cross logical processor dependency information" is almost identical in C, P, and T states. Add some comments to the header.
Revision 1.5 / (download) - annotate - [select for diffs], Fri Jul 23 08:11:49 2010 UTC (2 years, 10 months ago) by jruoho
Branch: MAIN
Changes since 1.4: +13 -8
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Diff to previous 1.4 (colored)
Add a new flag that determines whether we should check for bus master activity (BM_STS) by reading from the PM1 register. According to the Intel processor specification for ACPI, the FFH GAS encoding may provide a hint that the check is not required. This may help some systems to enter C2/C3 even when e.g. usb(4) keeps the BM_STS bit always enabled.
Revision 1.4 / (download) - annotate - [select for diffs], Fri Jul 23 05:32:02 2010 UTC (2 years, 10 months ago) by jruoho
Branch: MAIN
Changes since 1.3: +1 -2
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Diff to previous 1.3 (colored)
Remove the recently added ACPICPU_FLAG_INIT and instead operate with the existing ACPICPU_FLAG_C, as was intended. Set that flag only after the idle-loop has been installed, so that the notify handler errors out if an interrupt is received before the idle-loop is in place.
Revision 1.3 / (download) - annotate - [select for diffs], Mon Jul 19 00:59:32 2010 UTC (2 years, 10 months ago) by christos
Branch: MAIN
Changes since 1.2: +2 -1
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Diff to previous 1.2 (colored)
XXX: If this is not correct, revert or fix. This makes my laptop boot instead of panic: panic: kernel diagnostic assertion "native_idle != NULL" failed: file "../../../../arch/x86/acpi/acpi_cpu_md.c", line 155 fatal breakpoint trap in supervisor mode type 1 code 0 rip ffffffff8022e4ad cs 8 rflags 246 cr2 0 cpl 0 rsp ffff80004c37db10 trace breakpoint() at netbsd:breakpoint+0x5 panic() at netbsd:panic+0x2ba kern_assert() at netbsd:kern_assert+0x2d acpicpu_md_idle_stop() at netbsd:acpicpu_md_idle_stop+0x62 acpicpu_cstate_callback() at netbsd:acpicpu_cstate_callback+0x34 sysmon_task_queue_thread() at netbsd:sysmon_task_queue_thread+0x41 1. ACPI seems to define cpuids 1..n; we define 0..n-1. Adjust for that 2. My laptop is dual core, but ACPI reports 4 cpu nodes. Instead of attaching the unmatched ones, make the match fail. Do we want to attach and do nothing instead? 3. Create a flag, and only set it after we are completely initialized, so the sysmon thread does not try to access unitialized state.
Revision 1.2 / (download) - annotate - [select for diffs], Sun Jul 18 09:39:45 2010 UTC (2 years, 10 months ago) by jruoho
Branch: MAIN
Changes since 1.1: +1 -1
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Diff to previous 1.1 (colored)
Add missing CVS identifiers.
Revision 1.1 / (download) - annotate - [select for diffs], Sun Jul 18 09:29:13 2010 UTC (2 years, 10 months ago) by jruoho
Branch: MAIN
Merge a driver for ACPI CPUs with basic support for processor power states, also known as C-states. The code is modular and provides an easy way to add the remaining functionality later (namely throttling and P-states). Remarks: 1. Commented out in the GENERICs; more testing exposure is needed. 2. The C3-state is disabled for the time being because it turns off timers, among them the local APIC timer. This may not be universally true on all x86 processors; define ACPICPU_ENABLE_C3 to test. 3. The algorithm used to choose a power state may need tuning. When evaluating the appropriate state, the implementation uses the previous sleep time as an indicator. Additional hints would include for example the system load. Also bus master activity is evaluated when choosing a state. The usb(4) stack is notorious for such activity even when unused. Typically it must be disabled in order to reach the C3-state, but it may also prevent the use of C2. 4. While no extensive empirical measurements have been carried out, the power savings are somewhere between 1-2 W with C1 and C2, depending on the processor, firmware, and load. With C3 even up to 4 W can be saved. The less something ticks, the more power is saved. ok jmcneill@, joerg@, and discussed with various people.