src/sys/arch/xen/x86/x86_xpmap.c - diff

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Diff for /src/sys/arch/xen/x86/x86_xpmap.c between version 1.53.4.1 and 1.53.4.2

version 1.53.4.1, 2016/07/09 20:25:00

version 1.53.4.2, 2016/10/05 20:55:37

Line 127 typedef union {

uint32_t xcpum_km[2];

#else

uint32_t xcpum_km[1];

#endif

u_long xcpum_xm;

} xcpumask_t;

Line 555 xpq_debug_dump(void)

if (++i < xpq_idx)

snprintf(XBUF + strlen(XBUF),

sizeof(XBUF) - strlen(XBUF),

"%" PRIx64 " %08" PRIx64,

xpq_queue[i].ptr, xpq_queue[i].val);

if (++i < xpq_idx)

snprintf(XBUF + strlen(XBUF),

Line 571 xpq_debug_dump(void)

extern volatile struct xencons_interface *xencons_interface; /* XXX */

extern struct xenstore_domain_interface *xenstore_interface; /* XXX */

static void xen_bt_set_readonly (vaddr_t);

static void xen_bt_set_readonly(vaddr_t);

static void xen_bootstrap_tables (vaddr_t, vaddr_t, int, int, int);

static void xen_bootstrap_tables(vaddr_t, vaddr_t, int, int, int);

/* How many PDEs ? */

#if L2_SLOT_KERNBASE > 0

Line 581 static void xen_bootstrap_tables (vaddr_

#define TABLE_L2_ENTRIES (NKL2_KIMG_ENTRIES + 1)

#endif

* Construct and switch to new pagetables

* first_avail is the first vaddr we can use after

* we get rid of Xen pagetables

vaddr_t xen_pmap_bootstrap (void);

vaddr_t xen_pmap_bootstrap(void);

* Function to get rid of Xen bootstrap tables

Line 616 xen_pmap_bootstrap(void)

xen_init_features();

memset(xpq_idx_array, 0, sizeof xpq_idx_array);

memset(xpq_idx_array, 0, sizeof(xpq_idx_array));

xpmap_phys_to_machine_mapping =

(unsigned long *)xen_start_info.mfn_list;

Line 639 xen_pmap_bootstrap(void)

* - early_zerop

* - ISA I/O mem (if needed)

mapsize += UPAGES * NBPG;

mapsize += UPAGES * PAGE_SIZE;

#ifdef __x86_64__

mapsize += NBPG;

mapsize += PAGE_SIZE;

#endif

mapsize += NBPG;

mapsize += PAGE_SIZE;

mapsize += NBPG;

mapsize += PAGE_SIZE;

#ifdef DOM0OPS

if (xendomain_is_dom0()) {

Line 652 xen_pmap_bootstrap(void)

mapsize += IOM_SIZE;

}

#endif

/* at this point mapsize doens't include the table size */

/* at this point mapsize doesn't include the table size */

#ifdef __x86_64__

count = TABLE_L2_ENTRIES;

#else

count = (mapsize + (NBPD_L2 -1)) >> L2_SHIFT;

#endif /* __x86_64__ */

/* now compute how many L2 pages we need exactly */

XENPRINTK(("bootstrap_final mapsize 0x%lx count %d\n", mapsize, count));

while (mapsize + (count + l2_4_count) * PAGE_SIZE + KERNTEXTOFF >

Line 685 xen_pmap_bootstrap(void)

bootstrap_again:

XENPRINTK(("bootstrap_again oldcount %d\n", oldcount));

* Xen space we'll reclaim may not be enough for our new page tables,

* move bootstrap tables if necessary

Line 693 bootstrap_again:

bootstrap_tables = init_tables +

((count + l2_4_count) * PAGE_SIZE);

/* make sure we have enough to map the bootstrap_tables */

if (bootstrap_tables + ((oldcount + l2_4_count) * PAGE_SIZE) >

((long)oldcount << L2_SHIFT) + KERNBASE) {

oldcount++;

goto bootstrap_again;

Line 709 bootstrap_again:

/* zero out free space after tables */

memset((void *)(init_tables + ((count + l2_4_count) * PAGE_SIZE)), 0,

(UPAGES + 1) * NBPG);

(UPAGES + 1) * PAGE_SIZE);

/* Finally, flush TLB. */

xpq_queue_tlb_flush();

Line 718 bootstrap_again:

}

* Build a new table and switch to it

* Build a new table and switch to it.

* old_count is # of old tables (including PGD, PDTPE and PDE)

* old_count is # of old tables (including PGD, PDTPE and PDE).

* new_count is # of new tables (PTE only)

* new_count is # of new tables (PTE only).

* we assume areas don't overlap

* We assume the areas don't overlap.

static void

xen_bootstrap_tables (vaddr_t old_pgd, vaddr_t new_pgd,

xen_bootstrap_tables(vaddr_t old_pgd, vaddr_t new_pgd,

int old_count, int new_count, int final)

{

pd_entry_t *pdtpe, *pde, *pte;

pd_entry_t *bt_pgd;

paddr_t addr;

vaddr_t page, avail, text_end, map_end;

vaddr_t page, avail, map_end;

int i;

extern char __rodata_start;

extern char __data_start;

extern char __kernel_end;

extern char *early_zerop; /* from pmap.c */

pt_entry_t pg_nx;

u_int descs[4];

__PRINTK(("xen_bootstrap_tables(%#" PRIxVADDR ", %#" PRIxVADDR ","

" %d, %d)\n",

old_pgd, new_pgd, old_count, new_count));

text_end = ((vaddr_t)&__data_start) & ~PAGE_MASK;

* Set the NX/XD bit, if available. descs[3] = %edx.

x86_cpuid(0x80000001, descs);

pg_nx = (descs[3] & CPUID_NOX) ? PG_NX : 0;

* size of R/W area after kernel text:

* xencons_interface (if present)

* xenstore_interface (if present)

* table pages (new_count + l2_4_count entries)

* extra mappings (only when final is true):

* UAREA

* dummy user PGD (x86_64 only)/gdt page (i386 only)

* HYPERVISOR_shared_info

* early_zerop

* ISA I/O mem (if needed)

map_end = new_pgd + ((new_count + l2_4_count) * NBPG);

map_end = new_pgd + ((new_count + l2_4_count) * PAGE_SIZE);

if (final) {

map_end += (UPAGES + 1) * NBPG;

map_end += (UPAGES + 1) * PAGE_SIZE;

HYPERVISOR_shared_info = (shared_info_t *)map_end;

map_end += NBPG;

map_end += PAGE_SIZE;

early_zerop = (char *)map_end;

map_end += NBPG;

map_end += PAGE_SIZE;

}

* we always set atdevbase, as it's used by init386 to find the first

* available VA. map_end is updated only if we are dom0, so

Line 774 xen_bootstrap_tables (vaddr_t old_pgd, v

Line 785 xen_bootstrap_tables (vaddr_t old_pgd, v

}

#endif /* DOM0OPS */

__PRINTK(("xen_bootstrap_tables text_end 0x%lx map_end 0x%lx\n",

__PRINTK(("xen_bootstrap_tables map_end 0x%lx\n", map_end));

text_end, map_end));

__PRINTK(("console %#lx ", xen_start_info.console_mfn));

__PRINTK(("xenstore %#" PRIx32 "\n", xen_start_info.store_mfn));

* Create bootstrap page tables

* Create bootstrap page tables. What we need:

* What we need:

* - a PGD (level 4)

* - a PDTPE (level 3)

* - a PDE (level2)

* - a PDE (level 2)

* - some PTEs (level 1)

bt_pgd = (pd_entry_t *) new_pgd;

bt_pgd = (pd_entry_t *)new_pgd;

memset (bt_pgd, 0, PAGE_SIZE);

memset(bt_pgd, 0, PAGE_SIZE);

avail = new_pgd + PAGE_SIZE;

#if PTP_LEVELS > 3

/* per-cpu L4 PD */

pd_entry_t *bt_cpu_pgd = bt_pgd;

/* pmap_kernel() "shadow" L4 PD */

bt_pgd = (pd_entry_t *) avail;

bt_pgd = (pd_entry_t *)avail;

memset(bt_pgd, 0, PAGE_SIZE);

avail += PAGE_SIZE;

/* Install level 3 */

pdtpe = (pd_entry_t *) avail;

pdtpe = (pd_entry_t *)avail;

memset (pdtpe, 0, PAGE_SIZE);

memset(pdtpe, 0, PAGE_SIZE);

avail += PAGE_SIZE;

addr = ((u_long) pdtpe) - KERNBASE;

addr = ((u_long)pdtpe) - KERNBASE;

bt_pgd[pl4_pi(KERNTEXTOFF)] = bt_cpu_pgd[pl4_pi(KERNTEXTOFF)] =

xpmap_ptom_masked(addr) | PG_k | PG_RW | PG_V;

Line 817 xen_bootstrap_tables (vaddr_t old_pgd, v

Line 827 xen_bootstrap_tables (vaddr_t old_pgd, v

#if PTP_LEVELS > 2

/* Level 2 */

pde = (pd_entry_t *) avail;

pde = (pd_entry_t *)avail;

memset(pde, 0, PAGE_SIZE);

avail += PAGE_SIZE;

addr = ((u_long) pde) - KERNBASE;

addr = ((u_long)pde) - KERNBASE;

pdtpe[pl3_pi(KERNTEXTOFF)] =

xpmap_ptom_masked(addr) | PG_k | PG_V | PG_RW;

__PRINTK(("L2 va %#lx pa %#" PRIxPADDR " entry %#" PRIxPADDR

Line 829 xen_bootstrap_tables (vaddr_t old_pgd, v

Line 839 xen_bootstrap_tables (vaddr_t old_pgd, v

pde, addr, pdtpe[pl3_pi(KERNTEXTOFF)], pl3_pi(KERNTEXTOFF)));

#elif defined(PAE)

/* our PAE-style level 2: 5 contigous pages (4 L2 + 1 shadow) */

pde = (pd_entry_t *) avail;

pde = (pd_entry_t *)avail;

memset(pde, 0, PAGE_SIZE * 5);

avail += PAGE_SIZE * 5;

addr = ((u_long) pde) - KERNBASE;

addr = ((u_long)pde) - KERNBASE;

* enter L2 pages in the L3.

* The real L2 kernel PD will be the last one (so that

Line 853 xen_bootstrap_tables (vaddr_t old_pgd, v

Line 863 xen_bootstrap_tables (vaddr_t old_pgd, v

__PRINTK(("L2 va %#lx pa %#" PRIxPADDR " entry %#" PRIxPADDR

" -> L3[%#x]\n",

(vaddr_t)pde + PAGE_SIZE * 4, addr, pdtpe[3], 3));

#else /* PAE */

pde = bt_pgd;

#endif /* PTP_LEVELS > 2 */

Line 863 xen_bootstrap_tables (vaddr_t old_pgd, v

Line 872 xen_bootstrap_tables (vaddr_t old_pgd, v

for (i = 0; i < new_count; i ++) {

vaddr_t cur_page = page;

pte = (pd_entry_t *) avail;

pte = (pd_entry_t *)avail;

avail += PAGE_SIZE;

memset(pte, 0, PAGE_SIZE);

while (pl2_pi(page) == pl2_pi (cur_page)) {

while (pl2_pi(page) == pl2_pi(cur_page)) {

if (page >= map_end) {

/* not mapped at all */

pte[pl1_pi(page)] = 0;

Line 904 xen_bootstrap_tables (vaddr_t old_pgd, v

Line 913 xen_bootstrap_tables (vaddr_t old_pgd, v

page < (vaddr_t)atdevbase + IOM_SIZE) {

pte[pl1_pi(page)] =

IOM_BEGIN + (page - (vaddr_t)atdevbase);

pte[pl1_pi(page)] |= pg_nx;

}

#endif

pte[pl1_pi(page)] |= PG_k | PG_V;

if (page < text_end) {

if (page < (vaddr_t)&__rodata_start) {

/* map kernel text RO */

/* Map the kernel text RX. */

pte[pl1_pi(page)] |= 0;

pte[pl1_pi(page)] |= PG_RO;

} else if (page >= old_pgd

} else if (page >= (vaddr_t)&__rodata_start &&

&& page < old_pgd + (old_count * PAGE_SIZE)) {

page < (vaddr_t)&__data_start) {

/* map old page tables RO */

/* Map the kernel rodata R. */

pte[pl1_pi(page)] |= 0;

pte[pl1_pi(page)] |= PG_RO | pg_nx;

} else if (page >= old_pgd &&

page < old_pgd + (old_count * PAGE_SIZE)) {

/* Map the old page tables R. */

pte[pl1_pi(page)] |= PG_RO | pg_nx;

} else if (page >= new_pgd &&

page < new_pgd + ((new_count + l2_4_count) * PAGE_SIZE)) {

/* map new page tables RO */

/* Map the new page tables R. */

pte[pl1_pi(page)] |= 0;

pte[pl1_pi(page)] |= PG_RO | pg_nx;

#ifdef i386

} else if (page == (vaddr_t)tmpgdt) {

Line 930 xen_bootstrap_tables (vaddr_t old_pgd, v

Line 945 xen_bootstrap_tables (vaddr_t old_pgd, v

page += PAGE_SIZE;

continue;

#endif /* i386 */

} else if (page >= (vaddr_t)&__data_start &&

page < (vaddr_t)&__kernel_end) {

/* Map the kernel data+bss RW. */

pte[pl1_pi(page)] |= PG_RW | pg_nx;

} else {

/* map page RW */

pte[pl1_pi(page)] |= PG_RW;

}

if ((page >= old_pgd && page < old_pgd + (old_count * PAGE_SIZE))

|| page >= new_pgd) {

__PRINTK(("va %#lx pa %#lx "

Line 1010 xen_bootstrap_tables (vaddr_t old_pgd, v

Line 1029 xen_bootstrap_tables (vaddr_t old_pgd, v

xpq_queue_pin_l2_table(xpmap_ptom_masked(addr));

#endif

#else /* PAE */

/* recursive entry in higher-level per-cpu PD and pmap_kernel() */

bt_pgd[PDIR_SLOT_PTE] = xpmap_ptom_masked((paddr_t)bt_pgd - KERNBASE) | PG_k | PG_V;

/* Recursive entry in pmap_kernel(). */

bt_pgd[PDIR_SLOT_PTE] = xpmap_ptom_masked((paddr_t)bt_pgd - KERNBASE)

| PG_k | PG_RO | PG_V | pg_nx;

#ifdef __x86_64__

bt_cpu_pgd[PDIR_SLOT_PTE] =

/* Recursive entry in higher-level per-cpu PD. */

xpmap_ptom_masked((paddr_t)bt_cpu_pgd - KERNBASE) | PG_k | PG_V;

bt_cpu_pgd[PDIR_SLOT_PTE] = xpmap_ptom_masked((paddr_t)bt_cpu_pgd - KERNBASE)

#endif /* __x86_64__ */

| PG_k | PG_RO | PG_V | pg_nx;

#endif

__PRINTK(("bt_pgd[PDIR_SLOT_PTE] va %#" PRIxVADDR " pa %#" PRIxPADDR

" entry %#" PRIxPADDR "\n", new_pgd, (paddr_t)new_pgd - KERNBASE,

bt_pgd[PDIR_SLOT_PTE]));

/* Mark tables RO */

xen_bt_set_readonly((vaddr_t) pde);

#endif

Line 1028 xen_bootstrap_tables (vaddr_t old_pgd, v

Line 1051 xen_bootstrap_tables (vaddr_t old_pgd, v

#if PTP_LEVELS > 3

xen_bt_set_readonly(new_pgd);

#endif

/* Pin the PGD */

__PRINTK(("pin PGD: %"PRIxVADDR"\n", new_pgd - KERNBASE));

#ifdef __x86_64__

Line 1060 xen_bootstrap_tables (vaddr_t old_pgd, v

Line 1084 xen_bootstrap_tables (vaddr_t old_pgd, v

/* now enter kernel's PTE mappings */

addr = (u_long)pde - KERNBASE + PAGE_SIZE * 3;

xpq_queue_pte_update(

xpmap_ptom(((vaddr_t)&pde[PDIR_SLOT_PTE + 3]) - KERNBASE),

xpmap_ptom_masked(addr) | PG_k | PG_V);

xpq_flush_queue();

}

Line 1074 xen_bootstrap_tables (vaddr_t old_pgd, v

Line 1098 xen_bootstrap_tables (vaddr_t old_pgd, v

__USE(pdtpe);

/* Now we can safely reclaim space taken by old tables */

__PRINTK(("unpin old PGD\n"));

/* Unpin old PGD */

xpq_queue_unpin_table(xpmap_ptom_masked(old_pgd - KERNBASE));

Line 1093 xen_bootstrap_tables (vaddr_t old_pgd, v

Line 1117 xen_bootstrap_tables (vaddr_t old_pgd, v

addr, (long)pte, *pte));

xpq_queue_pte_update(addr, *pte | PG_RW);

page += PAGE_SIZE;

* Our ptes are contiguous

* Our PTEs are contiguous so it's safe to just "++" here.

* so it's safe to just "++" here

pte++;

}

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