Annotation of src/sys/arch/xen/include/intr.h, Revision 1.16.8.2
1.16.8.2! joerg 1: /* $NetBSD: intr.h,v 1.16.8.1 2007/10/02 18:27:58 joerg Exp $ */
1.3 bouyer 2: /* NetBSD intr.h,v 1.15 2004/10/31 10:39:34 yamt Exp */
3:
4: /*-
5: * Copyright (c) 1998, 2001 The NetBSD Foundation, Inc.
6: * All rights reserved.
7: *
8: * This code is derived from software contributed to The NetBSD Foundation
9: * by Charles M. Hannum, and by Jason R. Thorpe.
10: *
11: * Redistribution and use in source and binary forms, with or without
12: * modification, are permitted provided that the following conditions
13: * are met:
14: * 1. Redistributions of source code must retain the above copyright
15: * notice, this list of conditions and the following disclaimer.
16: * 2. Redistributions in binary form must reproduce the above copyright
17: * notice, this list of conditions and the following disclaimer in the
18: * documentation and/or other materials provided with the distribution.
19: * 3. All advertising materials mentioning features or use of this software
20: * must display the following acknowledgement:
21: * This product includes software developed by the NetBSD
22: * Foundation, Inc. and its contributors.
23: * 4. Neither the name of The NetBSD Foundation nor the names of its
24: * contributors may be used to endorse or promote products derived
25: * from this software without specific prior written permission.
26: *
27: * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
28: * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
29: * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
30: * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
31: * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
32: * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
33: * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
34: * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
35: * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
36: * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
37: * POSSIBILITY OF SUCH DAMAGE.
38: */
1.1 cl 39:
40: #ifndef _XEN_INTR_H_
41: #define _XEN_INTR_H_
42:
1.16.8.2! joerg 43: #include <xen/intrdefs.h>
1.1 cl 44:
45: #ifndef _LOCORE
1.16.8.2! joerg 46: #include <xen/xen.h>
! 47: #include <xen/hypervisor.h>
! 48: #include <xen/evtchn.h>
1.3 bouyer 49: #include <machine/cpu.h>
50: #include <machine/pic.h>
51:
1.10 bouyer 52: #include "opt_xen.h"
53:
1.3 bouyer 54: /*
55: * Struct describing an event channel.
56: */
57:
58: struct evtsource {
59: int ev_maxlevel; /* max. IPL for this source */
60: u_int32_t ev_imask; /* interrupt mask */
61: struct intrhand *ev_handlers; /* handler chain */
62: struct evcnt ev_evcnt; /* interrupt counter */
63: char ev_evname[32]; /* event counter name */
64: };
65:
66: /*
67: * Structure describing an interrupt level. struct cpu_info has an array of
68: * IPL_MAX of theses. The index in the array is equal to the stub number of
69: * the stubcode as present in vector.s
70: */
71:
72: struct intrstub {
73: #if 0
74: void *ist_entry;
75: #endif
76: void *ist_recurse;
77: void *ist_resume;
78: };
79:
1.11 dogcow 80: #ifdef XEN3
81: /* for x86 compatibility */
82: extern struct intrstub i8259_stubs[];
1.12 bouyer 83: extern struct intrstub ioapic_edge_stubs[];
84: extern struct intrstub ioapic_level_stubs[];
1.11 dogcow 85: #endif
86:
1.3 bouyer 87: struct iplsource {
88: struct intrhand *ipl_handlers; /* handler chain */
89: void *ipl_recurse; /* entry for spllower */
90: void *ipl_resume; /* entry for doreti */
91: u_int32_t ipl_evt_mask1; /* pending events for this IPL */
92: u_int32_t ipl_evt_mask2[NR_EVENT_CHANNELS];
93: };
94:
95:
96:
97: /*
98: * Interrupt handler chains. These are linked in both the evtsource and
99: * the iplsource.
100: * The handler is called with its (single) argument.
101: */
102:
103: struct intrhand {
104: int (*ih_fun)(void *);
105: void *ih_arg;
106: int ih_level;
107: struct intrhand *ih_ipl_next;
108: struct intrhand *ih_evt_next;
109: struct cpu_info *ih_cpu;
110: };
1.1 cl 111:
1.12 bouyer 112: struct xen_intr_handle {
113: int pirq; /* also contains the APIC_INT_* flags if NIOAPIC > 0 */
114: int evtch;
115: };
1.1 cl 116:
117: extern struct intrstub xenev_stubs[];
118:
1.3 bouyer 119: #define IUNMASK(ci,level) (ci)->ci_iunmask[(level)]
120:
121: extern void Xspllower(int);
122:
1.16 yamt 123: int splraise(int);
124: void spllower(int);
125: void softintr(int);
1.3 bouyer 126:
127: #define SPL_ASSERT_BELOW(x) KDASSERT(curcpu()->ci_ilevel < (x))
128:
129: /*
130: * Software interrupt masks
131: */
132: #define splsoftxenevt() splraise(IPL_SOFTXENEVT)
133:
134: /*
135: * Miscellaneous
136: */
137: #define spl0() spllower(IPL_NONE)
138: #define splx(x) spllower(x)
139:
1.14 ad 140: typedef uint8_t ipl_t;
1.13 yamt 141: typedef struct {
142: ipl_t _ipl;
143: } ipl_cookie_t;
144:
145: static inline ipl_cookie_t
146: makeiplcookie(ipl_t ipl)
147: {
148:
149: return (ipl_cookie_t){._ipl = ipl};
150: }
151:
152: static inline int
153: splraiseipl(ipl_cookie_t icookie)
154: {
155:
156: return splraise(icookie._ipl);
157: }
158:
1.6 yamt 159: #include <sys/spl.h>
160:
1.3 bouyer 161: /*
162: * XXX
163: */
164: #define setsoftnet() softintr(SIR_NET)
165:
166: /*
167: * Stub declarations.
168: */
169:
170: extern void Xsoftclock(void);
171: extern void Xsoftnet(void);
172: extern void Xsoftserial(void);
173: extern void Xsoftxenevt(void);
174:
175: struct cpu_info;
176:
177: extern char idt_allocmap[];
178:
179: struct pcibus_attach_args;
1.1 cl 180:
1.3 bouyer 181: void intr_default_setup(void);
182: int x86_nmi(void);
183: void intr_calculatemasks(struct evtsource *);
1.10 bouyer 184:
1.3 bouyer 185: void *intr_establish(int, struct pic *, int, int, int, int (*)(void *), void *);
186: void intr_disestablish(struct intrhand *);
187: const char *intr_string(int);
188: void cpu_intr_init(struct cpu_info *);
1.12 bouyer 189: int xen_intr_map(int *, int);
1.3 bouyer 190: #ifdef INTRDEBUG
191: void intr_printconfig(void);
1.2 yamt 192: #endif
1.12 bouyer 193: int intr_find_mpmapping(int, int, struct xen_intr_handle *);
194: struct pic *intr_findpic(int);
195: void intr_add_pcibus(struct pcibus_attach_args *);
1.10 bouyer 196:
1.3 bouyer 197: #endif /* !_LOCORE */
198:
199: /*
200: * Generic software interrupt support.
201: */
202:
203: #define X86_SOFTINTR_SOFTCLOCK 0
204: #define X86_SOFTINTR_SOFTNET 1
205: #define X86_SOFTINTR_SOFTSERIAL 2
206: #define X86_NSOFTINTR 3
207:
208: #ifndef _LOCORE
209: #include <sys/queue.h>
210:
211: struct x86_soft_intrhand {
212: TAILQ_ENTRY(x86_soft_intrhand)
213: sih_q;
214: struct x86_soft_intr *sih_intrhead;
215: void (*sih_fn)(void *);
216: void *sih_arg;
217: int sih_pending;
218: };
219:
220: struct x86_soft_intr {
221: TAILQ_HEAD(, x86_soft_intrhand)
222: softintr_q;
223: int softintr_ssir;
224: struct simplelock softintr_slock;
225: };
226:
227: #define x86_softintr_lock(si, s) \
228: do { \
229: (s) = splhigh(); \
230: simple_lock(&si->softintr_slock); \
231: } while (/*CONSTCOND*/ 0)
232:
233: #define x86_softintr_unlock(si, s) \
234: do { \
235: simple_unlock(&si->softintr_slock); \
236: splx((s)); \
237: } while (/*CONSTCOND*/ 0)
238:
239: void *softintr_establish(int, void (*)(void *), void *);
240: void softintr_disestablish(void *);
241: void softintr_init(void);
242: void softintr_dispatch(int);
1.16 yamt 243: void softintr_schedule(void *);
1.3 bouyer 244:
245: #endif /* _LOCORE */
246:
1.1 cl 247: #endif /* _XEN_INTR_H_ */
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