Annotation of src/sys/arch/xen/include/intr.h, Revision 1.15.14.1
1.15.14.1! matt 1: /* $NetBSD: intr.h,v 1.16 2007/05/17 14:51:36 yamt Exp $ */
1.3 bouyer 2: /* NetBSD intr.h,v 1.15 2004/10/31 10:39:34 yamt Exp */
3:
4: /*-
5: * Copyright (c) 1998, 2001 The NetBSD Foundation, Inc.
6: * All rights reserved.
7: *
8: * This code is derived from software contributed to The NetBSD Foundation
9: * by Charles M. Hannum, and by Jason R. Thorpe.
10: *
11: * Redistribution and use in source and binary forms, with or without
12: * modification, are permitted provided that the following conditions
13: * are met:
14: * 1. Redistributions of source code must retain the above copyright
15: * notice, this list of conditions and the following disclaimer.
16: * 2. Redistributions in binary form must reproduce the above copyright
17: * notice, this list of conditions and the following disclaimer in the
18: * documentation and/or other materials provided with the distribution.
19: * 3. All advertising materials mentioning features or use of this software
20: * must display the following acknowledgement:
21: * This product includes software developed by the NetBSD
22: * Foundation, Inc. and its contributors.
23: * 4. Neither the name of The NetBSD Foundation nor the names of its
24: * contributors may be used to endorse or promote products derived
25: * from this software without specific prior written permission.
26: *
27: * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
28: * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
29: * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
30: * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
31: * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
32: * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
33: * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
34: * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
35: * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
36: * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
37: * POSSIBILITY OF SUCH DAMAGE.
38: */
1.1 cl 39:
40: #ifndef _XEN_INTR_H_
41: #define _XEN_INTR_H_
42:
1.3 bouyer 43: #include <machine/intrdefs.h>
1.1 cl 44:
45: #ifndef _LOCORE
1.3 bouyer 46: #include <machine/cpu.h>
47: #include <machine/pic.h>
48:
1.10 bouyer 49: #include "opt_xen.h"
50:
1.3 bouyer 51: /*
52: * Struct describing an event channel.
53: */
54:
55: struct evtsource {
56: int ev_maxlevel; /* max. IPL for this source */
57: u_int32_t ev_imask; /* interrupt mask */
58: struct intrhand *ev_handlers; /* handler chain */
59: struct evcnt ev_evcnt; /* interrupt counter */
60: char ev_evname[32]; /* event counter name */
61: };
62:
63: /*
64: * Structure describing an interrupt level. struct cpu_info has an array of
65: * IPL_MAX of theses. The index in the array is equal to the stub number of
66: * the stubcode as present in vector.s
67: */
68:
69: struct intrstub {
70: #if 0
71: void *ist_entry;
72: #endif
73: void *ist_recurse;
74: void *ist_resume;
75: };
76:
1.11 dogcow 77: #ifdef XEN3
78: /* for x86 compatibility */
79: extern struct intrstub i8259_stubs[];
1.12 bouyer 80: extern struct intrstub ioapic_edge_stubs[];
81: extern struct intrstub ioapic_level_stubs[];
1.11 dogcow 82: #endif
83:
1.3 bouyer 84: struct iplsource {
85: struct intrhand *ipl_handlers; /* handler chain */
86: void *ipl_recurse; /* entry for spllower */
87: void *ipl_resume; /* entry for doreti */
88: u_int32_t ipl_evt_mask1; /* pending events for this IPL */
89: u_int32_t ipl_evt_mask2[NR_EVENT_CHANNELS];
90: };
91:
92:
93:
94: /*
95: * Interrupt handler chains. These are linked in both the evtsource and
96: * the iplsource.
97: * The handler is called with its (single) argument.
98: */
99:
100: struct intrhand {
101: int (*ih_fun)(void *);
102: void *ih_arg;
103: int ih_level;
104: struct intrhand *ih_ipl_next;
105: struct intrhand *ih_evt_next;
106: struct cpu_info *ih_cpu;
107: };
1.1 cl 108:
1.12 bouyer 109: struct xen_intr_handle {
110: int pirq; /* also contains the APIC_INT_* flags if NIOAPIC > 0 */
111: int evtch;
112: };
1.1 cl 113:
114: extern struct intrstub xenev_stubs[];
115:
1.3 bouyer 116: #define IUNMASK(ci,level) (ci)->ci_iunmask[(level)]
117:
118: extern void Xspllower(int);
119:
1.15.14.1! matt 120: int splraise(int);
! 121: void spllower(int);
! 122: void softintr(int);
1.3 bouyer 123:
124: #define SPL_ASSERT_BELOW(x) KDASSERT(curcpu()->ci_ilevel < (x))
125:
126: /*
127: * Software interrupt masks
128: */
129: #define splsoftxenevt() splraise(IPL_SOFTXENEVT)
130:
131: /*
132: * Miscellaneous
133: */
134: #define spl0() spllower(IPL_NONE)
135: #define splx(x) spllower(x)
136:
1.14 ad 137: typedef uint8_t ipl_t;
1.13 yamt 138: typedef struct {
139: ipl_t _ipl;
140: } ipl_cookie_t;
141:
142: static inline ipl_cookie_t
143: makeiplcookie(ipl_t ipl)
144: {
145:
146: return (ipl_cookie_t){._ipl = ipl};
147: }
148:
149: static inline int
150: splraiseipl(ipl_cookie_t icookie)
151: {
152:
153: return splraise(icookie._ipl);
154: }
155:
1.6 yamt 156: #include <sys/spl.h>
157:
1.3 bouyer 158: /*
159: * XXX
160: */
161: #define setsoftnet() softintr(SIR_NET)
162:
163: /*
164: * Stub declarations.
165: */
166:
167: extern void Xsoftclock(void);
168: extern void Xsoftnet(void);
169: extern void Xsoftserial(void);
170: extern void Xsoftxenevt(void);
171:
172: struct cpu_info;
173:
174: extern char idt_allocmap[];
175:
176: struct pcibus_attach_args;
1.1 cl 177:
1.3 bouyer 178: void intr_default_setup(void);
179: int x86_nmi(void);
180: void intr_calculatemasks(struct evtsource *);
1.10 bouyer 181:
1.3 bouyer 182: void *intr_establish(int, struct pic *, int, int, int, int (*)(void *), void *);
183: void intr_disestablish(struct intrhand *);
184: const char *intr_string(int);
185: void cpu_intr_init(struct cpu_info *);
1.12 bouyer 186: int xen_intr_map(int *, int);
1.3 bouyer 187: #ifdef INTRDEBUG
188: void intr_printconfig(void);
1.2 yamt 189: #endif
1.12 bouyer 190: int intr_find_mpmapping(int, int, struct xen_intr_handle *);
191: struct pic *intr_findpic(int);
192: void intr_add_pcibus(struct pcibus_attach_args *);
1.10 bouyer 193:
1.3 bouyer 194: #endif /* !_LOCORE */
195:
196: /*
197: * Generic software interrupt support.
198: */
199:
200: #define X86_SOFTINTR_SOFTCLOCK 0
201: #define X86_SOFTINTR_SOFTNET 1
202: #define X86_SOFTINTR_SOFTSERIAL 2
203: #define X86_NSOFTINTR 3
204:
205: #ifndef _LOCORE
206: #include <sys/queue.h>
207:
208: struct x86_soft_intrhand {
209: TAILQ_ENTRY(x86_soft_intrhand)
210: sih_q;
211: struct x86_soft_intr *sih_intrhead;
212: void (*sih_fn)(void *);
213: void *sih_arg;
214: int sih_pending;
215: };
216:
217: struct x86_soft_intr {
218: TAILQ_HEAD(, x86_soft_intrhand)
219: softintr_q;
220: int softintr_ssir;
221: struct simplelock softintr_slock;
222: };
223:
224: #define x86_softintr_lock(si, s) \
225: do { \
226: (s) = splhigh(); \
227: simple_lock(&si->softintr_slock); \
228: } while (/*CONSTCOND*/ 0)
229:
230: #define x86_softintr_unlock(si, s) \
231: do { \
232: simple_unlock(&si->softintr_slock); \
233: splx((s)); \
234: } while (/*CONSTCOND*/ 0)
235:
236: void *softintr_establish(int, void (*)(void *), void *);
237: void softintr_disestablish(void *);
238: void softintr_init(void);
239: void softintr_dispatch(int);
1.15.14.1! matt 240: void softintr_schedule(void *);
1.3 bouyer 241:
242: #endif /* _LOCORE */
243:
1.1 cl 244: #endif /* _XEN_INTR_H_ */
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