CVS log for src/sys/arch/xen/include/intr.h

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NetBSD/x86: Raise the number of interrupt sources per CPU from 32 to 56.

There has been no objection for three years.
    https://mail-index.netbsd.org/port-amd64/2019/09/22/msg003012.html
Implemented by nonaka@n.o, updated by me.

Work in progress on MSI/MSI-X on Xen (MSI works on my hardware, more work
needed for MSI-X):
- Xen silently rejects 32 bits writes to MSI configuration registers
  (especially when setting PCI_MSI_CTL_MSI_ENABLE/PCI_MSIX_CTL_ENABLE),
  it expects 16 bits writes. So introduce a pci_conf_write16(),
  only available on XENPV (and working only for mode 1 without
  PCI_OVERRIDE_CONF_WRITE) and use it to enable MSI or MSI-X on XENPV.
- for multi-MSI vectors, Xen allocates all of them in a single hypercall,
  so it's not convenient to do it at intr_establish() time.
  So do it at alloc() time and register the pirqs in the msipic structure.
  xen_pic_to_gsi() now just returns the values cached in the msipic.
  As a bonus, if the PHYSDEVOP_map_pirq hypercall fails we can fail
  the alloc() and we don't need the xen_pci_msi*_probe() hacks.

options NO_PCI_MSI_MSIX still on by default for XEN3_DOM0.

for Xen MSI, fallback to INTx when PHYSDEVOP_map_pirq fails for the device

apparently Xen requires VT-d to be enabled in BIOS for PHYSDEVOP_map_pirq
to work, this change makes it work on systems with VT-d disabled or missing

adresses the panic part of PR port-xen/55285 by Patrick Welche

use short for irq2port[] to save memory (4KB), it only needs to store
numbers <= NR_EVENT_CHANNELS (2048)

xen_vec_alloc() is no more

Merge the bouyer-xenpvh branch, bringing in Xen PV drivers support under HVM
guests in GENERIC.
Xen support can be disabled at runtime with
boot -c
disable hypervisor

Sync with bouyer-xenpvh-base2 (HEAD)

adjust so that this at least compiles and links with __HAVE_PCI_MSI_MSIX

Add per-PIC callbacks for interrupt_get_devname(), interrupt_get_assigned()
and interrupt_get_count(). Implement Xen-specific callbacks for
PIC_XEN and use the x86 one for others.
In event_set_handler(), call intr_allocate_io_intrsource() so that
events appears in interrupt list (intrctl list).

Reorganise sources to make it possible to include Xen PVHVM support in
native kernels. Among others:
- move xen/include/amd64/hypercall.h to amd64/include/xen and
  xen/include/i386/hypercall.h to i386/include/xen
- exclude some native files from the build for xenpv
- add xen to "machine" config statement for amd64 and i386
- split arch/xen/conf/files.xen to arch/xen/conf/files.xen (for pv drivers)
  and arch/xen/conf/files.xen.pv (for full pv support)
- add GENERIC_XENHVM kernel config which includes GENERIC and add Xen PV
  drivers.

Get rid of xen-specific ci_x* interrupt handling:
- use the general SIR mechanism, reserving 3 more slots for IPL_VM, IPL_SCHED
  and IPL_HIGH
- remove specific handling from C sources, or change to ipending
- convert IPL number to SIR number in various places
- Remove XUNMASK/XPENDING in assembly or change to IUNMASK/IPENDING
- remove Xen-specific ci_xsources, ci_xmask, ci_xunmask, ci_xpending from
  struct cpu_info
- for now remove a KASSERT that there are no pending interrupts in
  idle_block(). We can get there with some software interrupts pending
  in autoconf XXX needs to be looked at.

Merge changes from current as of 20200406

Provide XEN stubs for intr_mask() / intr_unmask().

Sync with HEAD

Switch NetBSD/xen to use XEN api tag RELEASE-4.11.1

The headers for this api are in sys/external/mit/xen-include-public/dist/

Sync with HEAD, resolve a few conflicts

Excise XEN specific code out of x86/x86/intr.c into xen/x86/xen_intr.c

While at it, separate the source function tracking so that the interrupt
paths are truly independant.

Use weak symbol exporting to provision for future PVHVM co-existence
of both files, but with independant paths. Introduce assembler code
such that in a unified scenario, native interrupts get first priority
in spllower(), followed by XEN event callbacks. IPL management and
semantics are unchanged - native handlers and xen callbacks are
expected to maintain their ipl related semantics.

In summary, after this commit, native and XEN now have completely
unrelated interrupt handling mechanisms, including
intr_establish_xname() and assembler stubs and intr handler
management.

Happy Christmas!

Bifurcate the interrupt establish functions between XEN and non-XEN

Thus intr_establish_xname() becomes xen_intr_establish_xname() etc.

One consequence of this is that dom0 devices expect the native
function calls to be available and we thus provide weak aliasing for
dom0 builds to succeed. XEN and non-XEN devices are distinguished by
the PIC they are established on. XEN interrupts are exclusively
established on xen_pic, while dom0 interrupts are established on
natively available PICs.

This allows us an orthogonal path to xen device management (eg:
xenstore events) in XENPVHVM, without having to worry about unifying
the vector entry paths, etc., which is quite challenging.

Sync with head

Do not export the 'irq<->vector' abstraction outside of pintr.c
anymore. We now think of them as a unified thing called 'gsi',
which is generated by mpacpi/mpbios

Switch over to a "GSI" concept for guest irqs.

On XEN there is a namespace called GSI which includes:

i) legacy_irq (0 - 16)
ii) "gsi" (16-nr_irqs_gsi)
iii) msi

We try to mirror this in guest space, but are mindful that legacy_irq
is 1:1 bound to actual hardware legacy_irq. Apart from this, XEN doesn't
really care what number scheme we use, as long as it doesn't encroach
on the MSI space, which is TBD for us.

Thus we trust the mpbios.c/mpacpi.c code to correctly map the pic,pin
tuples into the correct global gsi space, which we then register with
xen. As we now do, we allow for duplicate gsi registrations, in case
any hardware shares the same (pic,pin);

This enables us to now use the (pic,pin) tuple as the canonical reference
for device interrupt addresses, and leave any global mappings to specific
code. Thus xen_pic_to_gsi().

Note that this requires separate support for MSI, which I will get around to
once things stabilise - however the API change facilitates this nicely.

I note that the msi addroute() function does not use the "pin" parameter.
This can be made use of, to encode the gsi number, for XEN. This is however
TBD.

We further tweak the xen_vec_alloc() code to be uniform for the NIOAPICS
and other cases, and ensure that i8259.c DTRT wrt to route().

This will allow us to use pic->pic_addroute() without needing to worry about
pic specific issues.

The next step is to consolidate the pic_addroute() XEN related #ifdefs into
a -DXEN specific file, so that we don't clutter x86/ code with #ifdef XENs.

This change has functional implications, and there is likely breakage coming
especially on bespoke platforms that I haven't been able to test yet.

I am especially interested in bug reports from platforms with legacy (esp. i386)
and with multiple ioapics.

Change the name of xen_pirq_alloc() to xen_vec_alloc() to reflect
its actual job.

The idea is that we will strip this down until it is as close to
idt_vec_alloc() as possible.

Sync with HEAD

add support for kern.intr.list aka intrctl(8) 'list' for xen

event_set_handler() and pirq_establish() now have extra intrname
parameter; shared intr_create_intrid() is used to provide the value

xen drivers were changed to pass the specific driver instance
name as the xname, e.g.  'vcpu0 clock' instead just 'clock', or
'xencons0' instead of 'xencons'

associated evcnt is now changed to use intrname - this matches native x86

Fixes for physical interrupts on Xen:
- do not cast int * to intr_handle_t *, they're not the same size
- legacy_irq is not always -1 for ioapic interrupts, test pic_type instead
- change irq2port[] to hold (port + 1) so that 0 is an invalid value
- add KASSERTs to make sure vect, port or irq values extracted from arrays are
  valid (or that they are invalid before write)
- for the !ioapic case, we still need to do PHYSDEVOP_ASSIGN_VECTOR and
  bind_pirq_to_evtch().

now XEN3_DOM0 boots again

update from HEAD

Retire xen/x86/intr.c and use the new xen specific glue in x86/x86/intr.c

The purpose of this change is to expose the x86/include/intr.h API
to drivers. Specifically the following functions:

   void *intr_establish_xname(...);
   void *intr_establish(...);
   void intr_disestablish(...);

while maintaining the old API from xen/include/evtchn.h, specifically
the following functions:

    int event_set_handler(...);
    int event_remove_handler(...);

This is so that if things break, we can keep using the old API until
everything stabilises. This is a stepping stone towards getting the
actual XEN event callback path rework code in place - which can be
done opaquely behind the intr.h API - NetBSD/XEN specific drivers that
have been ported to the intr.h API should then work without
significant further modifications.

On XEN dom0, the function xen/x86/intr.c:xen_intr_map() is used to map
hardware interrupts to XEN callbacks called 'events'. This function
combines both the allocation and the binding.

This change is the first part of breaking up that combination into
xen_pirq_alloc() and the binding will happen as part of the
pic_addroute() callback of a new pseudo PIC_XEN

This code will be added later on.

Sync with HEAD

2302677

file intr.h was added on branch perseant-stdc-iso10646 on 2017-07-16 14:02:49 +0000

Unify the xen and native x86/ interrupt setup functions and
spl traversal data structures.

This is towards PVHVM.

Remove the xen specific interrupt type for the x86 intr_handle_t
For this to work, we use the evtchn.c:get_pirq_to_evtchn() glue
function to make things easier.

x86: Add preliminary x2APIC support.

x2APIC is used only when x2APIC is enabled in BIOS/UEFI.
LAPIC ID is not supported above 256.

Sync with HEAD

Sync with HEAD

provide stub intr xname establish for xen

This should return the amd64 build to a working state (and hopefully
i386 as well) - but this is a hideous hack, and should be reverted
as soon as a better (which means any) alternative is available.

Sync with HEAD

KNF. Remove extra spaces. No functional change.

Sync with HEAD

add x86 MD MSI/MSI-X support code.

resync with head

sync with head

Remove unused header evtchn.h from intr.h

sync with head

Pull up following revision(s) (requested by bouyer in ticket #29):
	sys/arch/xen/x86/x86_xpmap.c: revision 1.39
	sys/arch/xen/include/hypervisor.h: revision 1.37
	sys/arch/xen/include/intr.h: revision 1.34
	sys/arch/xen/x86/xen_ipi.c: revision 1.10
	sys/arch/x86/x86/cpu.c: revision 1.97
	sys/arch/x86/include/cpu.h: revision 1.48
	sys/uvm/uvm_map.c: revision 1.315
	sys/arch/x86/x86/pmap.c: revision 1.165
	sys/arch/xen/x86/cpu.c: revision 1.81
	sys/arch/x86/x86/pmap.c: revision 1.167
	sys/arch/xen/x86/cpu.c: revision 1.82
	sys/arch/x86/x86/pmap.c: revision 1.168
	sys/arch/xen/x86/xen_pmap.c: revision 1.17
	sys/uvm/uvm_km.c: revision 1.122
	sys/uvm/uvm_kmguard.c: revision 1.10
	sys/arch/x86/include/pmap.h: revision 1.50
Apply patch proposed in PR port-xen/45975 (this does not solve the exact
problem reported here but is part of the solution):
xen_kpm_sync() is not working as expected,
leading to races between CPUs.
1 the check (xpq_cpu != &x86_curcpu) is always false because we
  have different x86_curcpu symbols with different addresses in the kernel.
  Fortunably, all addresses dissaemble to the same code.
  Because of this we always use the code intended for bootstrap, which doesn't
  use cross-calls or lock.
2 once 1 above is fixed, xen_kpm_sync() will use xcalls to sync other CPUs,
  which cause it to sleep and pmap.c doesn't like that. It triggers this
  KASSERT() in pmap_unmap_ptes():
  KASSERT(pmap->pm_ncsw == curlwp->l_ncsw);
3 pmap->pm_cpus is not safe for the purpose of xen_kpm_sync(), which
  needs to know on which CPU a pmap is loaded *now*:
  pmap->pm_cpus is cleared before cpu_load_pmap() is called to switch
  to a new pmap, leaving a window where a pmap is still in a CPU's
  ci_kpm_pdir but not in pm_cpus. As a virtual CPU may be preempted
  by the hypervisor at any time, it can be large enough to let another
  CPU free the PTP and reuse it as a normal page.
To fix 2), avoid cross-calls and IPIs completely, and instead
use a mutex to update all CPU's ci_kpm_pdir from the local CPU.
It's safe because we just need to update the table page, a tlbflush IPI will
happen later. As a side effect, we don't need a different code for bootstrap,
fixing 1). The mutex added to struct cpu needs a small headers reorganisation.
to fix 3), introduce a pm_xen_ptp_cpus which is updated from
cpu_pmap_load(), whith the ci_kpm_mtx mutex held. Checking it with
ci_kpm_mtx held will avoid overwriting the wrong pmap's ci_kpm_pdir.
While there I removed the unused pmap_is_active() function;
and added some more details to DIAGNOSTIC panics.
When using uvm_km_pgremove_intrsafe() make sure mappings are removed
before returning the pages to the free pool. Otherwise, under Xen,
a page which still has a writable mapping could be allocated for
a PDP by another CPU and the hypervisor would refuse it (this is
PR port-xen/45975).
For this, move the pmap_kremove() calls inside uvm_km_pgremove_intrsafe(),
and do pmap_kremove()/uvm_pagefree() in batch of (at most) 16 entries
(as suggested by Chuck Silvers on tech-kern@, see also
http://mail-index.netbsd.org/tech-kern/2012/02/17/msg012727.html and
followups).
Avoid early use of xen_kpm_sync(); locks are not available at this time.
Don't call cpu_init() twice.
Makes LOCKDEBUG kernels boot again
Revert pmap_pte_flush() -> xpq_flush_queue() in previous.

merge to -current.

Apply patch proposed in PR port-xen/45975 (this does not solve the exact
problem reported here but is part of the solution):
xen_kpm_sync() is not working as expected,
leading to races between CPUs.
1 the check (xpq_cpu != &x86_curcpu) is always false because we
  have different x86_curcpu symbols with different addresses in the kernel.
  Fortunably, all addresses dissaemble to the same code.
  Because of this we always use the code intended for bootstrap, which doesn't
  use cross-calls or lock.

2 once 1 above is fixed, xen_kpm_sync() will use xcalls to sync other CPUs,
  which cause it to sleep and pmap.c doesn't like that. It triggers this
  KASSERT() in pmap_unmap_ptes():
  KASSERT(pmap->pm_ncsw == curlwp->l_ncsw);
3 pmap->pm_cpus is not safe for the purpose of xen_kpm_sync(), which
  needs to know on which CPU a pmap is loaded *now*:
  pmap->pm_cpus is cleared before cpu_load_pmap() is called to switch
  to a new pmap, leaving a window where a pmap is still in a CPU's
  ci_kpm_pdir but not in pm_cpus. As a virtual CPU may be preempted
  by the hypervisor at any time, it can be large enough to let another
  CPU free the PTP and reuse it as a normal page.

To fix 2), avoid cross-calls and IPIs completely, and instead
use a mutex to update all CPU's ci_kpm_pdir from the local CPU.
It's safe because we just need to update the table page, a tlbflush IPI will
happen later. As a side effect, we don't need a different code for bootstrap,
fixing 1). The mutex added to struct cpu needs a small headers reorganisation.

to fix 3), introduce a pm_xen_ptp_cpus which is updated from
cpu_pmap_load(), whith the ci_kpm_mtx mutex held. Checking it with
ci_kpm_mtx held will avoid overwriting the wrong pmap's ci_kpm_pdir.

While there I removed the unused pmap_is_active() function;
and added some more details to DIAGNOSTIC panics.

Sync with HEAD. Most notably: uvm/pmap work done by rmind@, and MP Xen
work of cherry@.

No regression observed on suspend/restore.

Pullup relevant changes from -current

Make event/interrupt handling MP aware

xen ipi infrastructure

first cut at per-cpu event handling

Unbreak uniprocessor build

Initial import of xen MP sources, with kernel and userspace tests.
 - this is a source priview.
 - boots to single user.
 - spurious interrupt and pmap related panics are normal

Sync with HEAD.

sync with head.

remove Xen2 support.
ok bouyer@

Sync with HEAD.

Commit is split, to avoid a "too many arguments" protocol error.

sync with head.

Sync with HEAD.

Explicitly #include <sys/device.h> and <sys/evcnt.h>.  These files only
got the definitions they needed by chance, before.

Sync w/ -current. 34 merge conflicts to follow.

sync with head

Sync with HEAD.

Add a 'known_mpsafe' argument to intr_establish().

G/C dead code: remove now-unused softintr-related code.

sync with head.

sync with head.

Remove clause 3 and 4 from TNF licenses

Include null IPI functions if !MULTIPROCESSOR.

Use interrupt biglock wrapper as in x86/x86/intr.c
This change is based on http://mail-index.netbsd.org/port-amd64/2004/02/22/0000.html
OK bouyer

- use POSIX integer types
- ansify functions

sync with HEAD

sync with head.

The event bitmasks provided by the hypervisor are unsigned long (so 64bits
on amd64). Make sure to use the right type to store and manipulate them.
This fixes amd64, where basically any event channel > 31 was not working
(and you get there after starting/stopping a domU a few times). Things
would occasionally unwedge though the spllower() callbacks.

Sync with HEAD.

sync with head

Merge the bouyer-xeni386 branch to head, at tag bouyer-xeni386-merge1 (the
branch is still active and will see i386PAE support developement).
Sumary of changes:
- switch xeni386 to the x86/x86/pmap.c, and the xen/x86/x86_xpmap.c
  pmap bootstrap.
- merge back most of xen/i386/ to i386/i386
- change the build to reduce diffs between i386 and amd64 in file locations
- remove include files that were identical to the i386/amd64 counterparts,
  the build will find them via the xen-ma/machine link.

sync with HEAD

Remove unused splsoftxenevt()

Remove files that just include the x86 counterpart.

Sync with HEAD

Sync with head.

- share idt entry allocation code among x86.
- introduce a function to reserve an idt entry and use it instead of
  manipulating idt_allocmap directly.
- rename idt to xen_idt for amd64 xen.  add missing #ifdef XEN.

Sync with HEAD.

Sync with HEAD.

sync with head

Sync with HEAD.

Interrupt handling changes, in discussion since February:

- Reduce available SPL levels for hardware devices to none, vm, sched, high.
- Acquire kernel_lock only for interrupts at IPL_VM.
- Implement threaded soft interrupts.

Sync with HEAD. amd64 Xen support needs testing.

Pull up the bouyer-xenamd64 branch to HEAD. This brings in amd64 support
to NetBSD/Xen, both Dom0 and DomU.

sync with HEAD

sync with head.

Prepare for xenamd64:
- kill xen/i386/identcpu.c, use i386/i386/identcpu.c instead (with a few
  #ifndef XEN)
- move some files that can be shared between i386 and amd64 from
  xen/i386 to xen/x86 (or to xen/xen for non-cpu-specific code)
- split assembly out of xen/include/hypervisor.h to xen/include/hypercalls.h
- use <xen/...> instead of <machine/...> for cpu-independant include files.

more work needed here, i386-specific files should got out of arch/xen to
arch/xeni386, and more code shared with arch/i386.

Merge the ppcoea-renovation branch to HEAD.

This branch was a major cleanup and rototill of many of the various OEA
cpu based PPC ports that focused on sharing as much code as possible
between the various ports to eliminate near-identical copies of files in
every tree.  Additionally there is a new PIC system that unifies the
interface to interrupt code for all different OEA ppc arches.  The work
for this branch was done by a variety of people, too long to list here.

TODO:
bebox still needs work to complete the transition to -renovation.
ofppc still needs a bunch of work, which I will be looking at.
ev64260 still needs to be renovated
amigappc was not attempted.

NOTES:
pmppc was removed as an arch, and moved to a evbppc target.

Sync with head.

sync with head.

Sync with HEAD

Sync with HEAD.

x86 changes for pcc and LKMs.

- Replace most inline assembly with proper functions. As a side effect
  this reduces the size of amd64 GENERIC by about 120kB, and i386 by a
  smaller amount. Nearly all of the inlines did something slow, or something
  that does not need to be fast.
- Make curcpu() and curlwp functions proper, unless __GNUC__ && _KERNEL.
  In that case make them inlines. Makes curlwp LKM and preemption safe.
- Make bus_space and bus_dma more LKM friendly.
- Share a few more files between the ports.
- Other minor changes.

sync with head.

Sync with head.

Sync with head.

Update to HEAD.

merge yamt-idlelwp branch.  asked by core@.  some ports still needs work.

from doc/BRANCHES:

	idle lwp, and some changes depending on it.

	1. separate context switching and thread scheduling.
	   (cf. gmcgarry_ctxsw)
	2. implement idle lwp.
	3. clean up related MD/MI interfaces.
	4. make scheduler(s) modular.

adapt xen.

sync with head.

Remove spllowersoftclock() and CLKF_BASEPRI(), and always dispatch callouts
via a soft interrupt. In the near future, softclock will be run from process
context.

Sync with head.

sync with head.

Define ipl_t as uint8_t so that it can be packed into a word with a lock
byte. Ok yamt@.

merge yamt-splraiseipl branch.

	- finish implementing splraiseipl (and makeiplcookie).
	  http://mail-index.NetBSD.org/tech-kern/2006/07/01/0000.html
	- complete workqueue(9) and fix its ipl problem, which is reported
	  to cause audio skipping.
	- fix netbt (at least compilation problems) for some ports.
	- fix PR/33218.

Sync with head.

sync with head

Add Xen3 support for ACPI and/or MPBIOS + IOAPIC. To help with this, physical
CPUs are now configured on mainbus only in dom0, and only to know about
their APIC id. virtual CPUs are attached to hypervisor as:
vcpu* at hypervisor?
and this is what's used as curcpu(). The kernel config files needs to be
updated for this, see XEN3_DOM0 or XEN3_DOMU for examples.
XEN3_DOM0 now has acpi, MPBIOS and ioapic by default.
Note that a Xen dom0 kernel doens't have access to the lapic.

rename splraiseipl argument to match with the rest of ports.

implement new api for xen.

sync with head

sync with head.

Sync with head.

Merge 2006-05-24 NetBSD-current into the "peter-altq" branch.

sync with head.

For whatever reason, GCC4 really really wants extern struct decls to be
after the struct is defined.

Sync with head.

sync with head - hopefully this will work

sync with head

Add support for ACPI in xen-3 dom0 support. We can now boot a xen-3 dom0
kernel with a default xen comamnd line.

sync with head.

Change "inline" back to "__inline" in .h files -- C99 is still too
new, and some apps compile things in C89 mode. C89 keywords stay.

As per core@.

Remove leading __ from __(const|inline|signed|volatile) -- it is obsolete.

merge ktrace-lwp.

Sync with HEAD. Here we go again...

- use sys/spl.h.
- add some IPL_ definitions.

sync with head.

add splraiseipl().

remove duplicated spllpt().

sync with -current

Pull up revision 1.3 (requested by bouyer in ticket #192):
Get rid of the event to pseudo-irq mapping. We are limited to 32 pseudo-irq,
including soft interrupt, and this is way too low in some use (lots of domains,
or domains with lots of xennet, or even hardware with lots of devices at
different interrupts).
Based on idea from YAMAMOTO Takashi, keep one list of handler per-event and
one per-IPL (so the same handler is now in 2 lists). In the common case were
an event is received at low IPL, we can call the handlers quickly (there
is usually only one handler per event, unless the event is mapped to a
physical interrupt and this interrupt is shared by different devices).
Deffered events and software interrupts are handled by a bitmask (as before)
with one bit per IPL. When one IPL has an event pending all handlers for
this IPL will be called.
With this change, it is now possible to have all the 1024 events active.
While here, handle debug event in a special way: the handler is always called,
regardless of the current IPL. Make the handler print usefull informations
about events and IPL states.
Also remove code not used on Xen in files inherited from the x86 port.

Get rid of the event to pseudo-irq mapping. We are limited to 32 pseudo-irq,
including soft interrupt, and this is way too low in some use (lots of domains,
or domains with lots of xennet, or even hardware with lots of devices at
different interrupts).
Based on idea from YAMAMOTO Takashi, keep one list of handler per-event and
one per-IPL (so the same handler is now in 2 lists). In the common case were
an event is received at low IPL, we can call the handlers quickly (there
is usually only one handler per event, unless the event is mapped to a
physical interrupt and this interrupt is shared by different devices).
Deffered events and software interrupts are handled by a bitmask (as before)
with one bit per IPL. When one IPL has an event pending all handlers for
this IPL will be called.
With this change, it is now possible to have all the 1024 events active.

While here, handle debug event in a special way: the handler is always called,
regardless of the current IPL. Make the handler print usefull informations
about events and IPL states.
Also remove code not used on Xen in files inherited from the x86 port.

Pull up revision 1.2 (requested by yamt in ticket #146):
fix a bug which corrupts runqueue.
when dealing with events, which are handed to xenevt pseudo device,
don't call wakeup(9)/selnotify(9) at too high IPL.  PR/29792.

fix a bug which corrupts runqueue.
when dealing with events, which are handed to xenevt pseudo device,
don't call wakeup(9)/selnotify(9) at too high IPL.  PR/29792.

Fix the sync with head I botched.

Sync with HEAD.

Sync with HEAD

file intr.h was added on branch ktrace-lwp on 2004-08-03 10:43:11 +0000

Add port to the Xen virtual machine monitor.
(see http://www.cl.cam.ac.uk/Research/SRG/netos/xen/)