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Current tag: MAIN
Revision 1.102 / (download) - annotate - [select for diffs], Wed Dec 12 22:43:35 2012 UTC (5 months, 1 week ago) by pgoyette
Branch: MAIN
CVS Tags: yamt-pagecache-base8,
yamt-pagecache-base7,
tls-maxphys-nbase,
tls-maxphys-base,
khorben-n900,
agc-symver-base,
agc-symver,
HEAD
Changes since 1.101: +6 -3
lines
Diff to previous 1.101 (colored)
With recent introduction of conditionals for the various MP options, we broke the build for x86 systems that have MULTIPROCESSOR but which do not include MPBIOS. So let's try to untangle things just a bit. Presented on current-users (and referenced on source-changes-d) without any comment. XXX We really should find a better method to select kernel options; #ifdef spaghetti is rather sub-optimal.
Revision 1.101 / (download) - annotate - [select for diffs], Sat Dec 8 12:36:31 2012 UTC (5 months, 2 weeks ago) by kiyohara
Branch: MAIN
Changes since 1.100: +39 -4
lines
Diff to previous 1.100 (colored)
#ifdef - #endif-ed. NMCA, NISA, NNPX, NIOAPIC, LAPIC, MPBIOS and MULTIPROCESSOR.
Revision 1.100 / (download) - annotate - [select for diffs], Mon Jul 2 01:05:48 2012 UTC (10 months, 3 weeks ago) by chs
Branch: MAIN
CVS Tags: yamt-pagecache-base6
Branch point for: tls-maxphys
Changes since 1.99: +10 -3
lines
Diff to previous 1.99 (colored)
in cpu_boot_secondary_processors(), wait until all the other CPUs have registered themselves in kcpuset_running before returning. recent changes to the TLB invalidation xcall code assume that any CPU which will receive a broadcast IPI is registered in kcpuset_running, so ensure that is true by waiting here.
Revision 1.99 / (download) - annotate - [select for diffs], Tue Jun 12 17:14:19 2012 UTC (11 months, 1 week ago) by yamt
Branch: MAIN
Changes since 1.98: +12 -8
lines
Diff to previous 1.98 (colored)
cpu_load_pmap: disable interrupts. add a comment to explain why. PR/44995
Revision 1.98 / (download) - annotate - [select for diffs], Fri Apr 20 22:23:24 2012 UTC (13 months ago) by rmind
Branch: MAIN
CVS Tags: yamt-pagecache-base5,
jmcneill-usbmp-base9,
jmcneill-usbmp-base10
Changes since 1.97: +15 -18
lines
Diff to previous 1.97 (colored)
- Convert x86 MD code, mainly pmap(9) e.g. TLB shootdown code, to use kcpuset(9) and thus replace hardcoded CPU bitmasks. This removes the limitation of maximum CPUs. - Support up to 256 CPUs on amd64 architecture by default. Bug fixes, improvements, completion of Xen part and testing on 64-core AMD Opteron(tm) Processor 6282 SE (also, as Xen HVM domU with 128 CPUs) by Manuel Bouyer.
Revision 1.97 / (download) - annotate - [select for diffs], Fri Feb 17 18:40:19 2012 UTC (15 months, 1 week ago) by bouyer
Branch: MAIN
CVS Tags: yamt-pagecache-base4,
jmcneill-usbmp-base8,
jmcneill-usbmp-base7,
jmcneill-usbmp-base6,
jmcneill-usbmp-base5,
jmcneill-usbmp-base4,
jmcneill-usbmp-base3,
jmcneill-usbmp-base2
Changes since 1.96: +3 -3
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Diff to previous 1.96 (colored)
Apply patch proposed in PR port-xen/45975 (this does not solve the exact problem reported here but is part of the solution): xen_kpm_sync() is not working as expected, leading to races between CPUs. 1 the check (xpq_cpu != &x86_curcpu) is always false because we have different x86_curcpu symbols with different addresses in the kernel. Fortunably, all addresses dissaemble to the same code. Because of this we always use the code intended for bootstrap, which doesn't use cross-calls or lock. 2 once 1 above is fixed, xen_kpm_sync() will use xcalls to sync other CPUs, which cause it to sleep and pmap.c doesn't like that. It triggers this KASSERT() in pmap_unmap_ptes(): KASSERT(pmap->pm_ncsw == curlwp->l_ncsw); 3 pmap->pm_cpus is not safe for the purpose of xen_kpm_sync(), which needs to know on which CPU a pmap is loaded *now*: pmap->pm_cpus is cleared before cpu_load_pmap() is called to switch to a new pmap, leaving a window where a pmap is still in a CPU's ci_kpm_pdir but not in pm_cpus. As a virtual CPU may be preempted by the hypervisor at any time, it can be large enough to let another CPU free the PTP and reuse it as a normal page. To fix 2), avoid cross-calls and IPIs completely, and instead use a mutex to update all CPU's ci_kpm_pdir from the local CPU. It's safe because we just need to update the table page, a tlbflush IPI will happen later. As a side effect, we don't need a different code for bootstrap, fixing 1). The mutex added to struct cpu needs a small headers reorganisation. to fix 3), introduce a pm_xen_ptp_cpus which is updated from cpu_pmap_load(), whith the ci_kpm_mtx mutex held. Checking it with ci_kpm_mtx held will avoid overwriting the wrong pmap's ci_kpm_pdir. While there I removed the unused pmap_is_active() function; and added some more details to DIAGNOSTIC panics.
Revision 1.96 / (download) - annotate - [select for diffs], Tue Oct 18 05:16:02 2011 UTC (19 months, 1 week ago) by jruoho
Branch: MAIN
CVS Tags: yamt-pagecache-base3,
yamt-pagecache-base2,
yamt-pagecache-base,
netbsd-6-base,
jmcneill-usbmp-pre-base2,
jmcneill-usbmp-base,
jmcneill-audiomp3-base,
jmcneill-audiomp3
Branch point for: yamt-pagecache,
netbsd-6,
jmcneill-usbmp
Changes since 1.95: +25 -9
lines
Diff to previous 1.95 (colored)
As cpu_shutdown() is a wrapper to cpu_suspend(), modify slightly to prevent setting low frequencies for active non-bootstrap processors during shutdown.
Revision 1.95 / (download) - annotate - [select for diffs], Mon Oct 17 22:38:01 2011 UTC (19 months, 1 week ago) by jmcneill
Branch: MAIN
Changes since 1.94: +11 -2
lines
Diff to previous 1.94 (colored)
add a "vm" device class for cpufeaturebus
Revision 1.94 / (download) - annotate - [select for diffs], Thu Oct 6 06:56:29 2011 UTC (19 months, 2 weeks ago) by mrg
Branch: MAIN
Changes since 1.93: +4 -6
lines
Diff to previous 1.93 (colored)
remove a check against uvmexp.ncolors that is done inside uvm_page_recolor() already anyway.
Revision 1.93 / (download) - annotate - [select for diffs], Wed Sep 28 15:38:21 2011 UTC (19 months, 3 weeks ago) by jruoho
Branch: MAIN
Changes since 1.92: +24 -11
lines
Diff to previous 1.92 (colored)
Call cpufreq_suspend(9) and cpufreq_resume(9) during suspend/resume.
Revision 1.92 / (download) - annotate - [select for diffs], Thu Aug 11 20:33:20 2011 UTC (21 months, 2 weeks ago) by cherry
Branch: MAIN
CVS Tags: jym-xensuspend-nbase,
jym-xensuspend-base
Changes since 1.91: +3 -3
lines
Diff to previous 1.91 (colored)
Unbreak the build. (conflicting types in function declaration and definition) Thanks riz@
Revision 1.91 / (download) - annotate - [select for diffs], Thu Aug 11 18:11:17 2011 UTC (21 months, 2 weeks ago) by cherry
Branch: MAIN
Changes since 1.90: +22 -2
lines
Diff to previous 1.90 (colored)
Hide the MD details of specific IPIs behind semantically pleasing functions. This cleans up a couple of #ifdef XEN/#endif pairs
Revision 1.90 / (download) - annotate - [select for diffs], Fri Jul 29 21:21:43 2011 UTC (21 months, 3 weeks ago) by dyoung
Branch: MAIN
Changes since 1.89: +8 -2
lines
Diff to previous 1.89 (colored)
Don't shutdown the boostrap processor (BSP) because we may have to run BIOS methods on it. For example, ACPI requires that we execute the code for changing sleep state on the BSP. This may help the problem where folks' machines would hang instead of powering off when they entered ACPI sleep state 5. XXX If the BSP is already shut down, we should start it back up.
Revision 1.89 / (download) - annotate - [select for diffs], Wed Jun 22 09:28:08 2011 UTC (23 months ago) by jruoho
Branch: MAIN
Changes since 1.88: +7 -2
lines
Diff to previous 1.88 (colored)
Add small comment.
Revision 1.88 / (download) - annotate - [select for diffs], Sun Jun 12 03:35:50 2011 UTC (23 months, 2 weeks ago) by rmind
Branch: MAIN
Changes since 1.87: +5 -4
lines
Diff to previous 1.87 (colored)
Welcome to 5.99.53! Merge rmind-uvmplock branch: - Reorganize locking in UVM and provide extra serialisation for pmap(9). New lock order: [vmpage-owner-lock] -> pmap-lock. - Simplify locking in some pmap(9) modules by removing P->V locking. - Use lock object on vmobjlock (and thus vnode_t::v_interlock) to share the locks amongst UVM objects where necessary (tmpfs, layerfs, unionfs). - Rewrite and optimise x86 TLB shootdown code, make it simpler and cleaner. Add TLBSTATS option for x86 to collect statistics about TLB shootdowns. - Unify /dev/mem et al in MI code and provide required locking (removes kernel-lock on some ports). Also, avoid cache-aliasing issues. Thanks to Andrew Doran and Joerg Sonnenberger, as their initial patches formed the core changes of this branch.
Revision 1.87 / (download) - annotate - [select for diffs], Sat Feb 26 14:43:18 2011 UTC (2 years, 2 months ago) by jruoho
Branch: MAIN
CVS Tags: rmind-uvmplock-nbase,
rmind-uvmplock-base,
cherry-xenmp-base,
bouyer-quota2-nbase
Branch point for: cherry-xenmp
Changes since 1.86: +17 -12
lines
Diff to previous 1.86 (colored)
Use config_defer(9) for cpu_rescan() in cpu_attach(). Also mark few local functions as static.
Revision 1.86 / (download) - annotate - [select for diffs], Thu Feb 24 15:42:17 2011 UTC (2 years, 3 months ago) by jruoho
Branch: MAIN
Changes since 1.85: +8 -20
lines
Diff to previous 1.85 (colored)
Fix autoconf(9) of cpufeaturebus.
Revision 1.85 / (download) - annotate - [select for diffs], Thu Feb 24 13:58:39 2011 UTC (2 years, 3 months ago) by jruoho
Branch: MAIN
Changes since 1.84: +8 -2
lines
Diff to previous 1.84 (colored)
Move VIA_C7TEMP to the cpufeaturebus.
Revision 1.84 / (download) - annotate - [select for diffs], Thu Feb 24 10:56:02 2011 UTC (2 years, 3 months ago) by jruoho
Branch: MAIN
Changes since 1.83: +8 -2
lines
Diff to previous 1.83 (colored)
Move PowerNow! to the cpufeaturebus.
Revision 1.83 / (download) - annotate - [select for diffs], Wed Feb 23 11:43:23 2011 UTC (2 years, 3 months ago) by jruoho
Branch: MAIN
Changes since 1.82: +14 -5
lines
Diff to previous 1.82 (colored)
Move ENHANCED_SPEEDSTEP, or henceforth est(4), to the cpufeaturebus.
Revision 1.82 / (download) - annotate - [select for diffs], Sun Feb 20 13:42:46 2011 UTC (2 years, 3 months ago) by jruoho
Branch: MAIN
Changes since 1.81: +12 -2
lines
Diff to previous 1.81 (colored)
Modularize coretemp(4). Ok jmcneill@.
Revision 1.81 / (download) - annotate - [select for diffs], Sat Feb 19 13:52:28 2011 UTC (2 years, 3 months ago) by jmcneill
Branch: MAIN
Changes since 1.80: +40 -4
lines
Diff to previous 1.80 (colored)
modularize VIA PadLock support - retire options VIA_PADLOCK, replace with 'padlock0 at cpu0' - driver supports attach & detach - support building as a module
Revision 1.80 / (download) - annotate - [select for diffs], Wed Feb 2 12:26:42 2011 UTC (2 years, 3 months ago) by bouyer
Branch: MAIN
CVS Tags: uebayasi-xip-base7,
bouyer-quota2-base
Changes since 1.79: +5 -4
lines
Diff to previous 1.79 (colored)
Some CPU have cpu counter (CPUID_TSC is there) but don't handle the rdmsr instruction (CPUID_MSR is not there). Introduce a cpu_counter_serializing() function to remplace rdmsr(MSR_TSC) calls, which does a rdmsr(MSR_TSC) if available and cpu_counter() otherwise. This makes the cpu counter useable on vortex86 CPUs. OK ad@
Revision 1.79 / (download) - annotate - [select for diffs], Tue Jan 11 18:25:25 2011 UTC (2 years, 4 months ago) by jruoho
Branch: MAIN
CVS Tags: jruoho-x86intr-base
Branch point for: jruoho-x86intr,
bouyer-quota2
Changes since 1.78: +11 -4
lines
Diff to previous 1.78 (colored)
Use pmf_device_register1(9) and add cpu_shutdown(), which calls cpu_suspend().
Revision 1.78 / (download) - annotate - [select for diffs], Sat Nov 6 11:46:04 2010 UTC (2 years, 6 months ago) by uebayasi
Branch: MAIN
CVS Tags: uebayasi-xip-base6,
uebayasi-xip-base5,
matt-mips64-premerge-20101231
Changes since 1.77: +3 -3
lines
Diff to previous 1.77 (colored)
Machine dependent code is considered as part of UVM. Include internal API header.
Revision 1.77 / (download) - annotate - [select for diffs], Fri Aug 20 06:34:32 2010 UTC (2 years, 9 months ago) by jruoho
Branch: MAIN
CVS Tags: yamt-nfs-mp-base11,
uebayasi-xip-base4,
uebayasi-xip-base3
Changes since 1.76: +2 -5
lines
Diff to previous 1.76 (colored)
Revert all previous changes that were made naively believing that the existing CPU power management implementations could peacefully coexist with the acpicpu(4) driver. The following options can not be used with acpicpu(4): ENHANCED_SPEEDSTEP, INTEL_ONDEMAND_CLOCKMOD, POWERNOW_K7, and POWERNOW_K8.
Revision 1.76 / (download) - annotate - [select for diffs], Mon Aug 9 15:46:17 2010 UTC (2 years, 9 months ago) by jruoho
Branch: MAIN
CVS Tags: yamt-nfs-mp-base10,
uebayasi-xip-base2
Changes since 1.75: +4 -5
lines
Diff to previous 1.75 (colored)
Revert the previous changes to EST. The used hack had an obvious flaw: the acpicpu(4) driver should attach even if the existing frequency management code fails to attach, mainly because ACPI is the only proper way to deal with EST on new Intel system. Use a more drastic hack to deal with this: when acpicpu(4) attachs, it tears down any existing sysctl(8) controls and installs identical ones in place. Upon detachment, the initialization function of the existing EST is called.
Revision 1.75 / (download) - annotate - [select for diffs], Mon Aug 9 04:18:48 2010 UTC (2 years, 9 months ago) by jruoho
Branch: MAIN
Changes since 1.74: +6 -2
lines
Diff to previous 1.74 (colored)
Move the sysctl function pointers used by acpicpu(4) to x86/cpu.c. Rename these so that the same pointers may be used in other parts.
Revision 1.74 / (download) - annotate - [select for diffs], Wed Aug 4 10:02:12 2010 UTC (2 years, 9 months ago) by jruoho
Branch: MAIN
Changes since 1.73: +3 -2
lines
Diff to previous 1.73 (colored)
Store the MADT-derived CPU ID to <x86/cpu.h>. This is required to properly match the ACPI processor object ID with the ID available in the APIC table.
Revision 1.73 / (download) - annotate - [select for diffs], Sat Jul 24 00:45:56 2010 UTC (2 years, 10 months ago) by jym
Branch: MAIN
Changes since 1.72: +40 -5
lines
Diff to previous 1.72 (colored)
Welcome PAE inside i386 current.
This patch is inspired by work previously done by Jeremy Morse, ported by me
to -current, merged with the work previously done for port-xen, together with
additionals fixes and improvements.
PAE option is disabled by default in GENERIC (but will be enabled in ALL in
the next few days).
In quick, PAE switches the CPU to a mode where physical addresses become
36 bits (64 GiB). Virtual address space remains at 32 bits (4 GiB). To cope
with the increased size of the physical address, they are manipulated as
64 bits variables by kernel and MMU.
When supported by the CPU, it also allows the use of the NX/XD bit that
provides no-execution right enforcement on a per physical page basis.
Notes:
- reworked locore.S
- introduce cpu_load_pmap(), used to switch pmap for the curcpu. Due to the
different handling of pmap mappings with PAE vs !PAE, Xen vs native, details
are hidden within this function. This helps calling it from assembly,
as some features, like BIOS calls, switch to pmap_kernel before mapping
trampoline code in low memory.
- some changes in bioscall and kvm86_call, to reflect the above.
- the L3 is "pinned" per-CPU, and is only manipulated by a
reduced set of functions within pmap. To track the L3, I added two
elements to struct cpu_info, namely ci_l3_pdirpa (PA of the L3), and
ci_l3_pdir (the L3 VA). Rest of the code considers that it runs "just
like" a normal i386, except that the L2 is 4 pages long (PTP_LEVELS is
still 2).
- similar to the ci_pae_l3_pdir{,pa} variables, amd64's xen_current_user_pgd
becomes an element of cpu_info (slowly paving the way for MP world).
- bootinfo_source struct declaration is modified, to cope with paddr_t size
change with PAE (it is not correct to assume that bs_addr is a paddr_t when
compiled with PAE - it should remain 32 bits). bs_addrs is now a
void * array (in bootloader's code under i386/stand/, the bs_addrs
is a physaddr_t, which is an unsigned long).
- fixes in multiboot code (same reason as bootinfo): paddr_t size
change. I used Elf32_* types, use RELOC() where necessary, and move the
memcpy() functions out of the if/else if (I do not expect sym and str tables
to overlap with ELF).
- 64 bits atomic functions for pmap
- all pmap_pdirpa access are now done through the pmap_pdirpa macro. It
hides the L3/L2 stuff from PAE, as well as the pm_pdirpa change in
struct pmap (it now becomes a PDP_SIZE array, with or without PAE).
- manipulation of recursive mappings ( PDIR_SLOT_{,A}PTEs ) is done via
loops on PDP_SIZE.
See also http://mail-index.netbsd.org/port-i386/2010/07/17/msg002062.html
No objection raised on port-i386@ and port-xen@R for about a week.
XXX kvm(3) will be fixed in another patch to properly handle both PAE and !PAE
kernel dumps (VA => PA macros are slightly different, and need proper 64 bits
PA support in kvm_i386).
XXX Mixing PAE and !PAE modules may lead to unwanted/unexpected results. This
cannot be solved easily, and needs lots of thinking before being declared
safe (paddr_t/bus_addr_t size handling, PD/PT macros abstractions).
Revision 1.72 / (download) - annotate - [select for diffs], Thu Jul 8 11:22:24 2010 UTC (2 years, 10 months ago) by rmind
Branch: MAIN
Changes since 1.71: +3 -4
lines
Diff to previous 1.71 (colored)
cpu_attach: use kmem_zalloc instead of memset.
Revision 1.71 / (download) - annotate - [select for diffs], Tue Jul 6 20:50:35 2010 UTC (2 years, 10 months ago) by cegger
Branch: MAIN
Changes since 1.70: +3 -2
lines
Diff to previous 1.70 (colored)
Turn PMAP_NOCACHE into MI flag. Add MI flags PMAP_WRITE_COMBINE, PMAP_WRITE_BACK, PMAP_NOCACHE_OVR. Update pmap(9) manpage. hppa: Remove MD PMAP_NOCACHE flag as it exists as MI flag mips: Rename MD PMAP_NOCACHE to PGC_NOCACHE. x86: Implement new MI flags using Page-Attribute Tables. x86: Implement BUS_SPACE_MAP_PREFETCHABLE. Patch presented on tech-kern@: http://mail-index.netbsd.org/tech-kern/2010/06/30/msg008458.html No comments on this last version.
Revision 1.70 / (download) - annotate - [select for diffs], Sun Apr 18 23:47:51 2010 UTC (3 years, 1 month ago) by jym
Branch: MAIN
CVS Tags: uebayasi-xip-base1
Changes since 1.69: +22 -14
lines
Diff to previous 1.69 (colored)
This patch fixes the NX regression issue observed on amd64 kernels, where per-page execution right was disabled (therefore leading to the inability of the kernel to detect fraudulent use of memory mappings marked as not being executable). - replace cpu_feature and ci_feature_flags variables by cpu_feature and ci_feat_val arrays. This makes it cleaner and brings kernel code closer to the design of cpuctl(8). A warning will be raised for each CPU that does not expose the same features as the Boot Processor (BP). - the blacklist of CPU features is now a macro defined in the specialreg.h header, instead of hardcoding it inside MD initialization code; fix comments. - replace checks against CPUID_TSC with the cpu_hascounter() function. - clean up the code in init_x86_64(), as cpu_feature variables are set inside cpu_probe(). - use cpu_init_msrs() for i386. It will be eventually used later for NX feature under i386 PAE kernels. - remove code that checks for CPUID_NOX in amd64 mptramp.S, this is already performed by cpu_hatch() through cpu_init_msrs(). - remove cpu_signature and feature_flags members from struct mpbios_proc (they were never used). This patch was tested with i386 MONOLITHIC, XEN3PAE_DOM0 and XEN3_DOM0 under a native i386 host, and amd64 GENERIC, XEN3_DOM0 via QEMU virtual machines. XXX Should kernel rev be bumped? XXX A similar patch should be pulled-up for NetBSD-5, hopefully tomorrow.
Revision 1.69 / (download) - annotate - [select for diffs], Wed Feb 24 22:37:55 2010 UTC (3 years, 2 months ago) by dyoung
Branch: MAIN
CVS Tags: yamt-nfs-mp-base9
Branch point for: rmind-uvmplock
Changes since 1.68: +6 -6
lines
Diff to previous 1.68 (colored)
A pointer typedef entails trading too much flexibility to declare const and non-const types, and the kernel uses both const and non-const PMF qualifiers and device suspensors, so change the pmf_qual_t and device_suspensor_t typedefs from "pointers to const" to non-pointer, non-const types.
Revision 1.68 / (download) - annotate - [select for diffs], Tue Feb 9 23:52:13 2010 UTC (3 years, 3 months ago) by jym
Branch: MAIN
Changes since 1.67: +3 -3
lines
Diff to previous 1.67 (colored)
Wrap a comment; add a space after a comma to another (align with next line)
Revision 1.67 / (download) - annotate - [select for diffs], Tue Feb 9 23:47:10 2010 UTC (3 years, 3 months ago) by jym
Branch: MAIN
Changes since 1.66: +3 -4
lines
Diff to previous 1.66 (colored)
Use roundup2() instead of hardcoding the operation.
Revision 1.66 / (download) - annotate - [select for diffs], Fri Jan 8 19:43:26 2010 UTC (3 years, 4 months ago) by dyoung
Branch: MAIN
CVS Tags: uebayasi-xip-base
Branch point for: uebayasi-xip
Changes since 1.65: +6 -6
lines
Diff to previous 1.65 (colored)
Expand PMF_FN_* macros.
Revision 1.65 / (download) - annotate - [select for diffs], Sat Nov 21 03:11:01 2009 UTC (3 years, 6 months ago) by rmind
Branch: MAIN
CVS Tags: matt-premerge-20091211
Changes since 1.64: +12 -8
lines
Diff to previous 1.64 (colored)
Use lwp_getpcb() on x86 MD code, clean from struct user usage.
Revision 1.64 / (download) - annotate - [select for diffs], Sat Nov 7 07:27:49 2009 UTC (3 years, 6 months ago) by cegger
Branch: MAIN
Changes since 1.63: +4 -4
lines
Diff to previous 1.63 (colored)
Add a flags argument to pmap_kenter_pa(9). Patch showed on tech-kern@ http://mail-index.netbsd.org/tech-kern/2009/11/04/msg006434.html No objections.
Revision 1.63 / (download) - annotate - [select for diffs], Fri Mar 27 19:53:19 2009 UTC (4 years, 1 month ago) by drochner
Branch: MAIN
CVS Tags: yamt-nfs-mp-base8,
yamt-nfs-mp-base7,
yamt-nfs-mp-base6,
yamt-nfs-mp-base5,
yamt-nfs-mp-base4,
yamt-nfs-mp-base3,
nick-hppapmap-base4,
nick-hppapmap-base3,
nick-hppapmap-base,
jymxensuspend-base
Changes since 1.62: +2 -6
lines
Diff to previous 1.62 (colored)
Rearrange TSC inter-CPU synchronization code so that the gory details are dealt with in x86/tsc.c and callers don't have to care that much. Also add some comments and make some variables static. approved by ad (a while ago)
Revision 1.62 / (download) - annotate - [select for diffs], Wed Jan 21 21:26:01 2009 UTC (4 years, 4 months ago) by bouyer
Branch: MAIN
CVS Tags: nick-hppapmap-base2
Branch point for: jym-xensuspend
Changes since 1.61: +11 -3
lines
Diff to previous 1.61 (colored)
Make i386 config without NPX work, problem reported and fix tested by Wojciech Galazka. While there change a __i386__ to i386 for consistency.
Revision 1.61 / (download) - annotate - [select for diffs], Tue Dec 23 15:41:21 2008 UTC (4 years, 5 months ago) by cegger
Branch: MAIN
CVS Tags: mjf-devfs2-base
Changes since 1.60: +6 -7
lines
Diff to previous 1.60 (colored)
move from malloc to kmem
Revision 1.60 / (download) - annotate - [select for diffs], Fri Dec 19 11:21:24 2008 UTC (4 years, 5 months ago) by ad
Branch: MAIN
Changes since 1.59: +3 -3
lines
Diff to previous 1.59 (colored)
PR kern/40213 my i386 machine can't boot because of tsc - Patch in atomic_cas_64() twice. The first patch is early and makes it the MP-atomic version available if we have cmpxchg8b. The second patch strips the lock prefix if ncpu==1. - Fix the i486 atomic_cas_64() to not unconditionally enable interrupts.
Revision 1.59 / (download) - annotate - [select for diffs], Thu Nov 6 19:29:46 2008 UTC (4 years, 6 months ago) by cegger
Branch: MAIN
CVS Tags: haad-nbase2,
haad-dm-base2,
haad-dm-base,
ad-audiomp2-base,
ad-audiomp2
Changes since 1.58: +9 -4
lines
Diff to previous 1.58 (colored)
Link cpus in the order they are attaching and not in inverse order.
Revision 1.58 / (download) - annotate - [select for diffs], Fri Oct 31 00:36:22 2008 UTC (4 years, 6 months ago) by rmind
Branch: MAIN
Changes since 1.57: +4 -4
lines
Diff to previous 1.57 (colored)
- Avoid the race with CPU online/offline state changes, when setting the affinity (cpu_lock protects these operations now). - Disallow setting of state of CPU to to offline, if there are bound LWPs, which have no CPU to migrate. - Disallow setting of affinity for the LWP(s), if all CPUs in the dynamic CPU-set are offline. - sched_setaffinity: fix invalid check of kcpuset_isset(). - Rename cpu_setonline() to cpu_setstate(). Should fix PR/39349.
Revision 1.57 / (download) - annotate - [select for diffs], Wed Oct 15 08:13:17 2008 UTC (4 years, 7 months ago) by ad
Branch: MAIN
CVS Tags: netbsd-5-base,
matt-mips64-base2,
haad-dm-base1
Branch point for: nick-hppapmap,
netbsd-5
Changes since 1.56: +4 -4
lines
Diff to previous 1.56 (colored)
- Rename cpu_lookup_byindex() to cpu_lookup(). The hardware ID isn't of interest to MI code. No functional change. - Change /dev/cpu to operate on cpu index, not hardware ID. Now cpuctl shouldn't print confused output.
Revision 1.56 / (download) - annotate - [select for diffs], Tue Jun 3 23:05:01 2008 UTC (4 years, 11 months ago) by jmcneill
Branch: MAIN
CVS Tags: yamt-pf42-base4,
wrstuden-revivesa-base-4,
wrstuden-revivesa-base-3,
wrstuden-revivesa-base-2,
wrstuden-revivesa-base-1,
wrstuden-revivesa-base,
simonb-wapbl-nbase,
simonb-wapbl-base,
simonb-wapbl
Branch point for: haad-dm
Changes since 1.55: +5 -2
lines
Diff to previous 1.55 (colored)
If we boot with RB_MD1, register a NULL pmf handler for APs so we can still suspend.
Revision 1.55 / (download) - annotate - [select for diffs], Mon Jun 2 14:41:41 2008 UTC (4 years, 11 months ago) by ad
Branch: MAIN
CVS Tags: yamt-pf42-base3
Changes since 1.54: +8 -3
lines
Diff to previous 1.54 (colored)
- Don't bother using sse to copy/zero pages on demand. It turns out not to be worth it. - If the machine has sse, re-enable zeroing pages in the idle loop and use the sse instructions so that we don't blow out the cache.
Revision 1.54 / (download) - annotate - [select for diffs], Wed May 28 11:50:01 2008 UTC (4 years, 11 months ago) by ad
Branch: MAIN
Changes since 1.53: +9 -5
lines
Diff to previous 1.53 (colored)
Remove X86_MAXPROCS. There is still a 32-cpu limit, but it's now using the MI constants.
Revision 1.53 / (download) - annotate - [select for diffs], Wed May 21 01:18:00 2008 UTC (5 years ago) by ad
Branch: MAIN
Changes since 1.52: +4 -3
lines
Diff to previous 1.52 (colored)
Do the errata patchup after identifying the CPU, to avoid badly formatted output.
Revision 1.52 / (download) - annotate - [select for diffs], Wed May 21 01:14:17 2008 UTC (5 years ago) by ad
Branch: MAIN
Changes since 1.51: +3 -3
lines
Diff to previous 1.51 (colored)
verbose -> debug for # page colours
Revision 1.51 / (download) - annotate - [select for diffs], Wed May 14 12:53:49 2008 UTC (5 years ago) by ad
Branch: MAIN
CVS Tags: yamt-pf42-base2,
yamt-nfs-mp-base2,
hpcarm-cleanup-nbase
Changes since 1.50: +34 -29
lines
Diff to previous 1.50 (colored)
- cpu_attach: ensure that the boot processor is set up before trying to initialize APs. We need the lapic set up and the boot processor may not be attached first. - mp_cpu_start: write back and invalidate the data cache before starting the init IPI sequence. If a buggy BIOS has left the AP with cache disabled, it might not be able to participate in the cache coherency protocol.
Revision 1.50 / (download) - annotate - [select for diffs], Tue May 13 22:39:18 2008 UTC (5 years ago) by ad
Branch: MAIN
Changes since 1.49: +11 -15
lines
Diff to previous 1.49 (colored)
Be more conservative during AP startup. Don't let the AP access the lapic or do any setup until the boot processor has finished the init sequence, and add a few more delays.
Revision 1.49 / (download) - annotate - [select for diffs], Mon May 12 14:41:07 2008 UTC (5 years ago) by ad
Branch: MAIN
Changes since 1.48: +4 -12
lines
Diff to previous 1.48 (colored)
- Make cpu_number() return MI index, otherwise the pmap cannot work on systems with lapic IDs > X86_MAXPROCS. - Kill cpu_info[] array and use MI cpu_lookup_byindex().
Revision 1.48 / (download) - annotate - [select for diffs], Mon May 12 14:29:06 2008 UTC (5 years ago) by ad
Branch: MAIN
Changes since 1.47: +7 -2
lines
Diff to previous 1.47 (colored)
Don't crash if more than 32 cpus. Hopefully the boot processor will be within the first 32 attached.
Revision 1.47 / (download) - annotate - [select for diffs], Mon May 12 14:19:33 2008 UTC (5 years ago) by ad
Branch: MAIN
Changes since 1.46: +10 -8
lines
Diff to previous 1.46 (colored)
- Complain if unable to reset the lapic ID. - Minor clean up.
Revision 1.46 / (download) - annotate - [select for diffs], Mon May 12 11:58:10 2008 UTC (5 years ago) by ad
Branch: MAIN
Changes since 1.45: +5 -3
lines
Diff to previous 1.45 (colored)
cpu_hatch: hack around problem with multiple CPUs spinning in i8254_delay.
Revision 1.45 / (download) - annotate - [select for diffs], Sun May 11 22:26:59 2008 UTC (5 years ago) by ad
Branch: MAIN
Changes since 1.44: +19 -26
lines
Diff to previous 1.44 (colored)
- Decouple the APIC ID from cpu_info[]. - Probe TSC frequency on each AP when hatching.
Revision 1.44 / (download) - annotate - [select for diffs], Sun May 11 16:26:56 2008 UTC (5 years ago) by ad
Branch: MAIN
Changes since 1.43: +5 -37
lines
Diff to previous 1.43 (colored)
MP + apics are needed now so kill the #ifdefs
Revision 1.43 / (download) - annotate - [select for diffs], Sun May 11 16:23:05 2008 UTC (5 years ago) by ad
Branch: MAIN
Changes since 1.42: +4 -2
lines
Diff to previous 1.42 (colored)
Don't reload LDTR unless a new value, which only happens for USER_LDT.
Revision 1.42 / (download) - annotate - [select for diffs], Sun May 11 15:59:51 2008 UTC (5 years ago) by ad
Branch: MAIN
Changes since 1.41: +8 -19
lines
Diff to previous 1.41 (colored)
Stop using APIC IDs to identify CPUs for software purposes. Allows for APIC IDs beyond 31, which has been possible for some time now.
Revision 1.41 / (download) - annotate - [select for diffs], Sun May 11 15:32:20 2008 UTC (5 years ago) by ad
Branch: MAIN
Changes since 1.40: +2 -5
lines
Diff to previous 1.40 (colored)
Share cpu.h between the x86 ports.
Revision 1.40 / (download) - annotate - [select for diffs], Sun May 11 14:44:54 2008 UTC (5 years ago) by ad
Branch: MAIN
Changes since 1.39: +9 -13
lines
Diff to previous 1.39 (colored)
Simplify x86 identcpu code, and share between i386/amd64.
Revision 1.39 / (download) - annotate - [select for diffs], Sat May 10 17:23:54 2008 UTC (5 years ago) by ad
Branch: MAIN
Changes since 1.38: +8 -4
lines
Diff to previous 1.38 (colored)
If the boot processor's lapic has the wrong ID, reset it.
Revision 1.38 / (download) - annotate - [select for diffs], Sat May 10 16:12:32 2008 UTC (5 years ago) by ad
Branch: MAIN
Changes since 1.37: +81 -20
lines
Diff to previous 1.37 (colored)
Improve x86 tsc handling: - Ditch the cross-CPU calibration stuff. It didn't work properly, and it's near impossible to synchronize the CPUs in a running system, because bus traffic will interfere with any calibration attempt, messing up the timings. - Only enable the TSC on CPUs where we are sure it does not drift. If we are On a known good CPU, give the TSC high timecounter quality, making it the default. - When booting CPUs, detect TSC skew and account for it. Most Intel MP systems have synchronized counters, but that need not be true if the system has a complicated bus structure. As far as I know, AMD systems do not have synchronized TSCs and so we need to handle skew. - While an AP is waiting to be set running, try and make the TSC drift by entering a reduced power state. If we detect drift, ensure that the TSC does not get a high timecounter quality. This should not happen and is only for safety. - Make cpu_counter() stuff LKM safe.
Revision 1.37 / (download) - annotate - [select for diffs], Fri May 9 18:11:29 2008 UTC (5 years ago) by joerg
Branch: MAIN
Changes since 1.36: +33 -2
lines
Diff to previous 1.36 (colored)
Make cpu_idle a macro calling a function pointer on x86. Select the Xen idle routine for Xen, mwait if supported by the CPU and it is not AMD and halt otherwise. As reported by Christoph Egger, AMD Barcelona keeps the CPU in C0 state with MWAIT, contrary to HLT, which uses C1 and therefore much less power.
Revision 1.36 / (download) - annotate - [select for diffs], Tue Apr 29 19:19:29 2008 UTC (5 years ago) by ad
Branch: MAIN
Branch point for: wrstuden-revivesa
Changes since 1.35: +3 -3
lines
Diff to previous 1.35 (colored)
Minor correction to previous.
Revision 1.35 / (download) - annotate - [select for diffs], Tue Apr 29 19:18:19 2008 UTC (5 years ago) by ad
Branch: MAIN
Changes since 1.34: +7 -6
lines
Diff to previous 1.34 (colored)
Recognise two new boot flags: -1 disable MP -2 disable ACPI
Revision 1.34 / (download) - annotate - [select for diffs], Mon Apr 28 20:23:40 2008 UTC (5 years ago) by martin
Branch: MAIN
Changes since 1.33: +2 -9
lines
Diff to previous 1.33 (colored)
Remove clause 3 and 4 from TNF licenses
Revision 1.33 / (download) - annotate - [select for diffs], Thu Apr 24 15:59:57 2008 UTC (5 years, 1 month ago) by jmcneill
Branch: MAIN
CVS Tags: yamt-nfs-mp-base
Branch point for: yamt-nfs-mp
Changes since 1.32: +9 -2
lines
Diff to previous 1.32 (colored)
Gracefully handle a condition where apic id >= X86_MAXPROCS rather than panicing.
Revision 1.32 / (download) - annotate - [select for diffs], Tue Apr 22 02:23:05 2008 UTC (5 years, 1 month ago) by tls
Branch: MAIN
Changes since 1.31: +19 -2
lines
Diff to previous 1.31 (colored)
Commit a quick workaround for the not-power-of-two cache colors problem pointed out by Simon (Simon's option #3): use the greatest power of two which is a divisor of the desired number of cache colors. This code might want to stay even after the cache probing code is fixed.
Revision 1.31 / (download) - annotate - [select for diffs], Fri Apr 18 15:32:46 2008 UTC (5 years, 1 month ago) by cegger
Branch: MAIN
CVS Tags: yamt-pf42-baseX,
yamt-pf42-base,
yamt-pf42-X
Branch point for: yamt-pf42
Changes since 1.30: +2 -9
lines
Diff to previous 1.30 (colored)
g/c unused ioapic_bsp_id. Per discussion with bouyer.
Revision 1.30 / (download) - annotate - [select for diffs], Thu Apr 17 18:45:08 2008 UTC (5 years, 1 month ago) by cegger
Branch: MAIN
Changes since 1.29: +4 -4
lines
Diff to previous 1.29 (colored)
wrap long line. Requested and OK by simonb.
Revision 1.29 / (download) - annotate - [select for diffs], Thu Apr 17 14:01:03 2008 UTC (5 years, 1 month ago) by yamt
Branch: MAIN
Changes since 1.28: +3 -3
lines
Diff to previous 1.28 (colored)
cpu_debug_dump: s/curproc/curlwp/ in a message.
Revision 1.28 / (download) - annotate - [select for diffs], Thu Apr 17 09:09:54 2008 UTC (5 years, 1 month ago) by cegger
Branch: MAIN
Changes since 1.27: +9 -9
lines
Diff to previous 1.27 (colored)
use aprint_*_dev. OK simonb
Revision 1.27 / (download) - annotate - [select for diffs], Wed Apr 16 16:06:51 2008 UTC (5 years, 1 month ago) by cegger
Branch: MAIN
Changes since 1.26: +5 -5
lines
Diff to previous 1.26 (colored)
- use aprint_*_dev and device_xname - use POSIX integer types
Revision 1.26 / (download) - annotate - [select for diffs], Sun Apr 13 22:23:58 2008 UTC (5 years, 1 month ago) by cegger
Branch: MAIN
Changes since 1.25: +26 -22
lines
Diff to previous 1.25 (colored)
use device accessors and other misc cleanups
Revision 1.25 / (download) - annotate - [select for diffs], Wed Apr 2 11:52:54 2008 UTC (5 years, 1 month ago) by ad
Branch: MAIN
Changes since 1.24: +24 -17
lines
Diff to previous 1.24 (colored)
Add more error reporting to AP startup.
Revision 1.24 / (download) - annotate - [select for diffs], Tue Apr 1 11:09:58 2008 UTC (5 years, 1 month ago) by ad
Branch: MAIN
Changes since 1.23: +12 -2
lines
Diff to previous 1.23 (colored)
If MPDEBUG and waiting for the CPU to start, dump cpu_trace[] as it changes.
Revision 1.23 / (download) - annotate - [select for diffs], Tue Mar 4 15:24:02 2008 UTC (5 years, 2 months ago) by cube
Branch: MAIN
CVS Tags: yamt-lazymbuf-base15,
yamt-lazymbuf-base14,
matt-armv6-nbase,
keiichi-mipv6-nbase,
keiichi-mipv6-base,
ad-socklock-base1
Changes since 1.22: +16 -14
lines
Diff to previous 1.22 (colored)
Split device_t/softc.
Revision 1.22 / (download) - annotate - [select for diffs], Fri Feb 29 06:27:15 2008 UTC (5 years, 2 months ago) by dyoung
Branch: MAIN
Changes since 1.21: +6 -6
lines
Diff to previous 1.21 (colored)
Use PMF_FN_ARGS, PMF_FN_PROTO.
Revision 1.21 / (download) - annotate - [select for diffs], Sun Feb 10 14:37:41 2008 UTC (5 years, 3 months ago) by ad
Branch: MAIN
CVS Tags: nick-net80211-sync-base,
nick-net80211-sync,
mjf-devfs-base,
hpcarm-cleanup-base
Branch point for: mjf-devfs2,
keiichi-mipv6
Changes since 1.20: +8 -4
lines
Diff to previous 1.20 (colored)
Align cc_microtime and struct cpu_info to 64b.
Revision 1.20 / (download) - annotate - [select for diffs], Wed Jan 30 01:10:21 2008 UTC (5 years, 3 months ago) by jmcneill
Branch: MAIN
Changes since 1.19: +18 -11
lines
Diff to previous 1.19 (colored)
pmf: Naively track online/offline state of APs during suspend/resume.
Revision 1.19 / (download) - annotate - [select for diffs], Wed Jan 23 20:02:16 2008 UTC (5 years, 4 months ago) by joerg
Branch: MAIN
Changes since 1.18: +3 -2
lines
Diff to previous 1.18 (colored)
Initialise the Local Vector Table of the primary LAPIC directly after enabling it. Explicitly initialise LINT0 as ExtInt and LINT1 as NMI, the platform default. Mask the NMIs on the application processors and mask the ExtInt if a IOAPIC was found. With this patch, "disable ioapic" is supposed to work and it will allow enabling the local APIC on all systems that have one to gain e.g. the better clock interrupt.
Revision 1.18 / (download) - annotate - [select for diffs], Tue Jan 15 14:50:08 2008 UTC (5 years, 4 months ago) by joerg
Branch: MAIN
CVS Tags: bouyer-xeni386-nbase,
bouyer-xeni386-base
Changes since 1.17: +17 -11
lines
Diff to previous 1.17 (colored)
Introduce optional cpu_offline_md to execute MD actions at the end of cpu_offline. Use this on amd64/i386 to force a FPU save. As this was triggered by npxsave_cpu/fpusave_cpu not working for a different CPU, remove the cpu_info argument and adjust npxsave_*/fpusave_* to use bool for the save. OK ad@
Revision 1.17 / (download) - annotate - [select for diffs], Mon Jan 14 15:23:56 2008 UTC (5 years, 4 months ago) by joerg
Branch: MAIN
Changes since 1.16: +16 -4
lines
Diff to previous 1.16 (colored)
Ensure that non-primary CPUs save the FPU state on suspend.
Revision 1.16 / (download) - annotate - [select for diffs], Sat Jan 5 21:47:18 2008 UTC (5 years, 4 months ago) by yamt
Branch: MAIN
CVS Tags: matt-armv6-base
Changes since 1.15: +2 -6
lines
Diff to previous 1.15 (colored)
- make amd64 use per-cpu tss. - fix iopl syscall for amd64+xen.
Revision 1.15 / (download) - annotate - [select for diffs], Fri Jan 4 15:55:30 2008 UTC (5 years, 4 months ago) by yamt
Branch: MAIN
Changes since 1.14: +12 -7
lines
Diff to previous 1.14 (colored)
i386: - make tss per-cpu. this considerably speeds up context switch for, at least, pentium4, where ltr instruction seems very slow. i386, xen: - kill cpu_maxproc. kvm86: - adapt to per-cpu tss. - cleanup and simplify. - move kvm86_mp_lock to more meaningful place. - disable preemption during a call.
Revision 1.14 / (download) - annotate - [select for diffs], Tue Dec 18 07:17:17 2007 UTC (5 years, 5 months ago) by joerg
Branch: MAIN
CVS Tags: vmlocking2-base3
Changes since 1.13: +23 -19
lines
Diff to previous 1.13 (colored)
Add new IPI for saving CPU state explicitly, share high-level part of ACPI wakeup code and teach it how to start the APs again. As a side effect the CPU_START interface allows choosing between different bootstrap codes more easily now.
Revision 1.13 / (download) - annotate - [select for diffs], Sat Dec 15 09:18:59 2007 UTC (5 years, 5 months ago) by joerg
Branch: MAIN
Changes since 1.12: +7 -33
lines
Diff to previous 1.12 (colored)
For now, remove the attempts to shutdown other CPUs and bring them back online. It runs into issues in the pmap code and will handled differently. This allows sysctl -w machdep.sleep_state=3 to at least recover into a working system again.
Revision 1.12 / (download) - annotate - [select for diffs], Sun Dec 9 20:27:49 2007 UTC (5 years, 5 months ago) by jmcneill
Branch: MAIN
CVS Tags: yamt-kmem-base3,
yamt-kmem-base2,
cube-autoconf-base,
cube-autoconf
Branch point for: bouyer-xeni386
Changes since 1.11: +123 -43
lines
Diff to previous 1.11 (colored)
Merge jmcneill-pm branch.
Revision 1.11 / (download) - annotate - [select for diffs], Tue Dec 4 16:05:34 2007 UTC (5 years, 5 months ago) by ad
Branch: MAIN
CVS Tags: yamt-kmem-base,
vmlocking2-base2,
reinoud-bufcleanup-nbase,
reinoud-bufcleanup-base,
jmcneill-pm-base
Branch point for: yamt-kmem
Changes since 1.10: +8 -10
lines
Diff to previous 1.10 (colored)
- Fix the locking around the i8254. Values for the TSC clock and lapic delay function were wildly inaccurate due to multiple CPUs competing in DELAY() during calibration, confusing the clock chip. - Use i8254_delay() explictly in a few more places.
Revision 1.10 / (download) - annotate - [select for diffs], Sun Dec 2 20:34:41 2007 UTC (5 years, 5 months ago) by ad
Branch: MAIN
CVS Tags: vmlocking2-base1,
vmlocking-nbase
Branch point for: vmlocking2
Changes since 1.9: +3 -3
lines
Diff to previous 1.9 (colored)
Back out part of patch that got merged accidentally.
Revision 1.9 / (download) - annotate - [select for diffs], Sun Dec 2 19:33:31 2007 UTC (5 years, 5 months ago) by ad
Branch: MAIN
Changes since 1.8: +21 -21
lines
Diff to previous 1.8 (colored)
Use atomics to adjust ci_flags.
Revision 1.8 / (download) - annotate - [select for diffs], Wed Nov 14 14:59:28 2007 UTC (5 years, 6 months ago) by ad
Branch: MAIN
CVS Tags: bouyer-xenamd64-base2,
bouyer-xenamd64-base
Changes since 1.7: +7 -18
lines
Diff to previous 1.7 (colored)
cpu_hatch: change lapic initialization order.
Revision 1.7 / (download) - annotate - [select for diffs], Tue Nov 13 18:42:00 2007 UTC (5 years, 6 months ago) by ad
Branch: MAIN
Changes since 1.6: +19 -3
lines
Diff to previous 1.6 (colored)
In cpu_hatch(), recompute ci_tsc_freq instead of using the boot CPU's value.
Revision 1.6 / (download) - annotate - [select for diffs], Mon Nov 12 18:44:43 2007 UTC (5 years, 6 months ago) by ad
Branch: MAIN
Changes since 1.5: +11 -5
lines
Diff to previous 1.5 (colored)
- cpu_vendor was both an int and char[] on amd64 - fix it. - Run the errata check/patch on all CPUs, not just the boot processor.
Revision 1.5 / (download) - annotate - [select for diffs], Sat Nov 10 20:06:25 2007 UTC (5 years, 6 months ago) by ad
Branch: MAIN
Changes since 1.4: +13 -2
lines
Diff to previous 1.4 (colored)
- When computing the TSC frequency, call i8254_delay() and not DELAY().
- Use atomics to adjust the pmap reference count, instead of taking locks.
- Implement I386_{SET,GET}_{FS,GS}BASE, allowing %fs and %gs to be used
as per-thread registers. This is compatible with FreeBSD.
- Run patches after we have attached CPUs, since we then know if the
system is uniprocessor or not. Eliminates a lot of #ifdef MULTIPROCESSOR
and makes running MP kernels on UP systems cheaper.
- Patch out many of the 'lock' prefixes to nops if uniprocessor.
- Do a wbinvd after patching to ensure that the trace/instruction cache
is up to date.
Revision 1.4 / (download) - annotate - [select for diffs], Thu Oct 18 15:28:38 2007 UTC (5 years, 7 months ago) by yamt
Branch: MAIN
CVS Tags: jmcneill-base
Branch point for: mjf-devfs,
matt-armv6
Changes since 1.3: +3 -6
lines
Diff to previous 1.3 (colored)
merge yamt-x86pmap branch. - reduce differences between amd64 and i386. notably, share pmap.c between them. it makes several i386 pmap improvements available to amd64, including tlb shootdown reduction and bug fixes from Stephan Uphoff. - implement deferred pmap switching for amd64. - remove LARGEPAGES option. always use large pages if available. also, make it work on amd64.
Revision 1.3 / (download) - annotate - [select for diffs], Wed Sep 26 19:48:42 2007 UTC (5 years, 8 months ago) by ad
Branch: MAIN
CVS Tags: yamt-x86pmap-base4,
yamt-x86pmap-base3,
yamt-x86pmap-base2,
vmlocking-base
Branch point for: bouyer-xenamd64
Changes since 1.2: +3 -3
lines
Diff to previous 1.2 (colored)
x86 changes for pcc and LKMs. - Replace most inline assembly with proper functions. As a side effect this reduces the size of amd64 GENERIC by about 120kB, and i386 by a smaller amount. Nearly all of the inlines did something slow, or something that does not need to be fast. - Make curcpu() and curlwp functions proper, unless __GNUC__ && _KERNEL. In that case make them inlines. Makes curlwp LKM and preemption safe. - Make bus_space and bus_dma more LKM friendly. - Share a few more files between the ports. - Other minor changes.
Revision 1.2 / (download) - annotate - [select for diffs], Wed Aug 29 23:38:05 2007 UTC (5 years, 8 months ago) by ad
Branch: MAIN
CVS Tags: yamt-x86pmap-base,
nick-csl-alignment-base5
Branch point for: yamt-x86pmap,
yamt-lazymbuf,
nick-csl-alignment,
jmcneill-pm
Changes since 1.1: +881 -0
lines
Diff to previous 1.1 (colored)
Merge most x86 changes from the vmlocking branch, except the threaded soft interrupt stuff. This is mostly comprised of changes to the pmap modules to work on multiprocessor systems without kernel_lock, and changes to speed up tlb shootdowns.
Revision 1.1, Thu Aug 23 12:13:57 2007 UTC (5 years, 9 months ago) by ad
Branch: MAIN
Branch point for: vmlocking
FILE REMOVED
file cpu.c was initially added on branch vmlocking.