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CVS log for src/sys/arch/x86/x86/cpu.c

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Request diff between arbitrary revisions


Default branch: MAIN


Revision 1.206 / (download) - annotate - [select for diffs], Sat Sep 24 11:05:18 2022 UTC (4 months, 1 week ago) by riastradh
Branch: MAIN
CVS Tags: netbsd-10-base, netbsd-10, bouyer-sunxi-drm-base, bouyer-sunxi-drm, HEAD
Changes since 1.205: +3 -3 lines
Diff to previous 1.205 (colored)

x86: Support EFI runtime services.

This creates a special pmap, efi_runtime_pmap, which avoids setting
PTE_U but allows mappings to lie in what would normally be user VM --
this way we don't fall afoul of SMAP/SMEP when executing EFI runtime
services from CPL 0.  SVS does not apply to the EFI runtime pmap.

The mechanism is intended to work with either physical addressing or
virtual addressing; currently the bootloader does physical addressing
but in principle it could be modified to do virtual addressing
instead, if it allocated virtual pages, assigned them in the memory
map, and issued RT->SetVirtualAddressMap.

Not sure pmap_activate_sync and pmap_deactivate_sync are correct,
need more review from an x86 wizard.

If this causes fallout, it can be disabled temporarily without
reverting anything by just making efi_runtime_init return immediately
without doing anything, or by removing options EFI_RUNTIME.

amd64-only for now pending type fixes and testing on i386.

Revision 1.205 / (download) - annotate - [select for diffs], Sat Aug 20 23:48:51 2022 UTC (5 months, 1 week ago) by riastradh
Branch: MAIN
Changes since 1.204: +3 -2 lines
Diff to previous 1.204 (colored)

x86: Split most of pmap.h into pmap_private.h or vmparam.h.

This way pmap.h only contains the MD definition of the MI pmap(9)
API, which loads of things in the kernel rely on, so changing x86
pmap internals no longer requires recompiling the entire kernel every
time.

Callers needing these internals must now use machine/pmap_private.h.
Note: This is not x86/pmap_private.h because it contains three parts:

1. CPU-specific (different for i386/amd64) definitions used by...

2. common definitions, including Xenisms like xpmap_ptetomach,
   further used by...

3. more CPU-specific inlines for pmap_pte_* operations

So {amd64,i386}/pmap_private.h defines 1, includes x86/pmap_private.h
for 2, and then defines 3.  Maybe we should split that out into a new
pmap_pte.h to reduce this trouble.

No functional change intended, other than that some .c files must
include machine/pmap_private.h when previously uvm/uvm_pmap.h
polluted the namespace with pmap internals.

Note: This migrates part of i386/pmap.h into i386/vmparam.h --
specifically the parts that are needed for several constants defined
in vmparam.h:

VM_MAXUSER_ADDRESS
VM_MAX_ADDRESS
VM_MAX_KERNEL_ADDRESS
VM_MIN_KERNEL_ADDRESS

Since i386 needs PDP_SIZE in vmparam.h, I added it there on amd64
too, just to keep things parallel.

Revision 1.204 / (download) - annotate - [select for diffs], Sun Aug 14 07:49:33 2022 UTC (5 months, 2 weeks ago) by mlelstv
Branch: MAIN
Changes since 1.203: +28 -8 lines
Diff to previous 1.203 (colored)

Split TSC calibtration into many small steps and disable interrupts
for each step. Also add debug messages.

Revision 1.203 / (download) - annotate - [select for diffs], Fri Apr 1 19:57:22 2022 UTC (10 months ago) by riastradh
Branch: MAIN
Changes since 1.202: +3 -2 lines
Diff to previous 1.202 (colored)

x86, arm: Allow fpu_kern_enter/leave while cold.

Normally these are forbidden above IPL_VM, so that FPU usage doesn't
block IPL_SCHED or IPL_HIGH interrupts.  But while cold, e.g. during
builtin module initialization at boot, all interrupts are blocked
anyway so it's a moot point.

Also initialize x86 cpu_info_primary.ci_kfpu_spl to -1 so we don't
trip over an assertion about it while cold -- the assertion is meant
to detect reentrance into fpu_kern_enter/leave, which is prohibited.

Also initialize cpu0's ci_kfpu_spl.

Revision 1.202 / (download) - annotate - [select for diffs], Thu Oct 7 12:52:27 2021 UTC (15 months, 3 weeks ago) by msaitoh
Branch: MAIN
Changes since 1.201: +3 -3 lines
Diff to previous 1.201 (colored)

KNF. No functional change.

Revision 1.201 / (download) - annotate - [select for diffs], Sat Aug 7 16:19:08 2021 UTC (17 months, 3 weeks ago) by thorpej
Branch: MAIN
CVS Tags: thorpej-i2c-spi-conf2-base, thorpej-i2c-spi-conf2
Changes since 1.200: +6 -10 lines
Diff to previous 1.200 (colored)

Merge thorpej-cfargs2.

Revision 1.200.8.1 / (download) - annotate - [select for diffs], Wed Aug 4 03:03:30 2021 UTC (18 months ago) by thorpej
Branch: thorpej-cfargs2
Changes since 1.200: +6 -10 lines
Diff to previous 1.200 (colored) next main 1.201 (colored)

Adapt to CFARGS().

Revision 1.200 / (download) - annotate - [select for diffs], Sat Apr 24 23:36:51 2021 UTC (21 months, 1 week ago) by thorpej
Branch: MAIN
CVS Tags: thorpej-i2c-spi-conf-base, thorpej-i2c-spi-conf, thorpej-futex2-base, thorpej-futex2, thorpej-cfargs2-base, cjep_sun2x-base1, cjep_sun2x-base, cjep_sun2x, cjep_staticlib_x-base1, cjep_staticlib_x-base, cjep_staticlib_x
Branch point for: thorpej-cfargs2
Changes since 1.199: +18 -10 lines
Diff to previous 1.199 (colored)

Merge thorpej-cfargs branch:

Simplify and make extensible the config_search() / config_found() /
config_attach() interfaces: rather than having different variants for
which arguments you want pass along, just have a single call that
takes a variadic list of tag-value arguments.

Adjust all call sites:
- Simplify wherever possible; don't pass along arguments that aren't
  actually needed.
- Don't be explicit about what interface attribute is attaching if
  the device only has one.  (More simplification.)
- Add a config_probe() function to be used in indirect configuiration
  situations, making is visibly easier to see when indirect config is
  in play, and allowing for future change in semantics.  (As of now,
  this is just a wrapper around config_match(), but that is an
  implementation detail.)

Remove unnecessary or redundant interface attributes where they're not
needed.

There are currently 5 "cfargs" defined:
- CFARG_SUBMATCH (submatch function for direct config)
- CFARG_SEARCH (search function for indirect config)
- CFARG_IATTR (interface attribte)
- CFARG_LOCATORS (locators array)
- CFARG_DEVHANDLE (devhandle_t - wraps OFW, ACPI, etc. handles)

...and a sentinel value CFARG_EOL.

Add some extra sanity checking to ensure that interface attributes
aren't ambiguous.

Use CFARG_DEVHANDLE in MI FDT, OFW, and ACPI code, and macppc and shark
ports to associate those device handles with device_t instance.  This
will trickle trough to more places over time (need back-end for pre-OFW
Sun OBP; any others?).

Revision 1.199.4.1 / (download) - annotate - [select for diffs], Fri Apr 2 22:17:42 2021 UTC (22 months ago) by thorpej
Branch: thorpej-cfargs
Changes since 1.199: +18 -10 lines
Diff to previous 1.199 (colored) next main 1.200 (colored)

config_found_ia() -> config_found() w/ CFARG_IATTR.

Revision 1.199 / (download) - annotate - [select for diffs], Fri Oct 9 21:14:05 2020 UTC (2 years, 3 months ago) by christos
Branch: MAIN
CVS Tags: thorpej-futex-base, thorpej-futex, thorpej-cfargs-base
Branch point for: thorpej-cfargs
Changes since 1.198: +31 -22 lines
Diff to previous 1.198 (colored)

Don't do extra work finding the power of 2 for values we are not going to
use. Explain that cpu_hatch has not been called yet, so no cpu_probe either
so the cache info is 0 for AP's.

Revision 1.198 / (download) - annotate - [select for diffs], Sun Aug 9 15:32:44 2020 UTC (2 years, 5 months ago) by christos
Branch: MAIN
Changes since 1.197: +2 -25 lines
Diff to previous 1.197 (colored)

move lcall sniffer to x86_machdep since xen/pv has its own cpu.c

Revision 1.197 / (download) - annotate - [select for diffs], Sat Aug 8 19:08:48 2020 UTC (2 years, 5 months ago) by christos
Branch: MAIN
Changes since 1.196: +25 -2 lines
Diff to previous 1.196 (colored)

PR/55547: Dan Plassche: Fix BSD/OS binary emulation.
Centralize lcall sniffer and recognize the BSD/OS flavor.

Revision 1.130.2.10 / (download) - annotate - [select for diffs], Wed Aug 5 16:20:08 2020 UTC (2 years, 5 months ago) by martin
Branch: netbsd-8
Changes since 1.130.2.9: +16 -7 lines
Diff to previous 1.130.2.9 (colored) to branchpoint 1.130 (colored) next main 1.131 (colored)

Pull up the following revisions, requested by msaitoh in ticket #1593:

	sys/arch/x86/conf/files.x86			1.108
	sys/arch/x86/include/apicvar.h			1.7 via patch
	sys/arch/x86/include/cpu.h			1.121
	sys/arch/x86/x86/cpu.c				1.185 via patch
	sys/arch/x86/x86/hyperv.c			1.7
	sys/arch/x86/x86/tsc.c				1.41
	sys/arch/xen/conf/files.xen			1.181

Get TSC frequency from CPUID 0x15 and/or x16 if it's available.
This change fixes a problem that newer Intel processors' timer
counts very slowly.

Revision 1.171.2.3 / (download) - annotate - [select for diffs], Sun Aug 2 07:33:38 2020 UTC (2 years, 6 months ago) by martin
Branch: netbsd-9
CVS Tags: netbsd-9-3-RELEASE, netbsd-9-2-RELEASE, netbsd-9-1-RELEASE
Changes since 1.171.2.2: +13 -12 lines
Diff to previous 1.171.2.2 (colored) to branchpoint 1.171 (colored) next main 1.172 (colored)

Apply patch, requested by msaitoh in ticket #1031:

	sys/arch/x86/x86/cpu.c                  patch

Fix a panic on a CPU which has no rdtsc instruction. This bug was
added in ticket #1015.

Revision 1.196 / (download) - annotate - [select for diffs], Tue Jul 28 14:49:55 2020 UTC (2 years, 6 months ago) by fcambus
Branch: MAIN
Changes since 1.195: +5 -5 lines
Diff to previous 1.195 (colored)

Use CPU_IS_PRIMARY macro in cpu_stop(), cpu_resume(), and cpu_get_tsc_freq()
on x86.

OK kamil@

Revision 1.171.2.2 / (download) - annotate - [select for diffs], Wed Jul 15 17:25:08 2020 UTC (2 years, 6 months ago) by martin
Branch: netbsd-9
Changes since 1.171.2.1: +12 -4 lines
Diff to previous 1.171.2.1 (colored) to branchpoint 1.171 (colored)

Pull up the following, requested by msaitoh in ticket #1015

	sys/arch/x86/conf/files.x86			1.108 (via patch)
	sys/arch/x86/include/apicvar.h			1.7 (via patch)
	sys/arch/x86/include/cpu.h			1.121 (via patch)
	sys/arch/x86/x86/cpu.c				1.185 (via patch)
	sys/arch/x86/x86/hyperv.c			1.7 (via patch)
	sys/arch/x86/x86/tsc.c				1.41 (via patch)
	sys/arch/xen/conf/files.xen			1.181 (via patch)

Get TSC frequency from CPUID 0x15 and/or x16 if it's available.
This change fixes a problem that newer Intel processors' timer
counts very slowly.

Revision 1.195 / (download) - annotate - [select for diffs], Tue Jul 14 00:45:53 2020 UTC (2 years, 6 months ago) by yamaguchi
Branch: MAIN
Changes since 1.194: +4 -3 lines
Diff to previous 1.194 (colored)

Introduce per-cpu IDTs

This is realized by following modifications:
- Add IDT pages and its allocation maps for each cpu in "struct cpu_info"
- Load per-cpu IDTs at cpu_init_idt(struct cpu_info*)
- Copy the IDT entries for cpu0 to other CPUs at attach
   - These are, for example, exceptions, db, system calls, etc.

And, added a kernel option named PCPU_IDT to enable the feature.

Revision 1.194 / (download) - annotate - [select for diffs], Mon Jun 15 09:09:24 2020 UTC (2 years, 7 months ago) by msaitoh
Branch: MAIN
Changes since 1.193: +3 -2 lines
Diff to previous 1.193 (colored)

Serialize rdtsc using with lfence, mfence or cpuid to read TSC more precisely.

 x86/x86/tsc.c rev. 1.67 reduced cache problem and got big improvement, but it
 still has room. I measured the effect of lfence, mfence, cpuid and rdtscp.
The impact to TSC skew and/or drift is:

	AMD:   mfence > rdtscp > cpuid > lfence-serialize > lfence = nomodify
	Intel: lfence > rdtscp > cpuid > nomodify

So, mfence is the best on AMD and lfence is the best on Intel. If it has no
SSE2, we can use cpuid.

NOTE:
  - An AMD's document says DE_CFG_LFENCE_SERIALIZE bit can be used for
    serializing, but it's not so good.
  - On Intel i386(not amd64), it seems the improvement is very little.
  - rdtscp instruct can be used as serializing instruction + rdtsc, but
    it's not good as [lm]fence. Both Intel and AMD's document say that
    the latency of rdtscp is bigger than rdtsc, so I suspect the difference
    of the result comes from it.

Revision 1.193 / (download) - annotate - [select for diffs], Sat Jun 13 20:01:27 2020 UTC (2 years, 7 months ago) by ad
Branch: MAIN
Changes since 1.192: +2 -5 lines
Diff to previous 1.192 (colored)

g/c vm_page_zero_enable

Revision 1.192 / (download) - annotate - [select for diffs], Thu May 21 21:12:30 2020 UTC (2 years, 8 months ago) by ad
Branch: MAIN
Changes since 1.191: +6 -16 lines
Diff to previous 1.191 (colored)

- Recalibrate the APIC timer using the TSC, once the TSC has in turn been
  recalibrated using the HPET.  This gets the clock interrupt firing more
  closely to HZ.

- Undo change with recent Xen merge and go back to starting the clocks in
  initclocks() on the boot CPU, and in cpu_hatch() on secondary CPUs.

- On reflection don't use HPET delay any more, it works very well but means
  going over the bus.  It's enough to use HPET to calibrate the TSC and
  APIC.

Tested on amd64 native, xen and xen PVH.

Revision 1.191 / (download) - annotate - [select for diffs], Tue May 12 06:32:05 2020 UTC (2 years, 8 months ago) by msaitoh
Branch: MAIN
Changes since 1.190: +19 -4 lines
Diff to previous 1.190 (colored)

Don't use TSC freq value from CPUID if calibration works.

 - When it's the first call of cpu_get_tsc_freq() the HPET is not initialized,
   so try to use CPUID to get TSC freq.
 - If it's the 2nd call, don't use CPUID. Instead, print the difference
   between the calibrated value and CPUID's value if the verbose mode is set.

Revision 1.190 / (download) - annotate - [select for diffs], Fri May 8 22:01:55 2020 UTC (2 years, 8 months ago) by ad
Branch: MAIN
Changes since 1.189: +52 -20 lines
Diff to previous 1.189 (colored)

Fix the TSC timecounter (on the systems I have access to):

- Make the early i8254-based calculation of frequency a bit more accurate.

- Keep track of how far the HPET & TSC advance between HPET attach and
  secondary CPU boot, and use to compute an accurate value before attaching
  the timecounter.  Initial idea from joerg@.

- When determining skew and drift between CPUs, make each measurement 1000
  times and pick the lowest observed value.  Increase the error threshold to
  1000 clock cycles.

- Use the frequency computed on the boot CPU for secondary CPUs too.

- Remove cpu_counter_serializing().

Revision 1.189 / (download) - annotate - [select for diffs], Sat May 2 16:44:36 2020 UTC (2 years, 9 months ago) by bouyer
Branch: MAIN
Changes since 1.188: +9 -9 lines
Diff to previous 1.188 (colored)

Introduce Xen PVH support in GENERIC.
This is compiled in with
options XENPVHVM
x86 changes:
- add Xen section and xen pvh entry points to locore.S. Set vm_guest
  to VM_GUEST_XENPVH in this entry point.
  Most of the boot procedure (especially page table setup and switch to
  paged mode) is shared with native.
- change some x86_delay() to delay_func(), which points to x86_delay() for
  native/HVM, and xen_delay() for PVH

Xen changes:
- remove Xen bits from init_x86_64_ksyms() and init386_ksyms()
  and move to xen_init_ksyms(), used for both PV and PVH
- set ISA no-legacy-devices property for PVH
- factor out code from Xen's cpu_bootconf() to xen_bootconf()
  in xen_machdep.c
- set up a specific pvh_consinit() which starts with printk()
  (which uses a simple hypercall that is available early) and switch to
  xencons when we can use pmap_kenter_pa().

Revision 1.188 / (download) - annotate - [select for diffs], Wed Apr 29 22:03:09 2020 UTC (2 years, 9 months ago) by ad
Branch: MAIN
Changes since 1.187: +15 -45 lines
Diff to previous 1.187 (colored)

Back out HPET delay & TSC changes to rule them out as the cause for recent
hangs during boot etc.

Revision 1.187 / (download) - annotate - [select for diffs], Sat Apr 25 15:26:18 2020 UTC (2 years, 9 months ago) by bouyer
Branch: MAIN
Changes since 1.186: +22 -7 lines
Diff to previous 1.186 (colored)

Merge the bouyer-xenpvh branch, bringing in Xen PV drivers support under HVM
guests in GENERIC.
Xen support can be disabled at runtime with
boot -c
disable hypervisor

Revision 1.181.4.5 / (download) - annotate - [select for diffs], Sat Apr 25 13:16:48 2020 UTC (2 years, 9 months ago) by bouyer
Branch: bouyer-xenpvh
Changes since 1.181.4.4: +53 -15 lines
Diff to previous 1.181.4.4 (colored) to branchpoint 1.181 (colored) next main 1.182 (colored)

sync with bouyer-xenpvh-base2 (HEAD)

Revision 1.186 / (download) - annotate - [select for diffs], Thu Apr 23 21:35:18 2020 UTC (2 years, 9 months ago) by ad
Branch: MAIN
CVS Tags: bouyer-xenpvh-base2
Changes since 1.185: +45 -15 lines
Diff to previous 1.185 (colored)

- Install HPET based DELAY() before going multiuser then recalibrate the TSC.
  Idea from joerg@.

- Take overhead into account when computing CPU frequency.

- Don't flush cache before computing TSC skew.

Revision 1.158.2.3 / (download) - annotate - [select for diffs], Tue Apr 21 18:42:12 2020 UTC (2 years, 9 months ago) by martin
Branch: phil-wifi
Changes since 1.158.2.2: +16 -8 lines
Diff to previous 1.158.2.2 (colored) to branchpoint 1.158 (colored) next main 1.159 (colored)

Sync with HEAD

Revision 1.185 / (download) - annotate - [select for diffs], Tue Apr 21 02:56:37 2020 UTC (2 years, 9 months ago) by msaitoh
Branch: MAIN
CVS Tags: phil-wifi-20200421
Changes since 1.184: +12 -4 lines
Diff to previous 1.184 (colored)

Get TSC frequency from CPUID 0x15 and/or x16 for newer Intel processors.

 - If the max CPUID leaf is >= 0x15, take TSC value from CPUID. Some processors
   can take TSC/core crystal clock ratio but core crystal clock frequency
   can't be taken. Intel SDM give us the values for some processors.
 - It also required to change lapic_per_second to make LAPIC timer correctly.
 - Add new file x86/x86/identcpu_subr.c to share common subroutines between
   kernel and userland. Some code in x86/x86/identcpu.c and cpuctl/arch/i386.c
   will be moved to this file in future.
 - Add comment to clarify.

Revision 1.181.4.4 / (download) - annotate - [select for diffs], Mon Apr 20 11:29:00 2020 UTC (2 years, 9 months ago) by bouyer
Branch: bouyer-xenpvh
Changes since 1.181.4.3: +8 -8 lines
Diff to previous 1.181.4.3 (colored) to branchpoint 1.181 (colored)

Sync with HEAD

Revision 1.184 / (download) - annotate - [select for diffs], Mon Apr 20 04:23:23 2020 UTC (2 years, 9 months ago) by msaitoh
Branch: MAIN
CVS Tags: bouyer-xenpvh-base1
Changes since 1.183: +8 -8 lines
Diff to previous 1.183 (colored)

 Whitespace fix. No functional change.

Revision 1.181.4.3 / (download) - annotate - [select for diffs], Sat Apr 18 15:06:18 2020 UTC (2 years, 9 months ago) by bouyer
Branch: bouyer-xenpvh
Changes since 1.181.4.2: +21 -4 lines
Diff to previous 1.181.4.2 (colored) to branchpoint 1.181 (colored)

Add PVHVM multiprocessor support:
We need the hypervisor to be set up before cpus attaches.
Move hypervisor setup to a new function xen_hvm_init(), called at the
beggining of mainbus_attach(). This function searches the cfdata[] array
to see if the hypervisor device is enabled (so you can disable PV
support with
disable hypervisor
from userconf).
For HVM, ci_cpuid doens't match the virtual CPU index needed by Xen.
Introduce ci_vcpuid to cpu_info. Introduce xen_hvm_init_cpu(), to be
called for each CPU in in its context, which initialize ci_vcpuid and
ci_vcpu, and setup the event callback.
Change Xen code to use ci_vcpuid.

Do not call lapic_calibrate_timer() for VM_GUEST_XENPVHVM, we will use
Xen timers.

Don't call lapic_initclocks() from cpu_hatch(); instead set
x86_cpu_initclock_func to lapic_initclocks() in lapic_calibrate_timer(),
and call *(x86_cpu_initclock_func)() from cpu_hatch().
Also call x86_cpu_initclock_func from cpu_attach() for the boot CPU.
As x86_cpu_initclock_func is called for all CPUs, x86_initclock_func can
be a NOP for lapic timer.

Reorganize Xen code for x86_initclock_func/x86_cpu_initclock_func.
Move x86_cpu_idle_xen() to hypervisor_machdep.c

Revision 1.181.4.2 / (download) - annotate - [select for diffs], Thu Apr 16 09:45:56 2020 UTC (2 years, 9 months ago) by bouyer
Branch: bouyer-xenpvh
Changes since 1.181.4.1: +3 -3 lines
Diff to previous 1.181.4.1 (colored) to branchpoint 1.181 (colored)

More #ifndef XEN -> #ifndef XENPV

Revision 1.158.2.2 / (download) - annotate - [select for diffs], Mon Apr 13 08:04:11 2020 UTC (2 years, 9 months ago) by martin
Branch: phil-wifi
Changes since 1.158.2.1: +56 -15 lines
Diff to previous 1.158.2.1 (colored) to branchpoint 1.158 (colored)

Mostly merge changes from HEAD upto 20200411

Revision 1.181.4.1 / (download) - annotate - [select for diffs], Fri Apr 10 14:37:54 2020 UTC (2 years, 9 months ago) by bouyer
Branch: bouyer-xenpvh
Changes since 1.181: +2 -4 lines
Diff to previous 1.181 (colored)

Skip cx8_spllower patch if we're running on any form of Xen PV,
we can't handle PV interrupts with a single atomic op here.
Enable x86_patch() for Xen too.

Revision 1.183 / (download) - annotate - [select for diffs], Fri Apr 10 14:35:26 2020 UTC (2 years, 9 months ago) by bouyer
Branch: MAIN
CVS Tags: phil-wifi-20200411
Changes since 1.182: +2 -0 lines
Diff to previous 1.182 (colored)

Revert, wrong branch

Revision 1.182 / (download) - annotate - [select for diffs], Fri Apr 10 14:34:27 2020 UTC (2 years, 9 months ago) by bouyer
Branch: MAIN
Changes since 1.181: +2 -4 lines
Diff to previous 1.181 (colored)

Skip cx8_spllower patch if we're running on any form of Xen PV,
we can't handle PV interrupts with a single atomic op here.
Enable x86_patch() for Xen too.

Revision 1.130.2.9 / (download) - annotate - [select for diffs], Tue Jan 21 16:47:24 2020 UTC (3 years ago) by martin
Branch: netbsd-8
CVS Tags: netbsd-8-2-RELEASE
Changes since 1.130.2.8: +12 -2 lines
Diff to previous 1.130.2.8 (colored) to branchpoint 1.130 (colored)

Pull up following revision(s) (requested by pgoyette in ticket #1483):

	sys/arch/x86/x86/cpu.c: revision 1.181

If "application processors" were skipped/disabled at boot time (due to
RB_MD1 being set), don't try to examine the featurebus info, since it
was never retrieved.  Addresses kern/54815

XXX pullup-9

Revision 1.171.2.1 / (download) - annotate - [select for diffs], Tue Jan 21 11:36:36 2020 UTC (3 years ago) by martin
Branch: netbsd-9
CVS Tags: netbsd-9-0-RELEASE, netbsd-9-0-RC2
Changes since 1.171: +12 -2 lines
Diff to previous 1.171 (colored)

Pull up following revision(s) (requested by pgoyette in ticket #623):

	sys/arch/x86/x86/cpu.c: revision 1.181

If "application processors" were skipped/disabled at boot time (due to
RB_MD1 being set), don't try to examine the featurebus info, since it
was never retrieved.  Addresses kern/54815

XXX pullup-9

Revision 1.179.2.1 / (download) - annotate - [select for diffs], Fri Jan 17 21:47:28 2020 UTC (3 years ago) by ad
Branch: ad-namecache
Changes since 1.179: +15 -5 lines
Diff to previous 1.179 (colored) next main 1.180 (colored)

Sync with head.

Revision 1.181 / (download) - annotate - [select for diffs], Tue Jan 14 01:41:37 2020 UTC (3 years ago) by pgoyette
Branch: MAIN
CVS Tags: phil-wifi-20200406, is-mlppp-base, is-mlppp, bouyer-xenpvh-base, ad-namecache-base3, ad-namecache-base2, ad-namecache-base1
Branch point for: bouyer-xenpvh
Changes since 1.180: +12 -2 lines
Diff to previous 1.180 (colored)

If "application processors" were skipped/disabled at boot time (due to
RB_MD1 being set), don't try to examine the featurebus info, since it
was never retrieved.  Addresses kern/54815

XXX pullup-9

Revision 1.180 / (download) - annotate - [select for diffs], Wed Jan 8 15:47:50 2020 UTC (3 years ago) by ad
Branch: MAIN
Changes since 1.179: +5 -5 lines
Diff to previous 1.179 (colored)

Make "mach cpu" in ddb show the IPL for each cpu.

Revision 1.179 / (download) - annotate - [select for diffs], Fri Dec 20 21:05:34 2019 UTC (3 years, 1 month ago) by ad
Branch: MAIN
CVS Tags: ad-namecache-base
Branch point for: ad-namecache
Changes since 1.178: +16 -2 lines
Diff to previous 1.178 (colored)

Some more CPU topology stuff:

- Use cegger@'s ACPI SRAT parsing code to figure out NUMA node ID for each
  CPU as it is attached.

- For scheduler experiments with SMT, flag CPUs with the lowest numbered SMT
  IDs as "primaries", link back to the primaries from secondaries, and build
  a circular list of CPUs in each package with identical SMT IDs.

- No need for package/core/smt/numa IDs to be anything other than a u_int.

Revision 1.178 / (download) - annotate - [select for diffs], Sat Dec 7 11:45:45 2019 UTC (3 years, 1 month ago) by nonaka
Branch: MAIN
Changes since 1.177: +12 -2 lines
Diff to previous 1.177 (colored)

Get a Hyper-V virtual processor id in cpu_hatch().

Currently, it is got in config_interrupts context.
However, since it is required when attaching a device,
it is got earlier than now.

Revision 1.177 / (download) - annotate - [select for diffs], Wed Nov 27 06:24:33 2019 UTC (3 years, 2 months ago) by maxv
Branch: MAIN
Changes since 1.176: +3 -2 lines
Diff to previous 1.176 (colored)

Add a small API for in-kernel FPU operations.

	fpu_kern_enter();
	/* do FPU stuff */
	fpu_kern_leave();

Revision 1.176 / (download) - annotate - [select for diffs], Sat Nov 23 19:40:37 2019 UTC (3 years, 2 months ago) by ad
Branch: MAIN
Changes since 1.175: +5 -4 lines
Diff to previous 1.175 (colored)

cpu_need_resched():

- Remove all code that should be MI, leaving the bare minimum under arch/.
- Make the required actions very explicit.
- Pass in LWP pointer for convenience.
- When a trap is required on another CPU, have the IPI set it locally.
- Expunge cpu_did_resched().

Revision 1.175 / (download) - annotate - [select for diffs], Fri Nov 22 23:36:25 2019 UTC (3 years, 2 months ago) by ad
Branch: MAIN
Changes since 1.174: +3 -3 lines
Diff to previous 1.174 (colored)

- On-demand zeroing pages with MOVNTI is crazy.  It empties L1/L2/L3.
- Disable zeroing in the idle loop.  That needs a cache-friendly strategy.

Result: 3 to 4% reduction in kernel build time on my test system.
Inspired by a discussion with Mateusz Guzik and David Maxwell.

Revision 1.174 / (download) - annotate - [select for diffs], Tue Nov 5 20:19:17 2019 UTC (3 years, 2 months ago) by maxv
Branch: MAIN
CVS Tags: phil-wifi-20191119
Changes since 1.173: +6 -2 lines
Diff to previous 1.173 (colored)

Add Kernel Concurrency Sanitizer (kCSan) support. This sanitizer allows us
to detect race conditions at runtime. It is a variation of TSan that is
easy to implement and more suited to kernel internals, albeit theoretically
less precise than TSan's happens-before.

We do basically two things:

 - On every KCSAN_NACCESSES (=2000) memory accesses, we create a cell
   describing the access, and delay the calling CPU (10ms).

 - On all memory accesses, we verify if the memory we're reading/writing
   is referenced in a cell already.

The combination of the two means that, if for example cpu0 does a read that
is selected and cpu1 does a write at the same address, kCSan will fire,
because cpu1's write collides with cpu0's read cell.

The coverage of the instrumentation is the same as that of kASan. Also, the
code is organized in a way similar to kASan, so it is easy to add support
for more architectures than amd64. kCSan is compatible with KCOV.

Reviewed by Kamil.

Revision 1.173 / (download) - annotate - [select for diffs], Sat Oct 12 06:31:04 2019 UTC (3 years, 3 months ago) by maxv
Branch: MAIN
Changes since 1.172: +6 -11 lines
Diff to previous 1.172 (colored)

Rewrite the FPU code on x86. This greatly simplifies the logic and removes
the dependency on IPL_HIGH. NVMM is updated accordingly. Posted on
port-amd64 a week ago.

Bump the kernel version to 9.99.16.

Revision 1.172 / (download) - annotate - [select for diffs], Fri Aug 30 07:53:47 2019 UTC (3 years, 5 months ago) by mrg
Branch: MAIN
Changes since 1.171: +9 -3 lines
Diff to previous 1.171 (colored)

avoid misalignment in 32 bit kernels and "mach cpu".

Revision 1.158.2.1 / (download) - annotate - [select for diffs], Mon Jun 10 22:06:53 2019 UTC (3 years, 7 months ago) by christos
Branch: phil-wifi
Changes since 1.158: +45 -29 lines
Diff to previous 1.158 (colored)

Sync with HEAD

Revision 1.171 / (download) - annotate - [select for diffs], Wed May 29 16:54:41 2019 UTC (3 years, 8 months ago) by maxv
Branch: MAIN
CVS Tags: phil-wifi-20190609, netbsd-9-base, netbsd-9-0-RC1
Branch point for: netbsd-9
Changes since 1.170: +8 -2 lines
Diff to previous 1.170 (colored)

Add PCID support in SVS. This avoids TLB flushes during kernel<->user
transitions, which greatly reduces the performance penalty introduced by
SVS.

We use two ASIDs, 0 (kern) and 1 (user), and use invpcid to flush pages
in both ASIDs.

The read-only machdep.svs.pcid={0,1} sysctl is added, and indicates whether
SVS+PCID is in use.

Revision 1.170 / (download) - annotate - [select for diffs], Mon May 27 18:36:37 2019 UTC (3 years, 8 months ago) by maxv
Branch: MAIN
Changes since 1.169: +2 -5 lines
Diff to previous 1.169 (colored)

Change the effect of SVS on the TLB. Keep CR4_PGE set when SVS is enabled,
but don't use PTE_G on the kernel PTEs in general.

Add PTE_G on only a few pages, that are already leaked to userland and do
not contain secrets.

This slightly improves syscall performance.

Revision 1.169 / (download) - annotate - [select for diffs], Mon May 27 17:32:36 2019 UTC (3 years, 8 months ago) by maxv
Branch: MAIN
Changes since 1.168: +4 -7 lines
Diff to previous 1.168 (colored)

Remove 'ci_svs_kpdirpa', unused. While here fix a few comments here and
there, reduces a future diff.

Revision 1.130.2.8 / (download) - annotate - [select for diffs], Sat Mar 9 17:10:19 2019 UTC (3 years, 10 months ago) by martin
Branch: netbsd-8
CVS Tags: netbsd-8-1-RELEASE, netbsd-8-1-RC1
Changes since 1.130.2.7: +8 -8 lines
Diff to previous 1.130.2.7 (colored) to branchpoint 1.130 (colored)

Pull up following revision(s) via patch (requested by nonaka in ticket #1210):

	sys/dev/hyperv/vmbusvar.h: revision 1.1
	sys/dev/hyperv/hvs.c: revision 1.1
	sys/dev/hyperv/if_hvn.c: revision 1.1
	sys/dev/hyperv/vmbusic.c: revision 1.1
	sys/arch/x86/x86/lapic.c: revision 1.69
	sys/arch/x86/isa/clock.c: revision 1.34
	sys/arch/x86/include/intrdefs.h: revision 1.22
	sys/arch/i386/conf/GENERIC: revision 1.1201
	sys/arch/x86/x86/hyperv.c: revision 1.1
	sys/arch/x86/include/cpu.h: revision 1.105
	sys/arch/x86/x86/x86_machdep.c: revision 1.124
	sys/arch/i386/conf/GENERIC: revision 1.1203
	sys/arch/amd64/amd64/genassym.cf: revision 1.74
	sys/arch/i386/conf/GENERIC: revision 1.1204
	sys/arch/amd64/conf/GENERIC: revision 1.520
	sys/arch/x86/x86/hypervreg.h: revision 1.1
	sys/arch/amd64/amd64/vector.S: revision 1.69
	sys/dev/hyperv/hvshutdown.c: revision 1.1
	sys/dev/hyperv/hvshutdown.c: revision 1.2
	sys/dev/usb/if_urndisreg.h: file removal
	sys/arch/x86/x86/cpu.c: revision 1.167
	sys/arch/x86/conf/files.x86: revision 1.107
	sys/dev/usb/if_urndis.c: revision 1.20
	sys/dev/hyperv/vmbusicreg.h: revision 1.1
	sys/dev/hyperv/hvheartbeat.c: revision 1.1
	sys/dev/hyperv/vmbusicreg.h: revision 1.2
	sys/dev/hyperv/hvheartbeat.c: revision 1.2
	sys/dev/hyperv/files.hyperv: revision 1.1
	sys/dev/ic/rndisreg.h: revision 1.1
	sys/arch/i386/i386/genassym.cf: revision 1.111
	sys/dev/ic/rndisreg.h: revision 1.2
	sys/dev/hyperv/hyperv_common.c: revision 1.1
	sys/dev/hyperv/hvtimesync.c: revision 1.1
	sys/dev/hyperv/hypervreg.h: revision 1.1
	sys/dev/hyperv/hvtimesync.c: revision 1.2
	sys/dev/hyperv/vmbusicvar.h: revision 1.1
	sys/dev/hyperv/if_hvnreg.h: revision 1.1
	sys/arch/x86/x86/lapic.c: revision 1.70
	sys/arch/amd64/amd64/vector.S: revision 1.70
	sys/dev/ic/ndisreg.h: revision 1.1
	sys/arch/amd64/conf/GENERIC: revision 1.516
	sys/dev/hyperv/hypervvar.h: revision 1.1
	sys/arch/amd64/conf/GENERIC: revision 1.518
	sys/arch/amd64/conf/GENERIC: revision 1.519
	sys/arch/i386/conf/files.i386: revision 1.400
	sys/dev/acpi/vmbus_acpi.c: revision 1.1
	sys/dev/hyperv/vmbus.c: revision 1.1
	sys/dev/hyperv/vmbus.c: revision 1.2
	sys/arch/x86/x86/intr.c: revision 1.144
	sys/arch/i386/i386/vector.S: revision 1.83
	sys/arch/amd64/conf/files.amd64: revision 1.112

separate RNDIS definitions from urndis(4) for use with Hyper-V NetVSC.

 -

Added Microsoft Hyper-V support.  It ported from OpenBSD and FreeBSD.
graphical console is not work on Gen.2 VM yet. To use the serial console,
enter "consdev com,0x3f8,115200" on efiboot.

 -

Add __diagused.

 -

PR/53984: Partial revert of modify lapic_calibrate_timer() in lapic.c r1.69.

 -

Update Hyper-V related drivers description.

 -

Remove unused definition.

 -

Rename the MODULE_*_HOOK() macros to MODULE_HOOK_*() as briefly
discussed on irc.
NFCI intended.

 -

commented out hvkvp entry.

 -

fix typo. pointed out by pgoyette@n.o.

 -

Use IDTVEC instead of NENTRY for handle_hyperv_hypercall.

 -

Rename the MODULE_*_HOOK() macros to MODULE_HOOK_*() as briefly
discussed on irc.

Revision 1.168 / (download) - annotate - [select for diffs], Sat Mar 9 08:42:26 2019 UTC (3 years, 10 months ago) by maxv
Branch: MAIN
CVS Tags: isaki-audio2-base, isaki-audio2
Changes since 1.167: +4 -4 lines
Diff to previous 1.167 (colored)

Start replacing the x86 PTE bits.

Revision 1.167 / (download) - annotate - [select for diffs], Fri Feb 15 08:54:01 2019 UTC (3 years, 11 months ago) by nonaka
Branch: MAIN
Changes since 1.166: +8 -8 lines
Diff to previous 1.166 (colored)

Added Microsoft Hyper-V support.  It ported from OpenBSD and FreeBSD.

graphical console is not work on Gen.2 VM yet. To use the serial console,
enter "consdev com,0x3f8,115200" on efiboot.

Revision 1.166 / (download) - annotate - [select for diffs], Thu Feb 14 08:18:25 2019 UTC (3 years, 11 months ago) by cherry
Branch: MAIN
Changes since 1.165: +4 -2 lines
Diff to previous 1.165 (colored)

Welcome XENPVHVM mode.

It is UP only, has xbd(4) and xennet(4) as PV drivers.

The console is com0 at isa and the native portion is very
rudimentary AT architecture, so is probably suboptimal to
run without PV support.

Revision 1.165 / (download) - annotate - [select for diffs], Thu Feb 14 07:12:40 2019 UTC (3 years, 11 months ago) by cherry
Branch: MAIN
Changes since 1.164: +9 -6 lines
Diff to previous 1.164 (colored)

Fix NLAPIC, NISA and NIOAPIC related conditional compile errors.

This will allow us to now compile an amd64 kernel without PCI.

No functional changes.

Revision 1.149.2.9 / (download) - annotate - [select for diffs], Wed Dec 26 14:01:45 2018 UTC (4 years, 1 month ago) by pgoyette
Branch: pgoyette-compat
CVS Tags: pgoyette-compat-merge-20190127
Changes since 1.149.2.8: +5 -5 lines
Diff to previous 1.149.2.8 (colored) to branchpoint 1.149 (colored) next main 1.150 (colored)

Sync with HEAD, resolve a few conflicts

Revision 1.164 / (download) - annotate - [select for diffs], Tue Dec 4 19:27:22 2018 UTC (4 years, 1 month ago) by cherry
Branch: MAIN
CVS Tags: pgoyette-compat-20190127, pgoyette-compat-20190118, pgoyette-compat-1226
Changes since 1.163: +4 -4 lines
Diff to previous 1.163 (colored)

Hypothetically speaking, if one were to want to compile a

'no options MULTIPROCESSOR'

kernel, these files may trip up the build.

Fix them by moving around the #defines as originally intended.

No Functional Changes.

Revision 1.163 / (download) - annotate - [select for diffs], Tue Dec 4 19:22:42 2018 UTC (4 years, 1 month ago) by cherry
Branch: MAIN
Changes since 1.162: +3 -3 lines
Diff to previous 1.162 (colored)

Stop panic()ing on a UP system.

The reason for the panic is that the cpu_attach() doesn't run to
completion because it thinks it's run past maxcpus (which in the case
of UP), is 1.

This is because on x86 at least, mi_cpu_attach() is called *before*
configure() (and thus the cpu_match()/cpu_attach() pair). Thus ncpu
has already been incremented by the time MD cpu_attach() is called.

Fix this.

Revision 1.149.2.8 / (download) - annotate - [select for diffs], Mon Nov 26 01:52:28 2018 UTC (4 years, 2 months ago) by pgoyette
Branch: pgoyette-compat
Changes since 1.149.2.7: +11 -2 lines
Diff to previous 1.149.2.7 (colored) to branchpoint 1.149 (colored)

Sync with HEAD, resolve a couple of conflicts

Revision 1.162 / (download) - annotate - [select for diffs], Mon Nov 12 18:10:36 2018 UTC (4 years, 2 months ago) by maxv
Branch: MAIN
CVS Tags: pgoyette-compat-1126
Changes since 1.161: +11 -2 lines
Diff to previous 1.161 (colored)

Add a comment explaining an important rule. Just to better highlight that
this rule is actually not respected.

Revision 1.149.2.7 / (download) - annotate - [select for diffs], Thu Sep 6 06:55:44 2018 UTC (4 years, 4 months ago) by pgoyette
Branch: pgoyette-compat
Changes since 1.149.2.6: +3 -3 lines
Diff to previous 1.149.2.6 (colored) to branchpoint 1.149 (colored)

Sync with HEAD

Resolve a couple of conflicts (result of the uimin/uimax changes)

Revision 1.161 / (download) - annotate - [select for diffs], Mon Sep 3 16:29:29 2018 UTC (4 years, 5 months ago) by riastradh
Branch: MAIN
CVS Tags: pgoyette-compat-1020, pgoyette-compat-0930, pgoyette-compat-0906
Changes since 1.160: +3 -3 lines
Diff to previous 1.160 (colored)

Rename min/max -> uimin/uimax for better honesty.

These functions are defined on unsigned int.  The generic name
min/max should not silently truncate to 32 bits on 64-bit systems.
This is purely a name change -- no functional change intended.

HOWEVER!  Some subsystems have

	#define min(a, b)	((a) < (b) ? (a) : (b))
	#define max(a, b)	((a) > (b) ? (a) : (b))

even though our standard name for that is MIN/MAX.  Although these
may invite multiple evaluation bugs, these do _not_ cause integer
truncation.

To avoid `fixing' these cases, I first changed the name in libkern,
and then compile-tested every file where min/max occurred in order to
confirm that it failed -- and thus confirm that nothing shadowed
min/max -- before changing it.

I have left a handful of bootloaders that are too annoying to
compile-test, and some dead code:

cobalt ews4800mips hp300 hppa ia64 luna68k vax
acorn32/if_ie.c (not included in any kernels)
macppc/if_gm.c (superseded by gem(4))

It should be easy to fix the fallout once identified -- this way of
doing things fails safe, and the goal here, after all, is to _avoid_
silent integer truncations, not introduce them.

Maybe one day we can reintroduce min/max as type-generic things that
never silently truncate.  But we should avoid doing that for a while,
so that existing code has a chance to be detected by the compiler for
conversion to uimin/uimax without changing the semantics until we can
properly audit it all.  (Who knows, maybe in some cases integer
truncation is actually intended!)

Revision 1.130.2.7 / (download) - annotate - [select for diffs], Tue Aug 7 13:28:59 2018 UTC (4 years, 5 months ago) by martin
Branch: netbsd-8
Changes since 1.130.2.6: +5 -3 lines
Diff to previous 1.130.2.6 (colored) to branchpoint 1.130 (colored)

Pull up following revision(s) (requested by maxv in ticket #960):

	sys/arch/x86/x86/cpu.c: revision 1.159

Oh. Don't call svs_pdir_switch if SVS is disabled, that's not needed.

I was playing around with PMCs, and was wondering why some cache misses
were occurring in svs_pdir_switch while I had SVS disabled.

Revision 1.149.2.6 / (download) - annotate - [select for diffs], Sat Jul 28 04:37:42 2018 UTC (4 years, 6 months ago) by pgoyette
Branch: pgoyette-compat
Changes since 1.149.2.5: +7 -5 lines
Diff to previous 1.149.2.5 (colored) to branchpoint 1.149 (colored)

Sync with HEAD

Revision 1.160 / (download) - annotate - [select for diffs], Thu Jul 26 08:22:19 2018 UTC (4 years, 6 months ago) by maxv
Branch: MAIN
CVS Tags: pgoyette-compat-0728
Changes since 1.159: +4 -4 lines
Diff to previous 1.159 (colored)

Remove useless/outdated comments. No functional change.

Revision 1.159 / (download) - annotate - [select for diffs], Thu Jul 12 18:39:09 2018 UTC (4 years, 6 months ago) by maxv
Branch: MAIN
Changes since 1.158: +5 -3 lines
Diff to previous 1.158 (colored)

Oh. Don't call svs_pdir_switch if SVS is disabled, that's not needed.

I was playing around with PMCs, and was wondering why some cache misses
were occurring in svs_pdir_switch while I had SVS disabled.

Revision 1.149.2.5 / (download) - annotate - [select for diffs], Mon Jun 25 07:25:47 2018 UTC (4 years, 7 months ago) by pgoyette
Branch: pgoyette-compat
Changes since 1.149.2.4: +2 -2 lines
Diff to previous 1.149.2.4 (colored) to branchpoint 1.149 (colored)

Sync with HEAD

Revision 1.158 / (download) - annotate - [select for diffs], Fri Jun 22 06:22:37 2018 UTC (4 years, 7 months ago) by maxv
Branch: MAIN
CVS Tags: phil-wifi-base, pgoyette-compat-0625
Branch point for: phil-wifi
Changes since 1.157: +3 -3 lines
Diff to previous 1.157 (colored)

Revert jdolecek's changes related to FXSAVE. They just didn't make any
sense and were trying to hide a real bug, which is, that there is for some
reason a wrong stack alignment that causes FXSAVE to fault in
fpuinit_mxcsr_mask. As seen in current-users@ yesterday, rdi % 16 = 8. And
as seen several months ago, as well.

The rest of the changes in XSAVE are wrong too, but I'll let him fix these
ones.

Revision 1.157 / (download) - annotate - [select for diffs], Wed Jun 20 20:43:21 2018 UTC (4 years, 7 months ago) by jdolecek
Branch: MAIN
Changes since 1.156: +3 -3 lines
Diff to previous 1.156 (colored)

as a stop-gap, make fpuinit_mxcsr_mask() for native independant of
XSAVE as it should be, only xen case checks the flag now; need to
investigate further why exactly the fault happens for the xen
no-xsave case

pointed out by maxv

Revision 1.156 / (download) - annotate - [select for diffs], Tue Jun 19 19:50:19 2018 UTC (4 years, 7 months ago) by jdolecek
Branch: MAIN
Changes since 1.155: +3 -3 lines
Diff to previous 1.155 (colored)

fix FPU initialization on Xen to allow e.g. AVX when supported by hardware;
only use XSAVE when the the CPUID OSXSAVE bit is set, as this seems to be
reliable indication

tested with Xen 4.2.6 DOM0/DOMU on Intel CPU, without and with no-xsave flag,
so should work also on those AMD CPUs, which have XSAVE disabled by default;
also tested with Xen DOM0 4.8.3

fixes PR kern/50332 by Torbjorn Granlund; sorry it took three years to address

XXX pullup netbsd-8

Revision 1.130.2.6 / (download) - annotate - [select for diffs], Sat Apr 14 10:11:49 2018 UTC (4 years, 9 months ago) by martin
Branch: netbsd-8
CVS Tags: netbsd-8-0-RELEASE, netbsd-8-0-RC2, netbsd-8-0-RC1
Changes since 1.130.2.5: +9 -3 lines
Diff to previous 1.130.2.5 (colored) to branchpoint 1.130 (colored)

Pullup the following revisions via patch, requested by maxv in ticket #748:

sys/arch/amd64/amd64/copy.S		1.29 (adapted, via patch)
sys/arch/amd64/amd64/amd64_trap.S	1.16,1.19 (partial) (via patch)
sys/arch/amd64/amd64/trap.c		1.102,1.106 (partial),1.110 (via patch)
sys/arch/amd64/include/frameasm.h	1.22,1.24 (via patch)
sys/arch/x86/x86/cpu.c			1.137 (via patch)
sys/arch/x86/x86/patch.c		1.23,1.26 (partial) (via patch)

Backport of SMAP support.

Revision 1.149.2.4 / (download) - annotate - [select for diffs], Sat Apr 7 04:12:14 2018 UTC (4 years, 9 months ago) by pgoyette
Branch: pgoyette-compat
Changes since 1.149.2.3: +3 -2 lines
Diff to previous 1.149.2.3 (colored) to branchpoint 1.149 (colored)

Sync with HEAD.  77 conflicts resolved - all of them $NetBSD$

Revision 1.155 / (download) - annotate - [select for diffs], Thu Apr 5 08:43:07 2018 UTC (4 years, 10 months ago) by maxv
Branch: MAIN
CVS Tags: pgoyette-compat-0521, pgoyette-compat-0502, pgoyette-compat-0422, pgoyette-compat-0415, pgoyette-compat-0407
Changes since 1.154: +2 -4 lines
Diff to previous 1.154 (colored)

Call cpu_speculation_init on i386 too. We don't have IBRS for i386, but
we do have the AMD DIS_IND method.

Revision 1.154 / (download) - annotate - [select for diffs], Wed Apr 4 12:59:49 2018 UTC (4 years, 10 months ago) by maxv
Branch: MAIN
Changes since 1.153: +5 -2 lines
Diff to previous 1.153 (colored)

Enable the SpectreV2 mitigation by default at boot time.

Revision 1.149.2.3 / (download) - annotate - [select for diffs], Fri Mar 30 06:20:13 2018 UTC (4 years, 10 months ago) by pgoyette
Branch: pgoyette-compat
Changes since 1.149.2.2: +2 -177 lines
Diff to previous 1.149.2.2 (colored) to branchpoint 1.149 (colored)

Resolve conflicts between branch and HEAD

Revision 1.153 / (download) - annotate - [select for diffs], Wed Mar 28 14:56:59 2018 UTC (4 years, 10 months ago) by maxv
Branch: MAIN
CVS Tags: pgoyette-compat-0330
Changes since 1.152: +2 -177 lines
Diff to previous 1.152 (colored)

Move the SpectreV2 mitigation code into a dedicated spectre.c file. The
content of the file is taken from the end of cpu.c, and is copied as-is.

Revision 1.130.2.5 / (download) - annotate - [select for diffs], Thu Mar 22 16:59:04 2018 UTC (4 years, 10 months ago) by martin
Branch: netbsd-8
Changes since 1.130.2.4: +20 -3 lines
Diff to previous 1.130.2.4 (colored) to branchpoint 1.130 (colored)

Pull up the following revisions, requested by maxv in ticket #652:

	sys/arch/amd64/amd64/amd64_trap.S	upto 1.39 (partial, patch)
	sys/arch/amd64/amd64/db_machdep.c	1.6 (patch)
	sys/arch/amd64/amd64/genassym.cf	1.65,1.66,1.67 (patch)
	sys/arch/amd64/amd64/locore.S		upto 1.159 (partial, patch)
	sys/arch/amd64/amd64/machdep.c		1.299-1.302 (patch)
	sys/arch/amd64/amd64/trap.c		upto 1.113 (partial, patch)
	sys/arch/amd64/amd64/amd64/vector.S	upto 1.61 (partial, patch)
	sys/arch/amd64/conf/GENERIC		1.477,1.478 (patch)
	sys/arch/amd64/conf/kern.ldscript	1.26 (patch)
	sys/arch/amd64/include/frameasm.h	upto 1.37 (partial, patch)
	sys/arch/amd64/include/param.h		1.25 (patch)
	sys/arch/amd64/include/pmap.h		1.41,1.43,1.44 (patch)
	sys/arch/x86/conf/files.x86		1.91,1.93 (patch)
	sys/arch/x86/include/cpu.h		1.88,1.89 (patch)
	sys/arch/x86/include/pmap.h		1.75 (patch)
	sys/arch/x86/x86/cpu.c			1.144,1.146,1.148,1.149 (patch)
	sys/arch/x86/x86/pmap.c			upto 1.289 (partial, patch)
	sys/arch/x86/x86/vm_machdep.c		1.31,1.32 (patch)
	sys/arch/x86/x86/x86_machdep.c		1.104,1.106,1.108 (patch)
	sys/arch/x86/x86/svs.c			1.1-1.14
	sys/arch/xen/conf/files.compat		1.30 (patch)

Backport SVS. Not enabled yet.

Revision 1.149.2.2 / (download) - annotate - [select for diffs], Thu Mar 22 01:44:47 2018 UTC (4 years, 10 months ago) by pgoyette
Branch: pgoyette-compat
Changes since 1.149.2.1: +9 -6 lines
Diff to previous 1.149.2.1 (colored) to branchpoint 1.149 (colored)

Synch with HEAD, resolve conflicts

Revision 1.111.2.1.2.2 / (download) - annotate - [select for diffs], Mon Mar 19 16:54:58 2018 UTC (4 years, 10 months ago) by martin
Branch: netbsd-7-0
Changes since 1.111.2.1.2.1: +12 -10 lines
Diff to previous 1.111.2.1.2.1 (colored) to branchpoint 1.111.2.1 (colored) next main 1.111.2.2 (colored)

Pull up following revision(s) (requested by msaitoh in ticket #1118):
	sys/arch/x86/include/cpuvar.h: revision 1.47
	sys/arch/x86/x86/cpu.c: revision 1.117
	sys/arch/x86/x86/identcpu.c: revision 1.49
	sys/arch/x86/include/cpu.h: revision 1.67

Retrieve cpuid7 (Structured Extended Features) into ci_feat_val.

Revision 1.130.2.4 / (download) - annotate - [select for diffs], Fri Mar 16 13:17:56 2018 UTC (4 years, 10 months ago) by martin
Branch: netbsd-8
Changes since 1.130.2.3: +35 -2 lines
Diff to previous 1.130.2.3 (colored) to branchpoint 1.130 (colored)

Pull up the following revisions (via patch), requested by maxv in #635:

	sys/arch/amd64/amd64/gdt.c		1.39-1.45 (patch)
	sys/arch/amd64/amd64/amd64/machdep.c	1.284,1.287,1.288 (patch)
	sys/arch/amd64/amd64/include/param.h	1.23 (patch)
	sys/arch/amd64/include/types.h		1.53 (patch)
	sys/arch/x86/include/cpu.h		1.87 (patch)
	sys/arch/x86/include/pmap.h		1.73,1.74 (patch)
	sys/arch/x86/x86/cpu.c			1.142 (patch)
	sys/arch/x86/x86/intr.c			1.117 (partial),1.120 (patch)
	sys/arch/x86/x86/pmap.c			1.276 (patch)

Initialize ist0 in cpu_init_tss.
Backport __HAVE_PCPU_AREA.

Revision 1.152 / (download) - annotate - [select for diffs], Thu Mar 15 09:17:31 2018 UTC (4 years, 10 months ago) by maxv
Branch: MAIN
CVS Tags: pgoyette-compat-0322
Changes since 1.151: +9 -6 lines
Diff to previous 1.151 (colored)

Remove #ifdef XEN (Xen has its own cpu.c), and add a comment.

Revision 1.149.2.1 / (download) - annotate - [select for diffs], Thu Mar 15 09:12:04 2018 UTC (4 years, 10 months ago) by pgoyette
Branch: pgoyette-compat
Changes since 1.149: +196 -12 lines
Diff to previous 1.149 (colored)

Synch with HEAD

Revision 1.151 / (download) - annotate - [select for diffs], Wed Mar 14 17:40:41 2018 UTC (4 years, 10 months ago) by maxv
Branch: MAIN
CVS Tags: pgoyette-compat-0315
Changes since 1.150: +174 -2 lines
Diff to previous 1.150 (colored)

Spectre V2 mitigation for certain families of AMD CPUs.

A new sysctl is added, machdep.spectreV2.mitigated, that controls whether
Spectre V2 is mitigated. For now it defaults to "false".

The code is written in such a way that there can be several methods. For
now only one method is supported, on AMD Families 10h, 12h and 16h, where
an MSR is available to disable branch prediction entirely.

Compile-tested on Intel, AMD will be tested soon.

Revision 1.150 / (download) - annotate - [select for diffs], Sun Mar 11 13:38:02 2018 UTC (4 years, 10 months ago) by maxv
Branch: MAIN
Changes since 1.149: +24 -12 lines
Diff to previous 1.149 (colored)

Explain the TSC drift thing.

Revision 1.130.2.3 / (download) - annotate - [select for diffs], Thu Mar 8 11:33:15 2018 UTC (4 years, 10 months ago) by martin
Branch: netbsd-8
Changes since 1.130.2.2: +12 -87 lines
Diff to previous 1.130.2.2 (colored) to branchpoint 1.130 (colored)

Pull up following revision(s) (requested by maxv in ticket #611):
	sys/arch/x86/x86/cpu.c: revision 1.134 (patch)
	sys/arch/x86/include/cpu.h: revision 1.78 (patch)
	sys/arch/i386/i386/machdep.c: revision 1.792 (patch)

style, and move some i386-specific code into i386/

Revision 1.130.2.2 / (download) - annotate - [select for diffs], Wed Mar 7 14:50:57 2018 UTC (4 years, 10 months ago) by martin
Branch: netbsd-8
Changes since 1.130.2.1: +3 -3 lines
Diff to previous 1.130.2.1 (colored) to branchpoint 1.130 (colored)

Pull up the following revisions (via patch), requested by maxv in ticket #610:

sys/arch/amd64/amd64/amd64_trap.S	1.8,1.10,1.12 (partial),1.13-1.15,
					1.19 (partial),1.20,1.21,1.22,1.24
					(via patch)
sys/arch/amd64/amd64/locore.S		1.129 (partial),1.132 (via patch)
sys/arch/amd64/amd64/trap.c		1.97 (partial),1.111 (via patch)
sys/arch/amd64/amd64/vector.S		1.54,1.55 (via patch)
sys/arch/amd64/include/frameasm.h	1.21,1.23 (via patch)
sys/arch/x86/x86/cpu.c			1.138 (via patch)
sys/arch/xen/conf/Makefile.xen		1.45 (via patch)

Rename and reorder several things in amd64_trap.S.
Compile amd64_trap.S as a file.
Introduce nmitrap and doubletrap.
Have the CPU clear PSL_D automatically in the syscall entry point.

Revision 1.149 / (download) - annotate - [select for diffs], Thu Feb 22 13:27:18 2018 UTC (4 years, 11 months ago) by maxv
Branch: MAIN
CVS Tags: pgoyette-compat-base
Branch point for: pgoyette-compat
Changes since 1.148: +5 -2 lines
Diff to previous 1.148 (colored)

Remove svs_pgg_update(). Instead of manually changing PG_G on each page,
we can disable the global-paging mechanism in %cr4 with CR4_PGE. Do that.

In addition, install CR4_PGE when SVS is disabled manually (via the
sysctl).

Now, doing "sysctl -w machdep.svs_enabled=0" restores the performance
completely, exactly as if SVS hadn't been enabled in the first place.

Revision 1.148 / (download) - annotate - [select for diffs], Thu Feb 22 08:56:52 2018 UTC (4 years, 11 months ago) by maxv
Branch: MAIN
Changes since 1.147: +8 -3 lines
Diff to previous 1.147 (colored)

Add a dynamic detection for SVS.

The SVS_* macros are now compiled as skip-noopt. When the system boots, if
the cpu is from Intel, they are hotpatched to their real content.
Typically:

		jmp	1f
		int3
		int3
		int3
		... int3 ...
	1:

gets hotpatched to:

		movq	SVS_UTLS+UTLS_KPDIRPA,%rax
		movq	%rax,%cr3
		movq	CPUVAR(KRSP0),%rsp

These two chunks of code being of the exact same size. We put int3 (0xCC)
to make sure we never execute there.

In the non-SVS (ie non-Intel) case, all it costs is one jump. Given that
the SVS_* macros are small, this jump will likely leave us in the same
icache line, so it's pretty fast.

The syscall entry point is special, because there we use a scratch uint64_t
not in curcpu but in the UTLS page, and it's difficult to hotpatch this
properly. So instead of hotpatching we declare the entry point as an ASM
macro, and define two functions: syscall and syscall_svs, the latter being
the one used in the SVS case.

While here 'syscall' is optimized not to contain an SVS_ENTER - this way
we don't even need to do a jump on the non-SVS case.

When adding pages in the user page tables, make sure we don't have PG_G,
now that it's dynamic.

A read-only sysctl is added, machdep.svs_enabled, that tells whether the
kernel uses SVS or not.

More changes to come, svs_init() is not very clean.

Revision 1.147 / (download) - annotate - [select for diffs], Sat Jan 27 09:33:25 2018 UTC (5 years ago) by maxv
Branch: MAIN
Changes since 1.146: +2 -4 lines
Diff to previous 1.146 (colored)

Add SMAP support for i386.

Revision 1.146 / (download) - annotate - [select for diffs], Thu Jan 11 13:35:15 2018 UTC (5 years ago) by maxv
Branch: MAIN
Changes since 1.145: +6 -6 lines
Diff to previous 1.145 (colored)

Introduce a new svs_page_add function, which can be used to map in the user
space a VA from the kernel space.

Use it to replace the PDIR_SLOT_PCPU slot: at boot time each CPU creates
its own slot which maps only its own pcpu_entry plus the common area (IDT+
LDT).

This way, the pcpu areas of the remote CPUs are not mapped in userland.

Revision 1.145 / (download) - annotate - [select for diffs], Thu Jan 11 09:18:16 2018 UTC (5 years ago) by msaitoh
Branch: MAIN
Changes since 1.144: +15 -2 lines
Diff to previous 1.144 (colored)

 Changing CR4 register may change cpuid values. For example, setting
CR4_OSXSAVE sets CPUID2_OSXSAVE. The CPUID2_OSXSAVE is in ci_feat_val[1],
so update it after changing CR4.

Revision 1.144 / (download) - annotate - [select for diffs], Sun Jan 7 16:10:16 2018 UTC (5 years ago) by maxv
Branch: MAIN
Changes since 1.143: +11 -2 lines
Diff to previous 1.143 (colored)

Add a new option, SVS (for Separate Virtual Space), that unmaps kernel
pages when running in userland. For now, only the PTE area is unmapped.

Sent on tech-kern@.

Revision 1.143 / (download) - annotate - [select for diffs], Sun Jan 7 10:16:13 2018 UTC (5 years ago) by maxv
Branch: MAIN
Changes since 1.142: +5 -5 lines
Diff to previous 1.142 (colored)

Use uvm_km_alloc instead of kmem_zalloc.

Revision 1.142 / (download) - annotate - [select for diffs], Fri Jan 5 08:04:21 2018 UTC (5 years ago) by maxv
Branch: MAIN
Changes since 1.141: +35 -2 lines
Diff to previous 1.141 (colored)

Add a __HAVE_PCPU_AREA option, enabled by default on native amd64 but not
Xen.

With this option, the CPU structures that must always be present in the
CPU's page tables are moved on L4 slot 384, which means address
0xffffc00000000000.

A new pcpu_area structure is defined. It contains shared structures (IDT,
LDT), and then an array of pcpu_entry structures, indexed by cpu_index(ci).
Theoretically the LDT should be in the array, but this will be done later.

During the boot procedure, cpu0 calls pmap_init_pcpu, which creates a
page tree that is able to map the pcpu_area structure entirely. cpu0 then
immediately maps the shared structures. Later, every CPU goes through
cpu_pcpuarea_init, which allocates physical pages and kenters the relevant
pcpu_entry to them. Finally, each pointer is replaced to point to pcpuarea.

The point of this change is to make sure that the structures that must
always be present in the page tables have their own L4 slot. Until now
their L4 slot was that of pmap_kernel, and making a distinction between
what must be mapped and what does not need to be was complicated.

Even in the non-speculative-bug case this change makes some sense: there
are several x86 instructions that leak the addresses of the CPU structures,
and putting these structures inside pmap_kernel actually offered a way to
compute the address of the kernel heap - which would have made ASLR on it
plainly useless, had we implemented that.

Note that, for now, pcpuarea does not contain rsp0.

Unfortunately this change adds many #ifdefs, and makes the code harder to
understand. There is also some duplication, but that will be solved later.

Revision 1.100.2.3 / (download) - annotate - [select for diffs], Sun Dec 3 11:36:50 2017 UTC (5 years, 2 months ago) by jdolecek
Branch: tls-maxphys
Changes since 1.100.2.2: +85 -138 lines
Diff to previous 1.100.2.2 (colored) to branchpoint 1.100 (colored) next main 1.101 (colored)

update from HEAD

Revision 1.141 / (download) - annotate - [select for diffs], Sat Nov 11 11:00:46 2017 UTC (5 years, 2 months ago) by maxv
Branch: MAIN
CVS Tags: tls-maxphys-base-20171202
Changes since 1.140: +5 -0 lines
Diff to previous 1.140 (colored)

Recommit

http://mail-index.netbsd.org/source-changes/2017/11/08/msg089525.html

but use __INITIAL_MXCSR_MASK__ on Xen until someone figures out what's
wrong with the Xen fpu.

Revision 1.140 / (download) - annotate - [select for diffs], Sat Nov 11 09:10:19 2017 UTC (5 years, 2 months ago) by bouyer
Branch: MAIN
Changes since 1.139: +0 -5 lines
Diff to previous 1.139 (colored)

Revert http://mail-index.netbsd.org/source-changes/2017/11/08/msg089525.html,
it breaks Xen:
http://www-soc.lip6.fr/~bouyer/NetBSD-tests/xen/HEAD/amd64/201711082340Z_anita.txt

Revision 1.139 / (download) - annotate - [select for diffs], Wed Nov 8 17:52:22 2017 UTC (5 years, 2 months ago) by maxv
Branch: MAIN
Changes since 1.138: +7 -2 lines
Diff to previous 1.138 (colored)

Call fpuinit_mxcsr_mask in cpu_init, after cr4 is initialized, but before
touching xcr0. Then use clts/stts instead of modifying cr0, and enable the
mxcsr_mask detection on Xen.

Revision 1.138 / (download) - annotate - [select for diffs], Tue Oct 17 07:33:44 2017 UTC (5 years, 3 months ago) by maxv
Branch: MAIN
Changes since 1.137: +1 -1 lines
Diff to previous 1.137 (colored)

Have the cpu clear PSL_D automatically when entering the kernel via a
syscall. Then, don't clear PSL_D and PSL_AC in the syscall entry point,
they are now both cleared by the cpu (faster). However they still need to
be manually cleared in the interrupt/trap entry points.

Revision 1.137 / (download) - annotate - [select for diffs], Tue Oct 17 06:58:15 2017 UTC (5 years, 3 months ago) by maxv
Branch: MAIN
Changes since 1.136: +9 -3 lines
Diff to previous 1.136 (colored)

Add support for SMAP on amd64.

PSL_AC is cleared from %rflags in each kernel entry point. In the copy
sections, a copy window is opened and the kernel can touch userland
pages. This window is closed when the kernel is done, either at the end
of the copy sections or in the fault-recover functions.

This implementation is not optimized yet, due to the fact that INTRENTRY
is a macro, and we can't hotpatch macros.

Sent on tech-kern@ a month or two ago, tested on a Kabylake.

Revision 1.136 / (download) - annotate - [select for diffs], Thu Sep 28 17:48:20 2017 UTC (5 years, 4 months ago) by maxv
Branch: MAIN
Changes since 1.135: +25 -11 lines
Diff to previous 1.135 (colored)

Pack the useful variables at the end of the trampoline page; eliminates
a hard-coded dependency on KERNBASE. Note that I cannot test this change
on i386 right now, but it seems fine enough.

Revision 1.135 / (download) - annotate - [select for diffs], Sun Sep 17 09:04:51 2017 UTC (5 years, 4 months ago) by maxv
Branch: MAIN
Changes since 1.134: +2 -15 lines
Diff to previous 1.134 (colored)

Remove TRAPLOG from i386. Nowadays there are better instrumentation tools,
in both software and hardware.

Revision 1.111.4.7 / (download) - annotate - [select for diffs], Mon Aug 28 17:51:56 2017 UTC (5 years, 5 months ago) by skrll
Branch: nick-nhusb
Changes since 1.111.4.6: +18 -21 lines
Diff to previous 1.111.4.6 (colored) to branchpoint 1.111 (colored) next main 1.112 (colored)

Sync with HEAD

Revision 1.134 / (download) - annotate - [select for diffs], Sun Aug 27 09:32:12 2017 UTC (5 years, 5 months ago) by maxv
Branch: MAIN
Changes since 1.133: +11 -90 lines
Diff to previous 1.133 (colored)

style, and move some i386-specific code into i386/

Revision 1.133 / (download) - annotate - [select for diffs], Sun Aug 27 08:38:32 2017 UTC (5 years, 5 months ago) by maxv
Branch: MAIN
Changes since 1.132: +11 -7 lines
Diff to previous 1.132 (colored)

Localify. By the way, we should use a different stack for NMIs.

Revision 1.132 / (download) - annotate - [select for diffs], Fri Jul 28 14:12:26 2017 UTC (5 years, 6 months ago) by riastradh
Branch: MAIN
CVS Tags: nick-nhusb-base-20170825
Changes since 1.131: +2 -11 lines
Diff to previous 1.131 (colored)

cpu_trace is no more, remove vestige of it that broke ALL kernel.

Revision 1.130.2.1 / (download) - annotate - [select for diffs], Wed Jun 14 04:47:33 2017 UTC (5 years, 7 months ago) by snj
Branch: netbsd-8
CVS Tags: matt-nb8-mediatek-base, matt-nb8-mediatek
Changes since 1.130: +9 -3 lines
Diff to previous 1.130 (colored)

Pull up following revision(s) (requested by pgoyette in ticket #28):
	sys/arch/x86/x86/cpu.c: revision 1.131
Further reduce the loop counter so that hatching completes before the
boot processor times us out.
Add a nice big XXX comment for why the counter is so low.

Revision 1.131 / (download) - annotate - [select for diffs], Sat Jun 10 05:31:34 2017 UTC (5 years, 7 months ago) by pgoyette
Branch: MAIN
CVS Tags: perseant-stdc-iso10646-base, perseant-stdc-iso10646
Changes since 1.130: +9 -3 lines
Diff to previous 1.130 (colored)

Further reduce the loop counter so that hatching completes before the
boot processor times us out.

Add a nice big XXX comment for why the counter is so low.

XXX Will need to pullup to NetBSD-7 branch

Revision 1.130 / (download) - annotate - [select for diffs], Wed May 31 14:41:07 2017 UTC (5 years, 8 months ago) by kre
Branch: MAIN
CVS Tags: netbsd-8-base
Branch point for: netbsd-8
Changes since 1.129: +3 -3 lines
Diff to previous 1.129 (colored)


And now do what 1.128 should have done, and put back the (now re-)used
variable that had earlier been deleted, when it's use was removed in
1.126, but wasn't restored in 1.127.

Revision 1.129 / (download) - annotate - [select for diffs], Wed May 31 14:37:19 2017 UTC (5 years, 8 months ago) by kre
Branch: MAIN
Changes since 1.128: +3 -2 lines
Diff to previous 1.128 (colored)


Revert previous.   Removing unused variable declarations is only a good
idea when the variable is, in fact, unused.

Revision 1.128 / (download) - annotate - [select for diffs], Wed May 31 10:15:18 2017 UTC (5 years, 8 months ago) by pgoyette
Branch: MAIN
Changes since 1.127: +2 -3 lines
Diff to previous 1.127 (colored)

Remove unused variabe (I reverted too much in previous commit!)

Revision 1.127 / (download) - annotate - [select for diffs], Wed May 31 10:08:24 2017 UTC (5 years, 8 months ago) by pgoyette
Branch: MAIN
Changes since 1.126: +5 -3 lines
Diff to previous 1.126 (colored)

Partially revert previous.  Rather than completely removing the loop
around calls to x86_pause(), just drastically reduce the repeat count.
It's still good to have some real delay here (among other things, for
letting the TSCs drift).

As discussed on IRC

Revision 1.126 / (download) - annotate - [select for diffs], Wed May 31 00:19:17 2017 UTC (5 years, 8 months ago) by maya
Branch: MAIN
Changes since 1.125: +4 -6 lines
Diff to previous 1.125 (colored)

Do not pause many times between testing if the CPU can go.

This only impacts QEMU as QEMU's implementation of pause is
significantly slower than its implementation of nop.

PR kern/51623: running qemu-x86_64 with -smp 4 - the additional
CPUs don't start.

Revision 1.125 / (download) - annotate - [select for diffs], Tue May 23 08:54:39 2017 UTC (5 years, 8 months ago) by nonaka
Branch: MAIN
Changes since 1.124: +7 -6 lines
Diff to previous 1.124 (colored)

x86: Add preliminary x2APIC support.

x2APIC is used only when x2APIC is enabled in BIOS/UEFI.
LAPIC ID is not supported above 256.

Revision 1.120.2.3 / (download) - annotate - [select for diffs], Wed Apr 26 02:53:09 2017 UTC (5 years, 9 months ago) by pgoyette
Branch: pgoyette-localcount
Changes since 1.120.2.2: +3 -7 lines
Diff to previous 1.120.2.2 (colored) to branchpoint 1.120 (colored) next main 1.121 (colored)

Sync with HEAD

Revision 1.124 / (download) - annotate - [select for diffs], Sat Apr 22 04:29:31 2017 UTC (5 years, 9 months ago) by nonaka
Branch: MAIN
CVS Tags: prg-localcount2-base3, prg-localcount2-base2, prg-localcount2-base1, prg-localcount2-base, prg-localcount2, pgoyette-localcount-20170426
Changes since 1.123: +3 -7 lines
Diff to previous 1.123 (colored)

use CR8 instead of LAPIC Task Priority register on x86-64.

Revision 1.121.2.1 / (download) - annotate - [select for diffs], Fri Apr 21 16:53:39 2017 UTC (5 years, 9 months ago) by bouyer
Branch: bouyer-socketcan
Changes since 1.121: +6 -3 lines
Diff to previous 1.121 (colored) next main 1.122 (colored)

Sync with HEAD

Revision 1.120.2.2 / (download) - annotate - [select for diffs], Mon Mar 20 06:57:22 2017 UTC (5 years, 10 months ago) by pgoyette
Branch: pgoyette-localcount
Changes since 1.120.2.1: +6 -3 lines
Diff to previous 1.120.2.1 (colored) to branchpoint 1.120 (colored)

Sync with HEAD

Revision 1.123 / (download) - annotate - [select for diffs], Sat Feb 11 14:11:24 2017 UTC (5 years, 11 months ago) by maxv
Branch: MAIN
CVS Tags: pgoyette-localcount-20170320, jdolecek-ncq-base, jdolecek-ncq, bouyer-socketcan-base1
Changes since 1.122: +5 -2 lines
Diff to previous 1.122 (colored)

Instead of using a global array with per-cpu indexes, embed the tmp VAs
into cpu_info directly. This concerns only {i386, Xen-i386, Xen-amd64},
because amd64 already has a direct map that is way faster than that.

There are two major issues with the global array: maxcpus entries are
allocated while it is unlikely that common i386 machines have so many
cpus, and the base VA of these entries is not cache-line-aligned, which
mostly guarantees cache-line-thrashing each time the VAs are entered.

Now the number of tmp VAs allocated is proportionate to the number of CPUs
attached (which therefore reduces memory consumption), and the base is
properly aligned.

On my 3-core AMD, the number of DC_refills_L2 events triggered when
performing 5x10^6 calls to pmap_zero_page on two dedicated cores is on
average divided by two with this patch.

Discussed on tech-kern a little.

Revision 1.111.4.6 / (download) - annotate - [select for diffs], Sun Feb 5 13:40:23 2017 UTC (5 years, 11 months ago) by skrll
Branch: nick-nhusb
Changes since 1.111.4.5: +3 -3 lines
Diff to previous 1.111.4.5 (colored) to branchpoint 1.111 (colored)

Sync with HEAD

Revision 1.122 / (download) - annotate - [select for diffs], Thu Feb 2 08:57:04 2017 UTC (6 years ago) by maxv
Branch: MAIN
CVS Tags: nick-nhusb-base-20170204
Changes since 1.121: +3 -3 lines
Diff to previous 1.121 (colored)

Use __read_mostly on these variables, to reduce the probability of false
sharing.

Revision 1.111.4.5 / (download) - annotate - [select for diffs], Mon Dec 5 10:54:59 2016 UTC (6 years, 1 month ago) by skrll
Branch: nick-nhusb
Changes since 1.111.4.4: +3 -3 lines
Diff to previous 1.111.4.4 (colored) to branchpoint 1.111 (colored)

Sync with HEAD

Revision 1.120.2.1 / (download) - annotate - [select for diffs], Fri Nov 4 14:49:06 2016 UTC (6 years, 2 months ago) by pgoyette
Branch: pgoyette-localcount
Changes since 1.120: +3 -3 lines
Diff to previous 1.120 (colored)

Sync with HEAD

Revision 1.121 / (download) - annotate - [select for diffs], Sun Oct 16 10:24:58 2016 UTC (6 years, 3 months ago) by maxv
Branch: MAIN
CVS Tags: pgoyette-localcount-20170107, pgoyette-localcount-20161104, nick-nhusb-base-20161204, bouyer-socketcan-base
Branch point for: bouyer-socketcan
Changes since 1.120: +3 -3 lines
Diff to previous 1.120 (colored)

Use the generic i82489_writereg instead of lapic_tpr, for consistency.

Revision 1.120 / (download) - annotate - [select for diffs], Thu Jul 7 06:55:40 2016 UTC (6 years, 6 months ago) by msaitoh
Branch: MAIN
CVS Tags: pgoyette-localcount-base, pgoyette-localcount-20160806, pgoyette-localcount-20160726, nick-nhusb-base-20161004, nick-nhusb-base-20160907, localcount-20160914
Branch point for: pgoyette-localcount
Changes since 1.119: +3 -3 lines
Diff to previous 1.119 (colored)

KNF. Remove extra spaces. No functional change.

Revision 1.111.2.3 / (download) - annotate - [select for diffs], Sun Mar 6 17:53:26 2016 UTC (6 years, 10 months ago) by martin
Branch: netbsd-7
CVS Tags: netbsd-7-nhusb-base-20170116, netbsd-7-nhusb-base, netbsd-7-nhusb, netbsd-7-2-RELEASE, netbsd-7-1-RELEASE, netbsd-7-1-RC2, netbsd-7-1-RC1, netbsd-7-1-2-RELEASE, netbsd-7-1-1-RELEASE, netbsd-7-1
Changes since 1.111.2.2: +12 -10 lines
Diff to previous 1.111.2.2 (colored) to branchpoint 1.111 (colored) next main 1.112 (colored)

Pull up following revision(s) (requested by msaitoh in ticket #1118):
	sys/arch/x86/include/cpuvar.h: revision 1.47
	sys/arch/x86/x86/cpu.c: revision 1.117
	sys/arch/x86/x86/identcpu.c: revision 1.49
	sys/arch/x86/include/cpu.h: revision 1.67
Retrieve cpuid7 (Structured Extended Features) into ci_feat_val.

Revision 1.111.4.4 / (download) - annotate - [select for diffs], Sun Dec 27 12:09:45 2015 UTC (7 years, 1 month ago) by skrll
Branch: nick-nhusb
Changes since 1.111.4.3: +16 -10 lines
Diff to previous 1.111.4.3 (colored) to branchpoint 1.111 (colored)

Sync with HEAD (as of 26th Dec)

Revision 1.119 / (download) - annotate - [select for diffs], Wed Dec 16 18:54:03 2015 UTC (7 years, 1 month ago) by maxv
Branch: MAIN
CVS Tags: nick-nhusb-base-20160529, nick-nhusb-base-20160422, nick-nhusb-base-20160319, nick-nhusb-base-20151226
Changes since 1.118: +2 -4 lines
Diff to previous 1.118 (colored)

Extend SMEP support to i386 (does not require PAE).

Revision 1.118 / (download) - annotate - [select for diffs], Sun Dec 13 15:53:06 2015 UTC (7 years, 1 month ago) by maxv
Branch: MAIN
Changes since 1.117: +6 -0 lines
Diff to previous 1.117 (colored)

Implement amd64 support for SMEP - Supervisor Mode Execution Protection.

Now, on CPUs that support this feature, if the kernel tries to execute
an instruction located in userland, the CPU will trigger a page fault.

Tested on amd64 (Intel Core i5).

Revision 1.117 / (download) - annotate - [select for diffs], Sun Dec 13 15:02:19 2015 UTC (7 years, 1 month ago) by maxv
Branch: MAIN
Changes since 1.116: +12 -10 lines
Diff to previous 1.116 (colored)

Retrieve cpuid7 (Structured Extended Features) into ci_feat_val.

Revision 1.111.2.1.2.1 / (download) - annotate - [select for diffs], Sun Nov 8 00:15:47 2015 UTC (7 years, 2 months ago) by riz
Branch: netbsd-7-0
CVS Tags: netbsd-7-0-2-RELEASE, netbsd-7-0-1-RELEASE
Changes since 1.111.2.1: +10 -4 lines
Diff to previous 1.111.2.1 (colored)

Pull up following revision(s) (requested by nat in ticket #984):
	sys/arch/x86/x86/cpu.c: revision 1.116
Don't disable/re-enable interrupts if they are already disabled.
Addresses PR 48196.
This commit was improved and approved by christos@

Revision 1.111.2.2 / (download) - annotate - [select for diffs], Fri Nov 6 00:40:02 2015 UTC (7 years, 2 months ago) by riz
Branch: netbsd-7
Changes since 1.111.2.1: +10 -4 lines
Diff to previous 1.111.2.1 (colored) to branchpoint 1.111 (colored)

Pull up following revision(s) (requested by nat in ticket #984):
	sys/arch/x86/x86/cpu.c: revision 1.116
Don't disable/re-enable interrupts if they are already disabled.
Addresses PR 48196.
This commit was improved and approved by christos@

Revision 1.111.4.3 / (download) - annotate - [select for diffs], Tue Sep 22 12:05:54 2015 UTC (7 years, 4 months ago) by skrll
Branch: nick-nhusb
Changes since 1.111.4.2: +10 -4 lines
Diff to previous 1.111.4.2 (colored) to branchpoint 1.111 (colored)

Sync with HEAD

Revision 1.116 / (download) - annotate - [select for diffs], Thu Sep 17 23:48:01 2015 UTC (7 years, 4 months ago) by nat
Branch: MAIN
CVS Tags: nick-nhusb-base-20150921
Changes since 1.115: +10 -4 lines
Diff to previous 1.115 (colored)

Don't disable/re-enable interrupts if they are already disabled.
Addresses PR 48196.

This commit was improved and approved by christos@

Revision 1.111.4.2 / (download) - annotate - [select for diffs], Sat Jun 6 14:40:04 2015 UTC (7 years, 7 months ago) by skrll
Branch: nick-nhusb
Changes since 1.111.4.1: +6 -6 lines
Diff to previous 1.111.4.1 (colored) to branchpoint 1.111 (colored)

Sync with HEAD

Revision 1.115 / (download) - annotate - [select for diffs], Mon May 18 13:09:55 2015 UTC (7 years, 8 months ago) by msaitoh
Branch: MAIN
CVS Tags: nick-nhusb-base-20150606
Changes since 1.114: +2 -90 lines
Diff to previous 1.114 (colored)

 OOOOPS. Revert previous.

Revision 1.114 / (download) - annotate - [select for diffs], Mon May 18 13:04:21 2015 UTC (7 years, 8 months ago) by msaitoh
Branch: MAIN
Changes since 1.113: +90 -2 lines
Diff to previous 1.113 (colored)

 Workaround for "lapic_set_lvt: bad pin value %d" panic on some (broken?) BIOS
system. Don't panic when a local APIC's interrput input pin number (LINTx) > 1.
Instead, print warning message and continue. The default is pin 1.
Same as Linux (and perhaps FreeBSD). Tested with Shuttle DS57U.

Revision 1.111.4.1 / (download) - annotate - [select for diffs], Mon Apr 6 15:18:04 2015 UTC (7 years, 9 months ago) by skrll
Branch: nick-nhusb
Changes since 1.111: +8 -7 lines
Diff to previous 1.111 (colored)

Sync with HEAD

Revision 1.111.2.1 / (download) - annotate - [select for diffs], Mon Jan 12 21:06:41 2015 UTC (8 years ago) by snj
Branch: netbsd-7
CVS Tags: netbsd-7-0-RELEASE, netbsd-7-0-RC3, netbsd-7-0-RC2, netbsd-7-0-RC1
Branch point for: netbsd-7-0
Changes since 1.111: +7 -5 lines
Diff to previous 1.111 (colored)

Pull up following revision(s) (requested by christos in ticket #414):
	sys/arch/x86/x86/cpu.c: revision 1.113
PR/49104: Jarle Greipsland: Don't touch cr4 in cpus that don't have it.

Revision 1.113 / (download) - annotate - [select for diffs], Mon Jan 12 16:34:39 2015 UTC (8 years ago) by christos
Branch: MAIN
CVS Tags: nick-nhusb-base-20150406
Changes since 1.112: +7 -5 lines
Diff to previous 1.112 (colored)

PR/49104: Jarle Greipsland: Don't touch cr4 in cpus that don't have it.
XXX: pullup-7

Revision 1.112 / (download) - annotate - [select for diffs], Mon Dec 8 15:22:47 2014 UTC (8 years, 1 month ago) by msaitoh
Branch: MAIN
Changes since 1.111: +3 -4 lines
Diff to previous 1.111 (colored)

 Modify around cpu_identify() to not to break the dmesg of cpus with AB_VERBOSE
or AB_DEBUG.

Revision 1.100.2.2 / (download) - annotate - [select for diffs], Wed Aug 20 00:03:29 2014 UTC (8 years, 5 months ago) by tls
Branch: tls-maxphys
Changes since 1.100.2.1: +27 -25 lines
Diff to previous 1.100.2.1 (colored) to branchpoint 1.100 (colored)

Rebase to HEAD as of a few days ago.

Revision 1.110.2.1 / (download) - annotate - [select for diffs], Sun Aug 10 06:54:11 2014 UTC (8 years, 5 months ago) by tls
Branch: tls-earlyentropy
Changes since 1.110: +6 -2 lines
Diff to previous 1.110 (colored) next main 1.111 (colored)

Rebase.

Revision 1.96.2.5 / (download) - annotate - [select for diffs], Thu May 22 11:40:13 2014 UTC (8 years, 8 months ago) by yamt
Branch: yamt-pagecache
Changes since 1.96.2.4: +27 -25 lines
Diff to previous 1.96.2.4 (colored) to branchpoint 1.96 (colored) next main 1.97 (colored)

sync with head.

for a reference, the tree before this commit was tagged
as yamt-pagecache-tag8.

this commit was splitted into small chunks to avoid
a limitation of cvs.  ("Protocol error: too many arguments")

Revision 1.102.2.1 / (download) - annotate - [select for diffs], Sun May 18 17:45:30 2014 UTC (8 years, 8 months ago) by rmind
Branch: rmind-smpnet
Changes since 1.102: +27 -25 lines
Diff to previous 1.102 (colored) next main 1.103 (colored)

sync with head

Revision 1.111 / (download) - annotate - [select for diffs], Mon May 12 11:56:02 2014 UTC (8 years, 8 months ago) by joerg
Branch: MAIN
CVS Tags: yamt-pagecache-base9, tls-maxphys-base, tls-earlyentropy-base, rmind-smpnet-nbase, rmind-smpnet-base, nick-nhusb-base, netbsd-7-base
Branch point for: nick-nhusb, netbsd-7
Changes since 1.110: +6 -2 lines
Diff to previous 1.110 (colored)

Match lapic conditionals from the primary CPU.

Revision 1.110 / (download) - annotate - [select for diffs], Tue Feb 25 22:16:52 2014 UTC (8 years, 11 months ago) by dsl
Branch: MAIN
CVS Tags: riastradh-xf86-video-intel-2-7-1-pre-2-21-15, riastradh-drm2-base3
Branch point for: tls-earlyentropy
Changes since 1.109: +17 -5 lines
Diff to previous 1.109 (colored)

Add support for saving the AVX-256 ymm registers during FPU context switches.
Add support for the forthcoming AVX-512 registers.
Code compiled with -mavx seems to work, but I've not tested context
  switches with live ymm registers.
There is a small cost on fork/exec (a larger area is copied/zerod),
  but I don't think the ymm registers are read/written unless they
  have been used.
The code use XSAVE on all cpus, I'm not brave enough to enable XSAVEOPT.

Revision 1.109 / (download) - annotate - [select for diffs], Wed Feb 19 21:23:02 2014 UTC (8 years, 11 months ago) by dsl
Branch: MAIN
Changes since 1.108: +4 -2 lines
Diff to previous 1.108 (colored)

Add explicit #include <x86/fpu.h> instead of relying on pcb.h including it.

Revision 1.108 / (download) - annotate - [select for diffs], Sun Jan 26 19:16:17 2014 UTC (9 years ago) by dsl
Branch: MAIN
Changes since 1.107: +2 -18 lines
Diff to previous 1.107 (colored)

Remove support for 'external' floating point units and the MS-DOS
  compatible method of handling floating point exceptions.
Make kernel support for teh fpu non-optional (486SX should still work).
Only 386 cpus support external fpu, and i386 support was removed years ago.
This means that the npx code no longer uses port 0xf0 or interupt 13.
All the "npx at isa" lines go from the configs, arch/i386/isa/npx.c
  is now mandatory for all i386 kernels.
I've renamed npxinit() to fpuinit() and npxinit_cpu() to fpuinit_cpu()
  to match the very similar amd64 functions.
The fpu of the boot cpu is now initialised by a direct call from
  cpu_configure(), this enables FP emulation for a 486SX.
  (for amd64 the cr0 values are set in locore.S and similar).
This fixes a long-standing bug in linux_setregs() - which did not
  save the fpu regsiters if they were active.
I've test booted a single cpu i386 kernel (using anita).
amd64 builds - none of teh changes should affect it.
The i386 XEN kernels build, but I'm not sure where they set cr0, and
  it might have got lost!

Revision 1.107 / (download) - annotate - [select for diffs], Sun Dec 1 01:05:16 2013 UTC (9 years, 2 months ago) by christos
Branch: MAIN
Changes since 1.106: +22 -5 lines
Diff to previous 1.106 (colored)

revert fpu/pcu changes until we figure out what's wrong; they cause random
freezes

Revision 1.106 / (download) - annotate - [select for diffs], Fri Nov 15 08:47:55 2013 UTC (9 years, 2 months ago) by msaitoh
Branch: MAIN
Changes since 1.105: +6 -6 lines
Diff to previous 1.105 (colored)

 Modify some macros and add some new macros for CPU family and model
to reduce code duplication and to avoid bug.

CPUID_TO_STEPPING(cpuid)	(not changed)

CPUID_TO_FAMILY(cpuid)		(new)
CPUID_TO_MODEL(cpuid)		(new)

	Return the display family and the display model.
	The macro names are the same as FreeBSD.

CPUID_TO_BASEFAMILY(cpuid)	(The old name was CPUID2FAMILY)
CPUID_TO_BASEMODEL(cpuid)	(The old name was CPUID2MODEL)

	Only for the base field.

CPUID_TO_EXTFAMILY(cpuid)	(The old name was CPUID2EXTFAMILY)
CPUID_TO_EXTMODEL(cpuid)	(The old name was CPUID2EXTMODEL)

	Only for the extended field.

See http://mail-index.netbsd.org/port-amd64/2013/11/12/msg001978.html

Revision 1.105 / (download) - annotate - [select for diffs], Tue Nov 12 16:15:54 2013 UTC (9 years, 2 months ago) by msaitoh
Branch: MAIN
Changes since 1.104: +0 -3 lines
Diff to previous 1.104 (colored)

Revert previos. I accidentally committed a debug code. Sorry.

Revision 1.104 / (download) - annotate - [select for diffs], Tue Nov 12 16:13:56 2013 UTC (9 years, 2 months ago) by msaitoh
Branch: MAIN
Changes since 1.103: +5 -2 lines
Diff to previous 1.103 (colored)

Fix a bug in last commit. Check correct variable.

Revision 1.103 / (download) - annotate - [select for diffs], Wed Oct 23 20:18:50 2013 UTC (9 years, 3 months ago) by drochner
Branch: MAIN
Changes since 1.102: +5 -22 lines
Diff to previous 1.102 (colored)

Use the MI "pcu" framework for bookkeeping of npx/fpu states on x86.
This reduces the amount of MD code enormously, and makes it easier
to implement support for newer CPU features which require more fpu
state, or for fpu usage by the kernel.
For access to FPU state across CPUs, an xcall kthread is used now
rather than a dedicated IPI.
No user visible changes intended.

Revision 1.100.2.1 / (download) - annotate - [select for diffs], Mon Feb 25 00:29:05 2013 UTC (9 years, 11 months ago) by tls
Branch: tls-maxphys
Changes since 1.100: +42 -4 lines
Diff to previous 1.100 (colored)

resync with head

Revision 1.96.2.4 / (download) - annotate - [select for diffs], Wed Jan 16 05:33:10 2013 UTC (10 years ago) by yamt
Branch: yamt-pagecache
CVS Tags: yamt-pagecache-tag8
Changes since 1.96.2.3: +42 -4 lines
Diff to previous 1.96.2.3 (colored) to branchpoint 1.96 (colored)

sync with (a bit old) head

Revision 1.102 / (download) - annotate - [select for diffs], Wed Dec 12 22:43:35 2012 UTC (10 years, 1 month ago) by pgoyette
Branch: MAIN
CVS Tags: yamt-pagecache-base8, yamt-pagecache-base7, riastradh-drm2-base2, riastradh-drm2-base1, riastradh-drm2-base, riastradh-drm2, khorben-n900, agc-symver-base, agc-symver
Branch point for: rmind-smpnet
Changes since 1.101: +6 -3 lines
Diff to previous 1.101 (colored)

With recent introduction of conditionals for the various MP options, we
broke the build for x86 systems that have MULTIPROCESSOR but which do not
include MPBIOS.  So let's try to untangle things just a bit.  Presented
on current-users (and referenced on source-changes-d) without any comment.

XXX We really should find a better method to select kernel options; #ifdef
spaghetti is rather sub-optimal.

Revision 1.101 / (download) - annotate - [select for diffs], Sat Dec 8 12:36:31 2012 UTC (10 years, 1 month ago) by kiyohara
Branch: MAIN
Changes since 1.100: +39 -4 lines
Diff to previous 1.100 (colored)

#ifdef - #endif-ed. NMCA, NISA, NNPX, NIOAPIC, LAPIC, MPBIOS and MULTIPROCESSOR.

Revision 1.96.2.3 / (download) - annotate - [select for diffs], Tue Oct 30 17:20:33 2012 UTC (10 years, 3 months ago) by yamt
Branch: yamt-pagecache
Changes since 1.96.2.2: +20 -9 lines
Diff to previous 1.96.2.2 (colored) to branchpoint 1.96 (colored)

sync with head

Revision 1.96.8.3 / (download) - annotate - [select for diffs], Thu Jul 5 17:52:54 2012 UTC (10 years, 7 months ago) by riz
Branch: netbsd-6
CVS Tags: netbsd-6-1-RELEASE, netbsd-6-1-RC4, netbsd-6-1-RC3, netbsd-6-1-RC2, netbsd-6-1-RC1, netbsd-6-1-5-RELEASE, netbsd-6-1-4-RELEASE, netbsd-6-1-3-RELEASE, netbsd-6-1-2-RELEASE, netbsd-6-1-1-RELEASE, netbsd-6-1, netbsd-6-0-RELEASE, netbsd-6-0-RC2, netbsd-6-0-RC1, netbsd-6-0-6-RELEASE, netbsd-6-0-5-RELEASE, netbsd-6-0-4-RELEASE, netbsd-6-0-3-RELEASE, netbsd-6-0-2-RELEASE, netbsd-6-0-1-RELEASE, netbsd-6-0, matt-nb6-plus-nbase, matt-nb6-plus-base, matt-nb6-plus
Changes since 1.96.8.2: +10 -3 lines
Diff to previous 1.96.8.2 (colored) to branchpoint 1.96 (colored) next main 1.97 (colored)

Pull up following revision(s) (requested by chs in ticket #400):
	sys/arch/x86/x86/cpu.c: revision 1.100
in cpu_boot_secondary_processors(), wait until all the other CPUs
have registered themselves in kcpuset_running before returning.
recent changes to the TLB invalidation xcall code assume that
any CPU which will receive a broadcast IPI is registered in
kcpuset_running, so ensure that is true by waiting here.

Revision 1.100 / (download) - annotate - [select for diffs], Mon Jul 2 01:05:48 2012 UTC (10 years, 7 months ago) by chs
Branch: MAIN
CVS Tags: yamt-pagecache-base6
Branch point for: tls-maxphys
Changes since 1.99: +10 -3 lines
Diff to previous 1.99 (colored)

in cpu_boot_secondary_processors(), wait until all the other CPUs
have registered themselves in kcpuset_running before returning.
recent changes to the TLB invalidation xcall code assume that
any CPU which will receive a broadcast IPI is registered in
kcpuset_running, so ensure that is true by waiting here.

Revision 1.99 / (download) - annotate - [select for diffs], Tue Jun 12 17:14:19 2012 UTC (10 years, 7 months ago) by yamt
Branch: MAIN
Changes since 1.98: +12 -8 lines
Diff to previous 1.98 (colored)

cpu_load_pmap: disable interrupts.  add a comment to explain why.  PR/44995

Revision 1.96.2.2 / (download) - annotate - [select for diffs], Wed May 23 10:07:51 2012 UTC (10 years, 8 months ago) by yamt
Branch: yamt-pagecache
Changes since 1.96.2.1: +15 -18 lines
Diff to previous 1.96.2.1 (colored) to branchpoint 1.96 (colored)

sync with head.

Revision 1.96.8.2 / (download) - annotate - [select for diffs], Wed May 9 03:22:53 2012 UTC (10 years, 8 months ago) by riz
Branch: netbsd-6
Changes since 1.96.8.1: +13 -16 lines
Diff to previous 1.96.8.1 (colored) to branchpoint 1.96 (colored)

Pull up following revision(s) (requested by rmind in ticket #202):
	sys/arch/x86/include/cpuvar.h: revision 1.46
	sys/arch/xen/include/xenpmap.h: revision 1.34
	sys/arch/i386/include/param.h: revision 1.77
	sys/arch/x86/x86/pmap_tlb.c: revision 1.5
	sys/arch/x86/x86/pmap_tlb.c: revision 1.6
	sys/arch/i386/i386/genassym.cf: revision 1.92
	sys/arch/xen/x86/cpu.c: revision 1.91
	sys/arch/x86/x86/pmap.c: revision 1.177
	sys/arch/xen/x86/xen_pmap.c: revision 1.21
	sys/arch/x86/acpi/acpi_wakeup.c: revision 1.31
	sys/kern/subr_kcpuset.c: revision 1.5
	sys/arch/amd64/include/param.h: revision 1.18
	sys/sys/kcpuset.h: revision 1.5
	sys/arch/x86/x86/mtrr_i686.c: revision 1.26
	sys/arch/x86/x86/mtrr_i686.c: revision 1.27
	sys/arch/xen/x86/x86_xpmap.c: revision 1.43
	sys/arch/x86/x86/cpu.c: revision 1.98
	sys/arch/amd64/amd64/mptramp.S: revision 1.14
	sys/kern/sys_sched.c: revision 1.42
	sys/arch/amd64/amd64/genassym.cf: revision 1.50
	sys/arch/i386/i386/mptramp.S: revision 1.24
	sys/arch/x86/include/pmap.h: revision 1.52
	sys/arch/x86/include/cpu.h: revision 1.50
- Convert x86 MD code, mainly pmap(9) e.g. TLB shootdown code, to use
  kcpuset(9) and thus replace hardcoded CPU bitmasks.  This removes the
  limitation of maximum CPUs.
- Support up to 256 CPUs on amd64 architecture by default.
Bug fixes, improvements, completion of Xen part and testing on 64-core
AMD Opteron(tm) Processor 6282 SE (also, as Xen HVM domU with 128 CPUs)
by Manuel Bouyer.
- pmap_tlb_shootdown: do not overwrite tp_cpumask with pm_cpus, but merge
  like pm_kernel_cpus.  Remove unecessary intersection with kcpuset_running.
  Do not reset tp_userpmap if pmap_kernel().
- Remove pmap_tlb_mailbox_t wrapping, which is pointless after recent changes.
- pmap_tlb_invalidate, pmap_tlb_intr: constify for packet structure.
i686_mtrr_init_first: handle the case when there are no variable-size MTRR
registers available (i686_mtrr_vcnt == 0).

Revision 1.96.6.2 / (download) - annotate - [select for diffs], Sun Apr 29 23:04:44 2012 UTC (10 years, 9 months ago) by mrg
Branch: jmcneill-usbmp
Changes since 1.96.6.1: +15 -18 lines
Diff to previous 1.96.6.1 (colored) to branchpoint 1.96 (colored) next main 1.97 (colored)

sync to latest -current.

Revision 1.98 / (download) - annotate - [select for diffs], Fri Apr 20 22:23:24 2012 UTC (10 years, 9 months ago) by rmind
Branch: MAIN
CVS Tags: yamt-pagecache-base5, jmcneill-usbmp-base9, jmcneill-usbmp-base10
Changes since 1.97: +15 -18 lines
Diff to previous 1.97 (colored)

- Convert x86 MD code, mainly pmap(9) e.g. TLB shootdown code, to use
  kcpuset(9) and thus replace hardcoded CPU bitmasks.  This removes the
  limitation of maximum CPUs.

- Support up to 256 CPUs on amd64 architecture by default.

Bug fixes, improvements, completion of Xen part and testing on 64-core
AMD Opteron(tm) Processor 6282 SE (also, as Xen HVM domU with 128 CPUs)
by Manuel Bouyer.

Revision 1.96.2.1 / (download) - annotate - [select for diffs], Tue Apr 17 00:07:06 2012 UTC (10 years, 9 months ago) by yamt
Branch: yamt-pagecache
Changes since 1.96: +3 -3 lines
Diff to previous 1.96 (colored)

sync with head

Revision 1.96.8.1 / (download) - annotate - [select for diffs], Wed Feb 22 18:56:46 2012 UTC (10 years, 11 months ago) by riz
Branch: netbsd-6
Changes since 1.96: +3 -3 lines
Diff to previous 1.96 (colored)

Pull up following revision(s) (requested by bouyer in ticket #29):
	sys/arch/xen/x86/x86_xpmap.c: revision 1.39
	sys/arch/xen/include/hypervisor.h: revision 1.37
	sys/arch/xen/include/intr.h: revision 1.34
	sys/arch/xen/x86/xen_ipi.c: revision 1.10
	sys/arch/x86/x86/cpu.c: revision 1.97
	sys/arch/x86/include/cpu.h: revision 1.48
	sys/uvm/uvm_map.c: revision 1.315
	sys/arch/x86/x86/pmap.c: revision 1.165
	sys/arch/xen/x86/cpu.c: revision 1.81
	sys/arch/x86/x86/pmap.c: revision 1.167
	sys/arch/xen/x86/cpu.c: revision 1.82
	sys/arch/x86/x86/pmap.c: revision 1.168
	sys/arch/xen/x86/xen_pmap.c: revision 1.17
	sys/uvm/uvm_km.c: revision 1.122
	sys/uvm/uvm_kmguard.c: revision 1.10
	sys/arch/x86/include/pmap.h: revision 1.50
Apply patch proposed in PR port-xen/45975 (this does not solve the exact
problem reported here but is part of the solution):
xen_kpm_sync() is not working as expected,
leading to races between CPUs.
1 the check (xpq_cpu != &x86_curcpu) is always false because we
  have different x86_curcpu symbols with different addresses in the kernel.
  Fortunably, all addresses dissaemble to the same code.
  Because of this we always use the code intended for bootstrap, which doesn't
  use cross-calls or lock.
2 once 1 above is fixed, xen_kpm_sync() will use xcalls to sync other CPUs,
  which cause it to sleep and pmap.c doesn't like that. It triggers this
  KASSERT() in pmap_unmap_ptes():
  KASSERT(pmap->pm_ncsw == curlwp->l_ncsw);
3 pmap->pm_cpus is not safe for the purpose of xen_kpm_sync(), which
  needs to know on which CPU a pmap is loaded *now*:
  pmap->pm_cpus is cleared before cpu_load_pmap() is called to switch
  to a new pmap, leaving a window where a pmap is still in a CPU's
  ci_kpm_pdir but not in pm_cpus. As a virtual CPU may be preempted
  by the hypervisor at any time, it can be large enough to let another
  CPU free the PTP and reuse it as a normal page.
To fix 2), avoid cross-calls and IPIs completely, and instead
use a mutex to update all CPU's ci_kpm_pdir from the local CPU.
It's safe because we just need to update the table page, a tlbflush IPI will
happen later. As a side effect, we don't need a different code for bootstrap,
fixing 1). The mutex added to struct cpu needs a small headers reorganisation.
to fix 3), introduce a pm_xen_ptp_cpus which is updated from
cpu_pmap_load(), whith the ci_kpm_mtx mutex held. Checking it with
ci_kpm_mtx held will avoid overwriting the wrong pmap's ci_kpm_pdir.
While there I removed the unused pmap_is_active() function;
and added some more details to DIAGNOSTIC panics.
When using uvm_km_pgremove_intrsafe() make sure mappings are removed
before returning the pages to the free pool. Otherwise, under Xen,
a page which still has a writable mapping could be allocated for
a PDP by another CPU and the hypervisor would refuse it (this is
PR port-xen/45975).
For this, move the pmap_kremove() calls inside uvm_km_pgremove_intrsafe(),
and do pmap_kremove()/uvm_pagefree() in batch of (at most) 16 entries
(as suggested by Chuck Silvers on tech-kern@, see also
http://mail-index.netbsd.org/tech-kern/2012/02/17/msg012727.html and
followups).
Avoid early use of xen_kpm_sync(); locks are not available at this time.
Don't call cpu_init() twice.
Makes LOCKDEBUG kernels boot again
Revert pmap_pte_flush() -> xpq_flush_queue() in previous.

Revision 1.96.6.1 / (download) - annotate - [select for diffs], Sat Feb 18 07:33:35 2012 UTC (10 years, 11 months ago) by mrg
Branch: jmcneill-usbmp
Changes since 1.96: +3 -3 lines
Diff to previous 1.96 (colored)

merge to -current.

Revision 1.97 / (download) - annotate - [select for diffs], Fri Feb 17 18:40:19 2012 UTC (10 years, 11 months ago) by bouyer
Branch: MAIN
CVS Tags: yamt-pagecache-base4, jmcneill-usbmp-base8, jmcneill-usbmp-base7, jmcneill-usbmp-base6, jmcneill-usbmp-base5, jmcneill-usbmp-base4, jmcneill-usbmp-base3, jmcneill-usbmp-base2
Changes since 1.96: +3 -3 lines
Diff to previous 1.96 (colored)

Apply patch proposed in PR port-xen/45975 (this does not solve the exact
problem reported here but is part of the solution):
xen_kpm_sync() is not working as expected,
leading to races between CPUs.
1 the check (xpq_cpu != &x86_curcpu) is always false because we
  have different x86_curcpu symbols with different addresses in the kernel.
  Fortunably, all addresses dissaemble to the same code.
  Because of this we always use the code intended for bootstrap, which doesn't
  use cross-calls or lock.

2 once 1 above is fixed, xen_kpm_sync() will use xcalls to sync other CPUs,
  which cause it to sleep and pmap.c doesn't like that. It triggers this
  KASSERT() in pmap_unmap_ptes():
  KASSERT(pmap->pm_ncsw == curlwp->l_ncsw);
3 pmap->pm_cpus is not safe for the purpose of xen_kpm_sync(), which
  needs to know on which CPU a pmap is loaded *now*:
  pmap->pm_cpus is cleared before cpu_load_pmap() is called to switch
  to a new pmap, leaving a window where a pmap is still in a CPU's
  ci_kpm_pdir but not in pm_cpus. As a virtual CPU may be preempted
  by the hypervisor at any time, it can be large enough to let another
  CPU free the PTP and reuse it as a normal page.

To fix 2), avoid cross-calls and IPIs completely, and instead
use a mutex to update all CPU's ci_kpm_pdir from the local CPU.
It's safe because we just need to update the table page, a tlbflush IPI will
happen later. As a side effect, we don't need a different code for bootstrap,
fixing 1). The mutex added to struct cpu needs a small headers reorganisation.

to fix 3), introduce a pm_xen_ptp_cpus which is updated from
cpu_pmap_load(), whith the ci_kpm_mtx mutex held. Checking it with
ci_kpm_mtx held will avoid overwriting the wrong pmap's ci_kpm_pdir.

While there I removed the unused pmap_is_active() function;
and added some more details to DIAGNOSTIC panics.

Revision 1.96 / (download) - annotate - [select for diffs], Tue Oct 18 05:16:02 2011 UTC (11 years, 3 months ago) by jruoho
Branch: MAIN
CVS Tags: yamt-pagecache-base3, yamt-pagecache-base2, yamt-pagecache-base, netbsd-6-base, jmcneill-usbmp-pre-base2, jmcneill-usbmp-base, jmcneill-audiomp3-base, jmcneill-audiomp3
Branch point for: yamt-pagecache, netbsd-6, jmcneill-usbmp
Changes since 1.95: +25 -9 lines
Diff to previous 1.95 (colored)

As cpu_shutdown() is a wrapper to cpu_suspend(), modify slightly to prevent
setting low frequencies for active non-bootstrap processors during shutdown.

Revision 1.95 / (download) - annotate - [select for diffs], Mon Oct 17 22:38:01 2011 UTC (11 years, 3 months ago) by jmcneill
Branch: MAIN
Changes since 1.94: +11 -2 lines
Diff to previous 1.94 (colored)

add a "vm" device class for cpufeaturebus

Revision 1.94 / (download) - annotate - [select for diffs], Thu Oct 6 06:56:29 2011 UTC (11 years, 4 months ago) by mrg
Branch: MAIN
Changes since 1.93: +4 -6 lines
Diff to previous 1.93 (colored)

remove a check against uvmexp.ncolors that is done inside uvm_page_recolor()
already anyway.

Revision 1.93 / (download) - annotate - [select for diffs], Wed Sep 28 15:38:21 2011 UTC (11 years, 4 months ago) by jruoho
Branch: MAIN
Changes since 1.92: +24 -11 lines
Diff to previous 1.92 (colored)

Call cpufreq_suspend(9) and cpufreq_resume(9) during suspend/resume.

Revision 1.62.2.6 / (download) - annotate - [select for diffs], Sat Aug 27 15:37:30 2011 UTC (11 years, 5 months ago) by jym
Branch: jym-xensuspend
Changes since 1.62.2.5: +36 -4 lines
Diff to previous 1.62.2.5 (colored) to branchpoint 1.62 (colored) next main 1.63 (colored)

Sync with HEAD. Most notably: uvm/pmap work done by rmind@, and MP Xen
work of cherry@.

No regression observed on suspend/restore.

Revision 1.92 / (download) - annotate - [select for diffs], Thu Aug 11 20:33:20 2011 UTC (11 years, 5 months ago) by cherry
Branch: MAIN
CVS Tags: jym-xensuspend-nbase, jym-xensuspend-base
Changes since 1.91: +3 -3 lines
Diff to previous 1.91 (colored)

Unbreak the build. (conflicting types in function declaration and definition)

Thanks riz@

Revision 1.91 / (download) - annotate - [select for diffs], Thu Aug 11 18:11:17 2011 UTC (11 years, 5 months ago) by cherry
Branch: MAIN
Changes since 1.90: +22 -2 lines
Diff to previous 1.90 (colored)

Hide the MD details of specific IPIs behind semantically pleasing functions. This cleans up a couple of #ifdef XEN/#endif pairs

Revision 1.90 / (download) - annotate - [select for diffs], Fri Jul 29 21:21:43 2011 UTC (11 years, 6 months ago) by dyoung
Branch: MAIN
Changes since 1.89: +8 -2 lines
Diff to previous 1.89 (colored)

Don't shutdown the boostrap processor (BSP) because we may have to run
BIOS methods on it.  For example, ACPI requires that we execute the code
for changing sleep state on the BSP.

This may help the problem where folks' machines would hang instead of
powering off when they entered ACPI sleep state 5.

XXX If the BSP is already shut down, we should start it back up.

Revision 1.87.2.1 / (download) - annotate - [select for diffs], Thu Jun 23 14:19:48 2011 UTC (11 years, 7 months ago) by cherry
Branch: cherry-xenmp
Changes since 1.87: +5 -4 lines
Diff to previous 1.87 (colored) next main 1.88 (colored)

Catchup with rmind-uvmplock merge.

Revision 1.89 / (download) - annotate - [select for diffs], Wed Jun 22 09:28:08 2011 UTC (11 years, 7 months ago) by jruoho
Branch: MAIN
Changes since 1.88: +7 -2 lines
Diff to previous 1.88 (colored)

Add small comment.

Revision 1.88 / (download) - annotate - [select for diffs], Sun Jun 12 03:35:50 2011 UTC (11 years, 7 months ago) by rmind
Branch: MAIN
Changes since 1.87: +5 -4 lines
Diff to previous 1.87 (colored)

Welcome to 5.99.53!  Merge rmind-uvmplock branch:

- Reorganize locking in UVM and provide extra serialisation for pmap(9).
  New lock order: [vmpage-owner-lock] -> pmap-lock.

- Simplify locking in some pmap(9) modules by removing P->V locking.

- Use lock object on vmobjlock (and thus vnode_t::v_interlock) to share
  the locks amongst UVM objects where necessary (tmpfs, layerfs, unionfs).

- Rewrite and optimise x86 TLB shootdown code, make it simpler and cleaner.
  Add TLBSTATS option for x86 to collect statistics about TLB shootdowns.

- Unify /dev/mem et al in MI code and provide required locking (removes
  kernel-lock on some ports).  Also, avoid cache-aliasing issues.

Thanks to Andrew Doran and Joerg Sonnenberger, as their initial patches
formed the core changes of this branch.

Revision 1.79.2.1 / (download) - annotate - [select for diffs], Mon Jun 6 09:07:07 2011 UTC (11 years, 8 months ago) by jruoho
Branch: jruoho-x86intr
Changes since 1.79: +72 -11 lines
Diff to previous 1.79 (colored) next main 1.80 (colored)

Sync with HEAD.

Revision 1.57.4.3.4.1 / (download) - annotate - [select for diffs], Fri May 20 08:11:24 2011 UTC (11 years, 8 months ago) by matt
Branch: matt-nb5-mips64
Changes since 1.57.4.3: +10 -3 lines
Diff to previous 1.57.4.3 (colored) next main 1.57.4.4 (colored)

bring matt-nb5-mips64 up to date with netbsd-5-1-RELEASE (except compat).

Revision 1.62.2.5 / (download) - annotate - [select for diffs], Mon Mar 28 23:04:51 2011 UTC (11 years, 10 months ago) by jym
Branch: jym-xensuspend
Changes since 1.62.2.4: +81 -13 lines
Diff to previous 1.62.2.4 (colored) to branchpoint 1.62 (colored)

Sync with HEAD. TODO before merge:
- shortcut for suspend code in sysmon, when powerd(8) is not running.
Borrow ``xs_watch'' thread context?
- bug hunting in xbd + xennet resume. Rings are currently thrashed upon
resume, so current implementation force flush them on suspend. It's not
really needed.

Revision 1.69.2.4 / (download) - annotate - [select for diffs], Thu Mar 17 04:46:28 2011 UTC (11 years, 10 months ago) by rmind
Branch: rmind-uvmplock
Changes since 1.69.2.3: +2 -3 lines
Diff to previous 1.69.2.3 (colored) to branchpoint 1.69 (colored) next main 1.70 (colored)

- Fix tlbflushg() to behave like tlbflush(), if page global extension (PGE)
  is not (yet) enabled.  This fixes the issue of stale TLB entry, experienced
  early on boot, when PGE is not yet set on primary CPU.
- Rewrite i386/amd64 TLB interrupt handlers in C (only stubs are in assembly),
  which simplifies and unifies (under x86) code, plus fixes few bugs.
- cpu_attach: remove assignment to cpus_running, as primary CPU might not be
  attached first, which causes reset (and thus missed secondary CPUs).

Revision 1.69.2.3 / (download) - annotate - [select for diffs], Sat Mar 5 20:52:29 2011 UTC (11 years, 11 months ago) by rmind
Branch: rmind-uvmplock
Changes since 1.69.2.2: +125 -19 lines
Diff to previous 1.69.2.2 (colored) to branchpoint 1.69 (colored)

sync with head

Revision 1.79.4.2 / (download) - annotate - [select for diffs], Sat Mar 5 15:10:10 2011 UTC (11 years, 11 months ago) by bouyer
Branch: bouyer-quota2
Changes since 1.79.4.1: +69 -9 lines
Diff to previous 1.79.4.1 (colored) to branchpoint 1.79 (colored) next main 1.80 (colored)

Sync with HEAD

Revision 1.87 / (download) - annotate - [select for diffs], Sat Feb 26 14:43:18 2011 UTC (11 years, 11 months ago) by jruoho
Branch: MAIN
CVS Tags: rmind-uvmplock-nbase, rmind-uvmplock-base, cherry-xenmp-base, bouyer-quota2-nbase
Branch point for: cherry-xenmp
Changes since 1.86: +17 -12 lines
Diff to previous 1.86 (colored)

Use config_defer(9) for cpu_rescan() in cpu_attach().
Also mark few local functions as static.

Revision 1.86 / (download) - annotate - [select for diffs], Thu Feb 24 15:42:17 2011 UTC (11 years, 11 months ago) by jruoho
Branch: MAIN
Changes since 1.85: +8 -20 lines
Diff to previous 1.85 (colored)

Fix autoconf(9) of cpufeaturebus.

Revision 1.85 / (download) - annotate - [select for diffs], Thu Feb 24 13:58:39 2011 UTC (11 years, 11 months ago) by jruoho
Branch: MAIN
Changes since 1.84: +8 -2 lines
Diff to previous 1.84 (colored)

Move VIA_C7TEMP to the cpufeaturebus.

Revision 1.84 / (download) - annotate - [select for diffs], Thu Feb 24 10:56:02 2011 UTC (11 years, 11 months ago) by jruoho
Branch: MAIN
Changes since 1.83: +8 -2 lines
Diff to previous 1.83 (colored)

Move PowerNow! to the cpufeaturebus.

Revision 1.83 / (download) - annotate - [select for diffs], Wed Feb 23 11:43:23 2011 UTC (11 years, 11 months ago) by jruoho
Branch: MAIN
Changes since 1.82: +14 -5 lines
Diff to previous 1.82 (colored)

Move ENHANCED_SPEEDSTEP, or henceforth est(4), to the cpufeaturebus.

Revision 1.82 / (download) - annotate - [select for diffs], Sun Feb 20 13:42:46 2011 UTC (11 years, 11 months ago) by jruoho
Branch: MAIN
Changes since 1.81: +12 -2 lines
Diff to previous 1.81 (colored)

Modularize coretemp(4). Ok jmcneill@.

Revision 1.81 / (download) - annotate - [select for diffs], Sat Feb 19 13:52:28 2011 UTC (11 years, 11 months ago) by jmcneill
Branch: MAIN
Changes since 1.80: +40 -4 lines
Diff to previous 1.80 (colored)

modularize VIA PadLock support
 - retire options VIA_PADLOCK, replace with 'padlock0 at cpu0'
 - driver supports attach & detach
 - support building as a module

Revision 1.79.4.1 / (download) - annotate - [select for diffs], Tue Feb 8 16:19:45 2011 UTC (11 years, 11 months ago) by bouyer
Branch: bouyer-quota2
Changes since 1.79: +5 -4 lines
Diff to previous 1.79 (colored)

Sync with HEAD

Revision 1.80 / (download) - annotate - [select for diffs], Wed Feb 2 12:26:42 2011 UTC (12 years ago) by bouyer
Branch: MAIN
CVS Tags: uebayasi-xip-base7, bouyer-quota2-base
Changes since 1.79: +5 -4 lines
Diff to previous 1.79 (colored)

Some CPU have cpu counter (CPUID_TSC is there) but don't handle the
rdmsr instruction (CPUID_MSR is not there).
Introduce a cpu_counter_serializing() function to remplace rdmsr(MSR_TSC)
calls, which does a rdmsr(MSR_TSC) if available and cpu_counter() otherwise.
This makes the cpu counter useable on vortex86 CPUs.
OK ad@

Revision 1.79 / (download) - annotate - [select for diffs], Tue Jan 11 18:25:25 2011 UTC (12 years ago) by jruoho
Branch: MAIN
CVS Tags: jruoho-x86intr-base
Branch point for: jruoho-x86intr, bouyer-quota2
Changes since 1.78: +11 -4 lines
Diff to previous 1.78 (colored)

Use pmf_device_register1(9) and add cpu_shutdown(), which calls cpu_suspend().

Revision 1.62.2.4 / (download) - annotate - [select for diffs], Mon Jan 10 00:37:37 2011 UTC (12 years ago) by jym
Branch: jym-xensuspend
Changes since 1.62.2.3: +3 -3 lines
Diff to previous 1.62.2.3 (colored) to branchpoint 1.62 (colored)

Sync with HEAD

Revision 1.66.2.6 / (download) - annotate - [select for diffs], Tue Nov 9 06:06:31 2010 UTC (12 years, 2 months ago) by uebayasi
Branch: uebayasi-xip
Changes since 1.66.2.5: +2 -7 lines
Diff to previous 1.66.2.5 (colored) to branchpoint 1.66 (colored) next main 1.67 (colored)

Sync with HEAD.

Revision 1.66.2.5 / (download) - annotate - [select for diffs], Tue Nov 9 06:03:40 2010 UTC (12 years, 2 months ago) by uebayasi
Branch: uebayasi-xip
Changes since 1.66.2.4: +6 -2 lines
Diff to previous 1.66.2.4 (colored) to branchpoint 1.66 (colored)

Sync with HEAD.

Revision 1.78 / (download) - annotate - [select for diffs], Sat Nov 6 11:46:04 2010 UTC (12 years, 2 months ago) by uebayasi
Branch: MAIN
CVS Tags: uebayasi-xip-base6, uebayasi-xip-base5, matt-mips64-premerge-20101231
Changes since 1.77: +3 -3 lines
Diff to previous 1.77 (colored)

Machine dependent code is considered as part of UVM.  Include
internal API header.

Revision 1.62.2.3 / (download) - annotate - [select for diffs], Sun Oct 24 22:48:18 2010 UTC (12 years, 3 months ago) by jym
Branch: jym-xensuspend
Changes since 1.62.2.2: +82 -35 lines
Diff to previous 1.62.2.2 (colored) to branchpoint 1.62 (colored)

Sync with HEAD

Revision 1.66.2.4 / (download) - annotate - [select for diffs], Fri Oct 22 07:21:42 2010 UTC (12 years, 3 months ago) by uebayasi
Branch: uebayasi-xip
Changes since 1.66.2.3: +0 -3 lines
Diff to previous 1.66.2.3 (colored) to branchpoint 1.66 (colored)

Sync with HEAD (-D20101022).

Revision 1.33.2.5 / (download) - annotate - [select for diffs], Sat Oct 9 03:31:58 2010 UTC (12 years, 3 months ago) by yamt
Branch: yamt-nfs-mp
Changes since 1.33.2.4: +2 -5 lines
Diff to previous 1.33.2.4 (colored) to branchpoint 1.33 (colored) next main 1.34 (colored)

sync with head

Revision 1.77 / (download) - annotate - [select for diffs], Fri Aug 20 06:34:32 2010 UTC (12 years, 5 months ago) by jruoho
Branch: MAIN
CVS Tags: yamt-nfs-mp-base11, uebayasi-xip-base4, uebayasi-xip-base3
Changes since 1.76: +2 -5 lines
Diff to previous 1.76 (colored)

Revert all previous changes that were made naively believing that the
existing CPU power management implementations could peacefully coexist with
the acpicpu(4) driver. The following options can not be used with acpicpu(4):
ENHANCED_SPEEDSTEP, INTEL_ONDEMAND_CLOCKMOD, POWERNOW_K7, and POWERNOW_K8.

Revision 1.66.2.3 / (download) - annotate - [select for diffs], Tue Aug 17 06:45:33 2010 UTC (12 years, 5 months ago) by uebayasi
Branch: uebayasi-xip
Changes since 1.66.2.2: +44 -5 lines
Diff to previous 1.66.2.2 (colored) to branchpoint 1.66 (colored)

Sync with HEAD.

Revision 1.33.2.4 / (download) - annotate - [select for diffs], Wed Aug 11 22:52:57 2010 UTC (12 years, 5 months ago) by yamt
Branch: yamt-nfs-mp
Changes since 1.33.2.3: +66 -19 lines
Diff to previous 1.33.2.3 (colored) to branchpoint 1.33 (colored)

sync with head.

Revision 1.76 / (download) - annotate - [select for diffs], Mon Aug 9 15:46:17 2010 UTC (12 years, 5 months ago) by jruoho
Branch: MAIN
CVS Tags: yamt-nfs-mp-base10, uebayasi-xip-base2
Changes since 1.75: +4 -5 lines
Diff to previous 1.75 (colored)

Revert the previous changes to EST. The used hack had an obvious flaw:
the acpicpu(4) driver should attach even if the existing frequency management
code fails to attach, mainly because ACPI is the only proper way to deal
with EST on new Intel system.

Use a more drastic hack to deal with this: when acpicpu(4) attachs, it tears
down any existing sysctl(8) controls and installs identical ones in place.
Upon detachment, the initialization function of the existing EST is called.

Revision 1.75 / (download) - annotate - [select for diffs], Mon Aug 9 04:18:48 2010 UTC (12 years, 5 months ago) by jruoho
Branch: MAIN
Changes since 1.74: +6 -2 lines
Diff to previous 1.74 (colored)

Move the sysctl function pointers used by acpicpu(4) to x86/cpu.c.
Rename these so that the same pointers may be used in other parts.

Revision 1.74 / (download) - annotate - [select for diffs], Wed Aug 4 10:02:12 2010 UTC (12 years, 6 months ago) by jruoho
Branch: MAIN
Changes since 1.73: +3 -2 lines
Diff to previous 1.73 (colored)

Store the MADT-derived CPU ID to <x86/cpu.h>. This is required to properly
match the ACPI processor object ID with the ID available in the APIC table.

Revision 1.73 / (download) - annotate - [select for diffs], Sat Jul 24 00:45:56 2010 UTC (12 years, 6 months ago) by jym
Branch: MAIN
Changes since 1.72: +40 -5 lines
Diff to previous 1.72 (colored)

Welcome PAE inside i386 current.

This patch is inspired by work previously done by Jeremy Morse, ported by me
to -current, merged with the work previously done for port-xen, together with
additionals fixes and improvements.

PAE option is disabled by default in GENERIC (but will be enabled in ALL in
the next few days).

In quick, PAE switches the CPU to a mode where physical addresses become
36 bits (64 GiB). Virtual address space remains at 32 bits (4 GiB). To cope
with the increased size of the physical address, they are manipulated as
64 bits variables by kernel and MMU.

When supported by the CPU, it also allows the use of the NX/XD bit that
provides no-execution right enforcement on a per physical page basis.

Notes:

- reworked locore.S

- introduce cpu_load_pmap(), used to switch pmap for the curcpu. Due to the
different handling of pmap mappings with PAE vs !PAE, Xen vs native, details
are hidden within this function. This helps calling it from assembly,
as some features, like BIOS calls, switch to pmap_kernel before mapping
trampoline code in low memory.

- some changes in bioscall and kvm86_call, to reflect the above.

- the L3 is "pinned" per-CPU, and is only manipulated by a
reduced set of functions within pmap. To track the L3, I added two
elements to struct cpu_info, namely ci_l3_pdirpa (PA of the L3), and
ci_l3_pdir (the L3 VA). Rest of the code considers that it runs "just
like" a normal i386, except that the L2 is 4 pages long (PTP_LEVELS is
still 2).

- similar to the ci_pae_l3_pdir{,pa} variables, amd64's xen_current_user_pgd
becomes an element of cpu_info (slowly paving the way for MP world).

- bootinfo_source struct declaration is modified, to cope with paddr_t size
change with PAE (it is not correct to assume that bs_addr is a paddr_t when
compiled with PAE - it should remain 32 bits). bs_addrs is now a
void * array (in bootloader's code under i386/stand/, the bs_addrs
is a physaddr_t, which is an unsigned long).

- fixes in multiboot code (same reason as bootinfo): paddr_t size
change. I used Elf32_* types, use RELOC() where necessary, and move the
memcpy() functions out of the if/else if (I do not expect sym and str tables
to overlap with ELF).

- 64 bits atomic functions for pmap

- all pmap_pdirpa access are now done through the pmap_pdirpa macro. It
hides the L3/L2 stuff from PAE, as well as the pm_pdirpa change in
struct pmap (it now becomes a PDP_SIZE array, with or without PAE).

- manipulation of recursive mappings ( PDIR_SLOT_{,A}PTEs ) is done via
loops on PDP_SIZE.

See also http://mail-index.netbsd.org/port-i386/2010/07/17/msg002062.html

No objection raised on port-i386@ and port-xen@R for about a week.

XXX kvm(3) will be fixed in another patch to properly handle both PAE and !PAE
kernel dumps (VA => PA macros are slightly different, and need proper 64 bits
PA support in kvm_i386).

XXX Mixing PAE and !PAE modules may lead to unwanted/unexpected results. This
cannot be solved easily, and needs lots of thinking before being declared
safe (paddr_t/bus_addr_t size handling, PD/PT macros abstractions).

Revision 1.72 / (download) - annotate - [select for diffs], Thu Jul 8 11:22:24 2010 UTC (12 years, 6 months ago) by rmind
Branch: MAIN
Changes since 1.71: +3 -4 lines
Diff to previous 1.71 (colored)

cpu_attach: use kmem_zalloc instead of memset.

Revision 1.71 / (download) - annotate - [select for diffs], Tue Jul 6 20:50:35 2010 UTC (12 years, 7 months ago) by cegger
Branch: MAIN
Changes since 1.70: +3 -2 lines
Diff to previous 1.70 (colored)

Turn PMAP_NOCACHE into MI flag.
Add MI flags PMAP_WRITE_COMBINE, PMAP_WRITE_BACK, PMAP_NOCACHE_OVR.
Update pmap(9) manpage.

hppa: Remove MD PMAP_NOCACHE flag as it exists as MI flag
mips: Rename MD PMAP_NOCACHE to PGC_NOCACHE.

x86: Implement new MI flags using Page-Attribute Tables.
x86: Implement BUS_SPACE_MAP_PREFETCHABLE.

Patch presented on tech-kern@:
http://mail-index.netbsd.org/tech-kern/2010/06/30/msg008458.html

No comments on this last version.

Revision 1.69.2.2 / (download) - annotate - [select for diffs], Sun May 30 05:17:12 2010 UTC (12 years, 8 months ago) by rmind
Branch: rmind-uvmplock
Changes since 1.69.2.1: +22 -14 lines
Diff to previous 1.69.2.1 (colored) to branchpoint 1.69 (colored)

sync with head

Revision 1.66.2.2 / (download) - annotate - [select for diffs], Fri Apr 30 14:39:58 2010 UTC (12 years, 9 months ago) by uebayasi
Branch: uebayasi-xip
Changes since 1.66.2.1: +28 -21 lines
Diff to previous 1.66.2.1 (colored) to branchpoint 1.66 (colored)

Sync with HEAD.

Revision 1.66.2.1 / (download) - annotate - [select for diffs], Wed Apr 28 08:25:33 2010 UTC (12 years, 9 months ago) by uebayasi
Branch: uebayasi-xip
Changes since 1.66: +3 -2 lines
Diff to previous 1.66 (colored)

Adjustment for uvm/uvm_page.h.  More to follow later.

Revision 1.69.2.1 / (download) - annotate - [select for diffs], Mon Apr 26 02:43:35 2010 UTC (12 years, 9 months ago) by rmind
Branch: rmind-uvmplock
Changes since 1.69: +6 -6 lines
Diff to previous 1.69 (colored)

Apply renovated patch to significantly reduce TLB shootdowns in x86 pmap,
also provide TLBSTATS option to measure and track TLB shootdowns.  Details:

http://mail-index.netbsd.org/port-i386/2009/01/11/msg001018.html

Patch from Andrew Doran, proposed on tech-x86 [sic], in January 2009.

XXX: amd64 and xen are not yet; work in progress.

Revision 1.57.4.3.2.1 / (download) - annotate - [select for diffs], Fri Apr 23 04:17:30 2010 UTC (12 years, 9 months ago) by snj
Branch: netbsd-5-0
Changes since 1.57.4.3: +10 -3 lines
Diff to previous 1.57.4.3 (colored) next main 1.57.4.4 (colored)

Apply patch (requested by jym in ticket #1380):
Fix the NX regression issue observed on amd64 kernels, where per-page
execution right was disabled (therefore leading to the inability
of the kernel to detect fraudulent use of memory mappings marked as not
being executable).

Revision 1.57.4.4 / (download) - annotate - [select for diffs], Thu Apr 22 20:02:48 2010 UTC (12 years, 9 months ago) by snj
Branch: netbsd-5
CVS Tags: netbsd-5-2-RELEASE, netbsd-5-2-RC1, netbsd-5-2-3-RELEASE, netbsd-5-2-2-RELEASE, netbsd-5-2-1-RELEASE, netbsd-5-2, netbsd-5-1-RELEASE, netbsd-5-1-RC4, netbsd-5-1-RC3, netbsd-5-1-RC2, netbsd-5-1-RC1, netbsd-5-1-5-RELEASE, netbsd-5-1-4-RELEASE, netbsd-5-1-3-RELEASE, netbsd-5-1-2-RELEASE, netbsd-5-1-1-RELEASE, netbsd-5-1, matt-nb5-pq3-base, matt-nb5-pq3
Changes since 1.57.4.3: +10 -3 lines
Diff to previous 1.57.4.3 (colored) to branchpoint 1.57 (colored) next main 1.58 (colored)

Apply patch (requested by jym in ticket #1380):
Fix the NX regression issue observed on amd64 kernels, where per-page
execution right was disabled (therefore leading to the inability
of the kernel to detect fraudulent use of memory mappings marked as not
being executable).

Revision 1.70 / (download) - annotate - [select for diffs], Sun Apr 18 23:47:51 2010 UTC (12 years, 9 months ago) by jym
Branch: MAIN
CVS Tags: uebayasi-xip-base1
Changes since 1.69: +22 -14 lines
Diff to previous 1.69 (colored)

This patch fixes the NX regression issue observed on amd64 kernels, where
per-page execution right was disabled (therefore leading to the inability
of the kernel to detect fraudulent use of memory mappings marked as not
being executable).

- replace cpu_feature and ci_feature_flags variables by cpu_feature and
ci_feat_val arrays. This makes it cleaner and brings kernel code closer
to the design of cpuctl(8). A warning will be raised for each CPU that
does not expose the same features as the Boot Processor (BP).

- the blacklist of CPU features is now a macro defined in the
specialreg.h header, instead of hardcoding it inside MD initialization
code; fix comments.

- replace checks against CPUID_TSC with the cpu_hascounter() function.

- clean up the code in init_x86_64(), as cpu_feature variables are set
inside cpu_probe().

- use cpu_init_msrs() for i386. It will be eventually used later for NX
feature under i386 PAE kernels.

- remove code that checks for CPUID_NOX in amd64 mptramp.S, this is already
performed by cpu_hatch() through cpu_init_msrs().

- remove cpu_signature and feature_flags members from struct mpbios_proc
(they were never used).

This patch was tested with i386 MONOLITHIC, XEN3PAE_DOM0 and XEN3_DOM0 under
a native i386 host, and amd64 GENERIC, XEN3_DOM0 via QEMU virtual machines.

XXX Should kernel rev be bumped?

XXX A similar patch should be pulled-up for NetBSD-5, hopefully tomorrow.

Revision 1.33.2.3 / (download) - annotate - [select for diffs], Thu Mar 11 15:03:08 2010 UTC (12 years, 10 months ago) by yamt
Branch: yamt-nfs-mp
Changes since 1.33.2.2: +22 -19 lines
Diff to previous 1.33.2.2 (colored) to branchpoint 1.33 (colored)

sync with head

Revision 1.69 / (download) - annotate - [select for diffs], Wed Feb 24 22:37:55 2010 UTC (12 years, 11 months ago) by dyoung
Branch: MAIN
CVS Tags: yamt-nfs-mp-base9
Branch point for: rmind-uvmplock
Changes since 1.68: +6 -6 lines
Diff to previous 1.68 (colored)

A pointer typedef entails trading too much flexibility to declare const
and non-const types, and the kernel uses both const and non-const
PMF qualifiers and device suspensors, so change the pmf_qual_t and
device_suspensor_t typedefs from "pointers to const" to non-pointer,
non-const types.

Revision 1.68 / (download) - annotate - [select for diffs], Tue Feb 9 23:52:13 2010 UTC (12 years, 11 months ago) by jym
Branch: MAIN
Changes since 1.67: +3 -3 lines
Diff to previous 1.67 (colored)

Wrap a comment; add a space after a comma to another (align with next line)

Revision 1.67 / (download) - annotate - [select for diffs], Tue Feb 9 23:47:10 2010 UTC (12 years, 11 months ago) by jym
Branch: MAIN
Changes since 1.66: +3 -4 lines
Diff to previous 1.66 (colored)

Use roundup2() instead of hardcoding the operation.

Revision 1.66 / (download) - annotate - [select for diffs], Fri Jan 8 19:43:26 2010 UTC (13 years ago) by dyoung
Branch: MAIN
CVS Tags: uebayasi-xip-base
Branch point for: uebayasi-xip
Changes since 1.65: +6 -6 lines
Diff to previous 1.65 (colored)

Expand PMF_FN_* macros.

Revision 1.65 / (download) - annotate - [select for diffs], Sat Nov 21 03:11:01 2009 UTC (13 years, 2 months ago) by rmind
Branch: MAIN
CVS Tags: matt-premerge-20091211
Changes since 1.64: +12 -8 lines
Diff to previous 1.64 (colored)

Use lwp_getpcb() on x86 MD code, clean from struct user usage.

Revision 1.64 / (download) - annotate - [select for diffs], Sat Nov 7 07:27:49 2009 UTC (13 years, 2 months ago) by cegger
Branch: MAIN
Changes since 1.63: +4 -4 lines
Diff to previous 1.63 (colored)

Add a flags argument to pmap_kenter_pa(9).
Patch showed on tech-kern@ http://mail-index.netbsd.org/tech-kern/2009/11/04/msg006434.html
No objections.

Revision 1.62.2.2 / (download) - annotate - [select for diffs], Sun Nov 1 13:58:17 2009 UTC (13 years, 3 months ago) by jym
Branch: jym-xensuspend
Changes since 1.62.2.1: +0 -0 lines
Diff to previous 1.62.2.1 (colored) to branchpoint 1.62 (colored)

Sync with HEAD.

Revision 1.62.2.1 / (download) - annotate - [select for diffs], Wed May 13 17:18:45 2009 UTC (13 years, 8 months ago) by jym
Branch: jym-xensuspend
Changes since 1.62: +2 -6 lines
Diff to previous 1.62 (colored)

Sync with HEAD.

Commit is split, to avoid a "too many arguments" protocol error.

Revision 1.33.2.2 / (download) - annotate - [select for diffs], Mon May 4 08:12:10 2009 UTC (13 years, 9 months ago) by yamt
Branch: yamt-nfs-mp
Changes since 1.33.2.1: +46 -25 lines
Diff to previous 1.33.2.1 (colored) to branchpoint 1.33 (colored)

sync with head.

Revision 1.57.2.3 / (download) - annotate - [select for diffs], Tue Apr 28 07:34:57 2009 UTC (13 years, 9 months ago) by skrll
Branch: nick-hppapmap
Changes since 1.57.2.2: +2 -6 lines
Diff to previous 1.57.2.2 (colored) to branchpoint 1.57 (colored) next main 1.58 (colored)

Sync with HEAD.

Revision 1.63 / (download) - annotate - [select for diffs], Fri Mar 27 19:53:19 2009 UTC (13 years, 10 months ago) by drochner
Branch: MAIN
CVS Tags: yamt-nfs-mp-base8, yamt-nfs-mp-base7, yamt-nfs-mp-base6, yamt-nfs-mp-base5, yamt-nfs-mp-base4, yamt-nfs-mp-base3, nick-hppapmap-base4, nick-hppapmap-base3, nick-hppapmap-base, jymxensuspend-base
Changes since 1.62: +2 -6 lines
Diff to previous 1.62 (colored)

Rearrange TSC inter-CPU synchronization code so that the gory details
are dealt with in x86/tsc.c and callers don't have to care that much.
Also add some comments and make some variables static.
approved by ad (a while ago)

Revision 1.57.2.2 / (download) - annotate - [select for diffs], Tue Mar 3 18:29:37 2009 UTC (13 years, 11 months ago) by skrll
Branch: nick-hppapmap
Changes since 1.57.2.1: +11 -3 lines
Diff to previous 1.57.2.1 (colored) to branchpoint 1.57 (colored)

Sync with HEAD.

Revision 1.57.4.3 / (download) - annotate - [select for diffs], Mon Feb 2 20:10:16 2009 UTC (14 years ago) by snj
Branch: netbsd-5
CVS Tags: netbsd-5-0-RELEASE, netbsd-5-0-RC4, netbsd-5-0-RC3, netbsd-5-0-RC2, netbsd-5-0-2-RELEASE, netbsd-5-0-1-RELEASE, matt-nb5-mips64-u2-k2-k4-k7-k8-k9, matt-nb5-mips64-u1-k1-k5, matt-nb5-mips64-premerge-20101231, matt-nb5-mips64-premerge-20091211, matt-nb5-mips64-k15, matt-nb4-mips64-k7-u2a-k9b
Branch point for: netbsd-5-0, matt-nb5-mips64
Changes since 1.57.4.2: +9 -4 lines
Diff to previous 1.57.4.2 (colored) to branchpoint 1.57 (colored)

Pull up following revision(s) (requested by ad in ticket #371):
	sys/arch/x86/x86/cpu.c: revision 1.59
Link cpus in the order they are attaching and not in inverse order.

Revision 1.57.4.2 / (download) - annotate - [select for diffs], Mon Feb 2 03:06:12 2009 UTC (14 years ago) by snj
Branch: netbsd-5
Changes since 1.57.4.1: +3 -3 lines
Diff to previous 1.57.4.1 (colored) to branchpoint 1.57 (colored)

Pull up following revision(s) (requested by ad in ticket #343):
	common/lib/libc/arch/i386/atomic/atomic.S: revision 1.14
	sys/arch/x86/include/cpufunc.h: revision 1.9
	sys/arch/x86/x86/identcpu.c: revision 1.12
	sys/arch/x86/x86/cpu.c: revision 1.60
	sys/arch/x86/x86/patch.c: revision 1.15
PR kern/40213 my i386 machine can't boot because of tsc
- Patch in atomic_cas_64() twice. The first patch is early and makes it
  the MP-atomic version available if we have cmpxchg8b. The second patch
  strips the lock prefix if ncpu==1.
- Fix the i486 atomic_cas_64() to not unconditionally enable interrupts.

Revision 1.62 / (download) - annotate - [select for diffs], Wed Jan 21 21:26:01 2009 UTC (14 years ago) by bouyer
Branch: MAIN
CVS Tags: nick-hppapmap-base2
Branch point for: jym-xensuspend
Changes since 1.61: +11 -3 lines
Diff to previous 1.61 (colored)

Make i386 config without NPX work, problem reported and fix tested by
Wojciech Galazka.
While there change a __i386__ to i386 for consistency.

Revision 1.57.2.1 / (download) - annotate - [select for diffs], Mon Jan 19 13:17:09 2009 UTC (14 years ago) by skrll
Branch: nick-hppapmap
Changes since 1.57: +16 -12 lines
Diff to previous 1.57 (colored)

Sync with HEAD.

Revision 1.21.6.4 / (download) - annotate - [select for diffs], Sat Jan 17 13:28:38 2009 UTC (14 years ago) by mjf
Branch: mjf-devfs2
Changes since 1.21.6.3: +16 -12 lines
Diff to previous 1.21.6.3 (colored) to branchpoint 1.21 (colored) next main 1.22 (colored)

Sync with HEAD.

Revision 1.61 / (download) - annotate - [select for diffs], Tue Dec 23 15:41:21 2008 UTC (14 years, 1 month ago) by cegger
Branch: MAIN
CVS Tags: mjf-devfs2-base
Changes since 1.60: +6 -7 lines
Diff to previous 1.60 (colored)

move from malloc to kmem

Revision 1.60 / (download) - annotate - [select for diffs], Fri Dec 19 11:21:24 2008 UTC (14 years, 1 month ago) by ad
Branch: MAIN
Changes since 1.59: +3 -3 lines
Diff to previous 1.59 (colored)

PR kern/40213 my i386 machine can't boot because of tsc

- Patch in atomic_cas_64() twice. The first patch is early and makes it
  the MP-atomic version available if we have cmpxchg8b. The second patch
  strips the lock prefix if ncpu==1.

- Fix the i486 atomic_cas_64() to not unconditionally enable interrupts.

Revision 1.56.4.2 / (download) - annotate - [select for diffs], Sat Dec 13 01:13:38 2008 UTC (14 years, 1 month ago) by haad
Branch: haad-dm
Changes since 1.56.4.1: +11 -6 lines
Diff to previous 1.56.4.1 (colored) to branchpoint 1.56 (colored) next main 1.57 (colored)

Update haad-dm branch to haad-dm-base2.

Revision 1.57.4.1 / (download) - annotate - [select for diffs], Thu Nov 13 00:04:07 2008 UTC (14 years, 2 months ago) by snj
Branch: netbsd-5
CVS Tags: netbsd-5-0-RC1
Changes since 1.57: +4 -4 lines
Diff to previous 1.57 (colored)

Pull up following revision(s) (requested by rmind in ticket #48):
	sys/kern/kern_cpu.c: revision 1.37
	sys/arch/x86/x86/cpu.c: revision 1.58
	sys/arch/xen/x86/cpu.c: revision 1.29
	sys/sys/cpu.h: revision 1.24
	sys/kern/sys_sched.c: revision 1.31
- Avoid the race with CPU online/offline state changes, when setting the
  affinity (cpu_lock protects these operations now).
- Disallow setting of state of CPU to to offline, if there are bound LWPs,
  which have no CPU to migrate.
- Disallow setting of affinity for the LWP(s), if all CPUs in the dynamic
  CPU-set are offline.
- sched_setaffinity: fix invalid check of kcpuset_isset().
- Rename cpu_setonline() to cpu_setstate().
Should fix PR/39349.

Revision 1.59 / (download) - annotate - [select for diffs], Thu Nov 6 19:29:46 2008 UTC (14 years, 2 months ago) by cegger
Branch: MAIN
CVS Tags: haad-nbase2, haad-dm-base2, haad-dm-base, ad-audiomp2-base, ad-audiomp2
Changes since 1.58: +9 -4 lines
Diff to previous 1.58 (colored)

Link cpus in the order they are attaching and not in inverse order.

Revision 1.58 / (download) - annotate - [select for diffs], Fri Oct 31 00:36:22 2008 UTC (14 years, 3 months ago) by rmind
Branch: MAIN
Changes since 1.57: +4 -4 lines
Diff to previous 1.57 (colored)

- Avoid the race with CPU online/offline state changes, when setting the
  affinity (cpu_lock protects these operations now).
- Disallow setting of state of CPU to to offline, if there are bound LWPs,
  which have no CPU to migrate.
- Disallow setting of affinity for the LWP(s), if all CPUs in the dynamic
  CPU-set are offline.
- sched_setaffinity: fix invalid check of kcpuset_isset().
- Rename cpu_setonline() to cpu_setstate().

Should fix PR/39349.

Revision 1.56.4.1 / (download) - annotate - [select for diffs], Sun Oct 19 22:16:07 2008 UTC (14 years, 3 months ago) by haad
Branch: haad-dm
Changes since 1.56: +4 -4 lines
Diff to previous 1.56 (colored)

Sync with HEAD.

Revision 1.57 / (download) - annotate - [select for diffs], Wed Oct 15 08:13:17 2008 UTC (14 years, 3 months ago) by ad
Branch: MAIN
CVS Tags: netbsd-5-base, matt-mips64-base2, haad-dm-base1
Branch point for: nick-hppapmap, netbsd-5
Changes since 1.56: +4 -4 lines
Diff to previous 1.56 (colored)

- Rename cpu_lookup_byindex() to cpu_lookup(). The hardware ID isn't of
  interest to MI code. No functional change.
- Change /dev/cpu to operate on cpu index, not hardware ID. Now cpuctl
  shouldn't print confused output.

Revision 1.36.2.1 / (download) - annotate - [select for diffs], Mon Jun 23 04:30:50 2008 UTC (14 years, 7 months ago) by wrstuden
Branch: wrstuden-revivesa
Changes since 1.36: +205 -149 lines
Diff to previous 1.36 (colored) next main 1.37 (colored)

Sync w/ -current. 34 merge conflicts to follow.

Revision 1.31.2.3 / (download) - annotate - [select for diffs], Tue Jun 17 09:14:20 2008 UTC (14 years, 7 months ago) by yamt
Branch: yamt-pf42
Changes since 1.31.2.2: +5 -2 lines
Diff to previous 1.31.2.2 (colored) to branchpoint 1.31 (colored) next main 1.32 (colored)

sync with head.

Revision 1.21.6.3 / (download) - annotate - [select for diffs], Thu Jun 5 19:14:34 2008 UTC (14 years, 8 months ago) by mjf
Branch: mjf-devfs2
Changes since 1.21.6.2: +9 -1 lines
Diff to previous 1.21.6.2 (colored) to branchpoint 1.21 (colored)

Sync with HEAD.

Also fix build.

Revision 1.31.2.2 / (download) - annotate - [select for diffs], Wed Jun 4 02:05:03 2008 UTC (14 years, 8 months ago) by yamt
Branch: yamt-pf42
Changes since 1.31.2.1: +18 -8 lines
Diff to previous 1.31.2.1 (colored) to branchpoint 1.31 (colored)

sync with head

Revision 1.56 / (download) - annotate - [select for diffs], Tue Jun 3 23:05:01 2008 UTC (14 years, 8 months ago) by jmcneill
Branch: MAIN
CVS Tags: yamt-pf42-base4, wrstuden-revivesa-base-4, wrstuden-revivesa-base-3, wrstuden-revivesa-base-2, wrstuden-revivesa-base-1, wrstuden-revivesa-base, simonb-wapbl-nbase, simonb-wapbl-base, simonb-wapbl
Branch point for: haad-dm
Changes since 1.55: +5 -2 lines
Diff to previous 1.55 (colored)

If we boot with RB_MD1, register a NULL pmf handler for APs so we can
still suspend.

Revision 1.55 / (download) - annotate - [select for diffs], Mon Jun 2 14:41:41 2008 UTC (14 years, 8 months ago) by ad
Branch: MAIN
CVS Tags: yamt-pf42-base3
Changes since 1.54: +8 -3 lines
Diff to previous 1.54 (colored)

- Don't bother using sse to copy/zero pages on demand.  It turns out not
  to be worth it.
- If the machine has sse, re-enable zeroing pages in the idle loop and
  use the sse instructions so that we don't blow out the cache.

Revision 1.21.6.2 / (download) - annotate - [select for diffs], Mon Jun 2 13:22:51 2008 UTC (14 years, 8 months ago) by mjf
Branch: mjf-devfs2
Changes since 1.21.6.1: +238 -175 lines
Diff to previous 1.21.6.1 (colored) to branchpoint 1.21 (colored)

Sync with HEAD.

Revision 1.54 / (download) - annotate - [select for diffs], Wed May 28 11:50:01 2008 UTC (14 years, 8 months ago) by ad
Branch: MAIN
Changes since 1.53: +9 -5 lines
Diff to previous 1.53 (colored)

Remove X86_MAXPROCS. There is still a 32-cpu limit, but it's now using
the MI constants.

Revision 1.53 / (download) - annotate - [select for diffs], Wed May 21 01:18:00 2008 UTC (14 years, 8 months ago) by ad
Branch: MAIN
Changes since 1.52: +4 -3 lines
Diff to previous 1.52 (colored)

Do the errata patchup after identifying the CPU, to avoid badly formatted
output.

Revision 1.52 / (download) - annotate - [select for diffs], Wed May 21 01:14:17 2008 UTC (14 years, 8 months ago) by ad
Branch: MAIN
Changes since 1.51: +3 -3 lines
Diff to previous 1.51 (colored)

verbose -> debug for # page colours

Revision 1.31.2.1 / (download) - annotate - [select for diffs], Sun May 18 12:33:04 2008 UTC (14 years, 8 months ago) by yamt
Branch: yamt-pf42
Changes since 1.31: +212 -151 lines
Diff to previous 1.31 (colored)

sync with head.

Revision 1.33.2.1 / (download) - annotate - [select for diffs], Fri May 16 02:23:28 2008 UTC (14 years, 8 months ago) by yamt
Branch: yamt-nfs-mp
Changes since 1.33: +193 -156 lines
Diff to previous 1.33 (colored)

sync with head.

Revision 1.51 / (download) - annotate - [select for diffs], Wed May 14 12:53:49 2008 UTC (14 years, 8 months ago) by ad
Branch: MAIN
CVS Tags: yamt-pf42-base2, yamt-nfs-mp-base2, hpcarm-cleanup-nbase
Changes since 1.50: +34 -29 lines
Diff to previous 1.50 (colored)

- cpu_attach: ensure that the boot processor is set up before trying to
  initialize APs. We need the lapic set up and the boot processor may
  not be attached first.

- mp_cpu_start: write back and invalidate the data cache before starting the
  init IPI sequence. If a buggy BIOS has left the AP with cache disabled,
  it might not be able to participate in the cache coherency protocol.

Revision 1.50 / (download) - annotate - [select for diffs], Tue May 13 22:39:18 2008 UTC (14 years, 8 months ago) by ad
Branch: MAIN
Changes since 1.49: +11 -15 lines
Diff to previous 1.49 (colored)

Be more conservative during AP startup. Don't let the AP access the lapic
or do any setup until the boot processor has finished the init sequence,
and add a few more delays.

Revision 1.49 / (download) - annotate - [select for diffs], Mon May 12 14:41:07 2008 UTC (14 years, 8 months ago) by ad
Branch: MAIN
Changes since 1.48: +4 -12 lines
Diff to previous 1.48 (colored)

- Make cpu_number() return MI index, otherwise the pmap cannot work on
  systems with lapic IDs > X86_MAXPROCS.
- Kill cpu_info[] array and use MI cpu_lookup_byindex().

Revision 1.48 / (download) - annotate - [select for diffs], Mon May 12 14:29:06 2008 UTC (14 years, 8 months ago) by ad
Branch: MAIN
Changes since 1.47: +7 -2 lines
Diff to previous 1.47 (colored)

Don't crash if more than 32 cpus. Hopefully the boot processor will be
within the first 32 attached.

Revision 1.47 / (download) - annotate - [select for diffs], Mon May 12 14:19:33 2008 UTC (14 years, 8 months ago) by ad
Branch: MAIN
Changes since 1.46: +10 -8 lines
Diff to previous 1.46 (colored)

- Complain if unable to reset the lapic ID.
- Minor clean up.

Revision 1.46 / (download) - annotate - [select for diffs], Mon May 12 11:58:10 2008 UTC (14 years, 8 months ago) by ad
Branch: MAIN
Changes since 1.45: +5 -3 lines
Diff to previous 1.45 (colored)

cpu_hatch: hack around problem with multiple CPUs spinning in i8254_delay.

Revision 1.45 / (download) - annotate - [select for diffs], Sun May 11 22:26:59 2008 UTC (14 years, 8 months ago) by ad
Branch: MAIN
Changes since 1.44: +19 -26 lines
Diff to previous 1.44 (colored)

- Decouple the APIC ID from cpu_info[].
- Probe TSC frequency on each AP when hatching.

Revision 1.44 / (download) - annotate - [select for diffs], Sun May 11 16:26:56 2008 UTC (14 years, 8 months ago) by ad
Branch: MAIN
Changes since 1.43: +5 -37 lines
Diff to previous 1.43 (colored)

MP + apics are needed now so kill the #ifdefs

Revision 1.43 / (download) - annotate - [select for diffs], Sun May 11 16:23:05 2008 UTC (14 years, 8 months ago) by ad
Branch: MAIN
Changes since 1.42: +4 -2 lines
Diff to previous 1.42 (colored)

Don't reload LDTR unless a new value, which only happens for USER_LDT.

Revision 1.42 / (download) - annotate - [select for diffs], Sun May 11 15:59:51 2008 UTC (14 years, 8 months ago) by ad
Branch: MAIN
Changes since 1.41: +8 -19 lines
Diff to previous 1.41 (colored)

Stop using APIC IDs to identify CPUs for software purposes. Allows for
APIC IDs beyond 31, which has been possible for some time now.

Revision 1.41 / (download) - annotate - [select for diffs], Sun May 11 15:32:20 2008 UTC (14 years, 8 months ago) by ad
Branch: MAIN
Changes since 1.40: +2 -5 lines
Diff to previous 1.40 (colored)

Share cpu.h between the x86 ports.

Revision 1.40 / (download) - annotate - [select for diffs], Sun May 11 14:44:54 2008 UTC (14 years, 8 months ago) by ad
Branch: MAIN
Changes since 1.39: +9 -13 lines
Diff to previous 1.39 (colored)

Simplify x86 identcpu code, and share between i386/amd64.

Revision 1.39 / (download) - annotate - [select for diffs], Sat May 10 17:23:54 2008 UTC (14 years, 8 months ago) by ad
Branch: MAIN
Changes since 1.38: +8 -4 lines
Diff to previous 1.38 (colored)

If the boot processor's lapic has the wrong ID, reset it.

Revision 1.38 / (download) - annotate - [select for diffs], Sat May 10 16:12:32 2008 UTC (14 years, 8 months ago) by ad
Branch: MAIN
Changes since 1.37: +81 -20 lines
Diff to previous 1.37 (colored)

Improve x86 tsc handling:

- Ditch the cross-CPU calibration stuff. It didn't work properly, and it's
  near impossible to synchronize the CPUs in a running system, because bus
  traffic will interfere with any calibration attempt, messing up the
  timings.

- Only enable the TSC on CPUs where we are sure it does not drift. If we are
  On a known good CPU, give the TSC high timecounter quality, making it the
  default.

- When booting CPUs, detect TSC skew and account for it. Most Intel MP
  systems have synchronized counters, but that need not be true if the
  system has a complicated bus structure. As far as I know, AMD systems
  do not have synchronized TSCs and so we need to handle skew.

- While an AP is waiting to be set running, try and make the TSC drift by
  entering a reduced power state. If we detect drift, ensure that the TSC
  does not get a high timecounter quality. This should not happen and is
  only for safety.

- Make cpu_counter() stuff LKM safe.

Revision 1.37 / (download) - annotate - [select for diffs], Fri May 9 18:11:29 2008 UTC (14 years, 8 months ago) by joerg
Branch: MAIN
Changes since 1.36: +33 -2 lines
Diff to previous 1.36 (colored)

Make cpu_idle a macro calling a function pointer on x86.
Select the Xen idle routine for Xen, mwait if supported by the CPU and
it is not AMD and halt otherwise. As reported by Christoph Egger,
AMD Barcelona keeps the CPU in C0 state with MWAIT, contrary to HLT,
which uses C1 and therefore much less power.

Revision 1.36 / (download) - annotate - [select for diffs], Tue Apr 29 19:19:29 2008 UTC (14 years, 9 months ago) by ad
Branch: MAIN
Branch point for: wrstuden-revivesa
Changes since 1.35: +3 -3 lines
Diff to previous 1.35 (colored)

Minor correction to previous.

Revision 1.35 / (download) - annotate - [select for diffs], Tue Apr 29 19:18:19 2008 UTC (14 years, 9 months ago) by ad
Branch: MAIN
Changes since 1.34: +7 -6 lines
Diff to previous 1.34 (colored)

Recognise two new boot flags:

-1 disable MP
-2 disable ACPI

Revision 1.34 / (download) - annotate - [select for diffs], Mon Apr 28 20:23:40 2008 UTC (14 years, 9 months ago) by martin
Branch: MAIN
Changes since 1.33: +2 -9 lines
Diff to previous 1.33 (colored)

Remove clause 3 and 4 from TNF licenses

Revision 1.33 / (download) - annotate - [select for diffs], Thu Apr 24 15:59:57 2008 UTC (14 years, 9 months ago) by jmcneill
Branch: MAIN
CVS Tags: yamt-nfs-mp-base
Branch point for: yamt-nfs-mp
Changes since 1.32: +9 -2 lines
Diff to previous 1.32 (colored)

Gracefully handle a condition where apic id >= X86_MAXPROCS rather than
panicing.

Revision 1.32 / (download) - annotate - [select for diffs], Tue Apr 22 02:23:05 2008 UTC (14 years, 9 months ago) by tls
Branch: MAIN
Changes since 1.31: +19 -2 lines
Diff to previous 1.31 (colored)

Commit a quick workaround for the not-power-of-two cache colors problem
pointed out by Simon (Simon's option #3): use the greatest power of two
which is a divisor of the desired number of cache colors.

This code might want to stay even after the cache probing code is fixed.

Revision 1.31 / (download) - annotate - [select for diffs], Fri Apr 18 15:32:46 2008 UTC (14 years, 9 months ago) by cegger
Branch: MAIN
CVS Tags: yamt-pf42-baseX, yamt-pf42-base, yamt-pf42-X
Branch point for: yamt-pf42
Changes since 1.30: +2 -9 lines
Diff to previous 1.30 (colored)

g/c unused ioapic_bsp_id.
Per discussion with bouyer.

Revision 1.30 / (download) - annotate - [select for diffs], Thu Apr 17 18:45:08 2008 UTC (14 years, 9 months ago) by cegger
Branch: MAIN
Changes since 1.29: +4 -4 lines
Diff to previous 1.29 (colored)

wrap long line. Requested and OK by simonb.

Revision 1.29 / (download) - annotate - [select for diffs], Thu Apr 17 14:01:03 2008 UTC (14 years, 9 months ago) by yamt
Branch: MAIN
Changes since 1.28: +3 -3 lines
Diff to previous 1.28 (colored)

cpu_debug_dump: s/curproc/curlwp/ in a message.

Revision 1.28 / (download) - annotate - [select for diffs], Thu Apr 17 09:09:54 2008 UTC (14 years, 9 months ago) by cegger
Branch: MAIN
Changes since 1.27: +9 -9 lines
Diff to previous 1.27 (colored)

use aprint_*_dev.
OK simonb

Revision 1.27 / (download) - annotate - [select for diffs], Wed Apr 16 16:06:51 2008 UTC (14 years, 9 months ago) by cegger
Branch: MAIN
Changes since 1.26: +5 -5 lines
Diff to previous 1.26 (colored)

- use aprint_*_dev and device_xname
- use POSIX integer types

Revision 1.26 / (download) - annotate - [select for diffs], Sun Apr 13 22:23:58 2008 UTC (14 years, 9 months ago) by cegger
Branch: MAIN
Changes since 1.25: +26 -22 lines
Diff to previous 1.25 (colored)

use device accessors and other misc cleanups

Revision 1.21.6.1 / (download) - annotate - [select for diffs], Thu Apr 3 12:42:30 2008 UTC (14 years, 10 months ago) by mjf
Branch: mjf-devfs2
Changes since 1.21: +52 -33 lines
Diff to previous 1.21 (colored)

Sync with HEAD.

Revision 1.25 / (download) - annotate - [select for diffs], Wed Apr 2 11:52:54 2008 UTC (14 years, 10 months ago) by ad
Branch: MAIN
Changes since 1.24: +24 -17 lines
Diff to previous 1.24 (colored)

Add more error reporting to AP startup.

Revision 1.24 / (download) - annotate - [select for diffs], Tue Apr 1 11:09:58 2008 UTC (14 years, 10 months ago) by ad
Branch: MAIN
Changes since 1.23: +12 -2 lines
Diff to previous 1.23 (colored)

If MPDEBUG and waiting for the CPU to start, dump cpu_trace[] as it changes.

Revision 1.21.2.1 / (download) - annotate - [select for diffs], Mon Mar 24 07:15:09 2008 UTC (14 years, 10 months ago) by keiichi
Branch: keiichi-mipv6
Changes since 1.21: +20 -18 lines
Diff to previous 1.21 (colored) next main 1.22 (colored)

sync with head.

Revision 1.4.4.4 / (download) - annotate - [select for diffs], Sun Mar 23 02:04:28 2008 UTC (14 years, 10 months ago) by matt
Branch: matt-armv6
Changes since 1.4.4.3: +60 -28 lines
Diff to previous 1.4.4.3 (colored) to branchpoint 1.4 (colored) next main 1.5 (colored)

sync with HEAD

Revision 1.2.4.9 / (download) - annotate - [select for diffs], Mon Mar 17 09:14:36 2008 UTC (14 years, 10 months ago) by yamt
Branch: yamt-lazymbuf
Changes since 1.2.4.8: +20 -18 lines
Diff to previous 1.2.4.8 (colored) to branchpoint 1.2 (colored) next main 1.3 (colored)

sync with head.

Revision 1.23 / (download) - annotate - [select for diffs], Tue Mar 4 15:24:02 2008 UTC (14 years, 11 months ago) by cube
Branch: MAIN
CVS Tags: yamt-lazymbuf-base15, yamt-lazymbuf-base14, matt-armv6-nbase, keiichi-mipv6-nbase, keiichi-mipv6-base, ad-socklock-base1
Changes since 1.22: +16 -14 lines
Diff to previous 1.22 (colored)

Split device_t/softc.

Revision 1.22 / (download) - annotate - [select for diffs], Fri Feb 29 06:27:15 2008 UTC (14 years, 11 months ago) by dyoung
Branch: MAIN
Changes since 1.21: +6 -6 lines
Diff to previous 1.21 (colored)

Use PMF_FN_ARGS, PMF_FN_PROTO.

Revision 1.4.2.4 / (download) - annotate - [select for diffs], Mon Feb 18 21:05:17 2008 UTC (14 years, 11 months ago) by mjf
Branch: mjf-devfs
Changes since 1.4.2.3: +48 -17 lines
Diff to previous 1.4.2.3 (colored) to branchpoint 1.4 (colored) next main 1.5 (colored)

Sync with HEAD.

Revision 1.2.4.8 / (download) - annotate - [select for diffs], Mon Feb 11 14:59:32 2008 UTC (14 years, 11 months ago) by yamt
Branch: yamt-lazymbuf
Changes since 1.2.4.7: +8 -4 lines
Diff to previous 1.2.4.7 (colored) to branchpoint 1.2 (colored)

sync with head.

Revision 1.21 / (download) - annotate - [select for diffs], Sun Feb 10 14:37:41 2008 UTC (14 years, 11 months ago) by ad
Branch: MAIN
CVS Tags: nick-net80211-sync-base, nick-net80211-sync, mjf-devfs-base, hpcarm-cleanup-base
Branch point for: mjf-devfs2, keiichi-mipv6
Changes since 1.20: +8 -4 lines
Diff to previous 1.20 (colored)

Align cc_microtime and struct cpu_info to 64b.

Revision 1.2.4.7 / (download) - annotate - [select for diffs], Mon Feb 4 09:22:50 2008 UTC (15 years ago) by yamt
Branch: yamt-lazymbuf
Changes since 1.2.4.6: +19 -11 lines
Diff to previous 1.2.4.6 (colored) to branchpoint 1.2 (colored)

sync with head.

Revision 1.20 / (download) - annotate - [select for diffs], Wed Jan 30 01:10:21 2008 UTC (15 years ago) by jmcneill
Branch: MAIN
Changes since 1.19: +18 -11 lines
Diff to previous 1.19 (colored)

pmf: Naively track online/offline state of APs during suspend/resume.

Revision 1.19 / (download) - annotate - [select for diffs], Wed Jan 23 20:02:16 2008 UTC (15 years ago) by joerg
Branch: MAIN
Changes since 1.18: +3 -2 lines
Diff to previous 1.18 (colored)

Initialise the Local Vector Table of the primary LAPIC directly after
enabling it. Explicitly initialise LINT0 as ExtInt and LINT1 as NMI,
the platform default. Mask the NMIs on the application processors and
mask the ExtInt if a IOAPIC was found.

With this patch, "disable ioapic" is supposed to work and it will allow
enabling the local APIC on all systems that have one to gain e.g. the
better clock interrupt.

Revision 1.2.4.6 / (download) - annotate - [select for diffs], Mon Jan 21 09:40:13 2008 UTC (15 years ago) by yamt
Branch: yamt-lazymbuf
Changes since 1.2.4.5: +131 -54 lines
Diff to previous 1.2.4.5 (colored) to branchpoint 1.2 (colored)

sync with head

Revision 1.12.2.3 / (download) - annotate - [select for diffs], Sat Jan 19 12:14:49 2008 UTC (15 years ago) by bouyer
Branch: bouyer-xeni386
Changes since 1.12.2.2: +19 -1 lines
Diff to previous 1.12.2.2 (colored) to branchpoint 1.12 (colored) next main 1.13 (colored)

Sync with HEAD

Revision 1.18 / (download) - annotate - [select for diffs], Tue Jan 15 14:50:08 2008 UTC (15 years ago) by joerg
Branch: MAIN
CVS Tags: bouyer-xeni386-nbase, bouyer-xeni386-base
Changes since 1.17: +17 -11 lines
Diff to previous 1.17 (colored)

Introduce optional cpu_offline_md to execute MD actions at the end of
cpu_offline. Use this on amd64/i386 to force a FPU save. As this was
triggered by npxsave_cpu/fpusave_cpu not working for a different CPU,
remove the cpu_info argument and adjust npxsave_*/fpusave_* to use bool
for the save.

OK ad@

Revision 1.17 / (download) - annotate - [select for diffs], Mon Jan 14 15:23:56 2008 UTC (15 years ago) by joerg
Branch: MAIN
Changes since 1.16: +16 -4 lines
Diff to previous 1.16 (colored)

Ensure that non-primary CPUs save the FPU state on suspend.

Revision 1.4.4.3 / (download) - annotate - [select for diffs], Wed Jan 9 01:49:54 2008 UTC (15 years ago) by matt
Branch: matt-armv6
Changes since 1.4.4.2: +177 -98 lines
Diff to previous 1.4.4.2 (colored) to branchpoint 1.4 (colored)

sync with HEAD

Revision 1.12.2.2 / (download) - annotate - [select for diffs], Tue Jan 8 22:10:37 2008 UTC (15 years ago) by bouyer
Branch: bouyer-xeni386
CVS Tags: bouyer-xeni386-merge1
Changes since 1.12.2.1: +6 -5 lines
Diff to previous 1.12.2.1 (colored) to branchpoint 1.12 (colored)

Sync with HEAD

Revision 1.16 / (download) - annotate - [select for diffs], Sat Jan 5 21:47:18 2008 UTC (15 years, 1 month ago) by yamt
Branch: MAIN
CVS Tags: matt-armv6-base
Changes since 1.15: +2 -6 lines
Diff to previous 1.15 (colored)

- make amd64 use per-cpu tss.
- fix iopl syscall for amd64+xen.

Revision 1.15 / (download) - annotate - [select for diffs], Fri Jan 4 15:55:30 2008 UTC (15 years, 1 month ago) by yamt
Branch: MAIN
Changes since 1.14: +12 -7 lines
Diff to previous 1.14 (colored)

i386:
	- make tss per-cpu.  this considerably speeds up context switch for,
	  at least, pentium4, where ltr instruction seems very slow.
i386, xen:
	- kill cpu_maxproc.
kvm86:
	- adapt to per-cpu tss.
	- cleanup and simplify.
	- move kvm86_mp_lock to more meaningful place.
	- disable preemption during a call.

Revision 1.12.2.1 / (download) - annotate - [select for diffs], Wed Jan 2 21:51:23 2008 UTC (15 years, 1 month ago) by bouyer
Branch: bouyer-xeni386
Changes since 1.12: +28 -50 lines
Diff to previous 1.12 (colored)

Sync with HEAD

Revision 1.4.2.3 / (download) - annotate - [select for diffs], Thu Dec 27 00:43:26 2007 UTC (15 years, 1 month ago) by mjf
Branch: mjf-devfs
Changes since 1.4.2.2: +107 -49 lines
Diff to previous 1.4.2.2 (colored) to branchpoint 1.4 (colored)

Sync with HEAD.

Revision 1.10.2.2 / (download) - annotate - [select for diffs], Wed Dec 26 21:38:49 2007 UTC (15 years, 1 month ago) by ad
Branch: vmlocking2
Changes since 1.10.2.1: +107 -49 lines
Diff to previous 1.10.2.1 (colored) to branchpoint 1.10 (colored) next main 1.11 (colored)

Sync with head.

Revision 1.14 / (download) - annotate - [select for diffs], Tue Dec 18 07:17:17 2007 UTC (15 years, 1 month ago) by joerg
Branch: MAIN
CVS Tags: vmlocking2-base3
Changes since 1.13: +23 -19 lines
Diff to previous 1.13 (colored)

Add new IPI for saving CPU state explicitly, share high-level part of
ACPI wakeup code and teach it how to start the APs again. As a side
effect the CPU_START interface allows choosing between different
bootstrap codes more easily now.

Revision 1.13 / (download) - annotate - [select for diffs], Sat Dec 15 09:18:59 2007 UTC (15 years, 1 month ago) by joerg
Branch: MAIN
Changes since 1.12: +7 -33 lines
Diff to previous 1.12 (colored)

For now, remove the attempts to shutdown other CPUs and bring them back
online. It runs into issues in the pmap code and will handled
differently. This allows sysctl -w machdep.sleep_state=3 to at least
recover into a working system again.

Revision 1.11.2.1 / (download) - annotate - [select for diffs], Tue Dec 11 15:22:13 2007 UTC (15 years, 1 month ago) by yamt
Branch: yamt-kmem
Changes since 1.11: +123 -43 lines
Diff to previous 1.11 (colored) next main 1.12 (colored)

sync with head.

Revision 1.12 / (download) - annotate - [select for diffs], Sun Dec 9 20:27:49 2007 UTC (15 years, 1 month ago) by jmcneill
Branch: MAIN
CVS Tags: yamt-kmem-base3, yamt-kmem-base2, cube-autoconf-base, cube-autoconf
Branch point for: bouyer-xeni386
Changes since 1.11: +123 -43 lines
Diff to previous 1.11 (colored)

Merge jmcneill-pm branch.

Revision 1.2.6.21 / (download) - annotate - [select for diffs], Sun Dec 9 19:36:27 2007 UTC (15 years, 1 month ago) by jmcneill
Branch: jmcneill-pm
Changes since 1.2.6.20: +8 -10 lines
Diff to previous 1.2.6.20 (colored) to branchpoint 1.2 (colored) next main 1.3 (colored)

Sync with HEAD.

Revision 1.4.2.2 / (download) - annotate - [select for diffs], Sat Dec 8 18:18:12 2007 UTC (15 years, 1 month ago) by mjf
Branch: mjf-devfs
Changes since 1.4.2.1: +26 -28 lines
Diff to previous 1.4.2.1 (colored) to branchpoint 1.4 (colored)

Sync with HEAD.

Revision 1.10.2.1 / (download) - annotate - [select for diffs], Sat Dec 8 17:56:32 2007 UTC (15 years, 1 month ago) by ad
Branch: vmlocking2
Changes since 1.10: +8 -10 lines
Diff to previous 1.10 (colored)

Sync with head.

Revision 1.2.6.20 / (download) - annotate - [select for diffs], Sat Dec 8 16:21:00 2007 UTC (15 years, 1 month ago) by jmcneill
Branch: jmcneill-pm
Changes since 1.2.6.19: +3 -3 lines
Diff to previous 1.2.6.19 (colored) to branchpoint 1.2 (colored)

Rename pnp(9) -> pmf(9), as requested by many.

Revision 1.2.4.5 / (download) - annotate - [select for diffs], Fri Dec 7 17:26:59 2007 UTC (15 years, 2 months ago) by yamt
Branch: yamt-lazymbuf
Changes since 1.2.4.4: +26 -28 lines
Diff to previous 1.2.4.4 (colored) to branchpoint 1.2 (colored)

sync with head

Revision 1.11 / (download) - annotate - [select for diffs], Tue Dec 4 16:05:34 2007 UTC (15 years, 2 months ago) by ad
Branch: MAIN
CVS Tags: yamt-kmem-base, vmlocking2-base2, reinoud-bufcleanup-nbase, reinoud-bufcleanup-base, jmcneill-pm-base
Branch point for: yamt-kmem
Changes since 1.10: +8 -10 lines
Diff to previous 1.10 (colored)

- Fix the locking around the i8254. Values for the TSC clock and lapic
  delay function were wildly inaccurate due to multiple CPUs competing
  in DELAY() during calibration, confusing the clock chip.
- Use i8254_delay() explictly in a few more places.

Revision 1.1.2.5 / (download) - annotate - [select for diffs], Mon Dec 3 18:40:13 2007 UTC (15 years, 2 months ago) by ad
Branch: vmlocking
Changes since 1.1.2.4: +60 -38 lines
Diff to previous 1.1.2.4 (colored) next main 1.2 (colored)

Sync with HEAD.

Revision 1.2.6.19 / (download) - annotate - [select for diffs], Mon Dec 3 16:14:21 2007 UTC (15 years, 2 months ago) by joerg
Branch: jmcneill-pm
Changes since 1.2.6.18: +18 -18 lines
Diff to previous 1.2.6.18 (colored) to branchpoint 1.2 (colored)

Sync with HEAD.

Revision 1.10 / (download) - annotate - [select for diffs], Sun Dec 2 20:34:41 2007 UTC (15 years, 2 months ago) by ad
Branch: MAIN
CVS Tags: vmlocking2-base1, vmlocking-nbase
Branch point for: vmlocking2
Changes since 1.9: +3 -3 lines
Diff to previous 1.9 (colored)

Back out part of patch that got merged accidentally.

Revision 1.9 / (download) - annotate - [select for diffs], Sun Dec 2 19:33:31 2007 UTC (15 years, 2 months ago) by ad
Branch: MAIN
Changes since 1.8: +21 -21 lines
Diff to previous 1.8 (colored)

Use atomics to adjust ci_flags.

Revision 1.4.2.1 / (download) - annotate - [select for diffs], Mon Nov 19 00:47:01 2007 UTC (15 years, 2 months ago) by mjf
Branch: mjf-devfs
Changes since 1.4: +42 -20 lines
Diff to previous 1.4 (colored)

Sync with HEAD.

Revision 1.3.2.3 / (download) - annotate - [select for diffs], Sun Nov 18 19:34:47 2007 UTC (15 years, 2 months ago) by bouyer
Branch: bouyer-xenamd64
Changes since 1.3.2.2: +22 -17 lines
Diff to previous 1.3.2.2 (colored) to branchpoint 1.3 (colored) next main 1.4 (colored)

Sync with HEAD

Revision 1.2.4.4 / (download) - annotate - [select for diffs], Thu Nov 15 11:43:40 2007 UTC (15 years, 2 months ago) by yamt
Branch: yamt-lazymbuf
Changes since 1.2.4.3: +42 -20 lines
Diff to previous 1.2.4.3 (colored) to branchpoint 1.2 (colored)

sync with head.

Revision 1.2.6.18 / (download) - annotate - [select for diffs], Wed Nov 14 19:04:15 2007 UTC (15 years, 2 months ago) by joerg
Branch: jmcneill-pm
Changes since 1.2.6.17: +33 -22 lines
Diff to previous 1.2.6.17 (colored) to branchpoint 1.2 (colored)

Sync with HEAD.

Revision 1.8 / (download) - annotate - [select for diffs], Wed Nov 14 14:59:28 2007 UTC (15 years, 2 months ago) by ad
Branch: MAIN
CVS Tags: bouyer-xenamd64-base2, bouyer-xenamd64-base
Changes since 1.7: +7 -18 lines
Diff to previous 1.7 (colored)

cpu_hatch: change lapic initialization order.

Revision 1.7 / (download) - annotate - [select for diffs], Tue Nov 13 18:42:00 2007 UTC (15 years, 2 months ago) by ad
Branch: MAIN
Changes since 1.6: +19 -3 lines
Diff to previous 1.6 (colored)

In cpu_hatch(), recompute ci_tsc_freq instead of using the boot CPU's value.

Revision 1.3.2.2 / (download) - annotate - [select for diffs], Tue Nov 13 16:00:21 2007 UTC (15 years, 2 months ago) by bouyer
Branch: bouyer-xenamd64
Changes since 1.3.2.1: +20 -3 lines
Diff to previous 1.3.2.1 (colored) to branchpoint 1.3 (colored)

Sync with HEAD

Revision 1.6 / (download) - annotate - [select for diffs], Mon Nov 12 18:44:43 2007 UTC (15 years, 2 months ago) by ad
Branch: MAIN
Changes since 1.5: +11 -5 lines
Diff to previous 1.5 (colored)

- cpu_vendor was both an int and char[] on amd64 - fix it.
- Run the errata check/patch on all CPUs, not just the boot processor.

Revision 1.2.6.17 / (download) - annotate - [select for diffs], Sun Nov 11 16:47:02 2007 UTC (15 years, 2 months ago) by joerg
Branch: jmcneill-pm
Changes since 1.2.6.16: +13 -2 lines
Diff to previous 1.2.6.16 (colored) to branchpoint 1.2 (colored)

Sync with HEAD.

Revision 1.5 / (download) - annotate - [select for diffs], Sat Nov 10 20:06:25 2007 UTC (15 years, 2 months ago) by ad
Branch: MAIN
Changes since 1.4: +13 -2 lines
Diff to previous 1.4 (colored)

- When computing the TSC frequency, call i8254_delay() and not DELAY().
- Use atomics to adjust the pmap reference count, instead of taking locks.
- Implement I386_{SET,GET}_{FS,GS}BASE, allowing %fs and %gs to be used
  as per-thread registers. This is compatible with FreeBSD.
- Run patches after we have attached CPUs, since we then know if the
  system is uniprocessor or not. Eliminates a lot of #ifdef MULTIPROCESSOR
  and makes running MP kernels on UP systems cheaper.
- Patch out many of the 'lock' prefixes to nops if uniprocessor.
- Do a wbinvd after patching to ensure that the trace/instruction cache
  is up to date.

Revision 1.4.4.2 / (download) - annotate - [select for diffs], Tue Nov 6 23:23:47 2007 UTC (15 years, 3 months ago) by matt
Branch: matt-armv6
CVS Tags: matt-armv6-prevmlocking
Changes since 1.4.4.1: +878 -0 lines
Diff to previous 1.4.4.1 (colored) to branchpoint 1.4 (colored)

sync with HEAD

Revision 1.2.6.16 / (download) - annotate - [select for diffs], Tue Nov 6 14:27:10 2007 UTC (15 years, 3 months ago) by joerg
Branch: jmcneill-pm
Changes since 1.2.6.15: +74 -99 lines
Diff to previous 1.2.6.15 (colored) to branchpoint 1.2 (colored)

Refactor PNP API:
- Make suspend/resume directly a device functionality. It consists of
  three layers (class logic, device logic, bus logic), all of them being
  optional. This replaces D0/D3 transitions.
- device_is_active returns true if the device was not disabled and was
  not suspended (even partially), device_is_enabled returns true if the
  device was enabled.
- Change pnp_global_transition into pnp_system_suspend and
  pnp_system_resume. Before running any suspend/resume handlers, check
  that all currently attached devices support power management and bail
  out otherwise. The latter is not done for the shutdown/panic case.
- Make the former bus-specific generic network handlers a class handler.
- Make PNP message like volume up/down/toogle PNP events. Each device
  can register what events they are interested in and whether the handler
  should be global or not.
- Introduce device_active API for devices to mark themselve in use from
  either the system or the device. Use this to implement the idle handling
  for audio and input devices. This is intended to replace most ad-hoc
  watchdogs as well.
- Fix somes situations in which audio resume would lose mixer settings.
- Make USB host controllers better deal with suspend in the light of
  shared interrupts.
- Flush filesystem cache on suspend.
- Flush disk caches on suspend. Put ATA disks into standby on suspend as
  well.
- Adopt drivers to use the new PNP API.
- Fix a critical bug in the generic cardbus layer that made D0->D3
  break.
- Fix ral(4) to set if_stop.
- Convert cbb(4) to the new PNP API.
- Apply the PCI Express SCI fix on resume again.

Revision 1.2.6.15 / (download) - annotate - [select for diffs], Sun Oct 28 17:25:22 2007 UTC (15 years, 3 months ago) by joerg
Branch: jmcneill-pm
Changes since 1.2.6.14: +9 -7 lines
Diff to previous 1.2.6.14 (colored) to branchpoint 1.2 (colored)

Make the reset of FS/GS base in cpu_init_msrs optional. We don't want
that in the ACPI resume path.

Revision 1.2.4.3 / (download) - annotate - [select for diffs], Sat Oct 27 11:29:00 2007 UTC (15 years, 3 months ago) by yamt
Branch: yamt-lazymbuf
Changes since 1.2.4.2: +4 -7 lines
Diff to previous 1.2.4.2 (colored) to branchpoint 1.2 (colored)

sync with head.

Revision 1.2.6.14 / (download) - annotate - [select for diffs], Fri Oct 26 15:43:45 2007 UTC (15 years, 3 months ago) by joerg
Branch: jmcneill-pm
Changes since 1.2.6.13: +3 -6 lines
Diff to previous 1.2.6.13 (colored) to branchpoint 1.2 (colored)

Sync with HEAD.

Follow the merge of pmap.c on i386 and amd64 and move
pmap_init_tmp_pgtbl into arch/x86/x86/pmap.c. Modify the ACPI wakeup
code to restore CR4 before jumping back into kernel space as the large
page option might cover that.

Revision 1.3.2.1 / (download) - annotate - [select for diffs], Thu Oct 25 22:36:47 2007 UTC (15 years, 3 months ago) by bouyer
Branch: bouyer-xenamd64
Changes since 1.3: +3 -6 lines
Diff to previous 1.3 (colored)

Sync with HEAD.

Revision 1.1.2.4 / (download) - annotate - [select for diffs], Tue Oct 23 20:14:42 2007 UTC (15 years, 3 months ago) by ad
Branch: vmlocking
Changes since 1.1.2.3: +3 -6 lines
Diff to previous 1.1.2.3 (colored)

Sync with head.

Revision 1.4.4.1, Thu Oct 18 15:28:38 2007 UTC (15 years, 3 months ago) by matt
Branch: matt-armv6
Changes since 1.4: +0 -878 lines
FILE REMOVED

file cpu.c was added on branch matt-armv6 on 2007-11-06 23:23:46 +0000

Revision 1.4 / (download) - annotate - [select for diffs], Thu Oct 18 15:28:38 2007 UTC (15 years, 3 months ago) by yamt
Branch: MAIN
CVS Tags: jmcneill-base
Branch point for: mjf-devfs, matt-armv6
Changes since 1.3: +3 -6 lines
Diff to previous 1.3 (colored)

merge yamt-x86pmap branch.

- reduce differences between amd64 and i386.  notably, share pmap.c
  between them.  it makes several i386 pmap improvements available to
  amd64, including tlb shootdown reduction and bug fixes from Stephan Uphoff.
- implement deferred pmap switching for amd64.
- remove LARGEPAGES option.  always use large pages if available.
  also, make it work on amd64.

Revision 1.2.8.3 / (download) - annotate - [select for diffs], Thu Oct 18 11:23:04 2007 UTC (15 years, 3 months ago) by yamt
Branch: yamt-x86pmap
Changes since 1.2.8.2: +3 -4 lines
Diff to previous 1.2.8.2 (colored) to branchpoint 1.2 (colored) next main 1.3 (colored)

reduce #ifdef.

Revision 1.1.2.3 / (download) - annotate - [select for diffs], Tue Oct 9 15:22:07 2007 UTC (15 years, 3 months ago) by ad
Branch: vmlocking
Changes since 1.1.2.2: +2 -883 lines
Diff to previous 1.1.2.2 (colored)

Sync with head.

Revision 1.1.2.2 / (download) - annotate - [select for diffs], Tue Oct 9 13:38:44 2007 UTC (15 years, 3 months ago) by ad
Branch: vmlocking
Changes since 1.1.2.1: +883 -2 lines
Diff to previous 1.1.2.1 (colored)

Sync with head.

Revision 1.2.8.2 / (download) - annotate - [select for diffs], Sat Oct 6 15:33:35 2007 UTC (15 years, 4 months ago) by yamt
Branch: yamt-x86pmap
Changes since 1.2.8.1: +3 -3 lines
Diff to previous 1.2.8.1 (colored) to branchpoint 1.2 (colored)

sync with head.

Revision 1.2.6.13 / (download) - annotate - [select for diffs], Tue Oct 2 18:27:51 2007 UTC (15 years, 4 months ago) by joerg
Branch: jmcneill-pm
Changes since 1.2.6.12: +3 -3 lines
Diff to previous 1.2.6.12 (colored) to branchpoint 1.2 (colored)

Sync with HEAD.

Revision 1.2.8.1 / (download) - annotate - [select for diffs], Sun Sep 30 15:32:25 2007 UTC (15 years, 4 months ago) by yamt
Branch: yamt-x86pmap
Changes since 1.2: +2 -4 lines
Diff to previous 1.2 (colored)

implement deferred pmap switching for amd64, and make amd64 use
x86 shared pmap code.  it makes several i386 pmap improvements available
to amd64, including tlb shootdown reduction and bug fixes from Stephan Uphoff.

Revision 1.3 / (download) - annotate - [select for diffs], Wed Sep 26 19:48:42 2007 UTC (15 years, 4 months ago) by ad
Branch: MAIN
CVS Tags: yamt-x86pmap-base4, yamt-x86pmap-base3, yamt-x86pmap-base2, vmlocking-base
Branch point for: bouyer-xenamd64
Changes since 1.2: +3 -3 lines
Diff to previous 1.2 (colored)

x86 changes for pcc and LKMs.

- Replace most inline assembly with proper functions. As a side effect
  this reduces the size of amd64 GENERIC by about 120kB, and i386 by a
  smaller amount. Nearly all of the inlines did something slow, or something
  that does not need to be fast.
- Make curcpu() and curlwp functions proper, unless __GNUC__ && _KERNEL.
  In that case make them inlines. Makes curlwp LKM and preemption safe.
- Make bus_space and bus_dma more LKM friendly.
- Share a few more files between the ports.
- Other minor changes.

Revision 1.2.6.12 / (download) - annotate - [select for diffs], Mon Sep 10 15:00:11 2007 UTC (15 years, 4 months ago) by joerg
Branch: jmcneill-pm
Changes since 1.2.6.11: +5 -49 lines
Diff to previous 1.2.6.11 (colored) to branchpoint 1.2 (colored)

Introduce pmap_init_tmp_pgtbl to build a temporary copy of the kernel
side page mapping and an identity mapping low page for use in real mode.
Switch MP bootstrap and i386 ACPI wakeup code to use it.

Revision 1.2.6.11 / (download) - annotate - [select for diffs], Sat Sep 8 19:18:09 2007 UTC (15 years, 4 months ago) by joerg
Branch: jmcneill-pm
Changes since 1.2.6.10: +3 -2 lines
Diff to previous 1.2.6.10 (colored) to branchpoint 1.2 (colored)

Sync pmap after trampoline was unmapped again.

Revision 1.2.6.10 / (download) - annotate - [select for diffs], Sat Sep 8 19:05:54 2007 UTC (15 years, 4 months ago) by joerg
Branch: jmcneill-pm
Changes since 1.2.6.9: +5 -4 lines
Diff to previous 1.2.6.9 (colored) to branchpoint 1.2 (colored)

Fix compilation of non-MP kernels by always defining
mp_trampoline_paddr. Also make x86_mp_online unconditional as suggested
by ad@.

Revision 1.2.6.9 / (download) - annotate - [select for diffs], Sat Sep 8 15:44:57 2007 UTC (15 years, 4 months ago) by joerg
Branch: jmcneill-pm
Changes since 1.2.6.8: +9 -12 lines
Diff to previous 1.2.6.8 (colored) to branchpoint 1.2 (colored)

ANSIfy before further changes.

Revision 1.2.6.8 / (download) - annotate - [select for diffs], Sat Sep 8 15:40:31 2007 UTC (15 years, 4 months ago) by joerg
Branch: jmcneill-pm
Changes since 1.2.6.7: +52 -15 lines
Diff to previous 1.2.6.7 (colored) to branchpoint 1.2 (colored)

Move code to spin-up the application processors into a function.
Add code to ensure the MP_TRAMPOLINE is identity mapped, similiar
to ACPI wakecode.

Revision 1.2.6.7 / (download) - annotate - [select for diffs], Sat Sep 8 14:41:51 2007 UTC (15 years, 4 months ago) by joerg
Branch: jmcneill-pm
Changes since 1.2.6.6: +20 -9 lines
Diff to previous 1.2.6.6 (colored) to branchpoint 1.2 (colored)

Introduce mp_trampoline_paddr and use that in place of most
MP_TRAMPOLINE variables. Use a temporary kernel mapping to copy the
trampoline in preparation for removing the identity mapping from the
normal pmap.

Revision 1.2.6.6 / (download) - annotate - [select for diffs], Tue Sep 4 20:32:49 2007 UTC (15 years, 5 months ago) by jmcneill
Branch: jmcneill-pm
Changes since 1.2.6.5: +36 -20 lines
Diff to previous 1.2.6.5 (colored) to branchpoint 1.2 (colored)

Unset x86_mp_online before going to sleep to prevent IPIs being sent to
unconfigured cpus during resume.

Revision 1.2.6.5 / (download) - annotate - [select for diffs], Tue Sep 4 01:43:53 2007 UTC (15 years, 5 months ago) by jmcneill
Branch: jmcneill-pm
Changes since 1.2.6.4: +5 -6 lines
Diff to previous 1.2.6.4 (colored) to branchpoint 1.2 (colored)

Slightly reorganize cpu_power, no functional change.

Revision 1.2.6.4 / (download) - annotate - [select for diffs], Mon Sep 3 18:06:26 2007 UTC (15 years, 5 months ago) by jmcneill
Branch: jmcneill-pm
Changes since 1.2.6.3: +4 -2 lines
Diff to previous 1.2.6.3 (colored) to branchpoint 1.2 (colored)

Ignore CPUs in cpu_power where cpu_idlelwp == NULL.

Revision 1.2.6.3 / (download) - annotate - [select for diffs], Mon Sep 3 18:04:58 2007 UTC (15 years, 5 months ago) by jmcneill
Branch: jmcneill-pm
Changes since 1.2.6.2: +6 -4 lines
Diff to previous 1.2.6.2 (colored) to branchpoint 1.2 (colored)

In cpu_power, hold cpu_lock while calling cpu_setonline. While we're here,
ignore cpus without the CPUF_PRESENT flag set.

Revision 1.2.6.2 / (download) - annotate - [select for diffs], Mon Sep 3 16:47:47 2007 UTC (15 years, 5 months ago) by jmcneill
Branch: jmcneill-pm
Changes since 1.2.6.1: +962 -0 lines
Diff to previous 1.2.6.1 (colored) to branchpoint 1.2 (colored)

Sync with HEAD.

Revision 1.2.4.2 / (download) - annotate - [select for diffs], Mon Sep 3 14:31:23 2007 UTC (15 years, 5 months ago) by yamt
Branch: yamt-lazymbuf
Changes since 1.2.4.1: +881 -0 lines
Diff to previous 1.2.4.1 (colored) to branchpoint 1.2 (colored)

sync with head.

Revision 1.2.2.2 / (download) - annotate - [select for diffs], Mon Sep 3 10:19:53 2007 UTC (15 years, 5 months ago) by skrll
Branch: nick-csl-alignment
Changes since 1.2.2.1: +881 -0 lines
Diff to previous 1.2.2.1 (colored) to branchpoint 1.2 (colored) next main 1.3 (colored)

Sync with HEAD.

Revision 1.2.6.1, Wed Aug 29 23:38:05 2007 UTC (15 years, 5 months ago) by jmcneill
Branch: jmcneill-pm
Changes since 1.2: +0 -881 lines
FILE REMOVED

file cpu.c was added on branch jmcneill-pm on 2007-09-03 16:47:47 +0000

Revision 1.2.4.1, Wed Aug 29 23:38:05 2007 UTC (15 years, 5 months ago) by yamt
Branch: yamt-lazymbuf
Changes since 1.2: +0 -881 lines
FILE REMOVED

file cpu.c was added on branch yamt-lazymbuf on 2007-09-03 14:31:23 +0000

Revision 1.2.2.1, Wed Aug 29 23:38:05 2007 UTC (15 years, 5 months ago) by skrll
Branch: nick-csl-alignment
Changes since 1.2: +0 -881 lines
FILE REMOVED

file cpu.c was added on branch nick-csl-alignment on 2007-09-03 10:19:52 +0000

Revision 1.2 / (download) - annotate - [select for diffs], Wed Aug 29 23:38:05 2007 UTC (15 years, 5 months ago) by ad
Branch: MAIN
CVS Tags: yamt-x86pmap-base, nick-csl-alignment-base5
Branch point for: yamt-x86pmap, yamt-lazymbuf, nick-csl-alignment, jmcneill-pm
Changes since 1.1: +881 -0 lines
Diff to previous 1.1 (colored)

Merge most x86 changes from the vmlocking branch, except the threaded soft
interrupt stuff. This is mostly comprised of changes to the pmap modules to
work on multiprocessor systems without kernel_lock, and changes to speed up
tlb shootdowns.

Revision 1.1.2.1 / (download) - annotate - [select for diffs], Thu Aug 23 12:13:57 2007 UTC (15 years, 5 months ago) by ad
Branch: vmlocking
Changes since 1.1: +881 -0 lines
Diff to previous 1.1 (colored)

Merged x86 cpu.c.

Revision 1.1, Thu Aug 23 12:13:57 2007 UTC (15 years, 5 months ago) by ad
Branch: MAIN
Branch point for: vmlocking
FILE REMOVED

file cpu.c was initially added on branch vmlocking.

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