CVS log for src/sys/arch/x86/pci/msipic.c

Up to [cvs.NetBSD.org] / src / sys / arch / x86 / pci

Request diff between arbitrary revisions

Default branch: MAIN

Revision 1.27 / (download) - annotate - [select for diffs], Tue May 24 14:00:23 2022 UTC (12 months, 2 weeks ago) by bouyer
Branch: MAIN
CVS Tags: netbsd-10-base, netbsd-10, bouyer-sunxi-drm-base, bouyer-sunxi-drm, HEAD
Changes since 1.26: +7 -3 lines
Diff to previous 1.26 (colored)

- msipic_construct_msix_pic(): set mp_table_base to memaddr (without
  table_offset), this is what Xen wants
while there use pci_conf_write16() in msi_set_msictl_enablebit() too,
for consistency (it seems that Xen accepts the 32bit write at this point,
but this may change).

- xen_map_msix_pirq(): don't forget to set map_irq.table_base in the
  MSI-X case, otherwise Xen maps it as MSI
- call pic_hwunmask() after pirq_establish() in msi/msix case, to make sure
  the msi-x vector is unmasked.

Now MSI-X works with Xen so stop disabling it in pci_attach_hook().

Revision 1.26 / (download) - annotate - [select for diffs], Mon May 23 15:03:05 2022 UTC (12 months, 2 weeks ago) by bouyer
Branch: MAIN
Changes since 1.25: +31 -5 lines
Diff to previous 1.25 (colored)

Work in progress on MSI/MSI-X on Xen (MSI works on my hardware, more work
needed for MSI-X):
- Xen silently rejects 32 bits writes to MSI configuration registers
  (especially when setting PCI_MSI_CTL_MSI_ENABLE/PCI_MSIX_CTL_ENABLE),
  it expects 16 bits writes. So introduce a pci_conf_write16(),
  only available on XENPV (and working only for mode 1 without
  PCI_OVERRIDE_CONF_WRITE) and use it to enable MSI or MSI-X on XENPV.
- for multi-MSI vectors, Xen allocates all of them in a single hypercall,
  so it's not convenient to do it at intr_establish() time.
  So do it at alloc() time and register the pirqs in the msipic structure.
  xen_pic_to_gsi() now just returns the values cached in the msipic.
  As a bonus, if the PHYSDEVOP_map_pirq hypercall fails we can fail
  the alloc() and we don't need the xen_pci_msi*_probe() hacks.

options NO_PCI_MSI_MSIX still on by default for XEN3_DOM0.

Revision 1.23.2.1 / (download) - annotate - [select for diffs], Mon Dec 14 14:38:04 2020 UTC (2 years, 5 months ago) by thorpej
Branch: thorpej-futex
Changes since 1.23: +4 -6 lines
Diff to previous 1.23 (colored) next main 1.24 (colored)

Sync w/ HEAD.

Revision 1.25 / (download) - annotate - [select for diffs], Fri Dec 11 09:22:20 2020 UTC (2 years, 5 months ago) by knakahara
Branch: MAIN
CVS Tags: thorpej-i2c-spi-conf2-base, thorpej-i2c-spi-conf2, thorpej-i2c-spi-conf-base, thorpej-i2c-spi-conf, thorpej-futex2-base, thorpej-futex2, thorpej-futex-base, thorpej-cfargs2-base, thorpej-cfargs2, thorpej-cfargs-base, thorpej-cfargs, cjep_sun2x-base1, cjep_sun2x-base, cjep_sun2x, cjep_staticlib_x-base1, cjep_staticlib_x-base, cjep_staticlib_x
Changes since 1.24: +4 -4 lines
Diff to previous 1.24 (colored)

Fix build failure when XNEPV is defined.

Revision 1.24 / (download) - annotate - [select for diffs], Fri Dec 11 07:49:39 2020 UTC (2 years, 5 months ago) by knakahara
Branch: MAIN
Changes since 1.23: +2 -4 lines
Diff to previous 1.23 (colored)

Not pic->pic_addroute but pic->pic_hwunmask should enable interrupts for MSI-X.

pic->pic_addroute should not enable interrupt, because callers expect
interrupts have been disabled until they call pic->pic_hwunmask.

By the way, the old implement writes zero to Vector Control for MSI-X Table
Entries, howerver it must be read and updated.  Because, there are not only
Mask Bit but also ST lower and ST upper.

Revision 1.23 / (download) - annotate - [select for diffs], Mon May 4 15:55:56 2020 UTC (3 years, 1 month ago) by jdolecek
Branch: MAIN
Branch point for: thorpej-futex
Changes since 1.22: +32 -13 lines
Diff to previous 1.22 (colored)

add support for using MSI for XenPV Dom0

use PHYSDEVOP_map_pirq to get the pirq/gsi for MSI/MSI-X, switch also INTx
to use it instead of PHYSDEVOP_alloc_irq_vector

MSI confirmed working with single-vector MSI for wm(4), ahcisata(4), bge(4)

XXX added some provision for MSI-X, but it doesn't actually work (no interrupts
delivered), needs some further investigation; disable MSI-X for XENPV
via flag in x86/pci/pci_machdep.c

Revision 1.22 / (download) - annotate - [select for diffs], Mon May 4 09:34:37 2020 UTC (3 years, 1 month ago) by jdolecek
Branch: MAIN
Changes since 1.21: +6 -6 lines
Diff to previous 1.21 (colored)

constify the pic templates

Revision 1.21 / (download) - annotate - [select for diffs], Sat Apr 25 15:26:18 2020 UTC (3 years, 1 month ago) by bouyer
Branch: MAIN
Changes since 1.20: +8 -2 lines
Diff to previous 1.20 (colored)

Merge the bouyer-xenpvh branch, bringing in Xen PV drivers support under HVM
guests in GENERIC.
Xen support can be disabled at runtime with
boot -c
disable hypervisor

Revision 1.20.6.1 / (download) - annotate - [select for diffs], Sun Apr 19 19:39:10 2020 UTC (3 years, 1 month ago) by bouyer
Branch: bouyer-xenpvh
Changes since 1.20: +8 -2 lines
Diff to previous 1.20 (colored) next main 1.21 (colored)

Add per-PIC callbacks for interrupt_get_devname(), interrupt_get_assigned()
and interrupt_get_count(). Implement Xen-specific callbacks for
PIC_XEN and use the x86 one for others.
In event_set_handler(), call intr_allocate_io_intrsource() so that
events appears in interrupt list (intrctl list).

Revision 1.11.6.2 / (download) - annotate - [select for diffs], Mon Apr 13 08:04:11 2020 UTC (3 years, 1 month ago) by martin
Branch: phil-wifi
Changes since 1.11.6.1: +57 -21 lines
Diff to previous 1.11.6.1 (colored) to branchpoint 1.11 (colored) next main 1.12 (colored)

Mostly merge changes from HEAD upto 20200411

Revision 1.20 / (download) - annotate - [select for diffs], Mon Dec 2 03:06:51 2019 UTC (3 years, 6 months ago) by msaitoh
Branch: MAIN
CVS Tags: phil-wifi-20200421, phil-wifi-20200411, phil-wifi-20200406, is-mlppp-base, is-mlppp, bouyer-xenpvh-base2, bouyer-xenpvh-base1, bouyer-xenpvh-base, ad-namecache-base3, ad-namecache-base2, ad-namecache-base1, ad-namecache-base, ad-namecache
Branch point for: bouyer-xenpvh
Changes since 1.19: +3 -3 lines
Diff to previous 1.19 (colored)

 Use PCI_MSIX_"TBL"BIR_MASK instead of PCI_MSIX_"PBA"BIR_MASK for MSI-X table.
This is not a real bug because both macros have the same value.

Revision 1.10.2.1 / (download) - annotate - [select for diffs], Wed Nov 20 16:36:47 2019 UTC (3 years, 6 months ago) by martin
Branch: netbsd-8
CVS Tags: netbsd-8-2-RELEASE
Changes since 1.10: +7 -2 lines
Diff to previous 1.10 (colored) next main 1.11 (colored)

Pull up following revision(s) (requested by hikaru in ticket #1453):

	sys/arch/x86/pci/msipic.c: revision 1.19

Disable MSI-X before writing the MSI-X table.

That fixes MSI-X interrupt lost on VMware ESXi 6.7 PCI passthrough devices.

ok knakahara@

Revision 1.17.2.2 / (download) - annotate - [select for diffs], Sat Nov 16 16:53:13 2019 UTC (3 years, 6 months ago) by martin
Branch: netbsd-9
CVS Tags: netbsd-9-3-RELEASE, netbsd-9-2-RELEASE, netbsd-9-1-RELEASE, netbsd-9-0-RELEASE, netbsd-9-0-RC2, netbsd-9-0-RC1
Changes since 1.17.2.1: +7 -2 lines
Diff to previous 1.17.2.1 (colored) to branchpoint 1.17 (colored) next main 1.18 (colored)

Pull up following revision(s) (requested by hikaru in ticket #429):

	sys/arch/x86/pci/msipic.c: revision 1.19

Disable MSI-X before writing the MSI-X table.

That fixes MSI-X interrupt lost on VMware ESXi 6.7 PCI passthrough devices.

ok knakahara@

Revision 1.19 / (download) - annotate - [select for diffs], Wed Nov 13 02:54:59 2019 UTC (3 years, 6 months ago) by hikaru
Branch: MAIN
CVS Tags: phil-wifi-20191119
Changes since 1.18: +7 -2 lines
Diff to previous 1.18 (colored)

Disable MSI-X before writing the MSI-X table.

That fixes MSI-X interrupt lost on VMware ESXi 6.7 PCI passthrough devices.

ok knakahara@

Revision 1.17.2.1 / (download) - annotate - [select for diffs], Tue Oct 15 18:08:31 2019 UTC (3 years, 7 months ago) by martin
Branch: netbsd-9
Changes since 1.17: +5 -5 lines
Diff to previous 1.17 (colored)

Pull up following revision(s) (requested by tnn in ticket #305):

	sys/arch/x86/pci/msipic.c: revision 1.18

change bus_space_map to _x86_memio_map

Resolves bus space reservation conflict between MI and MD code.

Discussion:
http://mail-index.netbsd.org/port-amd64/2019/09/28/msg003014.html

Revision 1.18 / (download) - annotate - [select for diffs], Thu Oct 3 18:53:08 2019 UTC (3 years, 8 months ago) by tnn
Branch: MAIN
Changes since 1.17: +5 -5 lines
Diff to previous 1.17 (colored)

change bus_space_map to _x86_memio_map

Resolves bus space reservation conflict between MI and MD code.
Discussion:
http://mail-index.netbsd.org/port-amd64/2019/09/28/msg003014.html

Revision 1.17 / (download) - annotate - [select for diffs], Wed Jun 26 10:20:06 2019 UTC (3 years, 11 months ago) by knakahara
Branch: MAIN
CVS Tags: netbsd-9-base
Branch point for: netbsd-9
Changes since 1.16: +22 -2 lines
Diff to previous 1.16 (colored)

Fix updating "Multiple Message Enable" field for MSI multiple vectors. Pointed out by jmcneill@n.o, thanks.

I tested ahcisata for MSI single vector regression.

Revision 1.16 / (download) - annotate - [select for diffs], Tue Jun 18 10:06:49 2019 UTC (3 years, 11 months ago) by msaitoh
Branch: MAIN
Changes since 1.15: +11 -2 lines
Diff to previous 1.15 (colored)

 Add note about the case of PCI_MSI_MDATA[64] is 16bit.

Revision 1.15 / (download) - annotate - [select for diffs], Mon Jun 17 06:38:29 2019 UTC (3 years, 11 months ago) by msaitoh
Branch: MAIN
Changes since 1.14: +13 -12 lines
Diff to previous 1.14 (colored)

 KNF. No functional change.

Revision 1.14 / (download) - annotate - [select for diffs], Mon Jun 17 05:45:46 2019 UTC (3 years, 11 months ago) by msaitoh
Branch: MAIN
Changes since 1.13: +4 -3 lines
Diff to previous 1.13 (colored)

 Fix comma with semicolon. No functional change.

Revision 1.13 / (download) - annotate - [select for diffs], Fri Jun 14 05:59:40 2019 UTC (3 years, 11 months ago) by msaitoh
Branch: MAIN
Changes since 1.12: +6 -6 lines
Diff to previous 1.12 (colored)

No functional change:
- Rename macros:
  - ICR, LVT and MSIDATA can share the bit definitions. Remove redundant
    definitions and use the common macros.
  - Consistently use LAPIC_LVT_ for all local vector table's macro names.
- Use __BITS().
- Add definition for TSC-deadline (LAPIC_LVT_TMM_TSCDLT).

Revision 1.11.6.1 / (download) - annotate - [select for diffs], Mon Jun 10 22:06:53 2019 UTC (4 years ago) by christos
Branch: phil-wifi
Changes since 1.11: +3 -3 lines
Diff to previous 1.11 (colored)

Sync with HEAD

Revision 1.12 / (download) - annotate - [select for diffs], Mon Apr 1 06:20:40 2019 UTC (4 years, 2 months ago) by msaitoh
Branch: MAIN
CVS Tags: phil-wifi-20190609, isaki-audio2-base, isaki-audio2
Changes since 1.11: +3 -3 lines
Diff to previous 1.11 (colored)

Fix typo in comment (s/numer/number/).

Revision 1.11.2.2 / (download) - annotate - [select for diffs], Sun Dec 3 11:36:50 2017 UTC (5 years, 6 months ago) by jdolecek
Branch: tls-maxphys
Changes since 1.11.2.1: +758 -0 lines
Diff to previous 1.11.2.1 (colored) to branchpoint 1.11 (colored) next main 1.12 (colored)

update from HEAD

Revision 1.4.2.5 / (download) - annotate - [select for diffs], Mon Aug 28 17:51:56 2017 UTC (5 years, 9 months ago) by skrll
Branch: nick-nhusb
Changes since 1.4.2.4: +4 -13 lines
Diff to previous 1.4.2.4 (colored) to branchpoint 1.4 (colored) next main 1.5 (colored)

Sync with HEAD

Revision 1.11.2.1, Fri Jul 28 14:26:50 2017 UTC (5 years, 10 months ago) by jdolecek
Branch: tls-maxphys
Changes since 1.11: +0 -758 lines
FILE REMOVED

file msipic.c was added on branch tls-maxphys on 2017-12-03 11:36:50 +0000

Revision 1.11 / (download) - annotate - [select for diffs], Fri Jul 28 14:26:50 2017 UTC (5 years, 10 months ago) by maxv
Branch: MAIN
CVS Tags: tls-maxphys-base-20171202, phil-wifi-base, pgoyette-compat-merge-20190127, pgoyette-compat-base, pgoyette-compat-20190127, pgoyette-compat-20190118, pgoyette-compat-1226, pgoyette-compat-1126, pgoyette-compat-1020, pgoyette-compat-0930, pgoyette-compat-0906, pgoyette-compat-0728, pgoyette-compat-0625, pgoyette-compat-0521, pgoyette-compat-0502, pgoyette-compat-0422, pgoyette-compat-0415, pgoyette-compat-0407, pgoyette-compat-0330, pgoyette-compat-0322, pgoyette-compat-0315, pgoyette-compat, nick-nhusb-base-20170825
Branch point for: tls-maxphys, phil-wifi
Changes since 1.10: +2 -3 lines
Diff to previous 1.10 (colored)

Don't include malloc.h.

Revision 1.10 / (download) - annotate - [select for diffs], Thu Jun 1 02:45:08 2017 UTC (6 years ago) by chs
Branch: MAIN
CVS Tags: perseant-stdc-iso10646-base, perseant-stdc-iso10646, netbsd-8-base, netbsd-8-1-RELEASE, netbsd-8-1-RC1, netbsd-8-0-RELEASE, netbsd-8-0-RC2, netbsd-8-0-RC1, matt-nb8-mediatek-base, matt-nb8-mediatek
Branch point for: netbsd-8
Changes since 1.9: +2 -9 lines
Diff to previous 1.9 (colored)

remove checks for failure after memory allocation calls that cannot fail:

  kmem_alloc() with KM_SLEEP
  kmem_zalloc() with KM_SLEEP
  percpu_alloc()
  pserialize_create()
  psref_class_create()

all of these paths include an assertion that the allocation has not failed,
so callers should not assert that again.

Revision 1.9 / (download) - annotate - [select for diffs], Tue May 23 08:54:39 2017 UTC (6 years ago) by nonaka
Branch: MAIN
Changes since 1.8: +4 -5 lines
Diff to previous 1.8 (colored)

x86: Add preliminary x2APIC support.

x2APIC is used only when x2APIC is enabled in BIOS/UEFI.
LAPIC ID is not supported above 256.

Revision 1.4.2.4 / (download) - annotate - [select for diffs], Sun Dec 27 12:09:45 2015 UTC (7 years, 5 months ago) by skrll
Branch: nick-nhusb
Changes since 1.4.2.3: +4 -4 lines
Diff to previous 1.4.2.3 (colored) to branchpoint 1.4 (colored)

Sync with HEAD (as of 26th Dec)

No functional change:
 - Add comments.
 - Remove obsolete comment.
 - Move definitions to better location.
 - Rename bit definition.
 - KNF.
 - Indent.

Revision 1.4.2.3 / (download) - annotate - [select for diffs], Tue Sep 22 12:05:54 2015 UTC (7 years, 8 months ago) by skrll
Branch: nick-nhusb
Changes since 1.4.2.2: +30 -3 lines
Diff to previous 1.4.2.2 (colored) to branchpoint 1.4 (colored)

Sync with HEAD

Revision 1.7 / (download) - annotate - [select for diffs], Thu Aug 13 04:52:40 2015 UTC (7 years, 9 months ago) by msaitoh
Branch: MAIN
CVS Tags: nick-nhusb-base-20150921
Changes since 1.6: +25 -0 lines
Diff to previous 1.6 (colored)

 Add workaround for PCI prefetchable bit in msipic_construct_msix_pic().
Some chips (e.g. Intel 82599) report SERR and MSI-X interrupt doesn't work.
This problem might not be the driver's bug but our PCI common part or VMs'
bug. See fxp(4), bge(4) and ixgbe(4). All of them has the same workaround
related to prefetchable bit. For the MSI-X table area, it should not have side
effect by prefetching. Until we find a real reason, we ignore the prefetchable
bit.

Revision 1.6 / (download) - annotate - [select for diffs], Thu Aug 13 04:39:33 2015 UTC (7 years, 9 months ago) by msaitoh
Branch: MAIN
Changes since 1.5: +3 -3 lines
Diff to previous 1.5 (colored)

- Don't take pci_attach_args as an argument in pci_msi[x]_count().
- Move prototypes of pci_msi[x]_count() from x86/x86/pci_machdep_common to
  sys/dev/pci/pcivar.h.
- Move pci_msi[x]_count() from x86/pci/pci_msi_machdep.c to sys/dev/pci/pci.c

Revision 1.5 / (download) - annotate - [select for diffs], Tue Aug 11 04:04:36 2015 UTC (7 years, 10 months ago) by msaitoh
Branch: MAIN
Changes since 1.4: +4 -2 lines
Diff to previous 1.4 (colored)

 Add missing opt_intrdebug.h.

Revision 1.4.2.2 / (download) - annotate - [select for diffs], Sat Jun 6 14:40:04 2015 UTC (8 years ago) by skrll
Branch: nick-nhusb
Changes since 1.4.2.1: +740 -0 lines
Diff to previous 1.4.2.1 (colored) to branchpoint 1.4 (colored)

Sync with HEAD

Revision 1.4.2.1, Fri May 8 04:27:48 2015 UTC (8 years, 1 month ago) by skrll
Branch: nick-nhusb
Changes since 1.4: +0 -740 lines
FILE REMOVED

file msipic.c was added on branch nick-nhusb on 2015-06-06 14:40:04 +0000

Revision 1.4 / (download) - annotate - [select for diffs], Fri May 8 04:27:48 2015 UTC (8 years, 1 month ago) by knakahara
Branch: MAIN
CVS Tags: nick-nhusb-base-20150606
Branch point for: nick-nhusb
Changes since 1.3: +8 -8 lines
Diff to previous 1.3 (colored)

add a const qualifier to struct pci_attach_args *pa argument

Revision 1.3 / (download) - annotate - [select for diffs], Tue Apr 28 06:23:57 2015 UTC (8 years, 1 month ago) by martin
Branch: MAIN
Changes since 1.2: +11 -8 lines
Diff to previous 1.2 (colored)

Make this compilable in non-DIAGNOSTIC kernels.

Revision 1.2 / (download) - annotate - [select for diffs], Tue Apr 28 02:38:53 2015 UTC (8 years, 1 month ago) by knakahara
Branch: MAIN
Changes since 1.1: +4 -4 lines
Diff to previous 1.1 (colored)

fix debug message.

Revision 1.1 / (download) - annotate - [select for diffs], Mon Apr 27 07:03:58 2015 UTC (8 years, 1 month ago) by knakahara
Branch: MAIN

add x86 MD MSI/MSI-X support code.

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