Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

===================================================================
RCS file: /ftp/cvs/cvsroot/src/sys/arch/x86/include/specialreg.h,v
rcsdiff: /ftp/cvs/cvsroot/src/sys/arch/x86/include/specialreg.h,v: warning: Unknown phrases like `commitid ...;' are present.
retrieving revision 1.80.2.6
retrieving revision 1.80.2.7
diff -u -p -r1.80.2.6 -r1.80.2.7
--- src/sys/arch/x86/include/specialreg.h	2016/10/05 20:55:36	1.80.2.6
+++ src/sys/arch/x86/include/specialreg.h	2017/02/05 13:40:23	1.80.2.7
@@ -1,4 +1,4 @@
-/*	$NetBSD: specialreg.h,v 1.80.2.6 2016/10/05 20:55:36 skrll Exp $	*/
+/*	$NetBSD: specialreg.h,v 1.80.2.7 2017/02/05 13:40:23 skrll Exp $	*/
 
 /*-
  * Copyright (c) 1991 The Regents of the University of California.
@@ -292,7 +292,7 @@
 #define CPUID_DSPM_HWP_ACTWIN  __BIT(9)	/* HWP Activity Window */
 #define CPUID_DSPM_HWP_EPP __BIT(10)	/* HWP Energy Performance Preference */
 #define CPUID_DSPM_HWP_PLR __BIT(11)	/* HWP Package Level Request */
-#define CPUID_DSPM_HDC	__BIT(13)	/* HDC */
+#define CPUID_DSPM_HDC	__BIT(13)	/* Hardware Duty Cycling */
 
 #define CPUID_DSPM_FLAGS	"\20" \
 	"\1" "DTS"	"\2" "IDA"	"\3" "ARAT" 			\
@@ -340,6 +340,7 @@
 #define CPUID_SEF_ADX		__BIT(19)
 #define CPUID_SEF_SMAP		__BIT(20)
 #define CPUID_SEF_CLFLUSHOPT	__BIT(23)
+#define CPUID_SEF_CLWB		__BIT(24)
 #define CPUID_SEF_PT		__BIT(25)
 #define CPUID_SEF_AVX512PF	__BIT(26)
 #define CPUID_SEF_AVX512ER	__BIT(27)
@@ -354,9 +355,9 @@
 	"\11" "BMI2"	"\12" "ERMS"	"\13" "INVPCID"	"\14" "RTM"	\
 	"\15" "QM"	"\16" "FPUCSDS"	"\17" "MPX"    	"\20" "PQE"	\
 	"\21" "AVX512F"	"\22" "AVX512DQ" "\23" "RDSEED"	"\24" "ADX"	\
-	"\25" "SMAP"					"\28" "CLFLUSHOPT" \
-			"\32" "PT"	"\33" "AVX512PF" "\34" "AVX512ER" \
-	"\35" "AVX512CD""\36" "SHA"	"\37" "AVX512BW" "\38" "AVX512VL"
+	"\25" "SMAP"					"\30" "CLFLUSHOPT" \
+	"\31" "CLWB"	"\32" "PT"	"\33" "AVX512PF" "\34" "AVX512ER" \
+	"\35" "AVX512CD""\36" "SHA"	"\37" "AVX512BW" "\40" "AVX512VL"
 
 /* %ecx */
 #define CPUID_SEF_PREFETCHWT1	__BIT(0)