src/sys/arch/x86/include/specialreg.h - diff

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version 1.166, 2020/06/01 08:32:39

version 1.167, 2020/06/10 03:39:03

Line 478

#define CPUID_SEF_AVX512_4FMAPS __BIT(3)

#define CPUID_SEF_FSREP_MOV __BIT(4) /* Fast Short REP MOV */

#define CPUID_SEF_AVX512_VP2INTERSECT __BIT(8)

#define CPUID_SEF_SRBDS_CTRL __BIT(9) /* IA32_MCU_OPT_CTRL */

#define CPUID_SEF_MD_CLEAR __BIT(10)

#define CPUID_SEF_TSX_FORCE_ABORT __BIT(13) /* MSR_TSX_FORCE_ABORT bit 0 */

#define CPUID_SEF_SERIALIZE __BIT(14)

Line 494

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#define CPUID_SEF_FLAGS2 "\20" \

"\3" "AVX512_4VNNIW" "\4" "AVX512_4FMAPS" \

"\5" "FSREP_MOV" \

"\11" "VP2INTERSECT" "\13" "MD_CLEAR" \

"\11VP2INTERSECT" "\12SRBDS_CTRL" "\13MD_CLEAR" \

"\16TSX_FORCE_ABORT" "\17SERIALIZE" "\20HYBRID" \

"\21" "TSXLDTRK" \

"\25" "CET_IBT" \