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Annotation of src/sys/arch/x86/include/intr.h, Revision 1.54.2.3

1.54.2.3! pgoyette    1: /*     $NetBSD$        */
1.1       fvdl        2:
                      3: /*-
1.33      ad          4:  * Copyright (c) 1998, 2001, 2006, 2007, 2008 The NetBSD Foundation, Inc.
1.1       fvdl        5:  * All rights reserved.
                      6:  *
                      7:  * This code is derived from software contributed to The NetBSD Foundation
                      8:  * by Charles M. Hannum, and by Jason R. Thorpe.
                      9:  *
                     10:  * Redistribution and use in source and binary forms, with or without
                     11:  * modification, are permitted provided that the following conditions
                     12:  * are met:
                     13:  * 1. Redistributions of source code must retain the above copyright
                     14:  *    notice, this list of conditions and the following disclaimer.
                     15:  * 2. Redistributions in binary form must reproduce the above copyright
                     16:  *    notice, this list of conditions and the following disclaimer in the
                     17:  *    documentation and/or other materials provided with the distribution.
                     18:  *
                     19:  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
                     20:  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
                     21:  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
                     22:  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
                     23:  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
                     24:  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
                     25:  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
                     26:  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
                     27:  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
                     28:  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
                     29:  * POSSIBILITY OF SUCH DAMAGE.
                     30:  */
                     31:
                     32: #ifndef _X86_INTR_H_
                     33: #define _X86_INTR_H_
                     34:
1.51      cherry     35: #if !defined(XEN)
1.29      ad         36: #define        __HAVE_FAST_SOFTINTS
1.54.2.3! pgoyette   37: #if !defined(NO_PREEMPTION)
1.33      ad         38: #define        __HAVE_PREEMPTION
1.54.2.3! pgoyette   39: #endif /* !defined(NO_PREEMPTION) */
1.51      cherry     40: #endif /*  !defined(XEN) */
1.29      ad         41:
1.38      dyoung     42: #ifdef _KERNEL
                     43: #include <sys/types.h>
                     44: #else
                     45: #include <stdbool.h>
                     46: #endif
                     47:
1.37      dyoung     48: #include <sys/evcnt.h>
1.46      knakahar   49: #include <sys/queue.h>
1.1       fvdl       50: #include <machine/intrdefs.h>
                     51:
                     52: #ifndef _LOCORE
                     53: #include <machine/pic.h>
                     54:
                     55: /*
                     56:  * Struct describing an interrupt source for a CPU. struct cpu_info
                     57:  * has an array of MAX_INTR_SOURCES of these. The index in the array
                     58:  * is equal to the stub number of the stubcode as present in vector.s
                     59:  *
                     60:  * The primary CPU's array of interrupt sources has its first 16
                     61:  * entries reserved for legacy ISA irq handlers. This means that
                     62:  * they have a 1:1 mapping for arrayindex:irq_num. This is not
                     63:  * true for interrupts that come in through IO APICs, to find
                     64:  * their source, go through ci->ci_isources[index].is_pic
                     65:  *
                     66:  * It's possible to always maintain a 1:1 mapping, but that means
                     67:  * limiting the total number of interrupt sources to MAX_INTR_SOURCES
                     68:  * (32), instead of 32 per CPU. It also would mean that having multiple
                     69:  * IO APICs which deliver interrupts from an equal pin number would
                     70:  * overlap if they were to be sent to the same CPU.
                     71:  */
                     72:
                     73: struct intrstub {
1.51      cherry     74: #if !defined(XEN)
1.1       fvdl       75:        void *ist_entry;
1.51      cherry     76: #endif
1.49      msaitoh    77:        void *ist_recurse;
1.1       fvdl       78:        void *ist_resume;
                     79: };
                     80:
1.46      knakahar   81: struct percpu_evcnt {
                     82:        cpuid_t cpuid;
                     83:        uint64_t count;
                     84: };
                     85:
1.1       fvdl       86: struct intrsource {
                     87:        int is_maxlevel;                /* max. IPL for this source */
1.43      drochner   88:        int is_pin;                     /* IRQ for legacy; pin for IO APIC,
                     89:                                           -1 for MSI */
1.1       fvdl       90:        struct intrhand *is_handlers;   /* handler chain */
                     91:        struct pic *is_pic;             /* originating PIC */
                     92:        void *is_recurse;               /* entry for spllower */
                     93:        void *is_resume;                /* entry for doreti */
1.29      ad         94:        lwp_t *is_lwp;                  /* for soft interrupts */
1.51      cherry     95: #if defined(XEN)
                     96:        u_long ipl_evt_mask1;   /* pending events for this IPL */
                     97:        u_long ipl_evt_mask2[NR_EVENT_CHANNELS];
                     98: #endif
1.48      knakahar   99:        struct evcnt is_evcnt;          /* interrupt counter per cpu */
1.1       fvdl      100:        int is_flags;                   /* see below */
                    101:        int is_type;                    /* level, edge */
                    102:        int is_idtvec;
                    103:        int is_minlevel;
1.29      ad        104:        char is_evname[32];             /* event counter name */
1.46      knakahar  105:        char is_intrid[INTRIDBUF];      /* intrid created by create_intrid() */
1.48      knakahar  106:        char is_xname[INTRDEVNAMEBUF];  /* device names */
1.46      knakahar  107:        cpuid_t is_active_cpu;          /* active cpuid */
                    108:        struct percpu_evcnt *is_saved_evcnt;    /* interrupt count of deactivated cpus */
                    109:        SIMPLEQ_ENTRY(intrsource) is_list;      /* link of intrsources */
1.1       fvdl      110: };
                    111:
                    112: #define IS_LEGACY      0x0001          /* legacy ISA irq source */
                    113: #define IS_IPI         0x0002
                    114: #define IS_LOG         0x0004
                    115:
                    116: /*
                    117:  * Interrupt handler chains.  *_intr_establish() insert a handler into
                    118:  * the list.  The handler is called with its (single) argument.
                    119:  */
                    120:
                    121: struct intrhand {
1.52      cherry    122: #if defined(XEN)
                    123:        /*
                    124:         * Note: This is transitional and will go away.
                    125:         *
                    126:         * We ought to use a union here, but too much effort.
                    127:         * We use this field to tear down the cookie handed to us
                    128:         * via x86/intr.c:intr_disestablish();
                    129:         * Interestingly, the intr_establish_xname() function returns
                    130:         * a "void *" - so we abuse this for now.
                    131:         */
                    132:        int     pic_type; /* Overloading wrt struct pintrhand */
                    133: #endif
1.1       fvdl      134:        int     (*ih_fun)(void *);
                    135:        void    *ih_arg;
                    136:        int     ih_level;
1.14      yamt      137:        int     (*ih_realfun)(void *);
                    138:        void    *ih_realarg;
1.1       fvdl      139:        struct  intrhand *ih_next;
1.39      ad        140:        struct  intrhand **ih_prevp;
1.1       fvdl      141:        int     ih_pin;
                    142:        int     ih_slot;
1.52      cherry    143: #if defined(XEN)
1.51      cherry    144:        struct  intrhand *ih_evt_next;
                    145: #endif
1.1       fvdl      146:        struct cpu_info *ih_cpu;
                    147: };
                    148:
                    149: #define IMASK(ci,level) (ci)->ci_imask[(level)]
                    150: #define IUNMASK(ci,level) (ci)->ci_iunmask[(level)]
                    151:
1.41      plunky    152: #ifdef _KERNEL
                    153:
1.26      yamt      154: void Xspllower(int);
                    155: void spllower(int);
                    156: int splraise(int);
                    157: void softintr(int);
1.1       fvdl      158:
                    159: /*
                    160:  * Convert spl level to local APIC level
                    161:  */
1.26      yamt      162:
1.1       fvdl      163: #define APIC_LEVEL(l)   ((l) << 4)
                    164:
                    165: /*
1.26      yamt      166:  * Miscellaneous
1.1       fvdl      167:  */
                    168:
                    169: #define SPL_ASSERT_BELOW(x) KDASSERT(curcpu()->ci_ilevel < (x))
                    170: #define        spl0()          spllower(IPL_NONE)
                    171: #define        splx(x)         spllower(x)
                    172:
1.23      ad        173: typedef uint8_t ipl_t;
1.22      yamt      174: typedef struct {
                    175:        ipl_t _ipl;
                    176: } ipl_cookie_t;
                    177:
                    178: static inline ipl_cookie_t
                    179: makeiplcookie(ipl_t ipl)
                    180: {
                    181:
                    182:        return (ipl_cookie_t){._ipl = ipl};
                    183: }
                    184:
                    185: static inline int
                    186: splraiseipl(ipl_cookie_t icookie)
                    187: {
                    188:
                    189:        return splraise(icookie._ipl);
                    190: }
                    191:
1.18      yamt      192: #include <sys/spl.h>
                    193:
1.1       fvdl      194: /*
                    195:  * Stub declarations.
                    196:  */
                    197:
1.29      ad        198: void Xsoftintr(void);
1.54.2.1  pgoyette  199: void Xrecurse_preempt(void);
                    200: void Xresume_preempt(void);
1.1       fvdl      201:
1.54      maxv      202: extern struct intrstub legacy_stubs[];
1.2       fvdl      203: extern struct intrstub ioapic_edge_stubs[];
                    204: extern struct intrstub ioapic_level_stubs[];
1.50      nonaka    205: extern struct intrstub x2apic_edge_stubs[];
                    206: extern struct intrstub x2apic_level_stubs[];
1.1       fvdl      207:
                    208: struct cpu_info;
                    209:
1.10      fvdl      210: struct pcibus_attach_args;
                    211:
1.47      knakahar  212: typedef uint64_t intr_handle_t;
                    213:
1.1       fvdl      214: void intr_default_setup(void);
1.42      dyoung    215: void x86_nmi(void);
1.48      knakahar  216: void *intr_establish_xname(int, struct pic *, int, int, int, int (*)(void *),
                    217:                           void *, bool, const char *);
1.35      ad        218: void *intr_establish(int, struct pic *, int, int, int, int (*)(void *), void *, bool);
1.1       fvdl      219: void intr_disestablish(struct intrhand *);
1.10      fvdl      220: void intr_add_pcibus(struct pcibus_attach_args *);
1.47      knakahar  221: const char *intr_string(intr_handle_t, char *, size_t);
1.1       fvdl      222: void cpu_intr_init(struct cpu_info *);
1.47      knakahar  223: int intr_find_mpmapping(int, int, intr_handle_t *);
1.21      christos  224: struct pic *intr_findpic(int);
1.1       fvdl      225: void intr_printconfig(void);
                    226:
1.53      knakahar  227: const char *intr_create_intrid(int, struct pic *, int, char *, size_t);
1.46      knakahar  228: struct intrsource *intr_allocate_io_intrsource(const char *);
                    229: void intr_free_io_intrsource(const char *);
                    230:
1.1       fvdl      231: int x86_send_ipi(struct cpu_info *, int);
                    232: void x86_broadcast_ipi(int);
                    233: void x86_ipi_handler(void);
                    234:
1.51      cherry    235: #ifndef XEN
1.45      uebayasi  236: extern void (* const ipifunc[X86_NIPI])(struct cpu_info *);
1.51      cherry    237: #endif
1.1       fvdl      238:
1.41      plunky    239: #endif /* _KERNEL */
                    240:
1.1       fvdl      241: #endif /* !_LOCORE */
                    242:
                    243: #endif /* !_X86_INTR_H_ */

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