[BACK]Return to lock.h CVS log [TXT][DIR] Up to [cvs.NetBSD.org] / src / sys / arch / vax / include

Annotation of src/sys/arch/vax/include/lock.h, Revision 1.23

1.23    ! mrg         1: /*     $NetBSD: lock.h,v 1.22 2007/02/16 01:34:02 matt Exp $   */
1.1       ragge       2:
                      3: /*
                      4:  * Copyright (c) 2000 Ludd, University of Lule}, Sweden.
                      5:  * All rights reserved.
                      6:  *
                      7:  * Redistribution and use in source and binary forms, with or without
                      8:  * modification, are permitted provided that the following conditions
                      9:  * are met:
                     10:  * 1. Redistributions of source code must retain the above copyright
                     11:  *    notice, this list of conditions and the following disclaimer.
                     12:  * 2. Redistributions in binary form must reproduce the above copyright
                     13:  *    notice, this list of conditions and the following disclaimer in the
                     14:  *    documentation and/or other materials provided with the distribution.
                     15:  * 3. All advertising materials mentioning features or use of this software
                     16:  *    must display the following acknowledgement:
                     17:  *     This product includes software developed at Ludd, University of Lule}.
                     18:  * 4. The name of the author may not be used to endorse or promote products
                     19:  *    derived from this software without specific prior written permission
                     20:  *
                     21:  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
                     22:  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
                     23:  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
                     24:  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
                     25:  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
                     26:  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
                     27:  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
                     28:  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
                     29:  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
                     30:  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
                     31:  */
                     32:
                     33: #ifndef _VAX_LOCK_H_
                     34: #define _VAX_LOCK_H_
1.11      matt       35:
                     36: #ifdef _KERNEL
1.13      he         37: #ifdef _KERNEL_OPT
1.12      martin     38: #include "opt_multiprocessor.h"
1.16      he         39: #include <machine/intr.h>
1.13      he         40: #endif
1.11      matt       41: #include <machine/cpu.h>
                     42: #endif
1.3       ragge      43:
1.22      matt       44: static inline void
1.4       thorpej    45: __cpu_simple_lock_init(__cpu_simple_lock_t *alp)
1.1       ragge      46: {
1.9       matt       47: #ifdef _KERNEL
1.20      perry      48:        __asm volatile ("movl %0,%%r1;jsb Sunlock"
1.6       ragge      49:                : /* No output */
                     50:                : "g"(alp)
                     51:                : "r1","cc","memory");
1.9       matt       52: #else
1.20      perry      53:        __asm volatile ("bbcci $0,%0,1f;1:"
1.6       ragge      54:                : /* No output */
1.9       matt       55:                : "m"(*alp)
                     56:                : "cc");
1.6       ragge      57: #endif
1.1       ragge      58: }
                     59:
1.22      matt       60: static inline int
1.7       ragge      61: __cpu_simple_lock_try(__cpu_simple_lock_t *alp)
                     62: {
                     63:        int ret;
                     64:
1.9       matt       65: #ifdef _KERNEL
1.20      perry      66:        __asm volatile ("movl %1,%%r1;jsb Slocktry;movl %%r0,%0"
1.7       ragge      67:                : "=&r"(ret)
                     68:                : "g"(alp)
                     69:                : "r0","r1","cc","memory");
1.9       matt       70: #else
1.20      perry      71:        __asm volatile ("clrl %0;bbssi $0,%1,1f;incl %0;1:"
1.7       ragge      72:                : "=&r"(ret)
1.9       matt       73:                : "m"(*alp)
                     74:                : "cc");
1.7       ragge      75: #endif
                     76:
                     77:        return ret;
                     78: }
                     79:
1.9       matt       80: #ifdef _KERNEL
1.8       ragge      81: #define        VAX_LOCK_CHECKS ((1 << IPI_SEND_CNCHAR) | (1 << IPI_DDB))
1.7       ragge      82: #define        __cpu_simple_lock(alp)                                          \
1.9       matt       83: do {                                                                   \
1.7       ragge      84:        struct cpu_info *__ci = curcpu();                               \
                     85:                                                                        \
                     86:        while (__cpu_simple_lock_try(alp) == 0) {                       \
1.17      he         87:                int ___s;                                               \
1.7       ragge      88:                                                                        \
1.8       ragge      89:                if (__ci->ci_ipimsgs & VAX_LOCK_CHECKS) {               \
1.17      he         90:                        ___s = splipi();                                \
1.7       ragge      91:                        cpu_handle_ipi();                               \
1.17      he         92:                        splx(___s);                                     \
1.7       ragge      93:                }                                                       \
                     94:        }                                                               \
1.9       matt       95: } while (0)
                     96: #else
1.23    ! mrg        97: static inline void
1.9       matt       98: __cpu_simple_lock(__cpu_simple_lock_t *alp)
                     99: {
1.20      perry     100:        __asm volatile ("1:bbssi $0,%0,1b"
1.9       matt      101:                : /* No outputs */
                    102:                : "m"(*alp)
                    103:                : "cc");
1.7       ragge     104: }
1.9       matt      105: #endif /* _KERNEL */
1.7       ragge     106:
                    107: #if 0
1.22      matt      108: static inline void
1.4       thorpej   109: __cpu_simple_lock(__cpu_simple_lock_t *alp)
1.1       ragge     110: {
1.7       ragge     111:        struct cpu_info *ci = curcpu();
                    112:
                    113:        while (__cpu_simple_lock_try(alp) == 0) {
                    114:                int s;
                    115:
                    116:                if (ci->ci_ipimsgs & IPI_SEND_CNCHAR) {
                    117:                        s = splipi();
                    118:                        cpu_handle_ipi();
                    119:                        splx(s);
                    120:                }
                    121:        }
                    122:
                    123: #if 0
1.20      perry     124:        __asm volatile ("movl %0,%%r1;jsb Slock"
1.6       ragge     125:                : /* No output */
                    126:                : "g"(alp)
                    127:                : "r0","r1","cc","memory");
1.7       ragge     128: #endif
1.6       ragge     129: #if 0
1.20      perry     130:        __asm volatile ("1:;bbssi $0, %0, 1b"
1.1       ragge     131:                : /* No output */
1.5       matt      132:                : "m"(*alp));
1.6       ragge     133: #endif
1.1       ragge     134: }
1.7       ragge     135: #endif
1.1       ragge     136:
1.22      matt      137: static inline void
1.4       thorpej   138: __cpu_simple_unlock(__cpu_simple_lock_t *alp)
1.1       ragge     139: {
1.9       matt      140: #ifdef _KERNEL
1.20      perry     141:        __asm volatile ("movl %0,%%r1;jsb Sunlock"
1.6       ragge     142:                : /* No output */
                    143:                : "g"(alp)
                    144:                : "r1","cc","memory");
1.9       matt      145: #else
1.20      perry     146:        __asm volatile ("bbcci $0,%0,1f;1:"
1.6       ragge     147:                : /* No output */
1.9       matt      148:                : "m"(*alp)
                    149:                : "cc");
1.6       ragge     150: #endif
1.1       ragge     151: }
                    152:
1.6       ragge     153: #if defined(MULTIPROCESSOR)
                    154: /*
                    155:  * On the Vax, interprocessor interrupts can come in at device priority
                    156:  * level or lower. This can cause some problems while waiting for r/w
                    157:  * spinlocks from a high'ish priority level: IPIs that come in will not
                    158:  * be processed. This can lead to deadlock.
                    159:  *
                    160:  * This hook allows IPIs to be processed while a spinlock's interlock
                    161:  * is released.
                    162:  */
                    163: #define SPINLOCK_SPIN_HOOK                                             \
                    164: do {                                                                   \
                    165:        struct cpu_info *__ci = curcpu();                               \
1.17      he        166:        int ___s;                                                       \
1.6       ragge     167:                                                                        \
                    168:        if (__ci->ci_ipimsgs != 0) {                                    \
                    169:                /* printf("CPU %lu has IPIs pending\n",                 \
                    170:                    __ci->ci_cpuid); */                                 \
1.17      he        171:                ___s = splipi();                                        \
1.6       ragge     172:                cpu_handle_ipi();                                       \
1.17      he        173:                splx(___s);                                             \
1.6       ragge     174:        }                                                               \
                    175: } while (0)
                    176: #endif /* MULTIPROCESSOR */
1.22      matt      177:
                    178: static inline void
                    179: mb_read(void)
                    180: {
                    181: }
                    182:
                    183: static inline void
                    184: mb_write(void)
                    185: {
                    186: }
1.1       ragge     187: #endif /* _VAX_LOCK_H_ */

CVSweb <webmaster@jp.NetBSD.org>